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  1. /dts-v1/;
  2.  
  3. / {
  4. model = "QNAP TS219 family";
  5. compatible = "qnap,ts219", "marvell,kirkwood";
  6. #address-cells = <0x1>;
  7. #size-cells = <0x1>;
  8. interrupt-parent = <0x1>;
  9.  
  10. cpus {
  11. #address-cells = <0x1>;
  12. #size-cells = <0x0>;
  13.  
  14. cpu@0 {
  15. reg = <0x0>;
  16. compatible = "marvell,feroceon";
  17. clock-names = "cpu_clk", "ddrclk", "powersave";
  18. device_type = "cpu";
  19. clocks = <0x2 0x1 0x2 0x3 0x3 0xb>;
  20. };
  21. };
  22.  
  23. mbus {
  24. compatible = "marvell,kirkwood-mbus", "simple-bus";
  25. pcie-io-aperture = <0xf2000000 0x100000>;
  26. controller = <0x4>;
  27. ranges = <0xf0010000 0x0 0xf1000000 0x100000 0x12f0000 0x0 0xf4000000 0x10000 0x3010000 0x0 0xf5000000 0x10000>;
  28. pcie-mem-aperture = <0xe0000000 0x10000000>;
  29. #address-cells = <0x2>;
  30. #size-cells = <0x1>;
  31.  
  32. nand@012f {
  33. ale = <0x1>;
  34. cle = <0x0>;
  35. reg = <0x12f0000 0x0 0x400>;
  36. pinctrl-0 = <0x5>;
  37. chip-delay = <0x19>;
  38. bank-width = <0x1>;
  39. compatible = "marvell,orion-nand";
  40. clocks = <0x3 0x7>;
  41. status = "disabled";
  42. #address-cells = <0x1>;
  43. #size-cells = <0x1>;
  44. pinctrl-names = "default";
  45. };
  46.  
  47. pcie-controller {
  48. compatible = "marvell,kirkwood-pcie";
  49. bus-range = <0x0 0xff>;
  50. device_type = "pci";
  51. ranges = <0x82000000 0x0 0x40000 0xf0010000 0x40000 0x0 0x2000 0x82000000 0x0 0x44000 0xf0010000 0x44000 0x0 0x2000 0x82000000 0x0 0x80000 0xf0010000 0x80000 0x0 0x2000 0x82000000 0x1 0x0 0x4e80000 0x0 0x1 0x0 0x81000000 0x1 0x0 0x4e00000 0x0 0x1 0x0 0x82000000 0x2 0x0 0x4d80000 0x0 0x1 0x0 0x81000000 0x2 0x0 0x4d00000 0x0 0x1 0x0>;
  52. status = "okay";
  53. #address-cells = <0x3>;
  54. #size-cells = <0x2>;
  55.  
  56. pcie@1,0 {
  57. reg = <0x800 0x0 0x0 0x0 0x0>;
  58. assigned-addresses = <0x82000800 0x0 0x40000 0x0 0x2000>;
  59. device_type = "pci";
  60. clocks = <0x3 0x2>;
  61. #interrupt-cells = <0x1>;
  62. marvell,pcie-lane = <0x0>;
  63. ranges = <0x82000000 0x0 0x0 0x82000000 0x1 0x0 0x1 0x0 0x81000000 0x0 0x0 0x81000000 0x1 0x0 0x1 0x0>;
  64. marvell,pcie-port = <0x0>;
  65. status = "okay";
  66. #address-cells = <0x3>;
  67. interrupt-map = <0x0 0x0 0x0 0x0 0x1 0x9>;
  68. interrupt-map-mask = <0x0 0x0 0x0 0x0>;
  69. #size-cells = <0x2>;
  70. };
  71.  
  72. pcie@2,0 {
  73. reg = <0x1000 0x0 0x0 0x0 0x0>;
  74. assigned-addresses = <0x82001000 0x0 0x44000 0x0 0x2000>;
  75. device_type = "pci";
  76. clocks = <0x3 0x12>;
  77. #interrupt-cells = <0x1>;
  78. marvell,pcie-lane = <0x0>;
  79. ranges = <0x82000000 0x0 0x0 0x82000000 0x2 0x0 0x1 0x0 0x81000000 0x0 0x0 0x81000000 0x2 0x0 0x1 0x0>;
  80. marvell,pcie-port = <0x1>;
  81. status = "okay";
  82. #address-cells = <0x3>;
  83. interrupt-map = <0x0 0x0 0x0 0x0 0x1 0xa>;
  84. interrupt-map-mask = <0x0 0x0 0x0 0x0>;
  85. #size-cells = <0x2>;
  86. };
  87. };
  88.  
  89. sa-sram@0301 {
  90. reg = <0x3010000 0x0 0x800>;
  91. compatible = "mmio-sram";
  92. clocks = <0x3 0x11>;
  93. #address-cells = <0x1>;
  94. phandle = <0xd>;
  95. #size-cells = <0x1>;
  96. linux,phandle = <0xd>;
  97. };
  98. };
  99.  
  100. chosen {
  101. stdout-path = "/ocp@f1000000/serial@12000";
  102. bootargs = "console=ttyS0,115200 root=/dev/ram initrd=0xa00000,0x900000 ramdisk=34816";
  103. };
  104.  
  105. gpio_keys {
  106. pinctrl-0 = <0x16 0x17>;
  107. compatible = "gpio-keys";
  108. #address-cells = <0x1>;
  109. #size-cells = <0x0>;
  110. pinctrl-names = "default";
  111.  
  112. button@1 {
  113. gpios = <0x18 0xb 0x1>;
  114. label = "USB Copy";
  115. linux,code = <0x85>;
  116. };
  117.  
  118. button@2 {
  119. gpios = <0x18 0x5 0x1>;
  120. label = "Reset";
  121. linux,code = <0x198>;
  122. };
  123. };
  124.  
  125. memory {
  126. reg = <0x0 0x20000000>;
  127. device_type = "memory";
  128. };
  129.  
  130. aliases {
  131. i2c0 = "/ocp@f1000000/i2c@11000";
  132. gpio0 = "/ocp@f1000000/gpio@10100";
  133. gpio1 = "/ocp@f1000000/gpio@10140";
  134. };
  135.  
  136. ocp@f1000000 {
  137. compatible = "simple-bus";
  138. ranges = <0x0 0xf1000000 0x100000>;
  139. #address-cells = <0x1>;
  140. #size-cells = <0x1>;
  141.  
  142. crypto@30000 {
  143. reg = <0x30000 0x10000>;
  144. interrupts = <0x16>;
  145. marvell,crypto-srams = <0xd>;
  146. reg-names = "regs";
  147. compatible = "marvell,kirkwood-crypto";
  148. clocks = <0x3 0x11>;
  149. marvell,crypto-sram-size = <0x800>;
  150. status = "okay";
  151. };
  152.  
  153. main-interrupt-ctrl@20200 {
  154. reg = <0x20200 0x10 0x20210 0x10>;
  155. compatible = "marvell,orion-intc";
  156. #interrupt-cells = <0x1>;
  157. phandle = <0x1>;
  158. interrupt-controller;
  159. linux,phandle = <0x1>;
  160. };
  161.  
  162. mvsdio@90000 {
  163. reg = <0x90000 0x200>;
  164. interrupts = <0x1c>;
  165. pinctrl-0 = <0x15>;
  166. compatible = "marvell,orion-sdio";
  167. cap-sdio-irq;
  168. bus-width = <0x4>;
  169. clocks = <0x3 0x4>;
  170. cap-sd-highspeed;
  171. cap-mmc-highspeed;
  172. status = "disabled";
  173. pinctrl-names = "default";
  174. };
  175.  
  176. pin-controller@10000 {
  177. reg = <0x10000 0x20>;
  178. pinctrl-0 = <0x6 0x7>;
  179. compatible = "marvell,88f6282-pinctrl";
  180. pinctrl-names = "default";
  181.  
  182. pmx-nand {
  183. marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp18", "mpp19";
  184. phandle = <0x5>;
  185. marvell,function = "nand";
  186. linux,phandle = <0x5>;
  187. };
  188.  
  189. pmx-sdio {
  190. marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16", "mpp17";
  191. phandle = <0x15>;
  192. marvell,function = "sdio";
  193. linux,phandle = <0x15>;
  194. };
  195.  
  196. pmx-USB-copy-button {
  197. marvell,pins = "mpp43";
  198. phandle = <0x17>;
  199. marvell,function = "gpio";
  200. linux,phandle = <0x17>;
  201. };
  202.  
  203. pmx-sata0 {
  204. marvell,pins = "mpp5", "mpp21", "mpp23";
  205. phandle = <0x13>;
  206. marvell,function = "sata0";
  207. linux,phandle = <0x13>;
  208. };
  209.  
  210. pmx-sata1 {
  211. marvell,pins = "mpp4", "mpp20", "mpp22";
  212. phandle = <0x14>;
  213. marvell,function = "sata1";
  214. linux,phandle = <0x14>;
  215. };
  216.  
  217. pmx-uart0 {
  218. marvell,pins = "mpp10", "mpp11";
  219. phandle = <0xa>;
  220. marvell,function = "uart0";
  221. linux,phandle = <0xa>;
  222. };
  223.  
  224. pmx-uart1 {
  225. marvell,pins = "mpp13", "mpp14";
  226. phandle = <0xb>;
  227. marvell,function = "uart1";
  228. linux,phandle = <0xb>;
  229. };
  230.  
  231. pmx-twsi0 {
  232. marvell,pins = "mpp8", "mpp9";
  233. phandle = <0x9>;
  234. marvell,function = "twsi0";
  235. linux,phandle = <0x9>;
  236. };
  237.  
  238. pmx-twsi1 {
  239. marvell,pins = "mpp36", "mpp37";
  240. phandle = <0x10>;
  241. marvell,function = "twsi1";
  242. linux,phandle = <0x10>;
  243. };
  244.  
  245. pmx-board-id {
  246. marvell,pins = "mpp44";
  247. phandle = <0x7>;
  248. marvell,function = "gpio";
  249. linux,phandle = <0x7>;
  250. };
  251.  
  252. pmx-reset-button {
  253. marvell,pins = "mpp37";
  254. phandle = <0x16>;
  255. marvell,function = "gpio";
  256. linux,phandle = <0x16>;
  257. };
  258.  
  259. pmx-ge1 {
  260. marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23", "mpp24", "mpp25", "mpp26", "mpp27", "mpp30", "mpp31", "mpp32", "mpp33";
  261. phandle = <0xf>;
  262. marvell,function = "ge1";
  263. linux,phandle = <0xf>;
  264. };
  265.  
  266. pmx-spi {
  267. marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
  268. phandle = <0x8>;
  269. marvell,function = "spi";
  270. linux,phandle = <0x8>;
  271. };
  272.  
  273. pmx-ram-size {
  274. marvell,pins = "mpp36";
  275. phandle = <0x6>;
  276. marvell,function = "gpio";
  277. linux,phandle = <0x6>;
  278. };
  279. };
  280.  
  281. timer@20300 {
  282. reg = <0x20300 0x20>;
  283. interrupts = <0x1 0x2>;
  284. compatible = "marvell,orion-timer";
  285. clocks = <0x2 0x0>;
  286. interrupt-parent = <0xc>;
  287. };
  288.  
  289. serial@12000 {
  290. reg = <0x12000 0x100>;
  291. interrupts = <0x21>;
  292. pinctrl-0 = <0xa>;
  293. reg-shift = <0x2>;
  294. compatible = "ns16550a";
  295. clocks = <0x3 0x7>;
  296. status = "okay";
  297. pinctrl-names = "default";
  298. };
  299.  
  300. serial@12100 {
  301. reg = <0x12100 0x100>;
  302. interrupts = <0x22>;
  303. pinctrl-0 = <0xb>;
  304. reg-shift = <0x2>;
  305. compatible = "ns16550a";
  306. clocks = <0x3 0x7>;
  307. status = "okay";
  308. pinctrl-names = "default";
  309. };
  310.  
  311. system-controller@20000 {
  312. reg = <0x20000 0x120>;
  313. compatible = "marvell,orion-system-controller";
  314. };
  315.  
  316. ehci@50000 {
  317. reg = <0x50000 0x1000>;
  318. interrupts = <0x13>;
  319. compatible = "marvell,orion-ehci";
  320. clocks = <0x3 0x3>;
  321. status = "okay";
  322. };
  323.  
  324. xor@60800 {
  325. reg = <0x60800 0x100 0x60a00 0x100>;
  326. compatible = "marvell,orion-xor";
  327. clocks = <0x3 0x8>;
  328. status = "okay";
  329.  
  330. xor00 {
  331. interrupts = <0x5>;
  332. dmacap,xor;
  333. dmacap,memcpy;
  334. };
  335.  
  336. xor01 {
  337. interrupts = <0x6>;
  338. dmacap,xor;
  339. dmacap,memcpy;
  340. dmacap,memset;
  341. };
  342. };
  343.  
  344. xor@60900 {
  345. reg = <0x60900 0x100 0x60b00 0x100>;
  346. compatible = "marvell,orion-xor";
  347. clocks = <0x3 0x10>;
  348. status = "okay";
  349.  
  350. xor00 {
  351. interrupts = <0x7>;
  352. dmacap,xor;
  353. dmacap,memcpy;
  354. };
  355.  
  356. xor01 {
  357. interrupts = <0x8>;
  358. dmacap,xor;
  359. dmacap,memcpy;
  360. dmacap,memset;
  361. };
  362. };
  363.  
  364. sata-phy@82000 {
  365. reg = <0x82000 0x334>;
  366. compatible = "marvell,mvebu-sata-phy";
  367. clock-names = "sata";
  368. #phy-cells = <0x0>;
  369. clocks = <0x3 0xe>;
  370. status = "ok";
  371. phandle = <0x11>;
  372. linux,phandle = <0x11>;
  373. };
  374.  
  375. sata-phy@84000 {
  376. reg = <0x84000 0x334>;
  377. compatible = "marvell,mvebu-sata-phy";
  378. clock-names = "sata";
  379. #phy-cells = <0x0>;
  380. clocks = <0x3 0xf>;
  381. status = "ok";
  382. phandle = <0x12>;
  383. linux,phandle = <0x12>;
  384. };
  385.  
  386. mdio-bus@72004 {
  387. reg = <0x72004 0x84>;
  388. interrupts = <0x2e>;
  389. compatible = "marvell,orion-mdio";
  390. clocks = <0x3 0x0>;
  391. status = "okay";
  392. #address-cells = <0x1>;
  393. #size-cells = <0x0>;
  394.  
  395. ethernet-phy {
  396. reg = <0x0>;
  397. phandle = <0xe>;
  398. linux,phandle = <0xe>;
  399. };
  400. };
  401.  
  402. core-clocks@10030 {
  403. reg = <0x10030 0x4>;
  404. #clock-cells = <0x1>;
  405. compatible = "marvell,kirkwood-core-clock";
  406. phandle = <0x2>;
  407. linux,phandle = <0x2>;
  408. };
  409.  
  410. ethernet-controller@72000 {
  411. reg = <0x72000 0x4000>;
  412. compatible = "marvell,kirkwood-eth";
  413. marvell,tx-checksum-limit = <0x640>;
  414. clocks = <0x3 0x0>;
  415. status = "okay";
  416. #address-cells = <0x1>;
  417. #size-cells = <0x0>;
  418.  
  419. ethernet0-port@0 {
  420. reg = <0x0>;
  421. interrupts = <0xb>;
  422. phy-handle = <0xe>;
  423. compatible = "marvell,kirkwood-eth-port";
  424. local-mac-address = [00 08 9b e3 46 22];
  425. };
  426. };
  427.  
  428. ethernet-controller@76000 {
  429. reg = <0x76000 0x4000>;
  430. pinctrl-0 = <0xf>;
  431. compatible = "marvell,kirkwood-eth";
  432. marvell,tx-checksum-limit = <0x640>;
  433. clocks = <0x3 0x13>;
  434. status = "disabled";
  435. #address-cells = <0x1>;
  436. #size-cells = <0x0>;
  437. pinctrl-names = "default";
  438.  
  439. ethernet1-port@0 {
  440. reg = <0x0>;
  441. interrupts = <0xf>;
  442. compatible = "marvell,kirkwood-eth-port";
  443. local-mac-address = [00 00 00 00 00 00];
  444. };
  445. };
  446.  
  447. mbus-controller@20000 {
  448. reg = <0x20000 0x80 0x1500 0x20>;
  449. compatible = "marvell,mbus-controller";
  450. phandle = <0x4>;
  451. linux,phandle = <0x4>;
  452. };
  453.  
  454. bridge-interrupt-ctrl@20110 {
  455. reg = <0x20110 0x8>;
  456. interrupts = <0x1>;
  457. marvell,#interrupts = <0x6>;
  458. compatible = "marvell,orion-bridge-intc";
  459. #interrupt-cells = <0x1>;
  460. phandle = <0xc>;
  461. interrupt-controller;
  462. linux,phandle = <0xc>;
  463. };
  464.  
  465. watchdog-timer@20300 {
  466. reg = <0x20300 0x28 0x20108 0x4>;
  467. interrupts = <0x3>;
  468. compatible = "marvell,orion-wdt";
  469. clocks = <0x3 0x7>;
  470. status = "okay";
  471. interrupt-parent = <0xc>;
  472. };
  473.  
  474. i2c@11000 {
  475. reg = <0x11000 0x20>;
  476. interrupts = <0x1d>;
  477. pinctrl-0 = <0x9>;
  478. compatible = "marvell,mv64xxx-i2c";
  479. clock-frequency = <0x61a80>;
  480. clocks = <0x3 0x7>;
  481. status = "okay";
  482. #address-cells = <0x1>;
  483. #size-cells = <0x0>;
  484. pinctrl-names = "default";
  485.  
  486. s35390a@30 {
  487. reg = <0x30>;
  488. compatible = "s35390a";
  489. };
  490. };
  491.  
  492. i2c@11100 {
  493. reg = <0x11100 0x20>;
  494. interrupts = <0x20>;
  495. pinctrl-0 = <0x10>;
  496. compatible = "marvell,mv64xxx-i2c";
  497. clock-frequency = <0x186a0>;
  498. clocks = <0x3 0x7>;
  499. status = "disabled";
  500. #address-cells = <0x1>;
  501. #size-cells = <0x0>;
  502. pinctrl-names = "default";
  503. };
  504.  
  505. rtc@10300 {
  506. reg = <0x10300 0x20>;
  507. interrupts = <0x35>;
  508. compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
  509. clocks = <0x3 0x7>;
  510. };
  511.  
  512. poweroff@12100 {
  513. reg = <0x12100 0x100>;
  514. compatible = "qnap,power-off";
  515. clocks = <0x3 0x7>;
  516. };
  517.  
  518. gpio@10100 {
  519. reg = <0x10100 0x40>;
  520. interrupts = <0x23 0x24 0x25 0x26>;
  521. #gpio-cells = <0x2>;
  522. compatible = "marvell,orion-gpio";
  523. clocks = <0x3 0x7>;
  524. #interrupt-cells = <0x2>;
  525. ngpios = <0x20>;
  526. interrupt-controller;
  527. gpio-controller;
  528. };
  529.  
  530. gpio@10140 {
  531. reg = <0x10140 0x40>;
  532. interrupts = <0x27 0x28 0x29>;
  533. #gpio-cells = <0x2>;
  534. compatible = "marvell,orion-gpio";
  535. clocks = <0x3 0x7>;
  536. #interrupt-cells = <0x2>;
  537. ngpios = <0x12>;
  538. phandle = <0x18>;
  539. interrupt-controller;
  540. gpio-controller;
  541. linux,phandle = <0x18>;
  542. };
  543.  
  544. spi@10600 {
  545. reg = <0x10600 0x28>;
  546. interrupts = <0x17>;
  547. pinctrl-0 = <0x8>;
  548. compatible = "marvell,orion-spi";
  549. clocks = <0x3 0x7>;
  550. cell-index = <0x0>;
  551. status = "okay";
  552. #address-cells = <0x1>;
  553. #size-cells = <0x0>;
  554. pinctrl-names = "default";
  555.  
  556. m25p128@0 {
  557. reg = <0x0>;
  558. mode = <0x0>;
  559. compatible = "m25p128", "jedec,spi-nor";
  560. spi-max-frequency = <0x1312d00>;
  561. #address-cells = <0x1>;
  562. #size-cells = <0x1>;
  563.  
  564. partition@00040000 {
  565. reg = <0x80000 0x40000>;
  566. label = "U-Boot Config";
  567. };
  568.  
  569. partition@00200000 {
  570. reg = <0x200000 0x200000>;
  571. label = "Kernel";
  572. };
  573.  
  574. partition@00400000 {
  575. reg = <0x400000 0x900000>;
  576. label = "RootFS1";
  577. };
  578.  
  579. partition@000c0000 {
  580. reg = <0xc0000 0x140000>;
  581. label = "NAS Config";
  582. };
  583.  
  584. partition@00d00000 {
  585. reg = <0xd00000 0x300000>;
  586. label = "RootFS2";
  587. };
  588.  
  589. partition@0000000 {
  590. reg = <0x0 0x80000>;
  591. label = "U-Boot";
  592. };
  593. };
  594. };
  595.  
  596. clock-gating-control@2011c {
  597. reg = <0x2011c 0x4>;
  598. #clock-cells = <0x1>;
  599. compatible = "marvell,kirkwood-gating-clock";
  600. clocks = <0x2 0x0>;
  601. phandle = <0x3>;
  602. linux,phandle = <0x3>;
  603. };
  604.  
  605. thermal@10078 {
  606. reg = <0x10078 0x4>;
  607. compatible = "marvell,kirkwood-thermal";
  608. status = "okay";
  609. };
  610.  
  611. sata@80000 {
  612. reg = <0x80000 0x5000>;
  613. phys = <0x11 0x12>;
  614. interrupts = <0x15>;
  615. pinctrl-0 = <0x13 0x14>;
  616. compatible = "marvell,orion-sata";
  617. clock-names = <0x30003100>;
  618. phy-names = "port0", "port1";
  619. clocks = <0x3 0xe 0x3 0xf>;
  620. nr-ports = <0x2>;
  621. status = "okay";
  622. pinctrl-names = "default";
  623. };
  624.  
  625. audio-controller@a0000 {
  626. reg = <0xa0000 0x2210>;
  627. interrupts = <0x18>;
  628. compatible = "marvell,kirkwood-audio";
  629. clock-names = "internal";
  630. clocks = <0x3 0x9>;
  631. status = "disabled";
  632. #sound-dai-cells = <0x0>;
  633. };
  634.  
  635. l2-cache@20128 {
  636. reg = <0x20128 0x4>;
  637. compatible = "marvell,kirkwood-cache";
  638. };
  639. };
  640. };
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