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  1. Exynos4412 (Odroid-X2)
  2.  
  3. tinymembench v0.3.9 (simple benchmark for memory throughput and latency)
  4.  
  5. ==========================================================================
  6. == Memory bandwidth tests ==
  7. == ==
  8. == Note 1: 1MB = 1000000 bytes ==
  9. == Note 2: Results for 'copy' tests show how many bytes can be ==
  10. == copied per second (adding together read and writen ==
  11. == bytes would have provided twice higher numbers) ==
  12. == Note 3: 2-pass copy means that we are using a small temporary buffer ==
  13. == to first fetch data into it, and only then write it to the ==
  14. == destination (source -> L1 cache, L1 cache -> destination) ==
  15. == Note 4: If sample standard deviation exceeds 0.1%, it is shown in ==
  16. == brackets ==
  17. ==========================================================================
  18.  
  19. C copy backwards : 461.8 MB/s
  20. C copy : 1244.5 MB/s (0.3%)
  21. C copy prefetched (32 bytes step) : 803.6 MB/s
  22. C copy prefetched (64 bytes step) : 807.7 MB/s
  23. C 2-pass copy : 945.2 MB/s
  24. C 2-pass copy prefetched (32 bytes step) : 846.0 MB/s
  25. C 2-pass copy prefetched (64 bytes step) : 839.6 MB/s
  26. C fill : 2957.1 MB/s (0.8%)
  27. ---
  28. standard memcpy : 1198.3 MB/s
  29. standard memset : 2954.3 MB/s
  30. ---
  31. NEON read : 1885.4 MB/s
  32. NEON read prefetched (32 bytes step) : 1848.5 MB/s
  33. NEON read prefetched (64 bytes step) : 1907.3 MB/s
  34. NEON read 2 data streams : 1834.5 MB/s
  35. NEON read 2 data streams prefetched (32 bytes step) : 1704.5 MB/s
  36. NEON read 2 data streams prefetched (64 bytes step) : 1578.3 MB/s
  37. NEON copy : 1140.8 MB/s
  38. NEON copy prefetched (32 bytes step) : 1210.3 MB/s
  39. NEON copy prefetched (64 bytes step) : 1210.9 MB/s
  40. NEON unrolled copy : 1205.9 MB/s
  41. NEON unrolled copy prefetched (32 bytes step) : 1180.5 MB/s
  42. NEON unrolled copy prefetched (64 bytes step) : 1178.7 MB/s
  43. NEON copy backwards : 444.5 MB/s
  44. NEON copy backwards prefetched (32 bytes step) : 783.9 MB/s
  45. NEON copy backwards prefetched (64 bytes step) : 985.1 MB/s
  46. NEON 2-pass copy : 854.0 MB/s
  47. NEON 2-pass copy prefetched (32 bytes step) : 1006.6 MB/s
  48. NEON 2-pass copy prefetched (64 bytes step) : 1005.2 MB/s
  49. NEON unrolled 2-pass copy : 902.5 MB/s
  50. NEON unrolled 2-pass copy prefetched (32 bytes step) : 1001.4 MB/s
  51. NEON unrolled 2-pass copy prefetched (64 bytes step) : 1009.7 MB/s
  52. NEON fill : 2954.4 MB/s
  53. NEON fill backwards : 2952.0 MB/s
  54. VFP copy : 1248.5 MB/s
  55. VFP 2-pass copy : 1023.6 MB/s
  56. ARM fill (STRD) : 2954.1 MB/s
  57. ARM fill (STM with 8 registers) : 2954.4 MB/s
  58. ARM fill (STM with 4 registers) : 2954.2 MB/s
  59. ARM copy prefetched (incr pld) : 1185.9 MB/s
  60. ARM copy prefetched (wrap pld) : 1185.8 MB/s
  61. ARM 2-pass copy prefetched (incr pld) : 1064.1 MB/s
  62. ARM 2-pass copy prefetched (wrap pld) : 1059.3 MB/s
  63.  
  64. ==========================================================================
  65. == Memory latency test ==
  66. == ==
  67. == Average time is measured for random memory accesses in the buffers ==
  68. == of different sizes. The larger is the buffer, the more significant ==
  69. == are relative contributions of TLB, L1/L2 cache misses and SDRAM ==
  70. == accesses. For extremely large buffer sizes we are expecting to see ==
  71. == page table walk with several requests to SDRAM for almost every ==
  72. == memory access (though 64MiB is not nearly large enough to experience ==
  73. == this effect to its fullest). ==
  74. == ==
  75. == Note 1: All the numbers are representing extra time, which needs to ==
  76. == be added to L1 cache latency. The cycle timings for L1 cache ==
  77. == latency can be usually found in the processor documentation. ==
  78. == Note 2: Dual random read means that we are simultaneously performing ==
  79. == two independent memory accesses at a time. In the case if ==
  80. == the memory subsystem can't handle multiple outstanding ==
  81. == requests, dual random read has the same timings as two ==
  82. == single reads performed one after another. ==
  83. ==========================================================================
  84.  
  85. block size : single random read / dual random read
  86. 1024 : 0.0 ns / 0.0 ns
  87. 2048 : 0.0 ns / 0.0 ns
  88. 4096 : 0.0 ns / 0.0 ns
  89. 8192 : 0.0 ns / 0.0 ns
  90. 16384 : 0.0 ns / 0.0 ns
  91. 32768 : 0.0 ns / 0.0 ns
  92. 65536 : 6.1 ns / 9.2 ns
  93. 131072 : 9.0 ns / 11.6 ns
  94. 262144 : 12.9 ns / 15.2 ns
  95. 524288 : 15.0 ns / 16.6 ns
  96. 1048576 : 23.8 ns / 32.4 ns
  97. 2097152 : 77.0 ns / 117.5 ns
  98. 4194304 : 106.5 ns / 149.3 ns
  99. 8388608 : 122.5 ns / 163.4 ns
  100. 16777216 : 133.0 ns / 174.4 ns
  101. 33554432 : 141.0 ns / 185.2 ns
  102. 67108864 : 148.7 ns / 198.1 ns
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