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  1. *** ../oldral/if_ral_pci.c  Thu May 19 17:16:46 2011
  2. --- if_ral_pci.c    Mon Jun  6 17:26:55 2011
  3. ***************
  4. *** 1,10 ****
  5. --- 1,11 ----
  6.   /*    $FreeBSD: src/sys/dev/ral/if_ral_pci.c,v 1.9 2009/03/09 13:23:54 imp Exp $  */
  7.  
  8.   /*-
  9.    * Copyright (c) 2005, 2006
  10.    *    Damien Bergamini <[email protected]>
  11. +  *      Minor changes for rt2860 and bugs added by Matt ([email protected])
  12.    *
  13.    * Permission to use, copy, modify, and distribute this software for any
  14.    * purpose with or without fee is hereby granted, provided that the above
  15.    * copyright notice and this permission notice appear in all copies.
  16.    *
  17. ***************
  18. *** 19,29 ****
  19.  
  20.   #include <sys/cdefs.h>
  21.   __FBSDID("$FreeBSD: src/sys/dev/ral/if_ral_pci.c,v 1.9 2009/03/09 13:23:54 imp Exp $");
  22.  
  23.   /*
  24. !  * PCI/Cardbus front-end for the Ralink RT2560/RT2561/RT2561S/RT2661 driver.
  25.    */
  26.  
  27.   #include <sys/param.h>
  28.   #include <sys/sysctl.h>
  29.   #include <sys/sockio.h>
  30. --- 20,30 ----
  31.  
  32.   #include <sys/cdefs.h>
  33.   __FBSDID("$FreeBSD: src/sys/dev/ral/if_ral_pci.c,v 1.9 2009/03/09 13:23:54 imp Exp $");
  34.  
  35.   /*
  36. !  * PCI/Cardbus front-end for the Ralink RT2560/RT2561/RT2561S/RT2661/RT2860/RT3090 driver.
  37.    */
  38.  
  39.   #include <sys/param.h>
  40.   #include <sys/sysctl.h>
  41.   #include <sys/sockio.h>
  42. ***************
  43. *** 56,65 ****
  44. --- 57,80 ----
  45.   #include <dev/pci/pcivar.h>
  46.  
  47.   #include <dev/ral/rt2560var.h>
  48.   #include <dev/ral/rt2661var.h>
  49.  
  50. + /* RT2860 includes */
  51. + #include <dev/ral/rt2860_softc.h>
  52. + #include <dev/ral/rt2860_reg.h>
  53. + #include <dev/ral/rt2860_eeprom.h>
  54. + #include <dev/ral/rt2860_ucode.h>
  55. + #include <dev/ral/rt2860_txwi.h>
  56. + #include <dev/ral/rt2860_rxwi.h>
  57. + #include <dev/ral/rt2860_io.h>
  58. + #include <dev/ral/rt2860_read_eeprom.h>
  59. + #include <dev/ral/rt2860_led.h>
  60. + #include <dev/ral/rt2860_rf.h>
  61. + #include <dev/ral/rt2860_debug.h>
  62. +
  63. +
  64.   MODULE_DEPEND(ral, pci, 1, 1, 1);
  65.   MODULE_DEPEND(ral, firmware, 1, 1, 1);
  66.   MODULE_DEPEND(ral, wlan, 1, 1, 1);
  67.   MODULE_DEPEND(ral, wlan_amrr, 1, 1, 1);
  68.  
  69. ***************
  70. *** 67,82 ****
  71.     uint16_t    vendor;
  72.     uint16_t    device;
  73.     const char  *name;
  74.   };
  75.  
  76.   static const struct ral_pci_ident ral_pci_ids[] = {
  77.     { 0x1814, 0x0201, "Ralink Technology RT2560" },
  78.     { 0x1814, 0x0301, "Ralink Technology RT2561S" },
  79.     { 0x1814, 0x0302, "Ralink Technology RT2561" },
  80.     { 0x1814, 0x0401, "Ralink Technology RT2661" },
  81. !
  82.     { 0, 0, NULL }
  83.   };
  84.  
  85.   static struct ral_opns {
  86.     int (*attach)(device_t, int);
  87. --- 82,108 ----
  88.     uint16_t    vendor;
  89.     uint16_t    device;
  90.     const char  *name;
  91.   };
  92.  
  93. + #define PCI_VENDOR_RALINK                     0x1814
  94. + #define PCI_PRODUCT_RALINK_RT2860_PCI         0x0601
  95. + #define PCI_PRODUCT_RALINK_RT2860_PCIe            0x0681
  96. + #define PCI_PRODUCT_RALINK_RT2760_PCI         0x0701
  97. + #define PCI_PRODUCT_RALINK_RT2790_PCIe            0x0781
  98. + #define PCI_PRODUCT_RALINK_RT3090_PCIe            0x3090
  99. +
  100.   static const struct ral_pci_ident ral_pci_ids[] = {
  101.     { 0x1814, 0x0201, "Ralink Technology RT2560" },
  102.     { 0x1814, 0x0301, "Ralink Technology RT2561S" },
  103.     { 0x1814, 0x0302, "Ralink Technology RT2561" },
  104.     { 0x1814, 0x0401, "Ralink Technology RT2661" },
  105. !   { 0x1814, 0x0601, "Ralink Technology RT2860" },
  106. !   { 0x1814, 0x0681, "Ralink Technology RT2860" },
  107. !   { 0x1814, 0x0701, "Ralink Technology RT2760" },
  108. !   { 0x1814, 0x0781, "Ralink Technology RT2790" },
  109. !   { 0x1814, 0x3090, "Ralink Technology RT3090" },
  110.     { 0, 0, NULL }
  111.   };
  112.  
  113.   static struct ral_opns {
  114.     int (*attach)(device_t, int);
  115. ***************
  116. *** 99,114 ****
  117. --- 125,150 ----
  118.     rt2661_detach,
  119.     rt2661_shutdown,
  120.     rt2661_suspend,
  121.     rt2661_resume,
  122.     rt2661_intr
  123. +
  124. + }, ral_rt2860_opns = {
  125. +   rt2860_attach,
  126. +   rt2860_detach,
  127. +   rt2860_shutdown,
  128. +   rt2860_suspend,
  129. +   rt2860_resume,
  130. +   rt2860_intr
  131. +
  132.   };
  133.  
  134.   struct ral_pci_softc {
  135.     union {
  136.         struct rt2560_softc sc_rt2560;
  137.         struct rt2661_softc sc_rt2661;
  138. +       struct rt2860_softc sc_rt2860;
  139.     } u;
  140.  
  141.     struct ral_opns     *sc_opns;
  142.     int         irq_rid;
  143.     int         mem_rid;
  144. ***************
  145. *** 178,190 ****
  146. --- 214,247 ----
  147.     }
  148.  
  149.     /* enable bus-mastering */
  150.     pci_enable_busmaster(dev);
  151.  
  152. + /*
  153.     psc->sc_opns = (pci_get_device(dev) == 0x0201) ? &ral_rt2560_opns :
  154.         &ral_rt2661_opns;
  155. + */
  156.  
  157. +   if (pci_get_vendor(dev) == PCI_VENDOR_RALINK) {
  158. +       switch (pci_get_device(dev)) {
  159. +       case 0x2560:
  160. +           psc->sc_opns = &ral_rt2560_opns;
  161. +           break;
  162. +       case 0x2561:
  163. +       case 0x2562: /*rt2561s these are all invalid codes to avoid -Werror crap from clang */
  164. +       case 0x2661:
  165. +           psc->sc_opns = &ral_rt2661_opns;
  166. +           break;
  167. +       default:
  168. +           psc->sc_opns = &ral_rt2860_opns;
  169. +           break;
  170. +       }
  171. +   } else {
  172. +       /* all other vendors are RT2860 only */
  173. +      
  174. +       psc->sc_opns = &ral_rt2860_opns;
  175. +   }
  176.     psc->mem_rid = RAL_PCI_BAR0;
  177.     psc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &psc->mem_rid,
  178.         RF_ACTIVE);
  179.     if (psc->mem == NULL) {
  180.         device_printf(dev, "could not allocate memory resource\n");
  181. ***************
  182. *** 205,219 ****
  183. --- 262,281 ----
  184.  
  185.     error = (*psc->sc_opns->attach)(dev, pci_get_device(dev));
  186.     if (error != 0)
  187.         return error;
  188.  
  189. +
  190. +
  191.     /*
  192.      * Hook our interrupt after all initialization is complete.
  193.      */
  194. +
  195.     error = bus_setup_intr(dev, psc->irq, INTR_TYPE_NET | INTR_MPSAFE,
  196.         NULL, psc->sc_opns->intr, psc, &psc->sc_ih);
  197. +  
  198. +  
  199.     if (error != 0) {
  200.         device_printf(dev, "could not set up interrupt\n");
  201.         return error;
  202.     }
  203.     sc->sc_invalid = 0;
  204. *** /dev/null   Mon Jun  6 17:35:57 2011
  205. --- rt2860.c    Mon Jun  6 17:29:30 2011
  206. ***************
  207. *** 0 ****
  208. --- 1,9849 ----
  209. +
  210. + /*-
  211. +  * Copyright (c) 2009-2010 Alexander Egorenkov <[email protected]>
  212. +  * Copyright (c) 2009 Damien Bergamini <[email protected]>
  213. +  *    Minor changes and bugs added by Matt <[email protected]>
  214. +  * Permission to use, copy, modify, and distribute this software for any
  215. +  * purpose with or without fee is hereby granted, provided that the above
  216. +  * copyright notice and this permission notice appear in all copies.
  217. +  *
  218. +  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  219. +  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  220. +  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  221. +  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  222. +  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  223. +  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  224. +  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  225. +  */
  226. +
  227. + #include <sys/param.h>
  228. + #include <sys/kernel.h>
  229. + #include <sys/module.h>
  230. + #include <sys/socket.h>
  231. + #include <sys/sysctl.h>
  232. + #include <net/if.h>
  233. + #include <net/if_media.h>
  234. + #include <dev/pci/pcireg.h>
  235. + #include <dev/pci/pcivar.h>
  236. + #include <net80211/ieee80211_var.h>
  237. + #include <dev/ral/rt2860_softc.h>
  238. + #include <dev/ral/rt2860_reg.h>
  239. + #include <dev/ral/rt2860_eeprom.h>
  240. + #include <dev/ral/rt2860_ucode.h>
  241. + #include <dev/ral/rt2860_txwi.h>
  242. + #include <dev/ral/rt2860_rxwi.h>
  243. + #include <dev/ral/rt2860_io.h>
  244. + #include <dev/ral/rt2860_read_eeprom.h>
  245. + #include <dev/ral/rt2860_led.h>
  246. + #include <dev/ral/rt2860_rf.h>
  247. + #include <dev/ral/rt2860_debug.h>
  248. + #include <dev/ral/rt2860_amrr.h>
  249. +
  250. + /*
  251. +  * Defines and macros (General)
  252. +  */
  253. +
  254. + #define RT2860_MAX_AGG_SIZE                       3840
  255. +
  256. + #define RT2860_TX_DATA_SEG0_SIZE              \
  257. +   (sizeof(struct rt2860_txwi) + sizeof(struct ieee80211_qosframe_addr4))
  258. +
  259. + #define RT2860_NOISE_FLOOR                        -95
  260. +
  261. + #define IEEE80211_HAS_ADDR4(wh)                   \
  262. +   (((wh)->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS)
  263. +
  264. + #define   RT2860_MS(_v, _f)                       (((_v) & _f) >> _f##_S)
  265. + #define   RT2860_SM(_v, _f)                       (((_v) << _f##_S) & _f)
  266. +
  267. + #define RT2860_TX_WATCHDOG_TIMEOUT                5
  268. +
  269. + #define RT2860_WCID_RESERVED                  0xff
  270. + #define RT2860_WCID_MCAST                     0xf7
  271. +
  272. + #define RT2860_IO_EEPROM_RAISE_CLK(sc, val)                           \
  273. + do                                                                    \
  274. + {                                                                 \
  275. +   (val) |= RT2860_REG_EESK;                                       \
  276. +                                                                   \
  277. +   rt2860_io_mac_write((sc), RT2860_REG_EEPROM_CSR, (val));        \
  278. +                                                                   \
  279. +   DELAY(1);                                                       \
  280. + } while (0)
  281. +
  282. + /*
  283. +  * RT2860_IO_EEPROM_LOWER_CLK
  284. +  */
  285. + #define RT2860_IO_EEPROM_LOWER_CLK(sc, val)                           \
  286. + do                                                                    \
  287. + {                                                                 \
  288. +   (val) &= ~RT2860_REG_EESK;                                      \
  289. +                                                                   \
  290. +   rt2860_io_mac_write((sc), RT2860_REG_EEPROM_CSR, (val));        \
  291. +                                                                   \
  292. +   DELAY(1);                                                       \
  293. + } while (0)
  294. +
  295. + #define RT2860_IO_BYTE_CRC16(byte, crc)                               \
  296. +   ((uint16_t) (((crc) << 8) ^ rt2860_io_ccitt16[(((crc) >> 8) ^ (byte)) & 255]))
  297. +
  298. + /*
  299. +  *    Vendor IDs for various cards/chipsets
  300. +  */
  301. + #define PCI_VENDOR_RALINK                     0x1814
  302. + #define PCI_PRODUCT_RALINK_RT2860_PCI         0x0601
  303. + #define PCI_PRODUCT_RALINK_RT2860_PCIe            0x0681
  304. + #define PCI_PRODUCT_RALINK_RT2760_PCI         0x0701
  305. + #define PCI_PRODUCT_RALINK_RT2790_PCIe            0x0781
  306. + #define PCI_PRODUCT_RALINK_RT3090_PCIe            0x3090
  307. +
  308. + /*
  309. +  *   AMRR Defines
  310. +  */
  311. +
  312. + #define RT2860_AMRR_IS_SUCCESS(amrr_node)             ((amrr_node)->retrycnt < (amrr_node)->txcnt / 10)
  313. +
  314. + #define RT2860_AMRR_IS_FAILURE(amrr_node)             ((amrr_node)->retrycnt > (amrr_node)->txcnt / 3)
  315. +
  316. + #define RT2860_AMRR_IS_ENOUGH(amrr_node)              ((amrr_node)->txcnt > 10)
  317. +
  318. +
  319. + /*
  320. +  * Global function prototypes, used in bus depended interfaces
  321. +
  322. + int rt2860_attach(device_t dev);
  323. +
  324. + int rt2860_detach(device_t dev);
  325. +
  326. + int rt2860_shutdown(device_t dev);
  327. +
  328. + int rt2860_suspend(device_t dev);
  329. +
  330. + int rt2860_resume(device_t dev);
  331. +  */
  332. +
  333. + /*
  334. +  * Static function prototypes
  335. +  */
  336. +
  337. + static void rt2860_init_channels(struct rt2860_softc *sc);
  338. +
  339. + static void rt2860_init_channels_ht40(struct rt2860_softc *sc);
  340. +
  341. + static void rt2860_init_locked(void *priv);
  342. +
  343. + static void rt2860_init(void *priv);
  344. +
  345. + static int rt2860_init_bbp(struct rt2860_softc *sc);
  346. +
  347. + static void rt2860_stop_locked(void *priv);
  348. +
  349. + static void rt2860_stop(void *priv);
  350. +
  351. + static void rt2860_start(struct ifnet *ifp);
  352. +
  353. + static int rt2860_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
  354. +
  355. + static struct ieee80211vap *rt2860_vap_create(struct ieee80211com *ic,
  356. +   const char name[IFNAMSIZ], int unit, int opmode, int flags,
  357. +   const uint8_t bssid[IEEE80211_ADDR_LEN],
  358. +   const uint8_t mac[IEEE80211_ADDR_LEN]);
  359. +
  360. + static void rt2860_vap_delete(struct ieee80211vap *vap);
  361. +
  362. + static int rt2860_vap_reset(struct ieee80211vap *vap, u_long cmd);
  363. +
  364. + static int rt2860_vap_newstate(struct ieee80211vap *vap,
  365. +   enum ieee80211_state nstate, int arg);
  366. +
  367. + static void rt2860_vap_key_update_begin(struct ieee80211vap *vap);
  368. +
  369. + static void rt2860_vap_key_update_end(struct ieee80211vap *vap);
  370. +
  371. + static int rt2860_vap_key_set(struct ieee80211vap *vap,
  372. +   const struct ieee80211_key *k, const uint8_t mac[IEEE80211_ADDR_LEN]);
  373. +
  374. + static int rt2860_vap_key_delete(struct ieee80211vap *vap,
  375. +   const struct ieee80211_key *k);
  376. +
  377. + static void rt2860_vap_update_beacon(struct ieee80211vap *vap, int what);
  378. +
  379. + static int rt2860_media_change(struct ifnet *ifp);
  380. +
  381. + static struct ieee80211_node *rt2860_node_alloc(struct ieee80211vap *vap,
  382. +   const uint8_t mac[IEEE80211_ADDR_LEN]);
  383. +
  384. + static void rt2860_node_cleanup(struct ieee80211_node *ni);
  385. +
  386. + static void rt2860_node_getmimoinfo(const struct ieee80211_node *ni,
  387. +   struct ieee80211_mimo_info *mi);
  388. +
  389. + static int rt2860_setregdomain(struct ieee80211com *ic,
  390. +   struct ieee80211_regdomain *reg,
  391. +   int nchans, struct ieee80211_channel chans[]);
  392. +
  393. + static void rt2860_getradiocaps(struct ieee80211com *ic,
  394. +   int maxchans, int *nchans, struct ieee80211_channel chans[]);
  395. +
  396. + static void rt2860_scan_start(struct ieee80211com *ic);
  397. +
  398. + static void rt2860_scan_end(struct ieee80211com *ic);
  399. +
  400. + static void rt2860_set_channel(struct ieee80211com *ic);
  401. +
  402. + static void rt2860_newassoc(struct ieee80211_node *ni, int isnew);
  403. +
  404. + static void rt2860_updateslot(struct ifnet *ifp);
  405. +
  406. + static void rt2860_update_promisc(struct ifnet *ifp);
  407. +
  408. + static void rt2860_update_mcast(struct ifnet *ifp);
  409. +
  410. + static int rt2860_wme_update(struct ieee80211com *ic);
  411. +
  412. + static int rt2860_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
  413. +   const struct ieee80211_bpf_params *params);
  414. +
  415. + static int rt2860_recv_action(struct ieee80211_node *ni,
  416. +   const struct ieee80211_frame *wh,
  417. +   const uint8_t *frm, const uint8_t *efrm);
  418. +
  419. + static int rt2860_send_action(struct ieee80211_node *ni,
  420. +   int cat, int act, void *sa);
  421. +
  422. + static int rt2860_addba_response(struct ieee80211_node *ni,
  423. +   struct ieee80211_tx_ampdu *tap,
  424. +   int status, int baparamset, int batimeout);
  425. +
  426. + static void rt2860_addba_stop(struct ieee80211_node *ni,
  427. +   struct ieee80211_tx_ampdu *tap);
  428. +
  429. + static int rt2860_ampdu_rx_start(struct ieee80211_node *ni,
  430. +   struct ieee80211_rx_ampdu *rap,
  431. +   int baparamset, int batimeout, int baseqctl);
  432. +
  433. + static void rt2860_ampdu_rx_stop(struct ieee80211_node *ni,
  434. +   struct ieee80211_rx_ampdu *rap);
  435. +
  436. + static int rt2860_send_bar(struct ieee80211_node *ni,
  437. +   struct ieee80211_tx_ampdu *tap, ieee80211_seq seqno);
  438. +
  439. + static void rt2860_amrr_update_iter_func(void *arg, struct ieee80211_node *ni);
  440. +
  441. + static void rt2860_periodic(void *arg);
  442. +
  443. + static void rt2860_tx_watchdog(void *arg);
  444. +
  445. + static int rt2860_staid_alloc(struct rt2860_softc *sc, int aid);
  446. +
  447. + static void rt2860_staid_delete(struct rt2860_softc *sc, int staid);
  448. +
  449. + static void rt2860_asic_set_bssid(struct rt2860_softc *sc,
  450. +   const uint8_t *bssid);
  451. +
  452. + static void rt2860_asic_set_macaddr(struct rt2860_softc *sc,
  453. +   const uint8_t *addr);
  454. +
  455. + static void rt2860_asic_enable_tsf_sync(struct rt2860_softc *sc);
  456. +
  457. + static void rt2860_asic_disable_tsf_sync(struct rt2860_softc *sc);
  458. +
  459. + static void rt2860_asic_enable_mrr(struct rt2860_softc *sc);
  460. +
  461. + static void rt2860_asic_set_txpreamble(struct rt2860_softc *sc);
  462. +
  463. + static void rt2860_asic_set_basicrates(struct rt2860_softc *sc);
  464. +
  465. + static void rt2860_asic_update_rtsthreshold(struct rt2860_softc *sc);
  466. +
  467. + static void rt2860_asic_update_txpower(struct rt2860_softc *sc);
  468. +
  469. + static void rt2860_asic_update_promisc(struct rt2860_softc *sc);
  470. +
  471. + static void rt2860_asic_updateprot(struct rt2860_softc *sc);
  472. +
  473. + static void rt2860_asic_updateslot(struct rt2860_softc *sc);
  474. +
  475. + static void rt2860_asic_wme_update(struct rt2860_softc *sc);
  476. +
  477. + static void rt2860_asic_update_beacon(struct rt2860_softc *sc,
  478. +   struct ieee80211vap *vap);
  479. +
  480. + static void rt2860_asic_clear_keytables(struct rt2860_softc *sc);
  481. +
  482. + static void rt2860_asic_add_ba_session(struct rt2860_softc *sc,
  483. +   uint8_t wcid, int tid);
  484. +
  485. + static void rt2860_asic_del_ba_session(struct rt2860_softc *sc,
  486. +   uint8_t wcid, int tid);
  487. +
  488. + static int rt2860_beacon_alloc(struct rt2860_softc *sc,
  489. +   struct ieee80211vap *vap);
  490. +
  491. + static uint8_t rt2860_rxrate(struct rt2860_rxwi *rxwi);
  492. +
  493. + static uint8_t rt2860_maxrssi_rxpath(struct rt2860_softc *sc,
  494. +   const struct rt2860_rxwi *rxwi);
  495. +
  496. + static int8_t rt2860_rssi2dbm(struct rt2860_softc *sc,
  497. +   uint8_t rssi, uint8_t rxpath);
  498. +
  499. + static uint8_t rt2860_rate2mcs(uint8_t rate);
  500. +
  501. + static int rt2860_tx_mgmt(struct rt2860_softc *sc,
  502. +   struct mbuf *m, struct ieee80211_node *ni, int qid);
  503. +
  504. + static int rt2860_tx_data(struct rt2860_softc *sc,
  505. +   struct mbuf *m, struct ieee80211_node *ni, int qid);
  506. +
  507. + /*
  508. + static int rt2860_tx_raw(struct rt2860_softc *sc,
  509. +   struct mbuf *m, struct ieee80211_node *ni,
  510. +   const struct ieee80211_bpf_params *params);
  511. + */
  512. +
  513. + static int rt2860_amrr_update(struct rt2860_amrr *amrr,
  514. +   struct rt2860_amrr_node *amrr_node, struct ieee80211_node *ni);
  515. +
  516. + /* Declared elsewheres rt2860_softc.h */
  517. + /* static void rt2860_intr(void *arg); */
  518. +
  519. + static void rt2860_tx_coherent_intr(struct rt2860_softc *sc);
  520. +
  521. + static void rt2860_rx_coherent_intr(struct rt2860_softc *sc);
  522. +
  523. + static void rt2860_txrx_coherent_intr(struct rt2860_softc *sc);
  524. +
  525. + static void rt2860_fifo_sta_full_intr(struct rt2860_softc *sc);
  526. +
  527. + static void rt2860_rx_intr(struct rt2860_softc *sc);
  528. +
  529. + static void rt2860_rx_delay_intr(struct rt2860_softc *sc);
  530. +
  531. + static void rt2860_tx_intr(struct rt2860_softc *sc, int qid);
  532. +
  533. + static void rt2860_tx_delay_intr(struct rt2860_softc *sc);
  534. +
  535. + static void rt2860_pre_tbtt_intr(struct rt2860_softc *sc);
  536. +
  537. + static void rt2860_tbtt_intr(struct rt2860_softc *sc);
  538. +
  539. + static void rt2860_mcu_cmd_intr(struct rt2860_softc *sc);
  540. +
  541. + static void rt2860_auto_wakeup_intr(struct rt2860_softc *sc);
  542. +
  543. + static void rt2860_gp_timer_intr(struct rt2860_softc *sc);
  544. +
  545. + static void rt2860_rx_done_task(void *context, int pending);
  546. +
  547. + static void rt2860_tx_done_task(void *context, int pending);
  548. +
  549. + static void rt2860_fifo_sta_full_task(void *context, int pending);
  550. +
  551. + static void rt2860_periodic_task(void *context, int pending);
  552. +
  553. + static int rt2860_rx_eof(struct rt2860_softc *sc, int limit);
  554. +
  555. + static void rt2860_tx_eof(struct rt2860_softc *sc,
  556. +   struct rt2860_softc_tx_ring *ring);
  557. +
  558. + static void rt2860_update_stats(struct rt2860_softc *sc);
  559. +
  560. + static void rt2860_bbp_tuning(struct rt2860_softc *sc);
  561. +
  562. + static void rt2860_watchdog(struct rt2860_softc *sc);
  563. +
  564. + static void rt2860_drain_fifo_stats(struct rt2860_softc *sc);
  565. +
  566. + static void rt2860_update_raw_counters(struct rt2860_softc *sc);
  567. +
  568. + static void rt2860_intr_enable(struct rt2860_softc *sc, uint32_t intr_mask);
  569. +
  570. + static void rt2860_intr_disable(struct rt2860_softc *sc, uint32_t intr_mask);
  571. +
  572. + static int rt2860_txrx_enable(struct rt2860_softc *sc);
  573. +
  574. + static int rt2860_alloc_rx_ring(struct rt2860_softc *sc,
  575. +   struct rt2860_softc_rx_ring *ring);
  576. +
  577. + static void rt2860_reset_rx_ring(struct rt2860_softc *sc,
  578. +   struct rt2860_softc_rx_ring *ring);
  579. +
  580. + static void rt2860_free_rx_ring(struct rt2860_softc *sc,
  581. +   struct rt2860_softc_rx_ring *ring);
  582. +
  583. + static int rt2860_alloc_tx_ring(struct rt2860_softc *sc,
  584. +   struct rt2860_softc_tx_ring *ring, int qid);
  585. +
  586. + static void rt2860_reset_tx_ring(struct rt2860_softc *sc,
  587. +   struct rt2860_softc_tx_ring *ring);
  588. +
  589. + static void rt2860_free_tx_ring(struct rt2860_softc *sc,
  590. +   struct rt2860_softc_tx_ring *ring);
  591. +
  592. + static void rt2860_dma_map_addr(void *arg, bus_dma_segment_t *segs,
  593. +   int nseg, int error);
  594. +
  595. + static void rt2860_sysctl_attach(struct rt2860_softc *sc);
  596. +
  597. + static void rt2860_io_eeprom_shiftout_bits(struct rt2860_softc *sc,
  598. +   uint16_t val, uint16_t count);
  599. +
  600. + static uint16_t rt2860_io_eeprom_shiftin_bits(struct rt2860_softc *sc);
  601. +
  602. + static uint8_t rt2860_io_byte_rev(uint8_t byte);
  603. +
  604. + static void rt2872_rf_set_chan(struct rt2860_softc *sc,   struct ieee80211_channel *c);
  605. +
  606. + /*
  607. +  * Static variables
  608. +  */
  609. +
  610. + extern uint8_t rt3052_rf_default[];
  611. +
  612. + static const struct rt2860_rf_prog
  613. + {
  614. +   uint8_t chan;
  615. +   uint32_t r1, r2, r3, r4;
  616. + } rt2860_rf_2850[] =
  617. + {
  618. +   {   1, 0x98402ecc, 0x984c0786, 0x9816b455, 0x9800510b },
  619. +   {   2, 0x98402ecc, 0x984c0786, 0x98168a55, 0x9800519f },
  620. +   {   3, 0x98402ecc, 0x984c078a, 0x98168a55, 0x9800518b },
  621. +   {   4, 0x98402ecc, 0x984c078a, 0x98168a55, 0x9800519f },
  622. +   {   5, 0x98402ecc, 0x984c078e, 0x98168a55, 0x9800518b },
  623. +   {   6, 0x98402ecc, 0x984c078e, 0x98168a55, 0x9800519f },
  624. +   {   7, 0x98402ecc, 0x984c0792, 0x98168a55, 0x9800518b },
  625. +   {   8, 0x98402ecc, 0x984c0792, 0x98168a55, 0x9800519f },
  626. +   {   9, 0x98402ecc, 0x984c0796, 0x98168a55, 0x9800518b },
  627. +   {  10, 0x98402ecc, 0x984c0796, 0x98168a55, 0x9800519f },
  628. +   {  11, 0x98402ecc, 0x984c079a, 0x98168a55, 0x9800518b },
  629. +   {  12, 0x98402ecc, 0x984c079a, 0x98168a55, 0x9800519f },
  630. +   {  13, 0x98402ecc, 0x984c079e, 0x98168a55, 0x9800518b },
  631. +   {  14, 0x98402ecc, 0x984c07a2, 0x98168a55, 0x98005193 },
  632. +   {  36, 0x98402ecc, 0x984c099a, 0x98158a55, 0x980ed1a3 },
  633. +   {  38, 0x98402ecc, 0x984c099e, 0x98158a55, 0x980ed193 },
  634. +   {  40, 0x98402ec8, 0x984c0682, 0x98158a55, 0x980ed183 },
  635. +   {  44, 0x98402ec8, 0x984c0682, 0x98158a55, 0x980ed1a3 },
  636. +   {  46, 0x98402ec8, 0x984c0686, 0x98158a55, 0x980ed18b },
  637. +   {  48, 0x98402ec8, 0x984c0686, 0x98158a55, 0x980ed19b },
  638. +   {  52, 0x98402ec8, 0x984c068a, 0x98158a55, 0x980ed193 },
  639. +   {  54, 0x98402ec8, 0x984c068a, 0x98158a55, 0x980ed1a3 },
  640. +   {  56, 0x98402ec8, 0x984c068e, 0x98158a55, 0x980ed18b },
  641. +   {  60, 0x98402ec8, 0x984c0692, 0x98158a55, 0x980ed183 },
  642. +   {  62, 0x98402ec8, 0x984c0692, 0x98158a55, 0x980ed193 },
  643. +   {  64, 0x98402ec8, 0x984c0692, 0x98158a55, 0x980ed1a3 },
  644. +   { 100, 0x98402ec8, 0x984c06b2, 0x98178a55, 0x980ed783 },
  645. +   { 102, 0x98402ec8, 0x985c06b2, 0x98578a55, 0x980ed793 },
  646. +   { 104, 0x98402ec8, 0x985c06b2, 0x98578a55, 0x980ed1a3 },
  647. +   { 108, 0x98402ecc, 0x985c0a32, 0x98578a55, 0x980ed193 },
  648. +   { 110, 0x98402ecc, 0x984c0a36, 0x98178a55, 0x980ed183 },
  649. +   { 112, 0x98402ecc, 0x984c0a36, 0x98178a55, 0x980ed19b },
  650. +   { 116, 0x98402ecc, 0x984c0a3a, 0x98178a55, 0x980ed1a3 },
  651. +   { 118, 0x98402ecc, 0x984c0a3e, 0x98178a55, 0x980ed193 },
  652. +   { 120, 0x98402ec4, 0x984c0382, 0x98178a55, 0x980ed183 },
  653. +   { 124, 0x98402ec4, 0x984c0382, 0x98178a55, 0x980ed193 },
  654. +   { 126, 0x98402ec4, 0x984c0382, 0x98178a55, 0x980ed15b },
  655. +   { 128, 0x98402ec4, 0x984c0382, 0x98178a55, 0x980ed1a3 },
  656. +   { 132, 0x98402ec4, 0x984c0386, 0x98178a55, 0x980ed18b },
  657. +   { 134, 0x98402ec4, 0x984c0386, 0x98178a55, 0x980ed193 },
  658. +   { 136, 0x98402ec4, 0x984c0386, 0x98178a55, 0x980ed19b },
  659. +   { 140, 0x98402ec4, 0x984c038a, 0x98178a55, 0x980ed183 },
  660. +   { 149, 0x98402ec4, 0x984c038a, 0x98178a55, 0x980ed1a7 },
  661. +   { 151, 0x98402ec4, 0x984c038e, 0x98178a55, 0x980ed187 },
  662. +   { 153, 0x98402ec4, 0x984c038e, 0x98178a55, 0x980ed18f },
  663. +   { 157, 0x98402ec4, 0x984c038e, 0x98178a55, 0x980ed19f },
  664. +   { 159, 0x98402ec4, 0x984c038e, 0x98178a55, 0x980ed1a7 },
  665. +   { 161, 0x98402ec4, 0x984c0392, 0x98178a55, 0x980ed187 },
  666. +   { 165, 0x98402ec4, 0x984c0392, 0x98178a55, 0x980ed197 },
  667. +   { 184, 0x95002ccc, 0x9500491e, 0x9509be55, 0x950c0a0b },
  668. +   { 188, 0x95002ccc, 0x95004922, 0x9509be55, 0x950c0a13 },
  669. +   { 192, 0x95002ccc, 0x95004926, 0x9509be55, 0x950c0a1b },
  670. +   { 196, 0x95002ccc, 0x9500492a, 0x9509be55, 0x950c0a23 },
  671. +   { 208, 0x95002ccc, 0x9500493a, 0x9509be55, 0x950c0a13 },
  672. +   { 212, 0x95002ccc, 0x9500493e, 0x9509be55, 0x950c0a1b },
  673. +   { 216, 0x95002ccc, 0x95004982, 0x9509be55, 0x950c0a23 },
  674. + };
  675. +
  676. + static const struct rfprog {
  677. +   uint8_t     chan;
  678. +   uint32_t    r1, r2, r3, r4;
  679. + } rt2860_rf2850[] = {
  680. +   {   1, 0x100bb3, 0x1301e1, 0x05a014, 0x001402 },
  681. +   {   2, 0x100bb3, 0x1301e1, 0x05a014, 0x001407 },
  682. +   {   3, 0x100bb3, 0x1301e2, 0x05a014, 0x001402 },
  683. +   {   4, 0x100bb3, 0x1301e2, 0x05a014, 0x001407 },
  684. +   {   5, 0x100bb3, 0x1301e3, 0x05a014, 0x001402 },
  685. +   {   6, 0x100bb3, 0x1301e3, 0x05a014, 0x001407 },
  686. +   {   7, 0x100bb3, 0x1301e4, 0x05a014, 0x001402 },
  687. +   {   8, 0x100bb3, 0x1301e4, 0x05a014, 0x001407 },
  688. +   {   9, 0x100bb3, 0x1301e5, 0x05a014, 0x001402 },
  689. +   {  10, 0x100bb3, 0x1301e5, 0x05a014, 0x001407 },
  690. +   {  11, 0x100bb3, 0x1301e6, 0x05a014, 0x001402 },
  691. +   {  12, 0x100bb3, 0x1301e6, 0x05a014, 0x001407 },
  692. +   {  13, 0x100bb3, 0x1301e7, 0x05a014, 0x001402 },
  693. +   {  14, 0x100bb3, 0x1301e8, 0x05a014, 0x001404 },
  694. +   {  36, 0x100bb3, 0x130266, 0x056014, 0x001408 },
  695. +   {  38, 0x100bb3, 0x130267, 0x056014, 0x001404 },
  696. +   {  40, 0x100bb2, 0x1301a0, 0x056014, 0x001400 },
  697. +   {  44, 0x100bb2, 0x1301a0, 0x056014, 0x001408 },
  698. +   {  46, 0x100bb2, 0x1301a1, 0x056014, 0x001402 },
  699. +   {  48, 0x100bb2, 0x1301a1, 0x056014, 0x001406 },
  700. +   {  52, 0x100bb2, 0x1301a2, 0x056014, 0x001404 },
  701. +   {  54, 0x100bb2, 0x1301a2, 0x056014, 0x001408 },
  702. +   {  56, 0x100bb2, 0x1301a3, 0x056014, 0x001402 },
  703. +   {  60, 0x100bb2, 0x1301a4, 0x056014, 0x001400 },
  704. +   {  62, 0x100bb2, 0x1301a4, 0x056014, 0x001404 },
  705. +   {  64, 0x100bb2, 0x1301a4, 0x056014, 0x001408 },
  706. +   { 100, 0x100bb2, 0x1301ac, 0x05e014, 0x001400 },
  707. +   { 102, 0x100bb2, 0x1701ac, 0x15e014, 0x001404 },
  708. +   { 104, 0x100bb2, 0x1701ac, 0x15e014, 0x001408 },
  709. +   { 108, 0x100bb3, 0x17028c, 0x15e014, 0x001404 },
  710. +   { 110, 0x100bb3, 0x13028d, 0x05e014, 0x001400 },
  711. +   { 112, 0x100bb3, 0x13028d, 0x05e014, 0x001406 },
  712. +   { 116, 0x100bb3, 0x13028e, 0x05e014, 0x001408 },
  713. +   { 118, 0x100bb3, 0x13028f, 0x05e014, 0x001404 },
  714. +   { 120, 0x100bb1, 0x1300e0, 0x05e014, 0x001400 },
  715. +   { 124, 0x100bb1, 0x1300e0, 0x05e014, 0x001404 },
  716. +   { 126, 0x100bb1, 0x1300e0, 0x05e014, 0x001406 },
  717. +   { 128, 0x100bb1, 0x1300e0, 0x05e014, 0x001408 },
  718. +   { 132, 0x100bb1, 0x1300e1, 0x05e014, 0x001402 },
  719. +   { 134, 0x100bb1, 0x1300e1, 0x05e014, 0x001404 },
  720. +   { 136, 0x100bb1, 0x1300e1, 0x05e014, 0x001406 },
  721. +   { 140, 0x100bb1, 0x1300e2, 0x05e014, 0x001400 },
  722. +   { 149, 0x100bb1, 0x1300e2, 0x05e014, 0x001409 },
  723. +   { 151, 0x100bb1, 0x1300e3, 0x05e014, 0x001401 },
  724. +   { 153, 0x100bb1, 0x1300e3, 0x05e014, 0x001403 },
  725. +   { 157, 0x100bb1, 0x1300e3, 0x05e014, 0x001407 },
  726. +   { 159, 0x100bb1, 0x1300e3, 0x05e014, 0x001409 },
  727. +   { 161, 0x100bb1, 0x1300e4, 0x05e014, 0x001401 },
  728. +   { 165, 0x100bb1, 0x1300e4, 0x05e014, 0x001405 },
  729. +   { 167, 0x100bb1, 0x1300f4, 0x05e014, 0x001407 },
  730. +   { 169, 0x100bb1, 0x1300f4, 0x05e014, 0x001409 },
  731. +   { 171, 0x100bb1, 0x1300f5, 0x05e014, 0x001401 },
  732. +   { 173, 0x100bb1, 0x1300f5, 0x05e014, 0x001403 }
  733. + };
  734. +
  735. + static const struct rt2860_rf_fi3020
  736. + {
  737. +   uint8_t channel, n, r, k;
  738. + } rt2860_rf_fi3020[] =
  739. + {
  740. +   /* 802.11g  */
  741. +   {1, 241,    2,  2},
  742. +   {2, 241,    2,  7},
  743. +   {3, 242,    2,  2},
  744. +   {4, 242,    2,  7},
  745. +   {5, 243,    2,  2},
  746. +   {6, 243,    2,  7},
  747. +   {7, 244,    2,  2},
  748. +   {8, 244,    2,  7},
  749. +   {9, 245,    2,  2},
  750. +   {10,    245,    2,  7},
  751. +   {11,    246,    2,  2},
  752. +   {12,    246,    2,  7},
  753. +   {13,    247,    2,  2},
  754. +   {14,    248,    2,  4},
  755. +
  756. +   /* 802.11 UNI / HyperLan 2 */
  757. +   {36,    0x56,   0,  4},
  758. +   {38,    0x56,   0,  6},
  759. +   {40,    0x56,   0,  8},
  760. +   {44,    0x57,   0,  0},
  761. +   {46,    0x57,   0,  2},
  762. +   {48,    0x57,   0,  4},
  763. +   {52,    0x57,   0,  8},
  764. +   {54,    0x57,   0,  10},
  765. +   {56,    0x58,   0,  0},
  766. +   {60,    0x58,   0,  4},
  767. +   {62,    0x58,   0,  6},
  768. +   {64,    0x58,   0,  8},
  769. +
  770. +   /* 802.11 HyperLan 2 */
  771. +   {100,   0x5b,   0,  8},
  772. +   {102,   0x5b,   0,  10},
  773. +   {104,   0x5c,   0,  0},
  774. +   {108,   0x5c,   0,  4},
  775. +   {110,   0x5c,   0,  6},
  776. +   {112,   0x5c,   0,  8},
  777. +   {116,   0x5d,   0,  0},
  778. +   {118,   0x5d,   0,  2},
  779. +   {120,   0x5d,   0,  4},
  780. +   {124,   0x5d,   0,  8},
  781. +   {126,   0x5d,   0,  10},
  782. +   {128,   0x5e,   0,  0},
  783. +   {132,   0x5e,   0,  4},
  784. +   {134,   0x5e,   0,  6},
  785. +   {136,   0x5e,   0,  8},
  786. +   {140,   0x5f,   0,  0},
  787. +
  788. +   /* 802.11 UNII */
  789. +   {149,   0x5f,   0,  9},
  790. +   {151,   0x5f,   0,  11},
  791. +   {153,   0x60,   0,  1},
  792. +   {157,   0x60,   0,  5},
  793. +   {159,   0x60,   0,  7},
  794. +   {161,   0x60,   0,  9},
  795. +   {165,   0x61,   0,  1},
  796. +   {167,   0x61,   0,  3},
  797. +   {169,   0x61,   0,  5},
  798. +   {171,   0x61,   0,  7},
  799. +   {173,   0x61,   0,  9},
  800. + };
  801. +
  802. + static const struct {
  803. +   uint8_t reg;
  804. +   uint8_t val;
  805. + }  rt3090_def_rf[] = {
  806. +   {  4, 0x40 },
  807. +   {  5, 0x03 },
  808. +   {  6, 0x02 },
  809. +   {  7, 0x70 },
  810. +   {  9, 0x0f },
  811. +   { 10, 0x41 },
  812. +   { 11, 0x21 },
  813. +   { 12, 0x7b },
  814. +   { 14, 0x90 },
  815. +   { 15, 0x58 },
  816. +   { 16, 0xb3 },
  817. +   { 17, 0x92 },
  818. +   { 18, 0x2c },
  819. +   { 19, 0x02 },
  820. +   { 20, 0xba },
  821. +   { 21, 0xdb },
  822. +   { 24, 0x16 },
  823. +   { 25, 0x01 },
  824. +   { 29, 0x1f }
  825. + };
  826. +
  827. + struct {
  828. +   uint8_t n, r, k;
  829. + } rt3090_freqs[] = {
  830. +   { 0xf1, 2,  2 },
  831. +   { 0xf1, 2,  7 },
  832. +   { 0xf2, 2,  2 },
  833. +   { 0xf2, 2,  7 },
  834. +   { 0xf3, 2,  2 },
  835. +   { 0xf3, 2,  7 },
  836. +   { 0xf4, 2,  2 },
  837. +   { 0xf4, 2,  7 },
  838. +   { 0xf5, 2,  2 },
  839. +   { 0xf5, 2,  7 },
  840. +   { 0xf6, 2,  2 },
  841. +   { 0xf6, 2,  7 },
  842. +   { 0xf7, 2,  2 },
  843. +   { 0xf8, 2,  4 },
  844. +   { 0x56, 0,  4 },
  845. +   { 0x56, 0,  6 },
  846. +   { 0x56, 0,  8 },
  847. +   { 0x57, 0,  0 },
  848. +   { 0x57, 0,  2 },
  849. +   { 0x57, 0,  4 },
  850. +   { 0x57, 0,  8 },
  851. +   { 0x57, 0, 10 },
  852. +   { 0x58, 0,  0 },
  853. +   { 0x58, 0,  4 },
  854. +   { 0x58, 0,  6 },
  855. +   { 0x58, 0,  8 },
  856. +   { 0x5b, 0,  8 },
  857. +   { 0x5b, 0, 10 },
  858. +   { 0x5c, 0,  0 },
  859. +   { 0x5c, 0,  4 },
  860. +   { 0x5c, 0,  6 },
  861. +   { 0x5c, 0,  8 },
  862. +   { 0x5d, 0,  0 },
  863. +   { 0x5d, 0,  2 },
  864. +   { 0x5d, 0,  4 },
  865. +   { 0x5d, 0,  8 },
  866. +   { 0x5d, 0, 10 },
  867. +   { 0x5e, 0,  0 },
  868. +   { 0x5e, 0,  4 },
  869. +   { 0x5e, 0,  6 },
  870. +   { 0x5e, 0,  8 },
  871. +   { 0x5f, 0,  0 },
  872. +   { 0x5f, 0,  9 },
  873. +   { 0x5f, 0, 11 },
  874. +   { 0x60, 0,  1 },
  875. +   { 0x60, 0,  5 },
  876. +   { 0x60, 0,  7 },
  877. +   { 0x60, 0,  9 },
  878. +   { 0x61, 0,  1 },
  879. +   { 0x61, 0,  3 },
  880. +   { 0x61, 0,  5 },
  881. +   { 0x61, 0,  7 },
  882. +   { 0x61, 0,  9 }
  883. + };
  884. +
  885. + /* #ifdef RT305X_SOC */
  886. + static const uint16_t rt3052_eeprom[] =
  887. + {
  888. +   0x3052, 0x0101, 0x0c00, 0x3043, 0x8852, 0xffff, 0xffff, 0xffff,
  889. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  890. +   0xffff, 0xffff, 0xffff, 0xffff, 0x0c00, 0x3043, 0x7752, 0x0c00,
  891. +   0x3043, 0x6652, 0x0822, 0x0024, 0xffff, 0x012f, 0x7755, 0xaaa8,
  892. +   0x888c, 0xffff, 0x000c, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff,
  893. +   0xffff, 0x0d0d, 0x0d0d, 0x0c0c, 0x0c0c, 0x0c0c, 0x0c0c, 0x0c0c,
  894. +   0x1010, 0x1111, 0x1211, 0x1212, 0x1313, 0x1413, 0x1414, 0xffff,
  895. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  896. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  897. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  898. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  899. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  900. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  901. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x6666,
  902. +   0xaacc, 0x6688, 0xaacc, 0x6688, 0xaacc, 0x6688, 0xaacc, 0x6688,
  903. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  904. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  905. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  906. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  907. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  908. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  909. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  910. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  911. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  912. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  913. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  914. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  915. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  916. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  917. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  918. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  919. +   0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
  920. + };
  921. +
  922. + uint8_t rt3052_rf_default[] = {
  923. +   0x50,
  924. +   0x01,
  925. +   0xF7,
  926. +   0x75,
  927. +   0x40,
  928. +   0x03,
  929. +   0x42,
  930. +   0x50,
  931. +   0x39,
  932. +   0x0F,
  933. +   0x60,
  934. +   0x21,
  935. +   0x75,
  936. +   0x75,
  937. +   0x90,
  938. +   0x58,
  939. +   0xB3,
  940. +   0x92,
  941. +   0x2C,
  942. +   0x02,
  943. +   0xBA,
  944. +   0xDB,
  945. +   0x00,
  946. +   0x31,
  947. +   0x08,
  948. +   0x01,
  949. +   0x25, /* Core Power: 0x25=1.25V */
  950. +   0x23, /* RF: 1.35V */
  951. +           0x13, /* ADC: must consist with R27 */
  952. +   0x83,
  953. +   0x00,
  954. +   0x00,
  955. + };
  956. + /* #endif */
  957. +
  958. + static const uint16_t rt2860_io_ccitt16[] =
  959. + {
  960. +   0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
  961. +   0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
  962. +   0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
  963. +   0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
  964. +   0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
  965. +   0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
  966. +   0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
  967. +   0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
  968. +   0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
  969. +   0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
  970. +   0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
  971. +   0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
  972. +   0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
  973. +   0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
  974. +   0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
  975. +   0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
  976. +   0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
  977. +   0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
  978. +   0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
  979. +   0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
  980. +   0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
  981. +   0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
  982. +   0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
  983. +   0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
  984. +   0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
  985. +   0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
  986. +   0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
  987. +   0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
  988. +   0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
  989. +   0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
  990. +   0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
  991. +   0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
  992. + };
  993. +
  994. + static const struct
  995. + {
  996. +   uint32_t reg;
  997. +   uint32_t val;
  998. + } rt2860_def_mac[] =
  999. + {
  1000. +   { RT2860_REG_PBF_BCN_OFFSET0,           0xf8f0e8e0 },
  1001. +   { RT2860_REG_PBF_BCN_OFFSET1,           0x6f77d0c8 },
  1002. +   { RT2860_REG_LEGACY_BASIC_RATE,         0x0000013f },
  1003. +   { RT2860_REG_HT_BASIC_RATE,             0x00008003 },
  1004. +   { RT2860_REG_SYS_CTRL,                  0x00000000 },
  1005. +   { RT2860_REG_RX_FILTER_CFG,             0x00017f97 },
  1006. +   { RT2860_REG_BKOFF_SLOT_CFG,            0x00000209 },
  1007. +   { RT2860_REG_TX_SW_CFG0,                0x00000000 },
  1008. +   { RT2860_REG_TX_SW_CFG1,                0x00080606 },
  1009. +   { RT2860_REG_TX_LINK_CFG,               0x00001020 },
  1010. +   { RT2860_REG_TX_TIMEOUT_CFG,            0x000a2090 },
  1011. +   { RT2860_REG_MAX_LEN_CFG,               (1 << 12) | RT2860_MAX_AGG_SIZE },
  1012. +   { RT2860_REG_LED_CFG,                   0x7f031e46 },
  1013. +   { RT2860_REG_PBF_MAX_PCNT,              0x1f3fbf9f },
  1014. +   { RT2860_REG_TX_RTY_CFG,                0x47d01f0f },
  1015. +   { RT2860_REG_AUTO_RSP_CFG,              0x00000013 },
  1016. +   { RT2860_REG_TX_CCK_PROT_CFG,           0x05740003 },
  1017. +   { RT2860_REG_TX_OFDM_PROT_CFG,          0x05740003 },
  1018. +   { RT2860_REG_TX_GF20_PROT_CFG,          0x01744004 },
  1019. +   { RT2860_REG_TX_GF40_PROT_CFG,          0x03f44084 },
  1020. +   { RT2860_REG_TX_MM20_PROT_CFG,          0x01744004 },
  1021. +   { RT2860_REG_TX_MM40_PROT_CFG,          0x03f54084 },
  1022. +   { RT2860_REG_TX_TXOP_CTRL_CFG,          0x0000583f },
  1023. +   { RT2860_REG_TX_RTS_CFG,                0x00092b20 },
  1024. +   { RT2860_REG_TX_EXP_ACK_TIME,           0x002400ca },
  1025. +   { RT2860_REG_HCCAPSMP_TXOP_HLDR_ET,     0x00000002 },
  1026. +   { RT2860_REG_XIFS_TIME_CFG,             0x33a41010 },
  1027. +   { RT2860_REG_PWR_PIN_CFG,               0x00000003 },
  1028. +   { RT2860_REG_SCHDMA_WMM_AIFSN_CFG,      0x00002273 },
  1029. +   { RT2860_REG_SCHDMA_WMM_CWMIN_CFG,      0x00002344 },
  1030. +   { RT2860_REG_SCHDMA_WMM_CWMAX_CFG,      0x000034aa },
  1031. + };
  1032. +
  1033. + #define RT2860_DEF_MAC_SIZE       (sizeof(rt2860_def_mac) / sizeof(rt2860_def_mac[0]))
  1034. +
  1035. + static const struct
  1036. + {
  1037. +   uint8_t reg;
  1038. +   uint8_t val;
  1039. + } rt2860_def_bbp[] =
  1040. + {
  1041. +   { 65,   0x2c },
  1042. +   { 66,   0x38 },
  1043. +   { 69,   0x12 },
  1044. +   { 70,   0x0a },
  1045. +   { 73,   0x10 },
  1046. +   { 81,   0x37 },
  1047. +   { 82,   0x62 },
  1048. +   { 83,   0x6a },
  1049. +   { 84,   0x99 },
  1050. +   { 86,   0x00 },
  1051. +   { 91,   0x04 },
  1052. +   { 92,   0x00 },
  1053. +   { 103,  0x00 },
  1054. +   { 105,  0x05 },
  1055. +   { 106,  0x35 },
  1056. + };
  1057. +
  1058. + #define RT2860_DEF_BBP_SIZE       (sizeof(rt2860_def_bbp) / sizeof(rt2860_def_bbp[0]))
  1059. +
  1060. + SYSCTL_NODE(_hw, OID_AUTO, rt2860, CTLFLAG_RD, 0, "RT2860 driver parameters");
  1061. +
  1062. + static int rt2860_tx_stbc = 1;
  1063. + SYSCTL_INT(_hw_rt2860, OID_AUTO, tx_stbc, CTLFLAG_RW, &rt2860_tx_stbc, 0, "RT2860 Tx STBC");
  1064. + TUNABLE_INT("hw.ral.2860_stbc", &rt2860_tx_stbc);
  1065. +
  1066. + #ifdef RT2860_DEBUG
  1067. + static int rt2860_debug = 0;
  1068. + SYSCTL_INT(_hw_rt2860, OID_AUTO, debug, CTLFLAG_RW, &rt2860_debug, 0, "RT2860 debug level");
  1069. + TUNABLE_INT("hw.ral.2860_debug", &rt2860_debug);
  1070. + #endif
  1071. +
  1072. + /*
  1073. +  *  Chip/Board IO functions
  1074. +  */
  1075. +
  1076. +
  1077. + /*
  1078. +  * rt2860_io_mac_read
  1079. +  */
  1080. + uint32_t rt2860_io_mac_read(struct rt2860_softc *sc, uint16_t reg)
  1081. + {
  1082. +   bus_space_read_4(sc->sc_st, sc->sc_sh, RT2860_REG_MAC_CSR0);
  1083. +   return bus_space_read_4(sc->sc_st, sc->sc_sh, reg);
  1084. + }
  1085. +
  1086. + /*
  1087. +  * rt2860_io_mac_read_multi
  1088. +  */
  1089. + void rt2860_io_mac_read_multi(struct rt2860_softc *sc,
  1090. +   uint16_t reg, void *buf, size_t len)
  1091. + {
  1092. +   bus_space_read_4(sc->sc_st, sc->sc_sh, RT2860_REG_MAC_CSR0);
  1093. +   bus_space_read_region_1(sc->sc_st, sc->sc_sh, reg, buf, len);
  1094. + }
  1095. +
  1096. + /*
  1097. +  * rt2860_io_mac_write
  1098. +  */
  1099. + void rt2860_io_mac_write(struct rt2860_softc *sc,
  1100. +   uint16_t reg, uint32_t val)
  1101. + {
  1102. +   bus_space_read_4(sc->sc_st, sc->sc_sh, RT2860_REG_MAC_CSR0);
  1103. +   bus_space_write_4(sc->sc_st, sc->sc_sh, reg, val);
  1104. + }
  1105. +
  1106. + /*
  1107. +  * rt2860_io_mac_write_multi
  1108. +  */
  1109. + void rt2860_io_mac_write_multi(struct rt2860_softc *sc,
  1110. +   uint16_t reg, const void *buf, size_t len)
  1111. + {
  1112. +   int i;
  1113. +   const uint8_t *p;
  1114. +
  1115. +   bus_space_read_4(sc->sc_st, sc->sc_sh, RT2860_REG_MAC_CSR0);
  1116. +
  1117. +   p = buf;
  1118. +   for (i = 0; i < len; i ++)
  1119. +       bus_space_write_1(sc->sc_st, sc->sc_sh, reg + i, *(p+i));
  1120. + #ifdef notyet
  1121. +   bus_space_write_region_1(sc->sc_st, sc->sc_sh, reg, buf, len);
  1122. + #endif
  1123. + }
  1124. +
  1125. + /*
  1126. +  * rt2860_io_mac_set_region_4
  1127. +  */
  1128. + void rt2860_io_mac_set_region_4(struct rt2860_softc *sc,
  1129. +   uint16_t reg, uint32_t val, size_t len)
  1130. + {
  1131. +   int i;
  1132. +
  1133. +   for (i = 0; i < len; i += sizeof(uint32_t))
  1134. +       rt2860_io_mac_write(sc, reg + i, val);
  1135. + }
  1136. +
  1137. + /* Read 16-bit from eFUSE ROM (>=RT3071 only.) */
  1138. + static uint16_t
  1139. + rt3090_efuse_read_2(struct rt2860_softc *sc, uint16_t addr)
  1140. + {
  1141. +   uint32_t tmp;
  1142. +   uint16_t reg;
  1143. +   int ntries;
  1144. +
  1145. +   addr *= 2;
  1146. +   /*-
  1147. +    * Read one 16-byte block into registers EFUSE_DATA[0-3]:
  1148. +    * DATA0: F E D C
  1149. +    * DATA1: B A 9 8
  1150. +    * DATA2: 7 6 5 4
  1151. +    * DATA3: 3 2 1 0
  1152. +    */
  1153. +   tmp = rt2860_io_mac_read(sc, RT3070_EFUSE_CTRL);
  1154. +   tmp &= ~(RT3070_EFSROM_MODE_MASK | RT3070_EFSROM_AIN_MASK);
  1155. +   tmp |= (addr & ~0xf) << RT3070_EFSROM_AIN_SHIFT | RT3070_EFSROM_KICK;
  1156. +   rt2860_io_mac_write(sc, RT3070_EFUSE_CTRL, tmp);
  1157. +   for (ntries = 0; ntries < 500; ntries++) {
  1158. +       tmp = rt2860_io_mac_read(sc, RT3070_EFUSE_CTRL);
  1159. +       if (!(tmp & RT3070_EFSROM_KICK))
  1160. +           break;
  1161. +       DELAY(2);
  1162. +   }
  1163. +   if (ntries == 500)
  1164. +       return 0xffff;
  1165. +
  1166. +   if ((tmp & RT3070_EFUSE_AOUT_MASK) == RT3070_EFUSE_AOUT_MASK)
  1167. +       return 0xffff;  /* address not found */
  1168. +
  1169. +   /* determine to which 32-bit register our 16-bit word belongs */
  1170. +   reg = RT3070_EFUSE_DATA3 - (addr & 0xc);
  1171. +   tmp = rt2860_io_mac_read(sc, reg);
  1172. +
  1173. +   return (addr & 2) ? tmp >> 16 : tmp & 0xffff;
  1174. + }
  1175. +
  1176. +
  1177. + /*
  1178. +  * rt2860_io_eeprom_read
  1179. +  */
  1180. + uint16_t rt2860_io_eeprom_read(struct rt2860_softc *sc, uint16_t addr)
  1181. + {
  1182. +   uint32_t tmp;
  1183. +   uint16_t val;
  1184. +
  1185. +   addr = (addr >> 1);
  1186. +
  1187. +   if (sc->mac_rev == 0x28720200) {
  1188. +       return (rt3052_eeprom[addr]);
  1189. +   } else if ((sc->mac_rev & 0xffff0000) >= 0x30710000) {
  1190. +       tmp = rt2860_io_mac_read(sc, RT3070_EFUSE_CTRL);
  1191. +       if (tmp & RT3070_SEL_EFUSE)
  1192. +           return (rt3090_efuse_read_2(sc, addr));
  1193. +   }
  1194. +
  1195. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_EEPROM_CSR);
  1196. +
  1197. +   tmp &= ~(RT2860_REG_EEDI | RT2860_REG_EEDO | RT2860_REG_EESK);
  1198. +   tmp |= RT2860_REG_EECS;
  1199. +
  1200. +   rt2860_io_mac_write(sc, RT2860_REG_EEPROM_CSR, tmp);
  1201. +
  1202. +   if (((sc->mac_rev & 0xffff0000) != 0x30710000) &&
  1203. +       ((sc->mac_rev & 0xffff0000) != 0x30900000) &&
  1204. +       ((sc->mac_rev & 0xffff0000) != 0x35720000) &&
  1205. +       ((sc->mac_rev & 0xffff0000) != 0x33900000))
  1206. +   {
  1207. +       RT2860_IO_EEPROM_RAISE_CLK(sc, tmp);
  1208. +       RT2860_IO_EEPROM_LOWER_CLK(sc, tmp);
  1209. +   }
  1210. +
  1211. +   rt2860_io_eeprom_shiftout_bits(sc, RT2860_REG_EEOP_READ, 3);
  1212. +   rt2860_io_eeprom_shiftout_bits(sc, addr, sc->eeprom_addr_num);
  1213. +
  1214. +   val = rt2860_io_eeprom_shiftin_bits(sc);
  1215. +
  1216. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_EEPROM_CSR);
  1217. +
  1218. +   tmp &= ~(RT2860_REG_EECS | RT2860_REG_EEDI);
  1219. +
  1220. +   rt2860_io_mac_write(sc, RT2860_REG_EEPROM_CSR, tmp);
  1221. +
  1222. +   RT2860_IO_EEPROM_RAISE_CLK(sc, tmp);
  1223. +   RT2860_IO_EEPROM_LOWER_CLK(sc, tmp);
  1224. +
  1225. +   return val;
  1226. + }
  1227. +
  1228. + /*
  1229. +  * rt2860_io_eeprom_read_multi
  1230. +  */
  1231. + void rt2860_io_eeprom_read_multi(struct rt2860_softc *sc,
  1232. +   uint16_t addr, void *buf, size_t len)
  1233. + {
  1234. +   uint16_t *ptr;
  1235. +   int i;
  1236. +
  1237. +   len += len % sizeof(uint16_t);
  1238. +   ptr = buf;
  1239. +
  1240. +   i = 0;
  1241. +
  1242. +   do
  1243. +   {
  1244. +       *ptr++ = rt2860_io_eeprom_read(sc, addr + i);
  1245. +
  1246. +       i += sizeof(uint16_t);
  1247. +       len -= sizeof(uint16_t);
  1248. +   } while (len > 0);
  1249. + }
  1250. +
  1251. + /*
  1252. +  * rt2860_io_bbp_read
  1253. +  */
  1254. + uint8_t rt2860_io_bbp_read(struct rt2860_softc *sc, uint8_t reg)
  1255. + {
  1256. +   int ntries;
  1257. +   uint32_t tmp;
  1258. +
  1259. +   if (sc->mac_rev == 0x28720200)
  1260. +   {
  1261. +       for (ntries = 0; ntries < 100; ntries ++) {
  1262. +           if ( !(rt2860_io_mac_read(sc, RT2860_REG_BBP_CSR_CFG) &
  1263. +               RT2860_REG_BBP_CSR_BUSY) )
  1264. +               break;
  1265. +           DELAY(1);
  1266. +       }
  1267. +       if (ntries == 100) {
  1268. +           printf("%s:%s: BBP busy after 100 probes\n",
  1269. +               device_get_nameunit(sc->sc_dev), __func__);
  1270. +           return (0);
  1271. +       }
  1272. +       rt2860_io_mac_write(sc, RT2860_REG_BBP_CSR_CFG,
  1273. +           RT2860_REG_BBP_CSR_READ |
  1274. +           RT2860_REG_BBP_CSR_KICK | RT2860_REG_BBP_RW_MODE_PARALLEL |
  1275. +           (reg & RT2860_REG_BBP_REG_MASK) << RT2860_REG_BBP_REG_SHIFT);
  1276. +       for (ntries = 0; ntries < 100; ntries ++) {
  1277. +           if ( !(rt2860_io_mac_read(sc, RT2860_REG_BBP_CSR_CFG) &
  1278. +               RT2860_REG_BBP_CSR_BUSY) )
  1279. +               break;
  1280. +           DELAY(1);
  1281. +       }
  1282. +       if (ntries == 100) {
  1283. +           printf("%s:%s: BBP busy after 100 probes\n",
  1284. +               device_get_nameunit(sc->sc_dev), __func__);
  1285. +           return (0);
  1286. +       }
  1287. +       else {
  1288. +           return
  1289. +               ((rt2860_io_mac_read(sc, RT2860_REG_BBP_CSR_CFG) >>
  1290. +               RT2860_REG_BBP_VAL_SHIFT) &
  1291. +               RT2860_REG_BBP_VAL_MASK);
  1292. +       }
  1293. +       return (0);
  1294. +   }
  1295. +
  1296. +   for (ntries = 0; ntries < 100; ntries++)
  1297. +   {
  1298. +       if (!(rt2860_io_mac_read(sc, RT2860_REG_H2M_MAILBOX_BBP_AGENT) &
  1299. +           RT2860_REG_BBP_CSR_BUSY))
  1300. +           break;
  1301. +
  1302. +       DELAY(1);
  1303. +   }
  1304. +
  1305. +   if (ntries == 100)
  1306. +   {
  1307. +       printf("%s: could not read from BBP through MCU: reg=0x%02x\n",
  1308. +           device_get_nameunit(sc->sc_dev), reg);
  1309. +       return 0;
  1310. +   }
  1311. +
  1312. +   tmp = RT2860_REG_BBP_RW_MODE_PARALLEL |
  1313. +       RT2860_REG_BBP_CSR_BUSY |
  1314. +       RT2860_REG_BBP_CSR_READ |
  1315. +       ((reg & RT2860_REG_BBP_REG_MASK) << RT2860_REG_BBP_REG_SHIFT);
  1316. +
  1317. +   rt2860_io_mac_write(sc, RT2860_REG_H2M_MAILBOX_BBP_AGENT, tmp);
  1318. +
  1319. +   rt2860_io_mcu_cmd(sc, RT2860_IO_MCU_CMD_BBP,
  1320. +       RT2860_REG_H2M_TOKEN_NO_INTR, 0);
  1321. +
  1322. +   DELAY(1000);
  1323. +
  1324. +   for (ntries = 0; ntries < 100; ntries++)
  1325. +   {
  1326. +       tmp = rt2860_io_mac_read(sc, RT2860_REG_H2M_MAILBOX_BBP_AGENT);
  1327. +       if (!(tmp & RT2860_REG_BBP_CSR_BUSY))
  1328. +           return ((tmp >> RT2860_REG_BBP_VAL_SHIFT) &
  1329. +               RT2860_REG_BBP_VAL_MASK);
  1330. +
  1331. +       DELAY(1);
  1332. +   }
  1333. +
  1334. +   printf("%s: could not read from BBP through MCU: reg=0x%02x\n",
  1335. +       device_get_nameunit(sc->sc_dev), reg);
  1336. +
  1337. +   return 0;
  1338. + }
  1339. +
  1340. + /*
  1341. +  * rt2860_io_bbp_write
  1342. +  */
  1343. + void rt2860_io_bbp_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
  1344. + {
  1345. +   int ntries;
  1346. +   uint32_t tmp;
  1347. +
  1348. +   if (sc->mac_rev == 0x28720200)
  1349. +   {
  1350. +       for (ntries = 0; ntries < 100; ntries ++) {
  1351. +           if ( !(rt2860_io_mac_read(sc, RT2860_REG_BBP_CSR_CFG) &
  1352. +               RT2860_REG_BBP_CSR_BUSY) )
  1353. +               break;
  1354. +           DELAY(1);
  1355. +       }
  1356. +       if (ntries == 100) {
  1357. +           printf("%s:%s: BBP busy after 100 probes\n",
  1358. +               device_get_nameunit(sc->sc_dev), __func__);
  1359. +           return;
  1360. +       }
  1361. +       rt2860_io_mac_write(sc, RT2860_REG_BBP_CSR_CFG,
  1362. +           RT2860_REG_BBP_CSR_KICK | RT2860_REG_BBP_RW_MODE_PARALLEL |
  1363. +           (reg & RT2860_REG_BBP_REG_MASK) << RT2860_REG_BBP_REG_SHIFT |
  1364. +           (val & RT2860_REG_BBP_VAL_MASK) << RT2860_REG_BBP_VAL_SHIFT );
  1365. +       rt2860_io_bbp_read(sc, reg);
  1366. +       return;
  1367. +   }
  1368. +
  1369. +   for (ntries = 0; ntries < 100; ntries++)
  1370. +   {
  1371. +       if (!(rt2860_io_mac_read(sc, RT2860_REG_H2M_MAILBOX_BBP_AGENT) &
  1372. +           RT2860_REG_BBP_CSR_BUSY))
  1373. +           break;
  1374. +
  1375. +       DELAY(1);
  1376. +   }
  1377. +
  1378. +   if (ntries == 100)
  1379. +   {
  1380. +       printf("%s: could not write to BBP through MCU: reg=0x%02x\n",
  1381. +           device_get_nameunit(sc->sc_dev), reg);
  1382. +       return;
  1383. +   }
  1384. +
  1385. +   tmp = RT2860_REG_BBP_RW_MODE_PARALLEL |
  1386. +       RT2860_REG_BBP_CSR_BUSY |
  1387. +       ((reg & RT2860_REG_BBP_REG_MASK) << RT2860_REG_BBP_REG_SHIFT) |
  1388. +       ((val & RT2860_REG_BBP_VAL_MASK) << RT2860_REG_BBP_VAL_SHIFT);
  1389. +
  1390. +   rt2860_io_mac_write(sc, RT2860_REG_H2M_MAILBOX_BBP_AGENT, tmp);
  1391. +
  1392. +   rt2860_io_mcu_cmd(sc, RT2860_IO_MCU_CMD_BBP,
  1393. +       RT2860_REG_H2M_TOKEN_NO_INTR, 0);
  1394. +
  1395. +   DELAY(1000);
  1396. + }
  1397. +
  1398. + /*
  1399. +  * rt2860_io_rf_write
  1400. +  */
  1401. + void rt2860_io_rf_write(struct rt2860_softc *sc, uint8_t reg, uint32_t val)
  1402. + {
  1403. +   int ntries;
  1404. +   if (sc->mac_rev == 0x28720200)
  1405. +   {
  1406. +       for (ntries = 0; ntries < 100; ntries ++) {
  1407. +           if ( !(rt2860_io_mac_read(sc, RT2872_REG_RF_CSR_CFG) &
  1408. +               RT2872_REG_RF_CSR_BUSY) )
  1409. +               break;
  1410. +           DELAY(1);
  1411. +       }
  1412. +       if (ntries == 100) {
  1413. +           printf("%s:%s: RF busy after 100 probes\n",
  1414. +               device_get_nameunit(sc->sc_dev), __func__);
  1415. +           return;
  1416. +       }
  1417. +       rt2860_io_mac_write(sc, RT2872_REG_RF_CSR_CFG,
  1418. +           RT2872_REG_RF_CSR_KICK | RT2872_REG_RF_CSR_WRITE |
  1419. +           (reg & RT2872_REG_RF_ID_MASK) << RT2872_REG_RF_ID_SHIFT |
  1420. +           (val & RT2872_REG_RF_VAL_MASK) << RT2872_REG_RF_VAL_SHIFT );
  1421. +       rt2860_io_rf_read(sc, reg);
  1422. +       return;
  1423. +   }
  1424. +
  1425. +
  1426. +   for (ntries = 0; ntries < 100; ntries++)
  1427. +       if (!(rt2860_io_mac_read(sc, RT2860_REG_RF_CSR_CFG0) &
  1428. +           RT2860_REG_RF_BUSY))
  1429. +           break;
  1430. +
  1431. +   if (ntries == 100)
  1432. +   {
  1433. +       printf("%s: could not write to RF: reg=0x%02x\n",
  1434. +           device_get_nameunit(sc->sc_dev), reg);
  1435. +       return;
  1436. +   }
  1437. +
  1438. +   rt2860_io_mac_write(sc, RT2860_REG_RF_CSR_CFG0, val);
  1439. + }
  1440. +
  1441. + /*
  1442. +  * rt2860_io_rf_read
  1443. +  */
  1444. + int32_t rt2860_io_rf_read(struct rt2860_softc *sc, uint8_t reg)
  1445. + {
  1446. +   int ntries;
  1447. +   if (sc->mac_rev == 0x28720200)
  1448. +   {
  1449. +       for (ntries = 0; ntries < 100; ntries ++) {
  1450. +           if ( !(rt2860_io_mac_read(sc, RT2872_REG_RF_CSR_CFG) &
  1451. +               RT2872_REG_RF_CSR_BUSY) )
  1452. +               break;
  1453. +           DELAY(1);
  1454. +       }
  1455. +       if (ntries == 100) {
  1456. +           printf("%s:%s: RF busy after 100 probes\n",
  1457. +               device_get_nameunit(sc->sc_dev), __func__);
  1458. +           return (-1);
  1459. +       }
  1460. +       rt2860_io_mac_write(sc, RT2872_REG_RF_CSR_CFG,
  1461. +           RT2872_REG_RF_CSR_KICK |
  1462. +           (reg & RT2872_REG_RF_ID_MASK) << RT2872_REG_RF_ID_SHIFT );
  1463. +
  1464. +       for (ntries = 0; ntries < 100; ntries ++) {
  1465. +           if ( !(rt2860_io_mac_read(sc, RT2872_REG_RF_CSR_CFG) &
  1466. +               RT2872_REG_RF_CSR_BUSY) )
  1467. +               break;
  1468. +           DELAY(1);
  1469. +       }
  1470. +       if (ntries == 100) {
  1471. +           printf("%s:%s: RF busy after 100 probes\n",
  1472. +               device_get_nameunit(sc->sc_dev), __func__);
  1473. +       }
  1474. +
  1475. +       return (rt2860_io_mac_read(sc, RT2872_REG_RF_CSR_CFG) & RT2872_REG_RF_VAL_MASK);
  1476. +   }
  1477. +   return (-1);
  1478. + }
  1479. +
  1480. + /*
  1481. +  * rt2860_io_rf_load_defaults
  1482. +  */
  1483. + void rt2860_io_rf_load_defaults(struct rt2860_softc *sc)
  1484. + {
  1485. +   int i;
  1486. +
  1487. +   if (sc->mac_rev == 0x28720200) {
  1488. +       for (i = 0; i < 32; i ++)
  1489. +           rt2860_io_rf_write(sc, i, rt3052_rf_default[i]);
  1490. +   }
  1491. + }
  1492. +
  1493. + /*
  1494. +  * rt2860_io_mcu_cmd
  1495. +  */
  1496. + void rt2860_io_mcu_cmd(struct rt2860_softc *sc, uint8_t cmd,
  1497. +   uint8_t token, uint16_t arg)
  1498. + {
  1499. +   uint32_t tmp;
  1500. +   int ntries;
  1501. +
  1502. +   if (sc->mac_rev == 0x28720200)
  1503. +       return;
  1504. +
  1505. +   for (ntries = 0; ntries < 100; ntries++)
  1506. +   {
  1507. +       if (!(rt2860_io_mac_read(sc, RT2860_REG_H2M_MAILBOX) &
  1508. +           RT2860_REG_H2M_BUSY))
  1509. +           break;
  1510. +
  1511. +       DELAY(2);
  1512. +   }
  1513. +
  1514. +   if (ntries == 100)
  1515. +   {
  1516. +       printf("%s: could not read H2M: cmd=0x%02x\n",
  1517. +           device_get_nameunit(sc->sc_dev), cmd);
  1518. +       return;
  1519. +   }
  1520. +
  1521. +   tmp = RT2860_REG_H2M_BUSY | (token << 16) | arg;
  1522. +
  1523. +   rt2860_io_mac_write(sc, RT2860_REG_H2M_MAILBOX, tmp);
  1524. +   rt2860_io_mac_write(sc, RT2860_REG_H2M_HOST_CMD, cmd);
  1525. + }
  1526. +
  1527. + /*
  1528. +  * rt2860_io_mcu_cmd_check
  1529. +  */
  1530. + int rt2860_io_mcu_cmd_check(struct rt2860_softc *sc, uint8_t cid)
  1531. + {
  1532. +   uint32_t tmp, mask, status;
  1533. +   int result, ntries;
  1534. +
  1535. +   result = -1;
  1536. +
  1537. +   for (ntries = 0; ntries < 200; ntries++)
  1538. +   {
  1539. +       tmp = rt2860_io_mac_read(sc, RT2860_REG_H2M_MAILBOX_CID);
  1540. +
  1541. +       if (((cid >> RT2860_REG_H2M_CID0_SHIFT) & RT2860_REG_H2M_CID_MASK) == cid)
  1542. +       {
  1543. +           mask = (RT2860_REG_H2M_CID_MASK << RT2860_REG_H2M_CID0_SHIFT);
  1544. +           break;
  1545. +       }
  1546. +       else if (((tmp >> RT2860_REG_H2M_CID1_SHIFT) & RT2860_REG_H2M_CID_MASK) == cid)
  1547. +       {
  1548. +           mask = (RT2860_REG_H2M_CID_MASK << RT2860_REG_H2M_CID1_SHIFT);
  1549. +           break;
  1550. +       }
  1551. +       else if (((tmp >> RT2860_REG_H2M_CID2_SHIFT) & RT2860_REG_H2M_CID_MASK) == cid)
  1552. +       {
  1553. +           mask = (RT2860_REG_H2M_CID_MASK << RT2860_REG_H2M_CID2_SHIFT);
  1554. +           break;
  1555. +       }
  1556. +       else if (((tmp >> RT2860_REG_H2M_CID3_SHIFT) & RT2860_REG_H2M_CID_MASK) == cid)
  1557. +       {
  1558. +           mask = (RT2860_REG_H2M_CID_MASK << RT2860_REG_H2M_CID3_SHIFT);
  1559. +           break;
  1560. +       }
  1561. +
  1562. +       DELAY(100);
  1563. +   }
  1564. +
  1565. +   status = rt2860_io_mac_read(sc, RT2860_REG_H2M_MAILBOX_STATUS);
  1566. +
  1567. +   if (ntries < 200)
  1568. +   {
  1569. +       status &= mask;
  1570. +
  1571. +       if ((status == 0x1) ||
  1572. +           (status == 0x100) ||
  1573. +           (status == 0x10000) ||
  1574. +           (status == 0x1000000))
  1575. +           result = 0;
  1576. +   }
  1577. +
  1578. +   rt2860_io_mac_write(sc, RT2860_REG_H2M_MAILBOX_STATUS, 0xffffffff);
  1579. +   rt2860_io_mac_write(sc, RT2860_REG_H2M_MAILBOX_CID, 0xffffffff);
  1580. +
  1581. +   return result;
  1582. + }
  1583. +
  1584. + /*
  1585. +  * rt2860_io_mcu_load_ucode
  1586. +  */
  1587. + int rt2860_io_mcu_load_ucode(struct rt2860_softc *sc,
  1588. +   const uint8_t *ucode, size_t len)
  1589. + {
  1590. +   int i, ntries;
  1591. +   uint16_t crc;
  1592. +
  1593. +   for (i = 0, crc = 0xffff; i < len - 2; i++)
  1594. +       crc = RT2860_IO_BYTE_CRC16(rt2860_io_byte_rev(ucode[i]), crc);
  1595. +
  1596. +   if (ucode[len - 2] != rt2860_io_byte_rev(crc >> 8) ||
  1597. +       ucode[len - 1] != rt2860_io_byte_rev(crc))
  1598. +   {
  1599. +       printf("%s: wrong microcode crc\n",
  1600. +           device_get_nameunit(sc->sc_dev));
  1601. +       return EINVAL;
  1602. +   }
  1603. +
  1604. +   rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL, RT2860_REG_HST_PM_SEL);
  1605. +
  1606. +   for(i = 0; i < len; i += 4)
  1607. +   {
  1608. +       rt2860_io_mac_write(sc, RT2860_REG_MCU_UCODE_BASE + i,
  1609. +           (ucode[i+3] << 24) | (ucode[i+2] << 16) |
  1610. +           (ucode[i+1] << 8) | ucode[i]);
  1611. +   }
  1612. +
  1613. +   if (sc->mac_rev != 0x28720200)
  1614. +       rt2860_io_mac_write_multi(sc, RT2860_REG_MCU_UCODE_BASE,
  1615. +           ucode, len);
  1616. +
  1617. +   rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL, 0);
  1618. +
  1619. +   if (sc->mac_rev != 0x28720200)
  1620. +       rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL,
  1621. +           RT2860_REG_MCU_RESET);
  1622. +
  1623. +   DELAY(10000);
  1624. +
  1625. +   /* initialize BBP R/W access agent */
  1626. +
  1627. +   rt2860_io_mac_write(sc, RT2860_REG_H2M_MAILBOX_BBP_AGENT, 0);
  1628. +   rt2860_io_mac_write(sc, RT2860_REG_H2M_MAILBOX, 0);
  1629. +
  1630. +   if (sc->mac_rev != 0x28720200) {
  1631. +
  1632. +       for (ntries = 0; ntries < 1000; ntries++)
  1633. +       {
  1634. +           if (rt2860_io_mac_read(sc, RT2860_REG_PBF_SYS_CTRL) &
  1635. +               RT2860_REG_MCU_READY)
  1636. +               break;
  1637. +
  1638. +           DELAY(1000);
  1639. +       }
  1640. +
  1641. +       if (ntries == 1000)
  1642. +       {
  1643. +           printf("%s: timeout waiting for MCU to initialize\n",
  1644. +               device_get_nameunit(sc->sc_dev));
  1645. +           return ETIMEDOUT;
  1646. +       }
  1647. +   }
  1648. +
  1649. +   return 0;
  1650. + }
  1651. +
  1652. + /*
  1653. +  * rt2860_io_eeprom_shiftout_bits
  1654. +  */
  1655. + static void rt2860_io_eeprom_shiftout_bits(struct rt2860_softc *sc,
  1656. +   uint16_t val, uint16_t count)
  1657. + {
  1658. +   uint32_t mask, tmp;
  1659. +
  1660. +   mask = (1 << (count - 1));
  1661. +
  1662. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_EEPROM_CSR);
  1663. +
  1664. +   tmp &= ~(RT2860_REG_EEDO | RT2860_REG_EEDI);
  1665. +
  1666. +   do
  1667. +   {
  1668. +       tmp &= ~RT2860_REG_EEDI;
  1669. +
  1670. +       if(val & mask)
  1671. +           tmp |= RT2860_REG_EEDI;
  1672. +
  1673. +       rt2860_io_mac_write(sc, RT2860_REG_EEPROM_CSR, tmp);
  1674. +
  1675. +       RT2860_IO_EEPROM_RAISE_CLK(sc, tmp);
  1676. +       RT2860_IO_EEPROM_LOWER_CLK(sc, tmp);
  1677. +
  1678. +       mask = (mask >> 1);
  1679. +   } while (mask);
  1680. +
  1681. +   tmp &= ~RT2860_REG_EEDI;
  1682. +
  1683. +   rt2860_io_mac_write(sc, RT2860_REG_EEPROM_CSR, tmp);
  1684. + }
  1685. +
  1686. + /*
  1687. +  * rt2860_io_eeprom_shiftin_bits
  1688. +  */
  1689. + static uint16_t rt2860_io_eeprom_shiftin_bits(struct rt2860_softc *sc)
  1690. + {
  1691. +   uint32_t tmp;
  1692. +   uint16_t val;
  1693. +   int i;
  1694. +
  1695. +   val = 0;
  1696. +
  1697. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_EEPROM_CSR);
  1698. +
  1699. +   tmp &= ~(RT2860_REG_EEDO | RT2860_REG_EEDI);
  1700. +
  1701. +   for(i = 0; i < 16; i++)
  1702. +   {
  1703. +       val = (val << 1);
  1704. +
  1705. +       RT2860_IO_EEPROM_RAISE_CLK(sc, tmp);
  1706. +
  1707. +       tmp = rt2860_io_mac_read(sc, RT2860_REG_EEPROM_CSR);
  1708. +
  1709. +       RT2860_IO_EEPROM_LOWER_CLK(sc, tmp);
  1710. +      
  1711. +       tmp &= ~RT2860_REG_EEDI;
  1712. +       if(tmp & RT2860_REG_EEDO)
  1713. +           val |= 1;
  1714. +   }
  1715. +
  1716. +   return val;
  1717. + }
  1718. +
  1719. + /*
  1720. +  * rt2860_io_byte_rev
  1721. +  */
  1722. + static uint8_t rt2860_io_byte_rev(uint8_t byte)
  1723. + {
  1724. +   int i;
  1725. +   uint8_t tmp;
  1726. +
  1727. +   for(i = 0, tmp = 0; ; i++)
  1728. +   {
  1729. +       if(byte & 0x80)
  1730. +           tmp |= 0x80;
  1731. +
  1732. +       if(i == 7)
  1733. +           break;
  1734. +
  1735. +       byte <<= 1;
  1736. +       tmp >>= 1;
  1737. +   }
  1738. +
  1739. +   return tmp;
  1740. + }
  1741. +
  1742. + /*
  1743. +  * rt2860_read_eeprom
  1744. +  */
  1745. + void rt2860_read_eeprom(struct rt2860_softc *sc)
  1746. + {
  1747. +   uint32_t tmp;
  1748. +   uint16_t val;
  1749. +   int i;
  1750. +
  1751. +   /* read EEPROM address number */
  1752. +
  1753. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_EEPROM_CSR);
  1754. +
  1755. +   if((tmp & 0x30) == 0)
  1756. +       sc->eeprom_addr_num = 6;
  1757. +   else if((tmp & 0x30) == 0x10)
  1758. +       sc->eeprom_addr_num = 8;
  1759. +   else
  1760. +       sc->eeprom_addr_num = 8;
  1761. +
  1762. +   /* read EEPROM version */
  1763. +
  1764. +   sc->eeprom_rev = rt2860_io_eeprom_read(sc, RT2860_EEPROM_VERSION);
  1765. +
  1766. +   RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  1767. +       "%s: EEPROM rev=0x%04x\n",
  1768. +       device_get_nameunit(sc->sc_dev), sc->eeprom_rev);
  1769. +
  1770. +   /* read MAC address */
  1771. +
  1772. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_ADDRESS01);
  1773. +
  1774. +   sc->mac_addr[0] = (val & 0xff);
  1775. +   sc->mac_addr[1] = (val >> 8);
  1776. +
  1777. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_ADDRESS23);
  1778. +
  1779. +   sc->mac_addr[2] = (val & 0xff);
  1780. +   sc->mac_addr[3] = (val >> 8);
  1781. +
  1782. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_ADDRESS45);
  1783. +
  1784. +   sc->mac_addr[4] = (val & 0xff);
  1785. +   sc->mac_addr[5] = (val >> 8);
  1786. +
  1787. +   RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  1788. +       "%s: EEPROM mac address=%s\n",
  1789. +       device_get_nameunit(sc->sc_dev), ether_sprintf(sc->mac_addr));
  1790. +
  1791. +   /* read RF information */
  1792. +
  1793. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_ANTENNA);
  1794. +   if (val == 0xffff)
  1795. +   {
  1796. +       printf("%s: invalid EEPROM antenna info\n",
  1797. +           device_get_nameunit(sc->sc_dev));
  1798. +
  1799. +       sc->rf_rev = RT2860_EEPROM_RF_2820;
  1800. +       sc->ntxpath = 1;
  1801. +       sc->nrxpath = 2;
  1802. +   }
  1803. +   else
  1804. +   {
  1805. +       sc->rf_rev = (val >> 8) & 0xf;
  1806. +       sc->ntxpath = (val >> 4) & 0xf;
  1807. +       sc->nrxpath = (val & 0xf);
  1808. +   }
  1809. +
  1810. +   if ((sc->mac_rev != 0x28830300) && (sc->nrxpath > 2))
  1811. +   {
  1812. +       /* only 2 Rx streams for RT2860 series */
  1813. +
  1814. +       sc->nrxpath = 2;
  1815. +   }
  1816. +
  1817. +   RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  1818. +       "%s: EEPROM RF rev=0x%04x, paths=%dT%dR\n",
  1819. +       device_get_nameunit(sc->sc_dev), sc->rf_rev, sc->ntxpath, sc->nrxpath);
  1820. +
  1821. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_NIC_CONFIG);
  1822. +   if ((val & 0xff00) != 0xff00)
  1823. +       sc->patch_dac = (val >> 15) & 1;
  1824. +
  1825. +   sc->hw_radio_cntl = ((val & RT2860_EEPROM_HW_RADIO_CNTL) ? 1 : 0);
  1826. +   sc->tx_agc_cntl = ((val & RT2860_EEPROM_TX_AGC_CNTL) ? 1 : 0);
  1827. +   sc->ext_lna_2ghz = ((val & RT2860_EEPROM_EXT_LNA_2GHZ) ? 1 : 0);
  1828. +   sc->ext_lna_5ghz = ((val & RT2860_EEPROM_EXT_LNA_5GHZ) ? 1 : 0);
  1829. +
  1830. +   RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  1831. +       "%s: EEPROM NIC config: HW radio cntl=%d, Tx AGC cntl=%d, ext LNA gains=%d/%d\n",
  1832. +       device_get_nameunit(sc->sc_dev),
  1833. +       sc->hw_radio_cntl, sc->tx_agc_cntl, sc->ext_lna_2ghz, sc->ext_lna_5ghz);
  1834. +
  1835. +   /* read country code */
  1836. +
  1837. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_COUNTRY);
  1838. +
  1839. +   sc->country_2ghz = (val >> 8) & 0xff;
  1840. +   sc->country_5ghz = (val & 0xff);
  1841. +
  1842. +   RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  1843. +       "%s: EEPROM country code=%d/%d\n",
  1844. +       device_get_nameunit(sc->sc_dev), sc->country_2ghz, sc->country_5ghz);
  1845. +
  1846. +   /* read RF frequency offset */
  1847. +
  1848. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_RF_FREQ_OFF);
  1849. +
  1850. +   if ((val & 0xff) != 0xff)
  1851. +   {
  1852. +       sc->rf_freq_off = (val & 0xff);
  1853. +   }
  1854. +   else
  1855. +   {
  1856. +       printf("%s: invalid EEPROM RF freq offset\n",
  1857. +           device_get_nameunit(sc->sc_dev));
  1858. +
  1859. +       sc->rf_freq_off = 0;
  1860. +   }
  1861. +
  1862. +   RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  1863. +       "%s: EEPROM freq offset=0x%02x\n",
  1864. +       device_get_nameunit(sc->sc_dev), sc->rf_freq_off);
  1865. +
  1866. +   /* read LEDs operating mode */
  1867. +
  1868. +   if (((val >> 8) & 0xff) != 0xff)
  1869. +   {
  1870. +       sc->led_cntl = ((val >> 8) & 0xff);
  1871. +       sc->led_off[0] = rt2860_io_eeprom_read(sc, RT2860_EEPROM_LED1_OFF);
  1872. +       sc->led_off[1] = rt2860_io_eeprom_read(sc, RT2860_EEPROM_LED2_OFF);
  1873. +       sc->led_off[2] = rt2860_io_eeprom_read(sc, RT2860_EEPROM_LED3_OFF);
  1874. +   }
  1875. +   else
  1876. +   {
  1877. +       printf("%s: invalid EEPROM LED settings\n",
  1878. +           device_get_nameunit(sc->sc_dev));
  1879. +
  1880. +       sc->led_cntl = RT2860_EEPROM_LED_CNTL_DEFAULT;
  1881. +       sc->led_off[0] = RT2860_EEPROM_LED1_OFF_DEFAULT;
  1882. +       sc->led_off[1] = RT2860_EEPROM_LED2_OFF_DEFAULT;
  1883. +       sc->led_off[2] = RT2860_EEPROM_LED3_OFF_DEFAULT;
  1884. +   }
  1885. +
  1886. +   RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  1887. +       "%s: EEPROM LED cntl=0x%02x, LEDs=0x%04x/0x%04x/0x%04x\n",
  1888. +       device_get_nameunit(sc->sc_dev), sc->led_cntl,
  1889. +       sc->led_off[0], sc->led_off[1], sc->led_off[2]);
  1890. +
  1891. +   /* read RSSI offsets and LNA gains */
  1892. +
  1893. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_LNA_GAIN);
  1894. +   if ((sc->mac_rev & 0xffff0000) >= 0x30710000)
  1895. +       sc->lna_gain[0] = RT3090_DEF_LNA;
  1896. +   else                /* channel group 0 */
  1897. +       sc->lna_gain[0] = val & 0xff;
  1898. +
  1899. +   sc->lna_gain[1] = (val >> 8) & 0xff;
  1900. +
  1901. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_RSSI_OFF_2GHZ_BASE);
  1902. +
  1903. +   sc->rssi_off_2ghz[0] = (val & 0xff);
  1904. +   sc->rssi_off_2ghz[1] = (val >> 8) & 0xff;
  1905. +
  1906. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_RSSI_OFF_2GHZ_BASE + 2);
  1907. +
  1908. +   if ((sc->mac_rev & 0xffff0000) >= 0x30710000) {
  1909. +       /*
  1910. +        * On RT3090 chips (limited to 2 Rx chains), this ROM
  1911. +        * field contains the Tx mixer gain for the 2GHz band.
  1912. +        */
  1913. +       if ((val & 0xff) != 0xff)
  1914. +           sc->txmixgain_2ghz = val & 0x7;
  1915. +   } else
  1916. +       sc->rssi_off_2ghz[2] = val & 0xff;  /* Ant C */
  1917. +   sc->lna_gain[2] = (val >> 8) & 0xff;
  1918. +
  1919. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_RSSI_OFF_5GHZ_BASE);
  1920. +
  1921. +   sc->rssi_off_5ghz[0] = (val & 0xff);
  1922. +   sc->rssi_off_5ghz[1] = (val >> 8) & 0xff;
  1923. +
  1924. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_RSSI_OFF_5GHZ_BASE + 2);
  1925. +
  1926. +   sc->rssi_off_5ghz[2] = (val & 0xff);
  1927. +   sc->lna_gain[3] = (val >> 8) & 0xff;
  1928. +
  1929. +   for (i = 2; i < RT2860_SOFTC_LNA_GAIN_COUNT; i++)
  1930. +   {
  1931. +       if (sc->lna_gain[i] == 0x00 || sc->lna_gain[i] == (int8_t) 0xff)
  1932. +       {
  1933. +           printf("%s: invalid EEPROM LNA gain #%d: 0x%02x\n",
  1934. +               device_get_nameunit(sc->sc_dev), i, sc->lna_gain[i]);
  1935. +
  1936. +           sc->lna_gain[i] = sc->lna_gain[1];
  1937. +       }
  1938. +   }
  1939. +
  1940. +   RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  1941. +       "%s: EEPROM LNA gains=0x%02x/0x%02x/0x%02x/0x%02x\n",
  1942. +       device_get_nameunit(sc->sc_dev),
  1943. +       sc->lna_gain[0], sc->lna_gain[1], sc->lna_gain[2], sc->lna_gain[3]);
  1944. +
  1945. +   for (i = 0; i < RT2860_SOFTC_RSSI_OFF_COUNT; i++)
  1946. +   {
  1947. +       if (sc->rssi_off_2ghz[i] < RT2860_EEPROM_RSSI_OFF_MIN ||
  1948. +           sc->rssi_off_2ghz[i] > RT2860_EEPROM_RSSI_OFF_MAX)
  1949. +       {
  1950. +           printf("%s: invalid EEPROM RSSI offset #%d (2GHz): 0x%02x\n",
  1951. +               device_get_nameunit(sc->sc_dev), i, sc->rssi_off_2ghz[i]);
  1952. +
  1953. +           sc->rssi_off_2ghz[i] = 0;
  1954. +       }
  1955. +
  1956. +       if (sc->rssi_off_5ghz[i] < RT2860_EEPROM_RSSI_OFF_MIN ||
  1957. +           sc->rssi_off_5ghz[i] > RT2860_EEPROM_RSSI_OFF_MAX)
  1958. +       {
  1959. +           printf("%s: invalid EEPROM RSSI offset #%d (5GHz): 0x%02x\n",
  1960. +               device_get_nameunit(sc->sc_dev), i, sc->rssi_off_5ghz[i]);
  1961. +
  1962. +           sc->rssi_off_5ghz[i] = 0;
  1963. +       }
  1964. +   }
  1965. +
  1966. +   RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  1967. +       "%s: EEPROM RSSI offsets 2GHz=%d/%d/%d\n",
  1968. +       device_get_nameunit(sc->sc_dev),
  1969. +       sc->rssi_off_2ghz[0], sc->rssi_off_2ghz[1], sc->rssi_off_2ghz[2]);
  1970. +
  1971. +   RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  1972. +       "%s: EEPROM RSSI offsets 5GHz=%d/%d/%d\n",
  1973. +       device_get_nameunit(sc->sc_dev),
  1974. +       sc->rssi_off_5ghz[0], sc->rssi_off_5ghz[1], sc->rssi_off_5ghz[2]);
  1975. +
  1976. +   /* read Tx power settings for 2GHz channels */
  1977. +
  1978. +   for (i = 0; i < 14; i += 2)
  1979. +   {
  1980. +       val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TXPOW1_2GHZ_BASE + i / 2);
  1981. +
  1982. +       sc->txpow1[i + 0] = (int8_t) (val & 0xff);
  1983. +       sc->txpow1[i + 1] = (int8_t) (val >> 8);
  1984. +
  1985. +       val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TXPOW2_2GHZ_BASE + i / 2);
  1986. +
  1987. +       sc->txpow2[i + 0] = (int8_t) (val & 0xff);
  1988. +       sc->txpow2[i + 1] = (int8_t) (val >> 8);
  1989. +   }
  1990. +
  1991. +   /* read Tx power settings for 5GHz channels */
  1992. +
  1993. +   for (; i < RT2860_SOFTC_TXPOW_COUNT; i += 2)
  1994. +   {
  1995. +       val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TXPOW1_5GHZ_BASE + i / 2);
  1996. +
  1997. +       sc->txpow1[i + 0] = (int8_t) (val & 0xff);
  1998. +       sc->txpow1[i + 1] = (int8_t) (val >> 8);
  1999. +
  2000. +       val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TXPOW2_5GHZ_BASE + i / 2);
  2001. +
  2002. +       sc->txpow2[i + 0] = (int8_t) (val & 0xff);
  2003. +       sc->txpow2[i + 1] = (int8_t) (val >> 8);
  2004. +   }
  2005. +
  2006. +   /* fix broken Tx power settings */
  2007. +
  2008. +     for (i = 0; i < 14; i++)
  2009. +   {
  2010. +       if (sc->txpow1[i] < RT2860_EEPROM_TXPOW_2GHZ_MIN ||
  2011. +           sc->txpow1[i] > RT2860_EEPROM_TXPOW_2GHZ_MAX)
  2012. +       {
  2013. +           printf("%s: invalid EEPROM Tx power1 #%d (2GHz): 0x%02x\n",
  2014. +               device_get_nameunit(sc->sc_dev), i, sc->txpow1[i]);
  2015. +
  2016. +           sc->txpow1[i] = RT2860_EEPROM_TXPOW_2GHZ_DEFAULT;
  2017. +       }
  2018. +
  2019. +       if (sc->txpow2[i] < RT2860_EEPROM_TXPOW_2GHZ_MIN ||
  2020. +           sc->txpow2[i] > RT2860_EEPROM_TXPOW_2GHZ_MAX)
  2021. +       {
  2022. +           printf("%s: invalid EEPROM Tx power2 #%d (2GHz): 0x%02x\n",
  2023. +               device_get_nameunit(sc->sc_dev), i, sc->txpow2[i]);
  2024. +
  2025. +           sc->txpow2[i] = RT2860_EEPROM_TXPOW_2GHZ_DEFAULT;
  2026. +       }
  2027. +   }
  2028. +
  2029. +   for (; i < RT2860_SOFTC_TXPOW_COUNT; i++)
  2030. +   {
  2031. +       if (sc->txpow1[i] < RT2860_EEPROM_TXPOW_5GHZ_MIN ||
  2032. +           sc->txpow1[i] > RT2860_EEPROM_TXPOW_5GHZ_MAX)
  2033. +       {
  2034. +           printf("%s: invalid EEPROM Tx power1 #%d (5GHz): 0x%02x\n",
  2035. +               device_get_nameunit(sc->sc_dev), i, sc->txpow1[i]);
  2036. +
  2037. +           sc->txpow1[i] = RT2860_EEPROM_TXPOW_5GHZ_DEFAULT;
  2038. +       }
  2039. +
  2040. +       if (sc->txpow2[i] < RT2860_EEPROM_TXPOW_5GHZ_MIN ||
  2041. +           sc->txpow2[i] > RT2860_EEPROM_TXPOW_5GHZ_MAX)
  2042. +       {
  2043. +           printf("%s: invalid EEPROM Tx power2 #%d (5GHz): 0x%02x\n",
  2044. +               device_get_nameunit(sc->sc_dev), i, sc->txpow2[i]);
  2045. +
  2046. +           sc->txpow2[i] = RT2860_EEPROM_TXPOW_5GHZ_DEFAULT;
  2047. +       }
  2048. +   }
  2049. +
  2050. +   /* read Tx power per rate deltas */
  2051. +
  2052. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TXPOW_RATE_DELTA);
  2053. +
  2054. +   sc->txpow_rate_delta_2ghz = 0;
  2055. +   sc->txpow_rate_delta_5ghz = 0;
  2056. +
  2057. +   if ((val & 0xff) != 0xff)
  2058. +   {
  2059. +       if (val & 0x80)
  2060. +           sc->txpow_rate_delta_2ghz = (val & 0xf);
  2061. +
  2062. +       if (!(val & 0x40))
  2063. +           sc->txpow_rate_delta_2ghz = -sc->txpow_rate_delta_2ghz;
  2064. +   }
  2065. +
  2066. +   val >>= 8;
  2067. +
  2068. +   if ((val & 0xff) != 0xff)
  2069. +   {
  2070. +       if (val & 0x80)
  2071. +           sc->txpow_rate_delta_5ghz = (val & 0xf);
  2072. +
  2073. +       if (!(val & 0x40))
  2074. +           sc->txpow_rate_delta_5ghz = -sc->txpow_rate_delta_5ghz;
  2075. +   }
  2076. +
  2077. +   RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  2078. +       "%s: EEPROM Tx power per rate deltas=%d(2MHz), %d(5MHz)\n",
  2079. +       device_get_nameunit(sc->sc_dev),
  2080. +       sc->txpow_rate_delta_2ghz, sc->txpow_rate_delta_5ghz);
  2081. +
  2082. +   /* read Tx power per rate */
  2083. +
  2084. +   for (i = 0; i < RT2860_SOFTC_TXPOW_RATE_COUNT; i++)
  2085. +   {
  2086. +       rt2860_io_eeprom_read_multi(sc, RT2860_EEPROM_TXPOW_RATE_BASE + i * sizeof(uint32_t),
  2087. +           &tmp, sizeof(uint32_t));
  2088. +
  2089. +       sc->txpow_rate_20mhz[i] = tmp;
  2090. +       sc->txpow_rate_40mhz_2ghz[i] =
  2091. +           rt2860_read_eeprom_txpow_rate_add_delta(tmp, sc->txpow_rate_delta_2ghz);
  2092. +       sc->txpow_rate_40mhz_5ghz[i] =
  2093. +           rt2860_read_eeprom_txpow_rate_add_delta(tmp, sc->txpow_rate_delta_5ghz);
  2094. +
  2095. +       RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  2096. +           "%s: EEPROM Tx power per rate #%d=0x%08x(20MHz), 0x%08x(40MHz/2GHz), 0x%08x(40MHz/5GHz)\n",
  2097. +           device_get_nameunit(sc->sc_dev), i,
  2098. +           sc->txpow_rate_20mhz[i], sc->txpow_rate_40mhz_2ghz[i], sc->txpow_rate_40mhz_5ghz[i]);
  2099. +   }
  2100. +
  2101. +   if (sc->tx_agc_cntl)
  2102. +       sc->tx_agc_cntl_2ghz = sc->tx_agc_cntl_5ghz = 1;
  2103. +
  2104. +   /* read factory-calibrated samples for temperature compensation */
  2105. +
  2106. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TSSI_2GHZ_BASE);
  2107. +
  2108. +   sc->tssi_2ghz[0] = (val & 0xff);    /* [-4] */
  2109. +   sc->tssi_2ghz[1] = (val >> 8);      /* [-3] */
  2110. +
  2111. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TSSI_2GHZ_BASE + 2);
  2112. +
  2113. +   sc->tssi_2ghz[2] = (val & 0xff);    /* [-2] */
  2114. +   sc->tssi_2ghz[3] = (val >> 8);      /* [-1] */
  2115. +
  2116. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TSSI_2GHZ_BASE + 2 * 2);
  2117. +
  2118. +   sc->tssi_2ghz[4] = (val & 0xff);    /* [0] */
  2119. +   sc->tssi_2ghz[5] = (val >> 8);      /* [+1] */
  2120. +
  2121. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TSSI_2GHZ_BASE + 3 * 2);
  2122. +
  2123. +   sc->tssi_2ghz[6] = (val & 0xff);    /* [+2] */
  2124. +   sc->tssi_2ghz[7] = (val >> 8);      /* [+3] */
  2125. +
  2126. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TSSI_2GHZ_BASE + 4 * 2);
  2127. +
  2128. +   sc->tssi_2ghz[8] = (val & 0xff);    /* [+4] */
  2129. +   sc->tssi_step_2ghz = (val >> 8);
  2130. +
  2131. +   if (sc->tssi_2ghz[4] == 0xff)
  2132. +       sc->tx_agc_cntl_2ghz = 0;
  2133. +
  2134. +   RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  2135. +       "%s: EEPROM TSSI 2GHz: 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, "
  2136. +       "0x%02x, 0x%02x, step=%d\n",
  2137. +       device_get_nameunit(sc->sc_dev),
  2138. +       sc->tssi_2ghz[0], sc->tssi_2ghz[1], sc->tssi_2ghz[2],
  2139. +       sc->tssi_2ghz[3], sc->tssi_2ghz[4], sc->tssi_2ghz[5],
  2140. +       sc->tssi_2ghz[6], sc->tssi_2ghz[7], sc->tssi_2ghz[8],
  2141. +       sc->tssi_step_2ghz);
  2142. +
  2143. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TSSI_5GHZ_BASE);
  2144. +
  2145. +   sc->tssi_5ghz[0] = (val & 0xff);    /* [-4] */
  2146. +   sc->tssi_5ghz[1] = (val >> 8);      /* [-3] */
  2147. +
  2148. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TSSI_5GHZ_BASE + 2);
  2149. +
  2150. +   sc->tssi_5ghz[2] = (val & 0xff);    /* [-2] */
  2151. +   sc->tssi_5ghz[3] = (val >> 8);      /* [-1] */
  2152. +
  2153. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TSSI_5GHZ_BASE + 2 * 2);
  2154. +
  2155. +   sc->tssi_5ghz[4] = (val & 0xff);    /* [0] */
  2156. +   sc->tssi_5ghz[5] = (val >> 8);      /* [+1] */
  2157. +
  2158. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TSSI_5GHZ_BASE + 3 * 2);
  2159. +
  2160. +   sc->tssi_5ghz[6] = (val & 0xff);    /* [+2] */
  2161. +   sc->tssi_5ghz[7] = (val >> 8);      /* [+3] */
  2162. +
  2163. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_TSSI_5GHZ_BASE + 4 * 2);
  2164. +
  2165. +   sc->tssi_5ghz[8] = (val & 0xff);    /* [+4] */
  2166. +   sc->tssi_step_5ghz = (val >> 8);
  2167. +
  2168. +   if (sc->tssi_5ghz[4] == 0xff)
  2169. +       sc->tx_agc_cntl_5ghz = 0;
  2170. +
  2171. +   RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  2172. +       "%s: EEPROM TSSI 5GHz: 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, 0x%02x, "
  2173. +       "0x%02x, 0x%02x, step=%d\n",
  2174. +       device_get_nameunit(sc->sc_dev),
  2175. +       sc->tssi_5ghz[0], sc->tssi_5ghz[1], sc->tssi_5ghz[2],
  2176. +       sc->tssi_5ghz[3], sc->tssi_5ghz[4], sc->tssi_5ghz[5],
  2177. +       sc->tssi_5ghz[6], sc->tssi_5ghz[7], sc->tssi_5ghz[8],
  2178. +       sc->tssi_step_5ghz);
  2179. +
  2180. +   /* read default BBP settings */
  2181. +
  2182. +   rt2860_io_eeprom_read_multi(sc, RT2860_EEPROM_BBP_BASE,
  2183. +       sc->bbp_eeprom, RT2860_SOFTC_BBP_EEPROM_COUNT * 2);
  2184. +
  2185. +   if ((sc->mac_rev & 0xffff0000) >= 0x30710000) {
  2186. +       /* read vendor RF settings */
  2187. +       rt2860_io_eeprom_read_multi(sc, RT3071_EEPROM_RF_BASE, sc->rf, 10 * 2);
  2188. +   }
  2189. +
  2190. +   /* read powersave level */
  2191. +   val = rt2860_io_eeprom_read(sc, RT2860_EEPROM_POWERSAVE_LEVEL);
  2192. +
  2193. +   sc->powersave_level = val & 0xff;
  2194. +
  2195. +   if ((sc->powersave_level & 0xff) == 0xff)
  2196. +       printf("%s: invalid EEPROM powersave level\n",
  2197. +           device_get_nameunit(sc->sc_dev));
  2198. +
  2199. +   RT2860_DPRINTF(sc, RT2860_DEBUG_EEPROM,
  2200. +       "%s: EEPROM powersave level=0x%02x\n",
  2201. +       device_get_nameunit(sc->sc_dev), sc->powersave_level);
  2202. + }
  2203. +
  2204. + /*
  2205. +  * rt2860_read_eeprom_txpow_rate_add_delta
  2206. +  */
  2207. + uint32_t rt2860_read_eeprom_txpow_rate_add_delta(uint32_t txpow_rate,
  2208. +   int8_t delta)
  2209. + {
  2210. +   int8_t b4;
  2211. +   int i;
  2212. +
  2213. +   for (i = 0; i < 8; i++)
  2214. +   {
  2215. +       b4 = txpow_rate & 0xf;
  2216. +       b4 += delta;
  2217. +
  2218. +       if (b4 < 0)
  2219. +           b4 = 0;
  2220. +       else if (b4 > 0xf)
  2221. +           b4 = 0xf;
  2222. +
  2223. +       txpow_rate = (txpow_rate >> 4) | (b4 << 28);
  2224. +   }
  2225. +
  2226. +   return txpow_rate;
  2227. + }
  2228. +
  2229. + /*
  2230. +  *  LED functions NOTE/FIXME: Untested by me
  2231. +  */
  2232. +
  2233. + /*
  2234. +  * rt2860_led_brightness
  2235. +  */
  2236. + void rt2860_led_brightness(struct rt2860_softc *sc, uint8_t brightness)
  2237. + {
  2238. +   uint8_t polarity;
  2239. +   uint16_t tmp;
  2240. +
  2241. +   polarity = (sc->led_cntl & RT2860_EEPROM_LED_POLARITY) ? 1 : 0;
  2242. +
  2243. +   tmp = (polarity << 8) | brightness;
  2244. +
  2245. +   rt2860_io_mcu_cmd(sc, RT2860_IO_MCU_CMD_LED_BRIGHTNESS,
  2246. +       RT2860_REG_H2M_TOKEN_NO_INTR, tmp);
  2247. + }
  2248. +
  2249. + /*
  2250. +  * rt2860_led_cmd
  2251. +  */
  2252. + void rt2860_led_cmd(struct rt2860_softc *sc, uint8_t cmd)
  2253. + {
  2254. +   uint16_t tmp;
  2255. +
  2256. +   tmp = (cmd << 8) | (sc->led_cntl & RT2860_EEPROM_LED_MODE_MASK);
  2257. +
  2258. +   rt2860_io_mcu_cmd(sc, RT2860_IO_MCU_CMD_LEDS,
  2259. +       RT2860_REG_H2M_TOKEN_NO_INTR, tmp);
  2260. + }
  2261. +
  2262. + /*
  2263. +  *  RF MAC functions
  2264. +  */
  2265. +
  2266. +
  2267. + uint8_t
  2268. + rt3090_rf_read(struct rt2860_softc *sc, uint8_t reg)
  2269. + {
  2270. +   uint32_t tmp;
  2271. +   int ntries;
  2272. +
  2273. +   for (ntries = 0; ntries < 100; ntries++) {
  2274. +       if (!(rt2860_io_mac_read(sc, RT3070_RF_CSR_CFG) & RT3070_RF_KICK))
  2275. +           break;
  2276. +       DELAY(1);
  2277. +   }
  2278. +   if (ntries == 100) {
  2279. +       device_printf(sc->sc_dev, "could not read RF register\n");
  2280. +       return 0xff;
  2281. +   }
  2282. +   tmp = RT3070_RF_KICK | reg << 8;
  2283. +   rt2860_io_mac_write(sc, RT3070_RF_CSR_CFG, tmp);
  2284. +
  2285. +   for (ntries = 0; ntries < 100; ntries++) {
  2286. +       tmp = rt2860_io_mac_read(sc, RT3070_RF_CSR_CFG);
  2287. +       if (!(tmp & RT3070_RF_KICK))
  2288. +           break;
  2289. +       DELAY(1);
  2290. +   }
  2291. +   if (ntries == 100) {
  2292. +       device_printf(sc->sc_dev, "could not read RF register\n");
  2293. +       return 0xff;
  2294. +   }
  2295. +   return tmp & 0xff;
  2296. + }
  2297. +
  2298. + void
  2299. + rt3090_rf_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
  2300. + {
  2301. +   uint32_t tmp;
  2302. +   int ntries;
  2303. +
  2304. +   for (ntries = 0; ntries < 10; ntries++) {
  2305. +       if (!(rt2860_io_mac_read(sc, RT3070_RF_CSR_CFG) & RT3070_RF_KICK))
  2306. +           break;
  2307. +       DELAY(10);
  2308. +   }
  2309. +   if (ntries == 10) {
  2310. +       device_printf(sc->sc_dev, "could not write to RF\n");
  2311. +       return;
  2312. +   }
  2313. +
  2314. +   tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val;
  2315. +   rt2860_io_mac_write(sc, RT3070_RF_CSR_CFG, tmp);
  2316. + }
  2317. +
  2318. + /*
  2319. +  * rt2860_rf_name
  2320. +  */
  2321. + const char *rt2860_rf_name(int rf_rev)
  2322. + {
  2323. +   switch (rf_rev)
  2324. +   {
  2325. +       case RT2860_EEPROM_RF_2820:
  2326. +           return "RT2820 2.4G 2T3R";
  2327. +
  2328. +       case RT2860_EEPROM_RF_2850:
  2329. +           return "RT2850 2.4G/5G 2T3R";
  2330. +
  2331. +       case RT2860_EEPROM_RF_2720:
  2332. +           return "RT2720 2.4G 1T2R";
  2333. +
  2334. +       case RT2860_EEPROM_RF_2750:
  2335. +           return "RT2750 2.4G/5G 1T2R";
  2336. +
  2337. +       case RT2860_EEPROM_RF_3020:
  2338. +           return "RT3020 2.4G 1T1R";
  2339. +
  2340. +       case RT2860_EEPROM_RF_2020:
  2341. +           return "RT2020 2.4G B/G";
  2342. +
  2343. +       case RT2860_EEPROM_RF_3021:
  2344. +           return "RT3021 2.4G 1T2R";
  2345. +
  2346. +       case RT2860_EEPROM_RF_3022:
  2347. +           return "RT3022 2.4G 2T2R";
  2348. +
  2349. +       case RT2860_EEPROM_RF_3052:
  2350. +           return "RT3052 2.4G/5G 2T2R";
  2351. +
  2352. +       case RT2860_EEPROM_RF_2853:
  2353. +           return "RT2853 2.4G.5G 3T3R";
  2354. +
  2355. +       case RT2860_EEPROM_RF_3320:
  2356. +           return "RT3320 2.4G 1T1R with PA";
  2357. +
  2358. +       case RT2860_EEPROM_RF_3322:
  2359. +           return "RT3322 2.4G 2T2R with PA";
  2360. +
  2361. +       case RT2860_EEPROM_RF_3053:
  2362. +           return "RT3053 2.4G/5G 3T3R";
  2363. +
  2364. +       default:
  2365. +           return "unknown";
  2366. +   }
  2367. + }
  2368. +
  2369. + /*
  2370. +  * rt2860_rf_select_chan_group
  2371. +  */
  2372. + void rt2860_rf_select_chan_group(struct rt2860_softc *sc,
  2373. +   struct ieee80211_channel *c)
  2374. + {
  2375. +   struct ifnet *ifp;
  2376. +   struct ieee80211com *ic;
  2377. +   int chan, group;
  2378. +   uint32_t tmp;
  2379. +
  2380. +   ifp = sc->sc_ifp;
  2381. +   ic = ifp->if_l2com;
  2382. +
  2383. +   chan = ieee80211_chan2ieee(ic, c);
  2384. +   if (chan == 0 || chan == IEEE80211_CHAN_ANY)
  2385. +       return;
  2386. +
  2387. +   if (chan <= 14)
  2388. +       group = 0;
  2389. +   else if (chan <= 64)
  2390. +       group = 1;
  2391. +   else if (chan <= 128)
  2392. +       group = 2;
  2393. +   else
  2394. +       group = 3;
  2395. +
  2396. +   rt2860_io_bbp_write(sc, 62, 0x37 - sc->lna_gain[group]);
  2397. +   rt2860_io_bbp_write(sc, 63, 0x37 - sc->lna_gain[group]);
  2398. +   rt2860_io_bbp_write(sc, 64, 0x37 - sc->lna_gain[group]);
  2399. +   rt2860_io_bbp_write(sc, 86, 0x00);
  2400. +
  2401. +   if (group == 0)
  2402. +   {
  2403. +       if (sc->ext_lna_2ghz)
  2404. +       {
  2405. +           rt2860_io_bbp_write(sc, 82, 0x62);
  2406. +           rt2860_io_bbp_write(sc, 75, 0x46);
  2407. +       }
  2408. +       else
  2409. +       {
  2410. +           rt2860_io_bbp_write(sc, 82, 0x84);
  2411. +           rt2860_io_bbp_write(sc, 75, 0x50);
  2412. +       }
  2413. +   }
  2414. +   else
  2415. +   {
  2416. +       rt2860_io_bbp_write(sc, 82, 0xf2);
  2417. +
  2418. +       if (sc->ext_lna_5ghz)
  2419. +           rt2860_io_bbp_write(sc, 75, 0x46);
  2420. +       else
  2421. +           rt2860_io_bbp_write(sc, 75, 0x50);
  2422. +   }
  2423. +
  2424. +   if (group == 0)
  2425. +   {
  2426. +       tmp = 0x2e + sc->lna_gain[group];
  2427. +   }
  2428. +   else
  2429. +   {
  2430. +       if ((ic->ic_flags & IEEE80211_F_SCAN) || !IEEE80211_IS_CHAN_HT40(c))
  2431. +           tmp = 0x32 + sc->lna_gain[group] * 5 / 3;
  2432. +       else
  2433. +           tmp = 0x3a + sc->lna_gain[group] * 5 / 3;
  2434. +   }
  2435. +
  2436. +   rt2860_io_bbp_write(sc, 66, tmp);
  2437. +
  2438. +   tmp = RT2860_REG_RFTR_ENABLE |
  2439. +       RT2860_REG_TRSW_ENABLE |
  2440. +       RT2860_REG_LNA_PE_G1_ENABLE |
  2441. +       RT2860_REG_LNA_PE_A1_ENABLE |
  2442. +       RT2860_REG_LNA_PE_G0_ENABLE |
  2443. +       RT2860_REG_LNA_PE_A0_ENABLE;
  2444. +
  2445. +   if (group == 0)
  2446. +       tmp |= RT2860_REG_PA_PE_G1_ENABLE |
  2447. +           RT2860_REG_PA_PE_G0_ENABLE;
  2448. +   else
  2449. +       tmp |= RT2860_REG_PA_PE_A1_ENABLE |
  2450. +           RT2860_REG_PA_PE_A0_ENABLE;
  2451. +
  2452. +   if (sc->ntxpath == 1)
  2453. +       tmp &= ~(RT2860_REG_PA_PE_G1_ENABLE | RT2860_REG_PA_PE_A1_ENABLE);
  2454. +
  2455. +   if (sc->nrxpath == 1)
  2456. +       tmp &= ~(RT2860_REG_LNA_PE_G1_ENABLE | RT2860_REG_LNA_PE_A1_ENABLE);
  2457. +
  2458. +   rt2860_io_mac_write(sc, RT2860_REG_TX_PIN_CFG, tmp);
  2459. +
  2460. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_TX_BAND_CFG);
  2461. +
  2462. +   tmp &= ~(RT2860_REG_TX_BAND_BG | RT2860_REG_TX_BAND_A | RT2860_REG_TX_BAND_HT40_ABOVE);
  2463. +
  2464. +   if (group == 0)
  2465. +       tmp |= RT2860_REG_TX_BAND_BG;
  2466. +   else
  2467. +       tmp |= RT2860_REG_TX_BAND_A;
  2468. +
  2469. +   /* set central channel position */
  2470. +
  2471. +   if (IEEE80211_IS_CHAN_HT40U(c))
  2472. +       tmp |= RT2860_REG_TX_BAND_HT40_BELOW;
  2473. +   else if (IEEE80211_IS_CHAN_HT40D(c))
  2474. +       tmp |= RT2860_REG_TX_BAND_HT40_ABOVE;
  2475. +   else
  2476. +       tmp |= RT2860_REG_TX_BAND_HT40_BELOW;
  2477. +
  2478. +   rt2860_io_mac_write(sc, RT2860_REG_TX_BAND_CFG, tmp);
  2479. +
  2480. +   /* set bandwidth (20MHz or 40MHz) */
  2481. +
  2482. +   tmp = rt2860_io_bbp_read(sc, 4);
  2483. +
  2484. +   tmp &= ~0x18;
  2485. +
  2486. +   if (IEEE80211_IS_CHAN_HT40(c))
  2487. +       tmp |= 0x10;
  2488. +
  2489. +   rt2860_io_bbp_write(sc, 4, tmp);
  2490. +
  2491. +   /* set central channel position */
  2492. +
  2493. +   tmp = rt2860_io_bbp_read(sc, 3);
  2494. +
  2495. +   tmp &= ~0x20;
  2496. +
  2497. +   if (IEEE80211_IS_CHAN_HT40D(c))
  2498. +       tmp |= 0x20;
  2499. +
  2500. +   rt2860_io_bbp_write(sc, 3, tmp);
  2501. +
  2502. +   if (sc->mac_rev == 0x28600100)
  2503. +   {
  2504. +       if (!IEEE80211_IS_CHAN_HT40(c))
  2505. +       {
  2506. +           rt2860_io_bbp_write(sc, 69, 0x16);
  2507. +           rt2860_io_bbp_write(sc, 70, 0x08);
  2508. +           rt2860_io_bbp_write(sc, 73, 0x12);
  2509. +       }
  2510. +       else
  2511. +       {
  2512. +           rt2860_io_bbp_write(sc, 69, 0x1a);
  2513. +           rt2860_io_bbp_write(sc, 70, 0x0a);
  2514. +           rt2860_io_bbp_write(sc, 73, 0x16);
  2515. +       }
  2516. +   }
  2517. +
  2518. + }
  2519. +
  2520. + void
  2521. + rt3090_set_chan(struct rt2860_softc *sc, u_int chan)
  2522. + {
  2523. +   int8_t txpow1, txpow2;
  2524. +   uint8_t rf;
  2525. +   int i;
  2526. +
  2527. +   KASSERT((chan >= 1 && chan <= 14), "RT3090 is 2GHz only");  /* RT3090 is 2GHz only */
  2528. +
  2529. +   /* find the settings for this channel (we know it exists) */
  2530. +   for (i = 0; rt2860_rf2850[i].chan != chan; i++);
  2531. +
  2532. +   /* use Tx power values from EEPROM */
  2533. +   txpow1 = sc->txpow1[i];
  2534. +   txpow2 = sc->txpow2[i];
  2535. +
  2536. +   rt3090_rf_write(sc, 2, rt3090_freqs[i].n);
  2537. +   rf = rt3090_rf_read(sc, 3);
  2538. +   rf = (rf & ~0x0f) | rt3090_freqs[i].k;
  2539. +   rt3090_rf_write(sc, 3, rf);
  2540. +   rf = rt3090_rf_read(sc, 6);
  2541. +   rf = (rf & ~0x03) | rt3090_freqs[i].r;
  2542. +   rt3090_rf_write(sc, 6, rf);
  2543. +
  2544. +   /* set Tx0 power */
  2545. +   rf = rt3090_rf_read(sc, 12);
  2546. +   rf = (rf & ~0x1f) | txpow1;
  2547. +   rt3090_rf_write(sc, 12, rf);
  2548. +
  2549. +   /* set Tx1 power */
  2550. +   rf = rt3090_rf_read(sc, 13);
  2551. +   rf = (rf & ~0x1f) | txpow2;
  2552. +   rt3090_rf_write(sc, 13, rf);
  2553. +
  2554. +   rf = rt3090_rf_read(sc, 1);
  2555. +   rf &= ~0xfc;
  2556. +   if (sc->ntxpath == 1)
  2557. +       rf |= RT3070_TX1_PD | RT3070_TX2_PD;
  2558. +   else if (sc->ntxpath == 2)
  2559. +       rf |= RT3070_TX2_PD;
  2560. +   if (sc->nrxpath == 1)
  2561. +       rf |= RT3070_RX1_PD | RT3070_RX2_PD;
  2562. +   else if (sc->nrxpath == 2)
  2563. +       rf |= RT3070_RX2_PD;
  2564. +   rt3090_rf_write(sc, 1, rf);
  2565. +
  2566. +   /* set RF offset */
  2567. +   rf = rt3090_rf_read(sc, 23);
  2568. +   rf = (rf & ~0x7f) | sc->rf_freq_off;
  2569. +   rt3090_rf_write(sc, 23, rf);
  2570. +
  2571. +   /* program RF filter */
  2572. +   rf = rt3090_rf_read(sc, 24);    /* Tx */
  2573. +   rf = (rf & ~0x3f) | sc->rf24_20mhz;
  2574. +   rt3090_rf_write(sc, 24, rf);
  2575. +   rf = rt3090_rf_read(sc, 31);    /* Rx */
  2576. +   rf = (rf & ~0x3f) | sc->rf24_20mhz;
  2577. +   rt3090_rf_write(sc, 31, rf);
  2578. +
  2579. +   /* enable RF tuning */
  2580. +   rf = rt3090_rf_read(sc, 7);
  2581. +   rt3090_rf_write(sc, 7, rf | RT3070_TUNE);
  2582. + }
  2583. +
  2584. + int
  2585. + rt3090_rf_init(struct rt2860_softc *sc)
  2586. + {
  2587. +   uint32_t tmp;
  2588. +   uint8_t rf, bbp;
  2589. +   int i;
  2590. +
  2591. +   rf = rt3090_rf_read(sc, 30);
  2592. +   /* toggle RF R30 bit 7 */
  2593. +   rt3090_rf_write(sc, 30, rf | 0x80);
  2594. +   DELAY(1000);
  2595. +   rt3090_rf_write(sc, 30, rf & ~0x80);
  2596. +
  2597. +   tmp = rt2860_io_mac_read(sc, RT3070_LDO_CFG0);
  2598. +   tmp &= ~0x1f000000;
  2599. +   if (sc->patch_dac && (sc->mac_rev & 0x0000ffff) < 0x0211)
  2600. +       tmp |= 0x0d000000;  /* 1.35V */
  2601. +   else
  2602. +       tmp |= 0x01000000;  /* 1.2V */
  2603. +   rt2860_io_mac_write(sc, RT3070_LDO_CFG0, tmp);
  2604. +
  2605. +   /* patch LNA_PE_G1 */
  2606. +   tmp = rt2860_io_mac_read(sc, RT3070_GPIO_SWITCH);
  2607. +   rt2860_io_mac_write(sc, RT3070_GPIO_SWITCH, tmp & ~0x20);
  2608. +
  2609. +   /* initialize RF registers to default value */
  2610. +   for (i = 0; i < (sizeof(rt3090_def_rf)/2); i++) {
  2611. +       rt3090_rf_write(sc, rt3090_def_rf[i].reg,
  2612. +           rt3090_def_rf[i].val);
  2613. +   }
  2614. +
  2615. +   /* select 20MHz bandwidth */
  2616. +   rt3090_rf_write(sc, 31, 0x14);
  2617. +
  2618. +   rf = rt3090_rf_read(sc, 6);
  2619. +   rt3090_rf_write(sc, 6, rf | 0x40);
  2620. +
  2621. +   if ((sc->mac_rev & 0xffff0000) != 0x35930000) {
  2622. +       /* calibrate filter for 20MHz bandwidth */
  2623. +       sc->rf24_20mhz = 0x1f;  /* default value */
  2624. +       rt3090_filter_calib(sc, 0x07, 0x16, &sc->rf24_20mhz);
  2625. +
  2626. +       /* select 40MHz bandwidth */
  2627. +       bbp = rt2860_io_bbp_read(sc, 4);
  2628. +       rt2860_io_bbp_write(sc, 4, (bbp & ~0x08) | 0x10);
  2629. +       rf = rt3090_rf_read(sc, 31);
  2630. +       rt3090_rf_write(sc, 31, rf | 0x20);
  2631. +
  2632. +       /* calibrate filter for 40MHz bandwidth */
  2633. +       sc->rf24_40mhz = 0x2f;  /* default value */
  2634. +       rt3090_filter_calib(sc, 0x27, 0x19, &sc->rf24_40mhz);
  2635. +
  2636. +       /* go back to 20MHz bandwidth */
  2637. +       bbp = rt2860_io_bbp_read(sc, 4);
  2638. +       rt2860_io_bbp_write(sc, 4, bbp & ~0x18);
  2639. +   }
  2640. +   if ((sc->mac_rev & 0x0000ffff) < 0x0211)
  2641. +       rt3090_rf_write(sc, 27, 0x03);
  2642. +
  2643. +   tmp = rt2860_io_mac_read(sc, RT3070_OPT_14);
  2644. +   rt2860_io_mac_write(sc, RT3070_OPT_14, tmp | 1);
  2645. +
  2646. +   if (sc->rf_rev == RT2860_EEPROM_RF_3020)
  2647. +       rt3090_set_rx_antenna(sc, 0);
  2648. +
  2649. +   bbp = rt2860_io_bbp_read(sc, 138);
  2650. +   if ((sc->mac_rev & 0xffff0000) == 0x35930000) {
  2651. +       if (sc->ntxpath == 1)
  2652. +           bbp |= 0x60;    /* turn off DAC1 and DAC2 */
  2653. +       else if (sc->ntxpath == 2)
  2654. +           bbp |= 0x40;    /* turn off DAC2 */
  2655. +       if (sc->nrxpath == 1)
  2656. +           bbp &= ~0x06;   /* turn off ADC1 and ADC2 */
  2657. +       else if (sc->nrxpath == 2)
  2658. +           bbp &= ~0x04;   /* turn off ADC2 */
  2659. +   } else {
  2660. +       if (sc->ntxpath == 1)
  2661. +           bbp |= 0x20;    /* turn off DAC1 */
  2662. +       if (sc->nrxpath == 1)
  2663. +           bbp &= ~0x02;   /* turn off ADC1 */
  2664. +   }
  2665. +   rt2860_io_bbp_write(sc, 138, bbp);
  2666. +
  2667. +   rf = rt3090_rf_read(sc, 1);
  2668. +   rf &= ~(RT3070_RX0_PD | RT3070_TX0_PD);
  2669. +   rf |= RT3070_RF_BLOCK | RT3070_RX1_PD | RT3070_TX1_PD;
  2670. +   rt3090_rf_write(sc, 1, rf);
  2671. +
  2672. +   rf = rt3090_rf_read(sc, 15);
  2673. +   rt3090_rf_write(sc, 15, rf & ~RT3070_TX_LO2);
  2674. +
  2675. +   rf = rt3090_rf_read(sc, 17);
  2676. +   rf &= ~RT3070_TX_LO1;
  2677. +   if ((sc->mac_rev & 0x0000ffff) >= 0x0211 && !sc->ext_lna_2ghz)
  2678. +       rf |= 0x20; /* fix for long range Rx issue */
  2679. +   if (sc->txmixgain_2ghz >= 2)
  2680. +       rf = (rf & ~0x7) | sc->txmixgain_2ghz;
  2681. +   rt3090_rf_write(sc, 17, rf);
  2682. +
  2683. +   rf = rt3090_rf_read(sc, 20);
  2684. +   rt3090_rf_write(sc, 20, rf & ~RT3070_RX_LO1);
  2685. +
  2686. +   rf = rt3090_rf_read(sc, 21);
  2687. +   rt3090_rf_write(sc, 21, rf & ~RT3070_RX_LO2);
  2688. +
  2689. +   return 0;
  2690. + }
  2691. +
  2692. + void
  2693. + rt3090_set_rx_antenna(struct rt2860_softc *sc, int aux)
  2694. + {
  2695. +   uint32_t tmp;
  2696. +
  2697. +   if (aux) {
  2698. +       tmp = rt2860_io_mac_read(sc, RT2860_REG_EEPROM_CSR);
  2699. +       rt2860_io_mac_write(sc, RT2860_REG_EEPROM_CSR, tmp & ~RT2860_REG_EESK);
  2700. +       tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_GPIO_CTRL_CFG);
  2701. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_GPIO_CTRL_CFG, (tmp & ~0x0808) | 0x08);
  2702. +   } else {
  2703. +       tmp = rt2860_io_mac_read(sc, RT2860_REG_EEPROM_CSR);
  2704. +       rt2860_io_mac_write(sc, RT2860_REG_EEPROM_CSR, tmp | RT2860_REG_EESK);
  2705. +       tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_GPIO_CTRL_CFG);
  2706. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_GPIO_CTRL_CFG, tmp & ~0x0808);
  2707. +   }
  2708. + }
  2709. +
  2710. + void
  2711. + rt3090_rf_wakeup(struct rt2860_softc *sc)
  2712. + {
  2713. +   uint32_t tmp;
  2714. +   uint8_t rf;
  2715. +
  2716. +   if ((sc->mac_rev & 0xffff0000) == 0x35930000) {
  2717. +       /* enable VCO */
  2718. +       rf = rt3090_rf_read(sc, 1);
  2719. +       rt3090_rf_write(sc, 1, rf | RT3593_VCO);
  2720. +
  2721. +       /* initiate VCO calibration */
  2722. +       rf = rt3090_rf_read(sc, 3);
  2723. +       rt3090_rf_write(sc, 3, rf | RT3593_VCOCAL);
  2724. +
  2725. +       /* enable VCO bias current control */
  2726. +       rf = rt3090_rf_read(sc, 6);
  2727. +       rt3090_rf_write(sc, 6, rf | RT3593_VCO_IC);
  2728. +
  2729. +       /* initiate res calibration */
  2730. +       rf = rt3090_rf_read(sc, 2);
  2731. +       rt3090_rf_write(sc, 2, rf | RT3593_RESCAL);
  2732. +
  2733. +       /* set reference current control to 0.33 mA */
  2734. +       rf = rt3090_rf_read(sc, 22);
  2735. +       rf &= ~RT3593_CP_IC_MASK;
  2736. +       rf |= 1 << RT3593_CP_IC_SHIFT;
  2737. +       rt3090_rf_write(sc, 22, rf);
  2738. +
  2739. +       /* enable RX CTB */
  2740. +       rf = rt3090_rf_read(sc, 46);
  2741. +       rt3090_rf_write(sc, 46, rf | RT3593_RX_CTB);
  2742. +
  2743. +       rf = rt3090_rf_read(sc, 20);
  2744. +       rf &= ~(RT3593_LDO_RF_VC_MASK | RT3593_LDO_PLL_VC_MASK);
  2745. +       rt3090_rf_write(sc, 20, rf);
  2746. +   } else {
  2747. +       /* enable RF block */
  2748. +       rf = rt3090_rf_read(sc, 1);
  2749. +       rt3090_rf_write(sc, 1, rf | RT3070_RF_BLOCK);
  2750. +
  2751. +       /* enable VCO bias current control */
  2752. +       rf = rt3090_rf_read(sc, 7);
  2753. +       rt3090_rf_write(sc, 7, rf | 0x30);
  2754. +
  2755. +       rf = rt3090_rf_read(sc, 9);
  2756. +       rt3090_rf_write(sc, 9, rf | 0x0e);
  2757. +
  2758. +       /* enable RX CTB */
  2759. +       rf = rt3090_rf_read(sc, 21);
  2760. +       rt3090_rf_write(sc, 21, rf | RT3070_RX_CTB);
  2761. +
  2762. +       /* fix Tx to Rx IQ glitch by raising RF voltage */
  2763. +       rf = rt3090_rf_read(sc, 27);
  2764. +       rf &= ~0x77;
  2765. +       if ((sc->mac_rev & 0x0000ffff) < 0x0211)
  2766. +           rf |= 0x03;
  2767. +       rt3090_rf_write(sc, 27, rf);
  2768. +   }
  2769. +   if (sc->patch_dac && (sc->mac_rev & 0x0000ffff) < 0x0211) {
  2770. +       tmp = rt2860_io_mac_read(sc, RT3070_LDO_CFG0);
  2771. +       tmp = (tmp & ~0x1f000000) | 0x0d000000;
  2772. +       rt2860_io_mac_write(sc, RT3070_LDO_CFG0, tmp);
  2773. +   }
  2774. + }
  2775. +
  2776. + int
  2777. + rt3090_filter_calib(struct rt2860_softc *sc, uint8_t init, uint8_t target,
  2778. +     uint8_t *val)
  2779. + {
  2780. +   uint8_t rf22, rf24;
  2781. +   uint8_t bbp55_pb, bbp55_sb, delta;
  2782. +   int ntries;
  2783. +
  2784. +   /* program filter */
  2785. +   rf24 = rt3090_rf_read(sc, 24);
  2786. +   rf24 = (rf24 & 0xc0) | init;    /* initial filter value */
  2787. +   rt3090_rf_write(sc, 24, rf24);
  2788. +
  2789. +   /* enable baseband loopback mode */
  2790. +   rf22 = rt3090_rf_read(sc, 22);
  2791. +   rt3090_rf_write(sc, 22, rf22 | RT3070_BB_LOOPBACK);
  2792. +
  2793. +   /* set power and frequency of passband test tone */
  2794. +   rt2860_io_bbp_write(sc, 24, 0x00);
  2795. +   for (ntries = 0; ntries < 100; ntries++) {
  2796. +       /* transmit test tone */
  2797. +       rt2860_io_bbp_write(sc, 25, 0x90);
  2798. +       DELAY(1000);
  2799. +       /* read received power */
  2800. +       bbp55_pb = rt2860_io_bbp_read(sc, 55);
  2801. +       if (bbp55_pb != 0)
  2802. +           break;
  2803. +   }
  2804. +   if (ntries == 100)
  2805. +       return ETIMEDOUT;
  2806. +
  2807. +   /* set power and frequency of stopband test tone */
  2808. +   rt2860_io_bbp_write(sc, 24, 0x06);
  2809. +   for (ntries = 0; ntries < 100; ntries++) {
  2810. +       /* transmit test tone */
  2811. +       rt2860_io_bbp_write(sc, 25, 0x90);
  2812. +       DELAY(1000);
  2813. +       /* read received power */
  2814. +       bbp55_sb = rt2860_io_bbp_read(sc, 55);
  2815. +
  2816. +       delta = bbp55_pb - bbp55_sb;
  2817. +       if (delta > target)
  2818. +           break;
  2819. +
  2820. +       /* reprogram filter */
  2821. +       rf24++;
  2822. +       rt3090_rf_write(sc, 24, rf24);
  2823. +   }
  2824. +   if (ntries < 100) {
  2825. +       if (rf24 != init)
  2826. +           rf24--; /* backtrack */
  2827. +       *val = rf24;
  2828. +       rt3090_rf_write(sc, 24, rf24);
  2829. +   }
  2830. +
  2831. +   /* restore initial state */
  2832. +   rt2860_io_bbp_write(sc, 24, 0x00);
  2833. +
  2834. +   /* disable baseband loopback mode */
  2835. +   rf22 = rt3090_rf_read(sc, 22);
  2836. +   rt3090_rf_write(sc, 22, rf22 & ~RT3070_BB_LOOPBACK);
  2837. +
  2838. +   return 0;
  2839. + }
  2840. +
  2841. + void
  2842. + rt3090_rf_setup(struct rt2860_softc *sc)
  2843. + {
  2844. +   uint8_t bbp;
  2845. +   int i;
  2846. +
  2847. +   if ((sc->mac_rev & 0x0000ffff) >= 0x0211) {
  2848. +       /* enable DC filter */
  2849. +       rt2860_io_bbp_write(sc, 103, 0xc0);
  2850. +
  2851. +       /* improve power consumption */
  2852. +       bbp = rt2860_io_bbp_read(sc, 31);
  2853. +       rt2860_io_bbp_write(sc, 31, bbp & ~0x03);
  2854. +   }
  2855. +
  2856. +   rt2860_io_mac_write(sc, RT2860_REG_TX_SW_CFG1, 0);
  2857. +   if ((sc->mac_rev & 0x0000ffff) < 0x0211) {
  2858. +       rt2860_io_mac_write(sc, RT2860_REG_TX_SW_CFG2,
  2859. +           sc->patch_dac ? 0x2c : 0x0f);
  2860. +   } else
  2861. +       rt2860_io_mac_write(sc, RT2860_REG_TX_SW_CFG2, 0);
  2862. +
  2863. +   /* initialize RF registers from ROM */
  2864. +   for (i = 0; i < 10; i++) {
  2865. +       if (sc->rf[i].reg == 0 || sc->rf[i].reg == 0xff)
  2866. +           continue;
  2867. +       rt3090_rf_write(sc, sc->rf[i].reg, sc->rf[i].val);
  2868. +   }
  2869. + }
  2870. +
  2871. +
  2872. + /*
  2873. +  * rt2860_rf_set_chan
  2874. +  */
  2875. + void rt2860_rf_set_chan(struct rt2860_softc *sc,
  2876. +   struct ieee80211_channel *c)
  2877. + {
  2878. +   struct ifnet *ifp;
  2879. +   struct ieee80211com *ic;
  2880. +   const struct rt2860_rf_prog *prog;
  2881. +   uint32_t r1, r2, r3, r4;
  2882. +   int8_t txpow1, txpow2;
  2883. +   int i, chan;
  2884. +
  2885. +   if (sc->mac_rev == 0x28720200) {
  2886. +       rt2872_rf_set_chan(sc, c);
  2887. +       return;
  2888. +   }
  2889. +
  2890. +   ifp = sc->sc_ifp;
  2891. +   ic = ifp->if_l2com;
  2892. +   prog = rt2860_rf_2850;
  2893. +
  2894. +   /* get central channel position */
  2895. +
  2896. +   chan = ieee80211_chan2ieee(ic, c);
  2897. +
  2898. +   if ((sc->mac_rev & 0xffff0000) >= 0x30710000) {
  2899. +       rt3090_set_chan(sc, chan);
  2900. +       return;
  2901. +   }
  2902. +
  2903. +   if (IEEE80211_IS_CHAN_HT40U(c))
  2904. +       chan += 2;
  2905. +   else if (IEEE80211_IS_CHAN_HT40D(c))
  2906. +       chan -= 2;
  2907. +
  2908. +   RT2860_DPRINTF(sc, RT2860_DEBUG_CHAN,
  2909. +       "%s: RF set channel: channel=%u, HT%s%s\n",
  2910. +       device_get_nameunit(sc->sc_dev),
  2911. +       ieee80211_chan2ieee(ic, c),
  2912. +       !IEEE80211_IS_CHAN_HT(c) ? " disabled" :
  2913. +           IEEE80211_IS_CHAN_HT20(c) ? "20":
  2914. +               IEEE80211_IS_CHAN_HT40U(c) ? "40U" : "40D",
  2915. +       (ic->ic_flags & IEEE80211_F_SCAN) ? ", scanning" : "");
  2916. +
  2917. +   if (chan == 0 || chan == IEEE80211_CHAN_ANY)
  2918. +       return;
  2919. +
  2920. +   for (i = 0; prog[i].chan != chan; i++);
  2921. +
  2922. +   r1 = prog[i].r1;
  2923. +   r2 = prog[i].r2;
  2924. +   r3 = prog[i].r3;
  2925. +   r4 = prog[i].r4;
  2926. +
  2927. +   txpow1 = sc->txpow1[i];
  2928. +   txpow2 = sc->txpow2[i];
  2929. +
  2930. +   if (sc->ntxpath == 1)
  2931. +       r2 |= (1 << 14);
  2932. +
  2933. +   if (sc->nrxpath == 2)
  2934. +       r2 |= (1 << 6);
  2935. +   else if (sc->nrxpath == 1)
  2936. +       r2 |= (1 << 17) | (1 << 6);
  2937. +
  2938. +   if (IEEE80211_IS_CHAN_2GHZ(c))
  2939. +   {
  2940. +       r3 = (r3 & 0xffffc1ff) | (txpow1 << 9);
  2941. +       r4 = (r4 & ~0x001f87c0) | (sc->rf_freq_off << 15) |
  2942. +           (txpow2 << 6);
  2943. +   }
  2944. +   else
  2945. +   {
  2946. +       r3 = r3 & 0xffffc1ff;
  2947. +       r4 = (r4 & ~0x001f87c0) | (sc->rf_freq_off << 15);
  2948. +
  2949. +       if (txpow1 >= RT2860_EEPROM_TXPOW_5GHZ_MIN && txpow1 < 0)
  2950. +       {
  2951. +           txpow1 = (-RT2860_EEPROM_TXPOW_5GHZ_MIN + txpow1);
  2952. +           if (txpow1 > RT2860_EEPROM_TXPOW_5GHZ_MAX)
  2953. +               txpow1 = RT2860_EEPROM_TXPOW_5GHZ_MAX;
  2954. +
  2955. +           r3 |= (txpow1 << 10);
  2956. +       }
  2957. +       else
  2958. +       {
  2959. +           if (txpow1 > RT2860_EEPROM_TXPOW_5GHZ_MAX)
  2960. +               txpow1 = RT2860_EEPROM_TXPOW_5GHZ_MAX;
  2961. +
  2962. +           r3 |= (txpow1 << 10) | (1 << 9);
  2963. +       }
  2964. +
  2965. +       if (txpow2 >= RT2860_EEPROM_TXPOW_5GHZ_MIN && txpow2 < 0)
  2966. +       {
  2967. +           txpow2 = (-RT2860_EEPROM_TXPOW_5GHZ_MIN + txpow2);
  2968. +           if (txpow2 > RT2860_EEPROM_TXPOW_5GHZ_MAX)
  2969. +               txpow2 = RT2860_EEPROM_TXPOW_5GHZ_MAX;
  2970. +
  2971. +           r4 |= (txpow2 << 7);
  2972. +       }
  2973. +       else
  2974. +       {
  2975. +           if (txpow2 > RT2860_EEPROM_TXPOW_5GHZ_MAX)
  2976. +               txpow2 = RT2860_EEPROM_TXPOW_5GHZ_MAX;
  2977. +
  2978. +           r4 |= (txpow2 << 7) | (1 << 6);
  2979. +       }
  2980. +   }
  2981. +
  2982. +   if (!(ic->ic_flags & IEEE80211_F_SCAN) && IEEE80211_IS_CHAN_HT40(c))
  2983. +       r4 |= (1 << 21);
  2984. +
  2985. +   rt2860_io_rf_write(sc, RT2860_REG_RF_R1, r1);
  2986. +   rt2860_io_rf_write(sc, RT2860_REG_RF_R2, r2);
  2987. +   rt2860_io_rf_write(sc, RT2860_REG_RF_R3, r3 & ~(1 << 2));
  2988. +   rt2860_io_rf_write(sc, RT2860_REG_RF_R4, r4);
  2989. +
  2990. +   DELAY(200);
  2991. +
  2992. +   rt2860_io_rf_write(sc, RT2860_REG_RF_R1, r1);
  2993. +   rt2860_io_rf_write(sc, RT2860_REG_RF_R2, r2);
  2994. +   rt2860_io_rf_write(sc, RT2860_REG_RF_R3, r3 | (1 << 2));
  2995. +   rt2860_io_rf_write(sc, RT2860_REG_RF_R4, r4);
  2996. +
  2997. +   DELAY(200);
  2998. +
  2999. +   rt2860_io_rf_write(sc, RT2860_REG_RF_R1, r1);
  3000. +   rt2860_io_rf_write(sc, RT2860_REG_RF_R2, r2);
  3001. +   rt2860_io_rf_write(sc, RT2860_REG_RF_R3, r3 & ~(1 << 2));
  3002. +   rt2860_io_rf_write(sc, RT2860_REG_RF_R4, r4);
  3003. +
  3004. +   rt2860_rf_select_chan_group(sc, c);
  3005. +
  3006. +   DELAY(1000);
  3007. + }
  3008. +
  3009. + /*
  3010. +  * rt2872_rf_set_chan
  3011. +  */
  3012. + static void
  3013. + rt2872_rf_set_chan(struct rt2860_softc *sc,
  3014. +   struct ieee80211_channel *c)
  3015. + {
  3016. +   struct ifnet *ifp;
  3017. +   struct ieee80211com *ic;
  3018. +   const struct rt2860_rf_prog *prog;
  3019. +   uint32_t r1, r2, r3, r4;
  3020. +   uint32_t r6, r7, r12, r13, r23, r24;
  3021. +   int8_t txpow1, txpow2;
  3022. +   int i, chan;
  3023. +
  3024. +   ifp = sc->sc_ifp;
  3025. +   ic = ifp->if_l2com;
  3026. +   prog = rt2860_rf_2850;
  3027. +
  3028. +   /* get central channel position */
  3029. +
  3030. +   chan = ieee80211_chan2ieee(ic, c);
  3031. +
  3032. +   if (IEEE80211_IS_CHAN_HT40U(c))
  3033. +       chan += 2;
  3034. +   else if (IEEE80211_IS_CHAN_HT40D(c))
  3035. +       chan -= 2;
  3036. +
  3037. +   RT2860_DPRINTF(sc, RT2860_DEBUG_CHAN,
  3038. +       "%s: RF set channel: channel=%u, HT%s%s\n",
  3039. +       device_get_nameunit(sc->sc_dev),
  3040. +       ieee80211_chan2ieee(ic, c),
  3041. +       !IEEE80211_IS_CHAN_HT(c) ? " disabled" :
  3042. +           IEEE80211_IS_CHAN_HT20(c) ? "20":
  3043. +               IEEE80211_IS_CHAN_HT40U(c) ? "40U" : "40D",
  3044. +       (ic->ic_flags & IEEE80211_F_SCAN) ? ", scanning" : "");
  3045. +
  3046. +   if (chan == 0 || chan == IEEE80211_CHAN_ANY)
  3047. +       return;
  3048. +
  3049. +   for (i = 0; prog[i].chan != chan; i++);
  3050. +
  3051. +   r1 = prog[i].r1;
  3052. +   r2 = prog[i].r2;
  3053. +   r3 = prog[i].r3;
  3054. +   r4 = prog[i].r4;
  3055. +
  3056. +   txpow1 = sc->txpow1[i];
  3057. +   txpow2 = sc->txpow2[i];
  3058. +
  3059. +   for (i = 0; rt2860_rf_fi3020[i].channel != chan; i++);
  3060. +
  3061. +   /* Programm channel parameters */
  3062. +   r2 = rt2860_rf_fi3020[i].n;
  3063. +   rt2860_io_rf_write(sc, 2 , r2 );
  3064. +   r3 = rt2860_rf_fi3020[i].k;
  3065. +   rt2860_io_rf_write(sc, 3 , r3 );
  3066. +
  3067. +   r6 = (rt3052_rf_default[6] & 0xFC) | (rt2860_rf_fi3020[i].r & 0x03);
  3068. +   rt2860_io_rf_write(sc, 6 , r6 );
  3069. +
  3070. +   /* Set Tx Power */
  3071. +   r12 = (rt3052_rf_default[12] & 0xE0) | (txpow1 & 0x1f);
  3072. +   rt2860_io_rf_write(sc, 12, r12);
  3073. +
  3074. +   /* Set Tx1 Power */
  3075. +   r13 = (rt3052_rf_default[13] & 0xE0) | (txpow2 & 0x1f);
  3076. +   rt2860_io_rf_write(sc, 13, r13);
  3077. +
  3078. +   /* Set RF offset */
  3079. +   r23 = (rt3052_rf_default[23] & 0x80) | (sc->rf_freq_off);
  3080. +   rt2860_io_rf_write(sc, 23, r23);
  3081. +
  3082. +   /* Set BW */
  3083. +   r24 = (rt3052_rf_default[24] & 0xDF);
  3084. +   if (!(ic->ic_flags & IEEE80211_F_SCAN) && IEEE80211_IS_CHAN_HT40(c))
  3085. +       r24 |= 0x20;
  3086. +   rt2860_io_rf_write(sc, 24, r24);
  3087. +
  3088. +   /* Enable RF tuning */
  3089. +   r7 = (rt3052_rf_default[7]) | 1;
  3090. +   rt2860_io_rf_write(sc, 7 , r7 );
  3091. +
  3092. +   /* Antenna */
  3093. +   r1 = (rt3052_rf_default[1] & 0xab) | ((sc->nrxpath == 1)?0x10:0) |
  3094. +       ((sc->ntxpath == 1)?0x20:0);
  3095. +   rt2860_io_rf_write(sc, 1 , r1 );
  3096. +
  3097. +   DELAY(200);
  3098. +
  3099. +   rt2860_rf_select_chan_group(sc, c);
  3100. +
  3101. +   DELAY(1000);
  3102. + }
  3103. + /*
  3104. +  *   AMRR functions
  3105. +  */
  3106. +
  3107. + /*
  3108. +  * rt2860_amrr_init
  3109. +  */
  3110. + void rt2860_amrr_init(struct rt2860_amrr *amrr, struct ieee80211vap *vap,
  3111. +   int ntxpath, int min_success_threshold, int max_success_threshold, int msecs)
  3112. + {
  3113. +   int t;
  3114. +
  3115. +   amrr->ntxpath = ntxpath;
  3116. +
  3117. +   amrr->min_success_threshold = min_success_threshold;
  3118. +   amrr->max_success_threshold = max_success_threshold;
  3119. +
  3120. +   if (msecs < 100)
  3121. +       msecs = 100;
  3122. +
  3123. +   t = msecs_to_ticks(msecs);
  3124. +
  3125. +   amrr->interval = (t < 1) ? 1 : t;
  3126. + }
  3127. +
  3128. + /*
  3129. +  * rt2860_amrr_cleanup
  3130. +  */
  3131. + void rt2860_amrr_cleanup(struct rt2860_amrr *amrr)
  3132. + {
  3133. + }
  3134. +
  3135. + /*
  3136. +  * rt2860_amrr_node_init
  3137. +  */
  3138. + void rt2860_amrr_node_init(struct rt2860_amrr *amrr,
  3139. +     struct rt2860_amrr_node *amrr_node, struct ieee80211_node *ni)
  3140. + {
  3141. +   const struct ieee80211_rateset *rs;
  3142. +
  3143. +   amrr_node->amrr = amrr;
  3144. +   amrr_node->success = 0;
  3145. +   amrr_node->recovery = 0;
  3146. +   amrr_node->txcnt = 0;
  3147. +   amrr_node->retrycnt = 0;
  3148. +   amrr_node->success_threshold = amrr->min_success_threshold;
  3149. +
  3150. +   if (ni->ni_flags & IEEE80211_NODE_HT)
  3151. +   {
  3152. +       rs = (const struct ieee80211_rateset *) &ni->ni_htrates;
  3153. +
  3154. +       for (amrr_node->rate_index = rs->rs_nrates - 1;
  3155. +           amrr_node->rate_index > 0 && (rs->rs_rates[amrr_node->rate_index] & IEEE80211_RATE_VAL) > 4;
  3156. +           amrr_node->rate_index--) ;
  3157. +
  3158. +       ni->ni_txrate = rs->rs_rates[amrr_node->rate_index] | IEEE80211_RATE_MCS;
  3159. +   }
  3160. +   else
  3161. +   {
  3162. +       rs = &ni->ni_rates;
  3163. +
  3164. +       for (amrr_node->rate_index = rs->rs_nrates - 1;
  3165. +           amrr_node->rate_index > 0 && (rs->rs_rates[amrr_node->rate_index] & IEEE80211_RATE_VAL) > 72;
  3166. +           amrr_node->rate_index--) ;
  3167. +
  3168. +       ni->ni_txrate = rs->rs_rates[amrr_node->rate_index] & IEEE80211_RATE_VAL;
  3169. +   }
  3170. +
  3171. +   amrr_node->ticks = ticks;
  3172. + }
  3173. +
  3174. + /*
  3175. +  * rt2860_amrr_choose
  3176. +  */
  3177. + int rt2860_amrr_choose(struct ieee80211_node *ni,
  3178. +   struct rt2860_amrr_node *amrr_node)
  3179. + {
  3180. +   struct rt2860_amrr *amrr;
  3181. +   int rate_index;
  3182. +
  3183. +   amrr = amrr_node->amrr;
  3184. +
  3185. +   if (RT2860_AMRR_IS_ENOUGH(amrr_node) &&
  3186. +       (ticks - amrr_node->ticks) > amrr->interval)
  3187. +   {
  3188. +       rate_index = rt2860_amrr_update(amrr, amrr_node, ni);
  3189. +       if (rate_index != amrr_node->rate_index)
  3190. +       {
  3191. +           if (ni->ni_flags & IEEE80211_NODE_HT)
  3192. +               ni->ni_txrate = ni->ni_htrates.rs_rates[rate_index] | IEEE80211_RATE_MCS;
  3193. +           else
  3194. +               ni->ni_txrate = ni->ni_rates.rs_rates[rate_index] & IEEE80211_RATE_VAL;
  3195. +
  3196. +           amrr_node->rate_index = rate_index;
  3197. +       }
  3198. +
  3199. +       amrr_node->ticks = ticks;
  3200. +   }
  3201. +   else
  3202. +   {
  3203. +       rate_index = amrr_node->rate_index;
  3204. +   }
  3205. +
  3206. +   return rate_index;
  3207. + }
  3208. +
  3209. + /*
  3210. +  * rt2860_amrr_update
  3211. +  */
  3212. +
  3213. + static int rt2860_amrr_update(struct rt2860_amrr *amrr,
  3214. +   struct rt2860_amrr_node *amrr_node, struct ieee80211_node *ni)
  3215. + {
  3216. +   const struct ieee80211_rateset *rs;
  3217. +   int rate_index;
  3218. +
  3219. +   KASSERT(RT2860_AMRR_IS_ENOUGH(amrr_node),
  3220. +       ("not enough Tx count: txcnt=%d",
  3221. +        amrr_node->txcnt));
  3222. +
  3223. +   if (ni->ni_flags & IEEE80211_NODE_HT)
  3224. +       rs = (const struct ieee80211_rateset *) &ni->ni_htrates;
  3225. +   else
  3226. +       rs = &ni->ni_rates;
  3227. +
  3228. +   rate_index = amrr_node->rate_index;
  3229. +
  3230. +   if (RT2860_AMRR_IS_SUCCESS(amrr_node))
  3231. +   {
  3232. +       amrr_node->success++;
  3233. +       if ((amrr_node->success >= amrr_node->success_threshold) &&
  3234. +           (rate_index + 1 < rs->rs_nrates) &&
  3235. +           (!(ni->ni_flags & IEEE80211_NODE_HT) || (rs->rs_rates[rate_index + 1] & IEEE80211_RATE_VAL) < (amrr->ntxpath * 8)))
  3236. +       {
  3237. +           amrr_node->recovery = 1;
  3238. +           amrr_node->success = 0;
  3239. +
  3240. +           rate_index++;
  3241. +       }
  3242. +       else
  3243. +       {
  3244. +           amrr_node->recovery = 0;
  3245. +       }
  3246. +   }
  3247. +   else if (RT2860_AMRR_IS_FAILURE(amrr_node))
  3248. +   {
  3249. +       amrr_node->success = 0;
  3250. +
  3251. +       if (rate_index > 0)
  3252. +       {
  3253. +           if (amrr_node->recovery)
  3254. +           {
  3255. +               amrr_node->success_threshold *= 2;
  3256. +               if (amrr_node->success_threshold > amrr->max_success_threshold)
  3257. +                   amrr_node->success_threshold = amrr->max_success_threshold;
  3258. +           }
  3259. +           else
  3260. +           {
  3261. +               amrr_node->success_threshold = amrr->min_success_threshold;
  3262. +           }
  3263. +
  3264. +           rate_index--;
  3265. +       }
  3266. +
  3267. +       amrr_node->recovery = 0;
  3268. +   }
  3269. +
  3270. +   amrr_node->txcnt = 0;
  3271. +   amrr_node->retrycnt = 0;
  3272. +
  3273. +   return rate_index;
  3274. + }
  3275. +
  3276. + /*
  3277. +  * rt2860_attach
  3278. +  */
  3279. + int rt2860_attach(device_t dev, int id)
  3280. + {
  3281. +   struct rt2860_softc *sc;
  3282. +   struct ifnet *ifp;
  3283. +   struct ieee80211com *ic;
  3284. +   int error, ntries, i;
  3285. +
  3286. +   sc = device_get_softc(dev);
  3287. +   sc->sc_id = id;
  3288. +   sc->sc_dev = dev;
  3289. +
  3290. +   mtx_init(&sc->sc_mtx, device_get_nameunit(dev),
  3291. +       MTX_NETWORK_LOCK, MTX_DEF | MTX_RECURSE);
  3292. +
  3293. +   if (sc == NULL) /* Kludge verification begin */
  3294. +   {
  3295. +       printf("FIXME debug error...invalid softc! Ice cream melted.\n");
  3296. +       error = ENXIO;
  3297. +       goto fail;
  3298. +   } else {
  3299. +       if (sc->sc_st == 0)
  3300. +       {
  3301. +           printf("FIXME debug error...invalid bus tag! GET OFF THE BUS.\n");
  3302. +           error = ENXIO;
  3303. +           goto fail;
  3304. +       }
  3305. +       if (sc->sc_sh == 0)
  3306. +       {
  3307. +           printf("FIXME debug error...invalid handle! Drink something else!!\n");
  3308. +           error = ENXIO;
  3309. +           goto fail;
  3310. +       }
  3311. +   }
  3312. +
  3313. +
  3314. +   /* done already, I believe */
  3315. + /*
  3316. +   sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
  3317. +       &sc->mem_rid, RF_ACTIVE);
  3318. +   if (sc->mem == NULL)
  3319. +   {
  3320. +       printf("%s: invalid memory resource\n",
  3321. +           device_get_nameunit(dev));
  3322. +       error = ENXIO;
  3323. +       goto fail;
  3324. +   }
  3325. +
  3326. +   sc->sc_st = rman_get_bustag(sc->mem);
  3327. +   sc->sc_sh = rman_get_bushandle(sc->mem);
  3328. +
  3329. +   sc->irq_rid = 0;
  3330. +   sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
  3331. +       &sc->irq_rid, RF_ACTIVE | RF_SHAREABLE);
  3332. + */
  3333. +
  3334. + /*
  3335. +   if (sc->irq == NULL)
  3336. +   {
  3337. +       printf("%s: invalid IRQ resource\n",
  3338. +           device_get_nameunit(dev));
  3339. +       error = ENXIO;
  3340. +       goto fail;
  3341. +   }
  3342. + */
  3343. +   sc->tx_stbc = rt2860_tx_stbc;
  3344. +
  3345. + #ifdef RT2860_DEBUG
  3346. +   sc->debug = rt2860_debug;
  3347. +
  3348. +   SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
  3349. +       SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
  3350. +       "debug", CTLFLAG_RW, &sc->debug, 0, "rt2860 debug level");
  3351. + #endif
  3352. +
  3353. +   RT2860_DPRINTF(sc, RT2860_DEBUG_ANY,
  3354. +       "%s: attaching\n",
  3355. +       device_get_nameunit(sc->sc_dev));
  3356. +
  3357. +   /* wait for NIC to initialize */
  3358. +
  3359. +   for (ntries = 0; ntries < 1000; ntries++)
  3360. +   {
  3361. +       sc->mac_rev = rt2860_io_mac_read(sc, RT2860_REG_MAC_CSR0);
  3362. +       if (sc->mac_rev != 0x00000000 && sc->mac_rev != 0xffffffff)
  3363. +           break;
  3364. +
  3365. +       DELAY(10);
  3366. +   }
  3367. +
  3368. +   if (ntries == 1000)
  3369. +   {
  3370. +       printf("%s: timeout waiting for NIC to initialize\n",
  3371. +           device_get_nameunit(dev));
  3372. +       error = EIO;
  3373. +       goto fail;
  3374. +   }
  3375. +
  3376. +   rt2860_read_eeprom(sc);
  3377. +
  3378. +   printf("%s: MAC/BBP RT2860 (rev 0x%08x), RF %s\n",
  3379. +       device_get_nameunit(sc->sc_dev), sc->mac_rev,
  3380. +       rt2860_rf_name(sc->rf_rev));
  3381. +
  3382. +   /* clear key tables */
  3383. +
  3384. +   rt2860_asic_clear_keytables(sc);
  3385. +
  3386. +   /* allocate Tx and Rx rings */
  3387. +
  3388. +   for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++)
  3389. +   {
  3390. +       error = rt2860_alloc_tx_ring(sc, &sc->tx_ring[i], i);
  3391. +       if (error != 0)
  3392. +       {
  3393. +           printf("%s: could not allocate Tx ring #%d\n",
  3394. +               device_get_nameunit(sc->sc_dev), i);
  3395. +           goto fail;
  3396. +       }
  3397. +   }
  3398. +
  3399. +   sc->tx_ring_mgtqid = 5;
  3400. +
  3401. +   error = rt2860_alloc_rx_ring(sc, &sc->rx_ring);
  3402. +   if (error != 0)
  3403. +   {
  3404. +       printf("%s: could not allocate Rx ring\n",
  3405. +           device_get_nameunit(sc->sc_dev));
  3406. +       goto fail;
  3407. +   }
  3408. +
  3409. +   callout_init(&sc->periodic_ch, 0);
  3410. +   callout_init_mtx(&sc->tx_watchdog_ch, &sc->sc_mtx, 0);
  3411. +
  3412. +   ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
  3413. +   if (ifp == NULL)
  3414. +   {
  3415. +       printf("%s: could not if_alloc()\n",
  3416. +           device_get_nameunit(sc->sc_dev));
  3417. +       error = ENOMEM;
  3418. +       goto fail;
  3419. +   }
  3420. +
  3421. +   ifp->if_softc = sc;
  3422. +
  3423. +   if_initname(ifp, device_get_name(dev), device_get_unit(sc->sc_dev));
  3424. +
  3425. +   ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
  3426. +
  3427. +   ifp->if_init = rt2860_init;
  3428. +   ifp->if_ioctl = rt2860_ioctl;
  3429. +   ifp->if_start = rt2860_start;
  3430. +
  3431. +   IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
  3432. +   ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
  3433. +   IFQ_SET_READY(&ifp->if_snd);
  3434. +
  3435. +   ic = ifp->if_l2com;
  3436. +
  3437. +   ic->ic_ifp = ifp;
  3438. +
  3439. +   ic->ic_phytype = IEEE80211_T_HT;
  3440. +   ic->ic_opmode = IEEE80211_M_STA;
  3441. +
  3442. +   ic->ic_caps = IEEE80211_C_MONITOR |
  3443. +       IEEE80211_C_IBSS |
  3444. +       IEEE80211_C_STA |
  3445. +       IEEE80211_C_AHDEMO |
  3446. +       IEEE80211_C_HOSTAP |
  3447. +       IEEE80211_C_WDS |
  3448. +       IEEE80211_C_MBSS |
  3449. +       IEEE80211_C_BGSCAN |
  3450. +       IEEE80211_C_TXPMGT |
  3451. +       IEEE80211_C_SHPREAMBLE |
  3452. +       IEEE80211_C_SHSLOT |
  3453. +       IEEE80211_C_TXFRAG |
  3454. +       IEEE80211_C_BURST |
  3455. +       IEEE80211_C_WME |
  3456. +       IEEE80211_C_WPA;
  3457. +
  3458. +   ic->ic_cryptocaps |= IEEE80211_CRYPTO_WEP |
  3459. +       IEEE80211_CRYPTO_TKIP |
  3460. +       IEEE80211_CRYPTO_TKIPMIC |
  3461. +       IEEE80211_CRYPTO_AES_CCM;
  3462. +
  3463. +   ic->ic_htcaps = IEEE80211_HTC_HT |
  3464. +       IEEE80211_HTC_AMSDU |                   /* A-MSDU Tx */
  3465. +       IEEE80211_HTC_AMPDU |                   /* A-MPDU Tx */
  3466. +       IEEE80211_HTC_SMPS |                    /* MIMO power save */
  3467. +       IEEE80211_HTCAP_MAXAMSDU_3839 |         /* max. A-MSDU Rx length */
  3468. +       IEEE80211_HTCAP_CHWIDTH40 |             /* HT 40MHz channel width */
  3469. +       IEEE80211_HTCAP_GREENFIELD |            /* HT greenfield */
  3470. +       IEEE80211_HTCAP_SHORTGI20 |             /* HT 20MHz short GI */
  3471. +       IEEE80211_HTCAP_SHORTGI40 |             /* HT 40MHz short GI */
  3472. +       IEEE80211_HTCAP_SMPS_OFF;               /* MIMO power save disabled */
  3473. +
  3474. +   /* spatial streams */
  3475. +
  3476. +   if (sc->nrxpath == 2)
  3477. +       ic->ic_htcaps |= IEEE80211_HTCAP_RXSTBC_2STREAM;
  3478. +   else if (sc->nrxpath == 3)
  3479. +       ic->ic_htcaps |= IEEE80211_HTCAP_RXSTBC_3STREAM;
  3480. +   else
  3481. +       ic->ic_htcaps |= IEEE80211_HTCAP_RXSTBC_1STREAM;
  3482. +
  3483. +   if (sc->ntxpath > 1)
  3484. +       ic->ic_htcaps |= IEEE80211_HTCAP_TXSTBC;
  3485. +
  3486. +   /* delayed BA */
  3487. +
  3488. +   if (sc->mac_rev != 0x28600100)
  3489. +       ic->ic_htcaps |= IEEE80211_HTCAP_DELBA;
  3490. +
  3491. +   /* init channels */
  3492. +
  3493. +   ic->ic_nchans = 0;
  3494. +
  3495. +   rt2860_init_channels(sc);
  3496. +
  3497. +   rt2860_init_channels_ht40(sc);
  3498. +
  3499. +   ieee80211_ifattach(ic, sc->mac_addr);
  3500. +
  3501. +   ic->ic_vap_create = rt2860_vap_create;
  3502. +   ic->ic_vap_delete = rt2860_vap_delete;
  3503. +
  3504. +   ic->ic_node_alloc = rt2860_node_alloc;
  3505. +
  3506. +   sc->node_cleanup = ic->ic_node_cleanup;
  3507. +   ic->ic_node_cleanup = rt2860_node_cleanup;
  3508. +
  3509. +   ic->ic_node_getmimoinfo = rt2860_node_getmimoinfo;
  3510. +   ic->ic_setregdomain = rt2860_setregdomain;
  3511. +   ic->ic_getradiocaps = rt2860_getradiocaps;
  3512. +   ic->ic_scan_start = rt2860_scan_start;
  3513. +   ic->ic_scan_end = rt2860_scan_end;
  3514. +   ic->ic_set_channel = rt2860_set_channel;
  3515. +   ic->ic_newassoc = rt2860_newassoc;
  3516. +   ic->ic_updateslot = rt2860_updateslot;
  3517. +   ic->ic_update_promisc = rt2860_update_promisc;
  3518. +   ic->ic_update_mcast = rt2860_update_mcast;
  3519. +   ic->ic_wme.wme_update = rt2860_wme_update;
  3520. +   ic->ic_raw_xmit = rt2860_raw_xmit;
  3521. +
  3522. +   sc->recv_action = ic->ic_recv_action;
  3523. +   ic->ic_recv_action = rt2860_recv_action;
  3524. +
  3525. +   sc->send_action = ic->ic_send_action;
  3526. +   ic->ic_send_action = rt2860_send_action;
  3527. +
  3528. +   sc->addba_response = ic->ic_addba_response;
  3529. +   ic->ic_addba_response = rt2860_addba_response;
  3530. +
  3531. +   sc->addba_stop = ic->ic_addba_stop;
  3532. +   ic->ic_addba_stop = rt2860_addba_stop;
  3533. +
  3534. +   sc->ampdu_rx_start = ic->ic_ampdu_rx_start;
  3535. +   ic->ic_ampdu_rx_start = rt2860_ampdu_rx_start;
  3536. +
  3537. +   sc->ampdu_rx_stop = ic->ic_ampdu_rx_stop;
  3538. +   ic->ic_ampdu_rx_stop = rt2860_ampdu_rx_stop;
  3539. +
  3540. +   /* hardware requires padding between 802.11 frame header and body */
  3541. +
  3542. +   ic->ic_flags |= IEEE80211_F_DATAPAD | IEEE80211_F_DOTH;
  3543. +
  3544. +   ic->ic_flags_ext |= IEEE80211_FEXT_SWBMISS;
  3545. +
  3546. +   ieee80211_radiotap_attach(ic,
  3547. +       &sc->txtap.ihdr, sizeof(sc->txtap),
  3548. +       RT2860_SOFTC_TX_RADIOTAP_PRESENT,
  3549. +       &sc->rxtap.ihdr, sizeof(sc->rxtap),
  3550. +       RT2860_SOFTC_RX_RADIOTAP_PRESENT);
  3551. +
  3552. +   /* init task queue */
  3553. +
  3554. +   TASK_INIT(&sc->rx_done_task, 0, rt2860_rx_done_task, sc);
  3555. +   TASK_INIT(&sc->tx_done_task, 0, rt2860_tx_done_task, sc);
  3556. +   TASK_INIT(&sc->fifo_sta_full_task, 0, rt2860_fifo_sta_full_task, sc);
  3557. +   TASK_INIT(&sc->periodic_task, 0, rt2860_periodic_task, sc);
  3558. +
  3559. +   sc->rx_process_limit = 100;
  3560. +
  3561. +   sc->taskqueue = taskqueue_create("rt2860_taskq", M_NOWAIT,
  3562. +       taskqueue_thread_enqueue, &sc->taskqueue);
  3563. +
  3564. +   taskqueue_start_threads(&sc->taskqueue, 1, PI_NET, "%s taskq",
  3565. +       device_get_nameunit(sc->sc_dev));
  3566. +
  3567. +   rt2860_sysctl_attach(sc);
  3568. +
  3569. +   if (bootverbose)
  3570. +       ieee80211_announce(ic);
  3571. +
  3572. +   /* set up interrupt */
  3573. +   /* AGain, already handled
  3574. +   error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
  3575. +       NULL, rt2860_intr, sc, &sc->irqh);
  3576. +   if (error != 0)
  3577. +   {
  3578. +       printf("%s: could not set up interrupt\n",
  3579. +           device_get_nameunit(dev));
  3580. +       goto fail;
  3581. +   }
  3582. +   */
  3583. +   return 0;
  3584. +
  3585. + fail:
  3586. +
  3587. +   /* free Tx and Rx rings */
  3588. +
  3589. +   for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++)
  3590. +       rt2860_free_tx_ring(sc, &sc->tx_ring[i]);
  3591. +
  3592. +   rt2860_free_rx_ring(sc, &sc->rx_ring);
  3593. +
  3594. +   mtx_destroy(&sc->sc_mtx);
  3595. + /*
  3596. +   if (sc->mem != NULL)
  3597. +       bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
  3598. +
  3599. +   if (sc->irq != NULL)
  3600. +       bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, sc->irq);
  3601. + */
  3602. +   return error;
  3603. + }
  3604. +
  3605. + /*
  3606. +  * rt2860_detach
  3607. +  */
  3608. + int rt2860_detach(void *xsc)
  3609. + {
  3610. +   struct rt2860_softc *sc = xsc;
  3611. +   struct ifnet *ifp;
  3612. +   struct ieee80211com *ic;
  3613. +   int i;
  3614. +
  3615. +   ifp = sc->sc_ifp;
  3616. +   ic = ifp->if_l2com;
  3617. +
  3618. +   RT2860_DPRINTF(sc, RT2860_DEBUG_ANY,
  3619. +       "ral2860 detach");
  3620. +
  3621. +   RT2860_SOFTC_LOCK(sc);
  3622. +
  3623. +   ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
  3624. +
  3625. +   callout_stop(&sc->periodic_ch);
  3626. +   callout_stop(&sc->tx_watchdog_ch);
  3627. +
  3628. +   taskqueue_drain(sc->taskqueue, &sc->rx_done_task);
  3629. +   taskqueue_drain(sc->taskqueue, &sc->tx_done_task);
  3630. +   taskqueue_drain(sc->taskqueue, &sc->fifo_sta_full_task);
  3631. +   taskqueue_drain(sc->taskqueue, &sc->periodic_task);
  3632. +
  3633. +   /* free Tx and Rx rings */
  3634. +
  3635. +   for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++)
  3636. +       rt2860_free_tx_ring(sc, &sc->tx_ring[i]);
  3637. +
  3638. +   rt2860_free_rx_ring(sc, &sc->rx_ring);
  3639. +
  3640. +   RT2860_SOFTC_UNLOCK(sc);
  3641. +
  3642. +   ieee80211_ifdetach(ic);
  3643. +
  3644. +   if_free(ifp);
  3645. +
  3646. +   taskqueue_free(sc->taskqueue);
  3647. +
  3648. +   mtx_destroy(&sc->sc_mtx);
  3649. + /*
  3650. +  *    Handled by RAL overlords
  3651. +  */
  3652. + /*
  3653. +   bus_generic_detach(sc->sc_dev);
  3654. +
  3655. +   bus_teardown_intr(sc->sc_dev, sc->irq, sc->irqh);
  3656. +
  3657. +   bus_release_resource(sc->sc_dev, SYS_RES_IRQ, sc->irq_rid, sc->irq);
  3658. +
  3659. +   bus_release_resource(sc->sc_dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
  3660. + */
  3661. +   return 0;
  3662. + }
  3663. +
  3664. + /*
  3665. +  * rt2860_shutdown
  3666. +  */
  3667. + void rt2860_shutdown(void *xsc)
  3668. + {
  3669. +   struct rt2860_softc *sc = xsc;
  3670. +
  3671. +   RT2860_DPRINTF(sc, RT2860_DEBUG_ANY,
  3672. +       "%s: shutting down\n",
  3673. +       device_get_nameunit(sc->sc_dev));
  3674. +
  3675. +   rt2860_stop(sc);
  3676. +
  3677. +   sc->flags &= ~RT2860_SOFTC_FLAGS_UCODE_LOADED;
  3678. + }
  3679. +
  3680. + /*
  3681. +  * rt2860_suspend
  3682. +  */
  3683. + void rt2860_suspend(void *xsc)
  3684. + {
  3685. +   struct rt2860_softc *sc = xsc;
  3686. +
  3687. +
  3688. +   RT2860_DPRINTF(sc, RT2860_DEBUG_ANY,
  3689. +       "%s: suspending\n",
  3690. +       device_get_nameunit(sc->sc_dev));
  3691. +
  3692. +
  3693. +   rt2860_stop(sc);
  3694. +
  3695. +   sc->flags &= ~RT2860_SOFTC_FLAGS_UCODE_LOADED;
  3696. + }
  3697. +
  3698. + /*
  3699. +  * rt2860_resume
  3700. +  */
  3701. + void rt2860_resume(void *xsc)
  3702. + {
  3703. +   struct rt2860_softc *sc = xsc;
  3704. +   struct ifnet *ifp;
  3705. +
  3706. +   ifp = sc->sc_ifp;
  3707. +
  3708. +   RT2860_DPRINTF(sc, RT2860_DEBUG_ANY,
  3709. +       "%s: resuming\n",
  3710. +       device_get_nameunit(sc->sc_dev));
  3711. +
  3712. +   if (ifp->if_flags & IFF_UP)
  3713. +       rt2860_init(sc);
  3714. +
  3715. + }
  3716. +
  3717. + /*
  3718. +  * rt2860_init_channels
  3719. +  */
  3720. + static void rt2860_init_channels(struct rt2860_softc *sc)
  3721. + {
  3722. +   struct ifnet *ifp;
  3723. +   struct ieee80211com *ic;
  3724. +   struct ieee80211_channel *c;
  3725. +   int i, flags;
  3726. +
  3727. +   ifp = sc->sc_ifp;
  3728. +   ic = ifp->if_l2com;
  3729. +
  3730. +   /* set supported channels for 2GHz band */
  3731. +
  3732. +   for (i = 1; i <= 14; i++)
  3733. +   {
  3734. +       c = &ic->ic_channels[ic->ic_nchans++];
  3735. +       flags = IEEE80211_CHAN_B;
  3736. +
  3737. +       c->ic_freq = ieee80211_ieee2mhz(i, flags);
  3738. +       c->ic_ieee = i;
  3739. +       c->ic_flags = flags;
  3740. +
  3741. +       c = &ic->ic_channels[ic->ic_nchans++];
  3742. +       flags = IEEE80211_CHAN_B | IEEE80211_CHAN_HT20;
  3743. +
  3744. +       c->ic_freq = ieee80211_ieee2mhz(i, flags);
  3745. +       c->ic_ieee = i;
  3746. +       c->ic_flags = flags;
  3747. +
  3748. +       c = &ic->ic_channels[ic->ic_nchans++];
  3749. +       flags = IEEE80211_CHAN_G;
  3750. +
  3751. +       c->ic_freq = ieee80211_ieee2mhz(i, flags);
  3752. +       c->ic_ieee = i;
  3753. +       c->ic_flags = flags;
  3754. +
  3755. +       c = &ic->ic_channels[ic->ic_nchans++];
  3756. +       flags = IEEE80211_CHAN_G | IEEE80211_CHAN_HT20;
  3757. +
  3758. +       c->ic_freq = ieee80211_ieee2mhz(i, flags);
  3759. +       c->ic_ieee = i;
  3760. +       c->ic_flags = flags;
  3761. +   }
  3762. +
  3763. +   /* set supported channels for 5GHz band */
  3764. +
  3765. +   if (sc->rf_rev == RT2860_EEPROM_RF_2850 ||
  3766. +       sc->rf_rev == RT2860_EEPROM_RF_2750 ||
  3767. +       sc->rf_rev == RT2860_EEPROM_RF_3052)
  3768. +   {
  3769. +       for (i = 36; i <= 64; i += 4)
  3770. +       {
  3771. +           c = &ic->ic_channels[ic->ic_nchans++];
  3772. +           flags = IEEE80211_CHAN_A;
  3773. +
  3774. +           c->ic_freq = ieee80211_ieee2mhz(i, flags);
  3775. +           c->ic_ieee = i;
  3776. +           c->ic_flags = flags;
  3777. +
  3778. +           c = &ic->ic_channels[ic->ic_nchans++];
  3779. +           flags = IEEE80211_CHAN_A | IEEE80211_CHAN_HT20;
  3780. +
  3781. +           c->ic_freq = ieee80211_ieee2mhz(i, flags);
  3782. +           c->ic_ieee = i;
  3783. +           c->ic_flags = flags;
  3784. +       }
  3785. +
  3786. +       for (i = 100; i <= 140; i += 4)
  3787. +       {
  3788. +           c = &ic->ic_channels[ic->ic_nchans++];
  3789. +           flags = IEEE80211_CHAN_A;
  3790. +
  3791. +           c->ic_freq = ieee80211_ieee2mhz(i, flags);
  3792. +           c->ic_ieee = i;
  3793. +           c->ic_flags = flags;
  3794. +
  3795. +           c = &ic->ic_channels[ic->ic_nchans++];
  3796. +           flags = IEEE80211_CHAN_A | IEEE80211_CHAN_HT20;
  3797. +
  3798. +           c->ic_freq = ieee80211_ieee2mhz(i, flags);
  3799. +           c->ic_ieee = i;
  3800. +           c->ic_flags = flags;
  3801. +       }
  3802. +
  3803. +       for (i = 149; i <= 165; i += 4)
  3804. +       {
  3805. +           c = &ic->ic_channels[ic->ic_nchans++];
  3806. +           flags = IEEE80211_CHAN_A;
  3807. +
  3808. +           c->ic_freq = ieee80211_ieee2mhz(i, flags);
  3809. +           c->ic_ieee = i;
  3810. +           c->ic_flags = flags;
  3811. +
  3812. +           c = &ic->ic_channels[ic->ic_nchans++];
  3813. +           flags = IEEE80211_CHAN_A | IEEE80211_CHAN_HT20;
  3814. +
  3815. +           c->ic_freq = ieee80211_ieee2mhz(i, flags);
  3816. +           c->ic_ieee = i;
  3817. +           c->ic_flags = flags;
  3818. +       }
  3819. +   }
  3820. + }
  3821. +
  3822. + /*
  3823. +  * rt2860_init_channels_ht40
  3824. +  */
  3825. + static void rt2860_init_channels_ht40(struct rt2860_softc *sc)
  3826. + {
  3827. +   struct ifnet *ifp;
  3828. +   struct ieee80211com *ic;
  3829. +   struct ieee80211_channel *c, *cent, *ext;
  3830. +   int i, flags;
  3831. +
  3832. +   ifp = sc->sc_ifp;
  3833. +   ic = ifp->if_l2com;
  3834. +
  3835. +   /* set supported channels for 2GHz band */
  3836. +
  3837. +   for (i = 1; i <= 14; i++)
  3838. +   {
  3839. +       flags = IEEE80211_CHAN_G | IEEE80211_CHAN_HT40;
  3840. +
  3841. +       /* find the center channel */
  3842. +
  3843. +       cent = ieee80211_find_channel_byieee(ic, i,
  3844. +           flags & ~IEEE80211_CHAN_HT);
  3845. +       if (cent == NULL)
  3846. +       {
  3847. +           printf("%s: skip channel %d, could not find center channel\n",
  3848. +               device_get_nameunit(sc->sc_dev), i);
  3849. +           continue;
  3850. +       }
  3851. +
  3852. +       /* find the extension channel */
  3853. +
  3854. +       ext = ieee80211_find_channel(ic, cent->ic_freq + 20,
  3855. +           flags & ~IEEE80211_CHAN_HT);
  3856. +       if (ext == NULL)
  3857. +       {
  3858. +           printf("%s: skip channel %d, could not find extension channel\n",
  3859. +               device_get_nameunit(sc->sc_dev), i);
  3860. +           continue;
  3861. +       }
  3862. +
  3863. +       c = &ic->ic_channels[ic->ic_nchans++];
  3864. +
  3865. +       *c = *cent;
  3866. +       c->ic_extieee = ext->ic_ieee;
  3867. +       c->ic_flags &= ~IEEE80211_CHAN_HT;
  3868. +       c->ic_flags |= IEEE80211_CHAN_HT40U;
  3869. +
  3870. +       c = &ic->ic_channels[ic->ic_nchans++];
  3871. +
  3872. +       *c = *ext;
  3873. +       c->ic_extieee = cent->ic_ieee;
  3874. +       c->ic_flags &= ~IEEE80211_CHAN_HT;
  3875. +       c->ic_flags |= IEEE80211_CHAN_HT40D;
  3876. +   }
  3877. +
  3878. +   /* set supported channels for 5GHz band */
  3879. +
  3880. +   if (sc->rf_rev == RT2860_EEPROM_RF_2850 ||
  3881. +       sc->rf_rev == RT2860_EEPROM_RF_2750 ||
  3882. +       sc->rf_rev == RT2860_EEPROM_RF_3052)
  3883. +   {
  3884. +       for (i = 36; i <= 64; i += 4)
  3885. +       {
  3886. +           flags = IEEE80211_CHAN_A | IEEE80211_CHAN_HT40;
  3887. +
  3888. +           /* find the center channel */
  3889. +
  3890. +           cent = ieee80211_find_channel_byieee(ic, i,
  3891. +               flags & ~IEEE80211_CHAN_HT);
  3892. +           if (cent == NULL)
  3893. +           {
  3894. +               printf("%s: skip channel %d, could not find center channel\n",
  3895. +                   device_get_nameunit(sc->sc_dev), i);
  3896. +               continue;
  3897. +           }
  3898. +
  3899. +           /* find the extension channel */
  3900. +
  3901. +           ext = ieee80211_find_channel(ic, cent->ic_freq + 20,
  3902. +               flags & ~IEEE80211_CHAN_HT);
  3903. +           if (ext == NULL)
  3904. +           {
  3905. +               printf("%s: skip channel %d, could not find extension channel\n",
  3906. +                   device_get_nameunit(sc->sc_dev), i);
  3907. +               continue;
  3908. +           }
  3909. +
  3910. +           c = &ic->ic_channels[ic->ic_nchans++];
  3911. +
  3912. +           *c = *cent;
  3913. +           c->ic_extieee = ext->ic_ieee;
  3914. +           c->ic_flags &= ~IEEE80211_CHAN_HT;
  3915. +           c->ic_flags |= IEEE80211_CHAN_HT40U;
  3916. +
  3917. +           c = &ic->ic_channels[ic->ic_nchans++];
  3918. +
  3919. +           *c = *ext;
  3920. +           c->ic_extieee = cent->ic_ieee;
  3921. +           c->ic_flags &= ~IEEE80211_CHAN_HT;
  3922. +           c->ic_flags |= IEEE80211_CHAN_HT40D;
  3923. +       }
  3924. +
  3925. +       for (i = 100; i <= 140; i += 4)
  3926. +       {
  3927. +           flags = IEEE80211_CHAN_A | IEEE80211_CHAN_HT40;
  3928. +
  3929. +           /* find the center channel */
  3930. +
  3931. +           cent = ieee80211_find_channel_byieee(ic, i,
  3932. +               flags & ~IEEE80211_CHAN_HT);
  3933. +           if (cent == NULL)
  3934. +           {
  3935. +               printf("%s: skip channel %d, could not find center channel\n",
  3936. +                   device_get_nameunit(sc->sc_dev), i);
  3937. +               continue;
  3938. +           }
  3939. +
  3940. +           /* find the extension channel */
  3941. +
  3942. +           ext = ieee80211_find_channel(ic, cent->ic_freq + 20,
  3943. +               flags & ~IEEE80211_CHAN_HT);
  3944. +           if (ext == NULL)
  3945. +           {
  3946. +               printf("%s: skip channel %d, could not find extension channel\n",
  3947. +                   device_get_nameunit(sc->sc_dev), i);
  3948. +               continue;
  3949. +           }
  3950. +
  3951. +           c = &ic->ic_channels[ic->ic_nchans++];
  3952. +
  3953. +           *c = *cent;
  3954. +           c->ic_extieee = ext->ic_ieee;
  3955. +           c->ic_flags &= ~IEEE80211_CHAN_HT;
  3956. +           c->ic_flags |= IEEE80211_CHAN_HT40U;
  3957. +
  3958. +           c = &ic->ic_channels[ic->ic_nchans++];
  3959. +
  3960. +           *c = *ext;
  3961. +           c->ic_extieee = cent->ic_ieee;
  3962. +           c->ic_flags &= ~IEEE80211_CHAN_HT;
  3963. +           c->ic_flags |= IEEE80211_CHAN_HT40D;
  3964. +       }
  3965. +
  3966. +       for (i = 149; i <= 165; i += 4)
  3967. +       {
  3968. +           flags = IEEE80211_CHAN_A | IEEE80211_CHAN_HT40;
  3969. +
  3970. +           /* find the center channel */
  3971. +
  3972. +           cent = ieee80211_find_channel_byieee(ic, i,
  3973. +               flags & ~IEEE80211_CHAN_HT);
  3974. +           if (cent == NULL)
  3975. +           {
  3976. +               printf("%s: skip channel %d, could not find center channel\n",
  3977. +                   device_get_nameunit(sc->sc_dev), i);
  3978. +               continue;
  3979. +           }
  3980. +
  3981. +           /* find the extension channel */
  3982. +
  3983. +           ext = ieee80211_find_channel(ic, cent->ic_freq + 20,
  3984. +               flags & ~IEEE80211_CHAN_HT);
  3985. +           if (ext == NULL)
  3986. +           {
  3987. +               printf("%s: skip channel %d, could not find extension channel\n",
  3988. +                   device_get_nameunit(sc->sc_dev), i);
  3989. +               continue;
  3990. +           }
  3991. +
  3992. +           c = &ic->ic_channels[ic->ic_nchans++];
  3993. +
  3994. +           *c = *cent;
  3995. +           c->ic_extieee = ext->ic_ieee;
  3996. +           c->ic_flags &= ~IEEE80211_CHAN_HT;
  3997. +           c->ic_flags |= IEEE80211_CHAN_HT40U;
  3998. +
  3999. +           c = &ic->ic_channels[ic->ic_nchans++];
  4000. +
  4001. +           *c = *ext;
  4002. +           c->ic_extieee = cent->ic_ieee;
  4003. +           c->ic_flags &= ~IEEE80211_CHAN_HT;
  4004. +           c->ic_flags |= IEEE80211_CHAN_HT40D;
  4005. +       }
  4006. +   }
  4007. + }
  4008. +
  4009. + /*
  4010. +  * rt2860_init_locked
  4011. +  */
  4012. + static void rt2860_init_locked(void *priv)
  4013. + {
  4014. +   struct rt2860_softc *sc;
  4015. +   struct ifnet *ifp;
  4016. +   struct ieee80211com *ic;
  4017. +   int error, i, ntries;
  4018. +   uint32_t tmp, stacnt[6];
  4019. +
  4020. +   sc = priv;
  4021. +   ifp = sc->sc_ifp;
  4022. +   ic = ifp->if_l2com;
  4023. +
  4024. +   RT2860_DPRINTF(sc, RT2860_DEBUG_ANY,
  4025. +       "%s: initializing\n",
  4026. +       device_get_nameunit(sc->sc_dev));
  4027. +
  4028. +   RT2860_SOFTC_ASSERT_LOCKED(sc);
  4029. +
  4030. +   if (sc->mac_rev != 0x28720200)
  4031. +   {
  4032. +       if (!(sc->flags & RT2860_SOFTC_FLAGS_UCODE_LOADED))
  4033. +       {
  4034. +       RT2860_DPRINTF(sc, RT2860_DEBUG_ANY,
  4035. +           "%s: loading 8051 microcode\n",
  4036. +           device_get_nameunit(sc->sc_dev));
  4037. +
  4038. +       error = rt2860_io_mcu_load_ucode(sc, rt2860_ucode, sizeof(rt2860_ucode));
  4039. +       if (error != 0)
  4040. +       {
  4041. +           printf("%s: could not load 8051 microcode\n",
  4042. +               device_get_nameunit(sc->sc_dev));
  4043. +           goto fail;
  4044. +       }
  4045. +
  4046. +       RT2860_DPRINTF(sc, RT2860_DEBUG_ANY,
  4047. +           "%s: 8051 microcode was successfully loaded\n",
  4048. +           device_get_nameunit(sc->sc_dev));
  4049. +
  4050. +       sc->flags |= RT2860_SOFTC_FLAGS_UCODE_LOADED;
  4051. +       }
  4052. +   }
  4053. +   else
  4054. +   {
  4055. +       sc->flags |= RT2860_SOFTC_FLAGS_UCODE_LOADED;
  4056. +
  4057. +       /* Blink every TX */
  4058. + #define LED_CFG_LED_POLARITY  (1<<30)
  4059. + #define LED_CFG_Y_LED_MODE_ONTX   (1<<28)
  4060. + #define LED_CFG_G_LED_MODE_ONTX   (1<<26)
  4061. + #define LED_CFG_R_LED_MODE_ONTX   (1<<24)
  4062. + #define LED_CFG_SLOW_BLK_TIME     (0x03<<16) /* sec */
  4063. + #define LED_CFG_LED_OFF_TIME  (0x1e<<8) /* msec */
  4064. + #define LED_CFG_LED_ON_TIME   (0x46) /* msec */
  4065. +       rt2860_io_mac_write(sc, RT2860_REG_LED_CFG,
  4066. +           LED_CFG_LED_POLARITY |
  4067. +           LED_CFG_Y_LED_MODE_ONTX |
  4068. +           LED_CFG_G_LED_MODE_ONTX |
  4069. +           LED_CFG_R_LED_MODE_ONTX |
  4070. +           LED_CFG_SLOW_BLK_TIME |
  4071. +           LED_CFG_LED_OFF_TIME |
  4072. +           LED_CFG_LED_ON_TIME);
  4073. +   }
  4074. +
  4075. +   rt2860_io_mac_write(sc, RT2860_REG_PWR_PIN_CFG, 0x2);
  4076. +
  4077. +   /* disable DMA engine */
  4078. +
  4079. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
  4080. +
  4081. +   tmp &= 0xff0;
  4082. +   tmp |= RT2860_REG_TX_WB_DDONE;
  4083. +
  4084. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
  4085. +
  4086. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_RST_IDX, 0xffffffff);
  4087. +
  4088. +   /* PBF hardware reset */
  4089. +
  4090. +   rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL, 0xe1f);
  4091. +   rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL, 0xe00);
  4092. +
  4093. +   /* wait while DMA engine is busy */
  4094. +
  4095. +   for (ntries = 0; ntries < 100; ntries++)
  4096. +   {
  4097. +       tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
  4098. +       if (!(tmp & (RT2860_REG_TX_DMA_BUSY | RT2860_REG_RX_DMA_BUSY)))
  4099. +           break;
  4100. +
  4101. +       DELAY(1000);
  4102. +   }
  4103. +
  4104. +   if (ntries == 100)
  4105. +   {
  4106. +       printf("%s: timeout waiting for DMA engine\n",
  4107. +           device_get_nameunit(sc->sc_dev));
  4108. +       goto fail;
  4109. +   }
  4110. +
  4111. +   tmp &= 0xff0;
  4112. +   tmp |= RT2860_REG_TX_WB_DDONE;
  4113. +
  4114. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
  4115. +
  4116. +   /* reset Rx and Tx rings */
  4117. +
  4118. +   tmp = RT2860_REG_RST_IDX_RX |
  4119. +       RT2860_REG_RST_IDX_TX_MGMT |
  4120. +       RT2860_REG_RST_IDX_TX_HCCA |
  4121. +       RT2860_REG_RST_IDX_TX_AC3 |
  4122. +       RT2860_REG_RST_IDX_TX_AC2 |
  4123. +       RT2860_REG_RST_IDX_TX_AC1 |
  4124. +       RT2860_REG_RST_IDX_TX_AC0;
  4125. +
  4126. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_RST_IDX, tmp);
  4127. +
  4128. +   /* PBF hardware reset */
  4129. +
  4130. +   rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL, 0xe1f);
  4131. +   rt2860_io_mac_write(sc, RT2860_REG_PBF_SYS_CTRL, 0xe00);
  4132. +
  4133. +   rt2860_io_mac_write(sc, RT2860_REG_PWR_PIN_CFG, 0x3);
  4134. +
  4135. +   rt2860_io_mac_write(sc, RT2860_REG_SYS_CTRL,
  4136. +       RT2860_REG_MAC_SRST | RT2860_REG_BBP_HRST);
  4137. +   rt2860_io_mac_write(sc, RT2860_REG_SYS_CTRL, 0);
  4138. +
  4139. +   /* init Tx power per rate */
  4140. +
  4141. +   for (i = 0; i < RT2860_SOFTC_TXPOW_RATE_COUNT; i++)
  4142. +   {
  4143. +       if (sc->txpow_rate_20mhz[i] == 0xffffffff)
  4144. +           continue;
  4145. +
  4146. +       rt2860_io_mac_write(sc, RT2860_REG_TX_PWR_CFG(i),
  4147. +           sc->txpow_rate_20mhz[i]);
  4148. +   }
  4149. +
  4150. +   for (i = 0; i < RT2860_DEF_MAC_SIZE; i++)
  4151. +       rt2860_io_mac_write(sc, rt2860_def_mac[i].reg,
  4152. +           rt2860_def_mac[i].val);
  4153. +
  4154. +   /* wait while MAC is busy */
  4155. +
  4156. +   for (ntries = 0; ntries < 100; ntries++)
  4157. +   {
  4158. +       if (!(rt2860_io_mac_read(sc, RT2860_REG_STATUS_CFG) &
  4159. +           (RT2860_REG_STATUS_TX_BUSY | RT2860_REG_STATUS_RX_BUSY)))
  4160. +           break;
  4161. +
  4162. +       DELAY(1000);
  4163. +   }
  4164. +
  4165. +   if (ntries == 100)
  4166. +   {
  4167. +       printf("%s: timeout waiting for MAC\n",
  4168. +           device_get_nameunit(sc->sc_dev));
  4169. +       goto fail;
  4170. +   }
  4171. +  
  4172. +   /* clear Host to MCU mailbox */
  4173. +
  4174. +   rt2860_io_mac_write(sc, RT2860_REG_H2M_MAILBOX_BBP_AGENT, 0);
  4175. +   rt2860_io_mac_write(sc, RT2860_REG_H2M_MAILBOX, 0);
  4176. +
  4177. +   rt2860_io_mcu_cmd(sc, RT2860_IO_MCU_CMD_BOOT,
  4178. +       RT2860_REG_H2M_TOKEN_NO_INTR, 0);
  4179. +
  4180. +   DELAY(1000);
  4181. +
  4182. +   error = rt2860_init_bbp(sc);
  4183. +   if (error != 0)
  4184. +       goto fail;
  4185. +
  4186. +   /* set up maximum buffer sizes */
  4187. +
  4188. +   tmp = (1 << 12) | RT2860_MAX_AGG_SIZE;
  4189. +
  4190. +   rt2860_io_mac_write(sc, RT2860_REG_MAX_LEN_CFG, tmp);
  4191. +
  4192. +   if (sc->mac_rev == 0x28720200)
  4193. +   {
  4194. +       /* set max. PSDU length from 16K to 32K bytes */
  4195. +
  4196. +       tmp = rt2860_io_mac_read(sc, RT2860_REG_MAX_LEN_CFG);
  4197. +
  4198. +       tmp &= ~(3 << 12);
  4199. +       tmp |= (2 << 12);
  4200. +
  4201. +       rt2860_io_mac_write(sc, RT2860_REG_MAX_LEN_CFG, tmp);
  4202. +   }
  4203. +
  4204. +   if (sc->mac_rev >= 0x28720200 && sc->mac_rev < 0x30700200)
  4205. +   {
  4206. +       tmp = rt2860_io_mac_read(sc, RT2860_REG_MAX_LEN_CFG);
  4207. +
  4208. +       tmp &= 0xfff;
  4209. +       tmp |= 0x2000;
  4210. +
  4211. +       rt2860_io_mac_write(sc, RT2860_REG_MAX_LEN_CFG, tmp);
  4212. +   }
  4213. +
  4214. +   /* set mac address */
  4215. +
  4216. +   rt2860_asic_set_macaddr(sc, IF_LLADDR(ifp));
  4217. +
  4218. +   /* clear statistic registers */
  4219. +
  4220. +   rt2860_io_mac_read_multi(sc, RT2860_REG_RX_STA_CNT0,
  4221. +       stacnt, sizeof(stacnt));
  4222. +
  4223. +   /* set RTS threshold */
  4224. +
  4225. +   rt2860_asic_update_rtsthreshold(sc);
  4226. +
  4227. +   /* set Tx power */
  4228. +
  4229. +   rt2860_asic_update_txpower(sc);
  4230. +
  4231. +   /* set up protection mode */
  4232. +
  4233. +   sc->tx_ampdu_sessions = 0;
  4234. +
  4235. +   rt2860_asic_updateprot(sc);
  4236. +
  4237. +   /* clear beacon frame space (entries = 8, entry size = 512) */
  4238. +
  4239. +   rt2860_io_mac_set_region_4(sc, RT2860_REG_BEACON_BASE(0), 0, 1024);
  4240. +
  4241. +   taskqueue_unblock(sc->taskqueue);
  4242. +
  4243. +   /* init Tx rings (4 EDCAs + HCCA + MGMT) */
  4244. +
  4245. +   for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++)
  4246. +       rt2860_reset_tx_ring(sc, &sc->tx_ring[i]);
  4247. +
  4248. +   for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++)
  4249. +   {
  4250. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_BASE_PTR(i),
  4251. +           sc->tx_ring[i].desc_phys_addr);
  4252. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_MAX_CNT(i),
  4253. +           RT2860_SOFTC_TX_RING_DESC_COUNT);
  4254. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(i), 0);
  4255. +   }
  4256. +
  4257. +   /* init Rx ring */
  4258. +
  4259. +   rt2860_reset_rx_ring(sc, &sc->rx_ring);
  4260. +
  4261. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_BASE_PTR,
  4262. +       sc->rx_ring.desc_phys_addr);
  4263. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_MAX_CNT,
  4264. +       RT2860_SOFTC_RX_RING_DATA_COUNT);
  4265. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_CALC_IDX,
  4266. +       RT2860_SOFTC_RX_RING_DATA_COUNT - 1);
  4267. +
  4268. +   /* wait while DMA engine is busy */
  4269. +
  4270. +   for (ntries = 0; ntries < 100; ntries++)
  4271. +   {
  4272. +       tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
  4273. +       if (!(tmp & (RT2860_REG_TX_DMA_BUSY | RT2860_REG_RX_DMA_BUSY)))
  4274. +           break;
  4275. +
  4276. +       DELAY(1000);
  4277. +   }
  4278. +
  4279. +   if (ntries == 100)
  4280. +   {
  4281. +       printf("%s: timeout waiting for DMA engine\n",
  4282. +           device_get_nameunit(sc->sc_dev));
  4283. +       goto fail;
  4284. +   }
  4285. +
  4286. +   tmp &= 0xff0;
  4287. +   tmp |= RT2860_REG_TX_WB_DDONE;
  4288. +
  4289. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
  4290. +
  4291. +   /* disable interrupts mitigation */
  4292. +
  4293. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_DELAY_INT_CFG, 0);
  4294. +
  4295. +   /* select Main antenna for 1T1R devices */
  4296. +   if (sc->rf_rev == RT2860_EEPROM_RF_2020 ||
  4297. +       sc->rf_rev == RT2860_EEPROM_RF_3020 ||
  4298. +       sc->rf_rev == RT2860_EEPROM_RF_3320)
  4299. +       rt3090_set_rx_antenna(sc, 0);
  4300. +
  4301. +   /* send LEDs operating mode to microcontroller */
  4302. +   rt2860_io_mcu_cmd(sc, RT2860_IO_MCU_CMD_LED1,
  4303. +       RT2860_REG_H2M_TOKEN_NO_INTR, sc->led_off[0]);
  4304. +   rt2860_io_mcu_cmd(sc, RT2860_IO_MCU_CMD_LED2,
  4305. +       RT2860_REG_H2M_TOKEN_NO_INTR, sc->led_off[1]);
  4306. +   rt2860_io_mcu_cmd(sc, RT2860_IO_MCU_CMD_LED3,
  4307. +       RT2860_REG_H2M_TOKEN_NO_INTR, sc->led_off[2]);
  4308. +
  4309. +   /* turn radio LED on */
  4310. +
  4311. +   rt2860_led_cmd(sc, RT2860_LED_CMD_RADIO_ON);
  4312. +
  4313. +   /* write vendor-specific BBP values (from EEPROM) */
  4314. +
  4315. +   for (i = 0; i < RT2860_SOFTC_BBP_EEPROM_COUNT; i++)
  4316. +   {
  4317. +       if (sc->bbp_eeprom[i].reg == 0x00 ||
  4318. +           sc->bbp_eeprom[i].reg == 0xff)
  4319. +           continue;
  4320. +
  4321. +       rt2860_io_bbp_write(sc, sc->bbp_eeprom[i].reg,
  4322. +           sc->bbp_eeprom[i].val);
  4323. +   }
  4324. +
  4325. +   if ((sc->mac_rev & 0xffff0000) >= 0x30710000)
  4326. +       rt3090_rf_init(sc);
  4327. +
  4328. +   if (sc->mac_rev != 0x28720200) {
  4329. +       /* 0x28720200 don`t have RT2860_REG_SCHDMA_GPIO_CTRL_CFG */
  4330. +       tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_GPIO_CTRL_CFG);
  4331. +           if (tmp & (1 << 2)) {
  4332. +           rt2860_io_mcu_cmd(sc, RT2860_IO_MCU_CMD_SLEEP,
  4333. +               RT2860_REG_H2M_TOKEN_RADIOOFF, 0x02ff);
  4334. +           rt2860_io_mcu_cmd_check(sc, RT2860_REG_H2M_TOKEN_RADIOOFF);
  4335. +
  4336. +           rt2860_io_mcu_cmd(sc, RT2860_IO_MCU_CMD_WAKEUP,
  4337. +               RT2860_REG_H2M_TOKEN_WAKEUP, 0);
  4338. +           rt2860_io_mcu_cmd_check(sc, RT2860_REG_H2M_TOKEN_WAKEUP);
  4339. +       }
  4340. +   }
  4341. +
  4342. +   if ((sc->mac_rev & 0xffff0000) >= 0x30710000)
  4343. +       rt3090_rf_wakeup(sc);
  4344. +
  4345. +   /* disable non-existing Rx chains */
  4346. +
  4347. +   tmp = rt2860_io_bbp_read(sc, 3);
  4348. +
  4349. +   tmp &= ~((1 << 4) | (1 << 3));
  4350. +
  4351. +   if (sc->nrxpath == 3)
  4352. +       tmp |= (1 << 4);
  4353. +   else if (sc->nrxpath == 2)
  4354. +       tmp |= (1 << 3);
  4355. +
  4356. +   rt2860_io_bbp_write(sc, 3, tmp);
  4357. +
  4358. +   /* disable non-existing Tx chains */
  4359. +
  4360. +   tmp = rt2860_io_bbp_read(sc, 1);
  4361. +
  4362. +   tmp &= ~((1 << 4) | (1 << 3));
  4363. +
  4364. +   if (sc->ntxpath == 2)
  4365. +       tmp |= (1 << 4);
  4366. +
  4367. +   rt2860_io_bbp_write(sc, 1, tmp);
  4368. +
  4369. +   if ((sc->mac_rev & 0xffff0000) >= 0x30710000)
  4370. +       rt3090_rf_setup(sc);
  4371. +
  4372. +   if (sc->rf_rev == RT2860_EEPROM_RF_3022)
  4373. +   {
  4374. +       /* calibrate RF */
  4375. +                 tmp = rt2860_io_rf_read(sc, 30);
  4376. +                 tmp |= 0x80;
  4377. +                 rt2860_io_rf_write(sc, 30, tmp);
  4378. +                 DELAY(1000);
  4379. +                 tmp &= 0x7F;
  4380. +                 rt2860_io_rf_write(sc, 30, tmp);
  4381. +
  4382. +                 /* Initialize RF register to default value */
  4383. +       rt2860_io_rf_load_defaults(sc);
  4384. +   }
  4385. +
  4386. +   /* set current channel */
  4387. +   rt2860_rf_set_chan(sc, ic->ic_curchan);
  4388. +
  4389. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WMM_TXOP0_CFG, 0);
  4390. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WMM_TXOP1_CFG,
  4391. +       (48 << 16) | 96);
  4392. +
  4393. +   if ((sc->mac_rev & 0xffff) != 0x0101)
  4394. +       rt2860_io_mac_write(sc, RT2860_REG_TX_TXOP_CTRL_CFG, 0x583f);
  4395. +
  4396. +   /* clear pending interrupts */
  4397. +
  4398. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_INT_STATUS, 0xffffffff);
  4399. +
  4400. +   /* enable interrupts */
  4401. +
  4402. +   tmp = RT2860_REG_INT_TX_COHERENT |
  4403. +       RT2860_REG_INT_RX_COHERENT |
  4404. +       RT2860_REG_INT_GP_TIMER |
  4405. +       RT2860_REG_INT_AUTO_WAKEUP |
  4406. +       RT2860_REG_INT_FIFO_STA_FULL |
  4407. +       RT2860_REG_INT_PRE_TBTT |
  4408. +       RT2860_REG_INT_TBTT |
  4409. +       RT2860_REG_INT_TXRX_COHERENT |
  4410. +       RT2860_REG_INT_MCU_CMD |
  4411. +       RT2860_REG_INT_TX_MGMT_DONE |
  4412. +       RT2860_REG_INT_TX_HCCA_DONE |
  4413. +       RT2860_REG_INT_TX_AC3_DONE |
  4414. +       RT2860_REG_INT_TX_AC2_DONE |
  4415. +       RT2860_REG_INT_TX_AC1_DONE |
  4416. +       RT2860_REG_INT_TX_AC0_DONE |
  4417. +       RT2860_REG_INT_RX_DONE;
  4418. +
  4419. +   sc->intr_enable_mask = tmp;
  4420. +
  4421. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_INT_MASK, tmp);
  4422. +
  4423. +   if (rt2860_txrx_enable(sc) != 0)
  4424. +       goto fail;
  4425. +
  4426. +   /* clear garbage interrupts */
  4427. +
  4428. +   tmp = rt2860_io_mac_read(sc, 0x1300);
  4429. +
  4430. +   ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
  4431. +   ifp->if_drv_flags |= IFF_DRV_RUNNING;
  4432. +
  4433. +   sc->periodic_round = 0;
  4434. +
  4435. +   callout_reset(&sc->periodic_ch, hz / 10, rt2860_periodic, sc);
  4436. +
  4437. +   return;
  4438. +
  4439. + fail:
  4440. +
  4441. +   rt2860_stop_locked(sc);
  4442. + }
  4443. +
  4444. + /*
  4445. +  * rt2860_init
  4446. +  */
  4447. + static void rt2860_init(void *priv)
  4448. + {
  4449. +   struct rt2860_softc *sc;
  4450. +
  4451. +   sc = priv;
  4452. +
  4453. +   RT2860_SOFTC_LOCK(sc);
  4454. +
  4455. +   rt2860_init_locked(sc);
  4456. +
  4457. +   RT2860_SOFTC_UNLOCK(sc);
  4458. + }
  4459. +
  4460. + /*
  4461. +  * rt2860_init_bbp
  4462. +  */
  4463. + static int rt2860_init_bbp(struct rt2860_softc *sc)
  4464. + {
  4465. +   int ntries, i;
  4466. +   uint8_t tmp;
  4467. +
  4468. +   for (ntries = 0; ntries < 20; ntries++)
  4469. +   {
  4470. +       tmp = rt2860_io_bbp_read(sc, 0);
  4471. +       if (tmp != 0x00 && tmp != 0xff)
  4472. +           break;
  4473. +   }
  4474. +
  4475. +   if (tmp == 0x00 || tmp == 0xff)
  4476. +   {
  4477. +       printf("%s: timeout waiting for BBP to wakeup\n",
  4478. +           device_get_nameunit(sc->sc_dev));
  4479. +       return ETIMEDOUT;
  4480. +   }
  4481. +
  4482. +   for (i = 0; i < RT2860_DEF_BBP_SIZE; i++)
  4483. +       rt2860_io_bbp_write(sc, rt2860_def_bbp[i].reg,
  4484. +           rt2860_def_bbp[i].val);
  4485. +
  4486. +   if ((sc->mac_rev & 0xffff) != 0x0101)
  4487. +       rt2860_io_bbp_write(sc, 84, 0x19);
  4488. +
  4489. +   if (sc->mac_rev == 0x28600100)
  4490. +   {
  4491. +       rt2860_io_bbp_write(sc, 69, 0x16);
  4492. +       rt2860_io_bbp_write(sc, 73, 0x12);
  4493. +   }
  4494. +
  4495. +   return 0;
  4496. + }
  4497. +
  4498. + /*
  4499. +  * rt2860_stop_locked
  4500. +  */
  4501. + static void rt2860_stop_locked(void *priv)
  4502. + {
  4503. +   struct rt2860_softc *sc;
  4504. +   struct ifnet *ifp;
  4505. +   struct ieee80211com *ic;
  4506. +   uint32_t tmp;
  4507. +
  4508. +   sc = priv;
  4509. +   ifp = sc->sc_ifp;
  4510. +   ic = ifp->if_l2com;
  4511. +
  4512. +   RT2860_DPRINTF(sc, RT2860_DEBUG_ANY,
  4513. +       "%s: stopping\n",
  4514. +       device_get_nameunit(sc->sc_dev));
  4515. +
  4516. +   RT2860_SOFTC_ASSERT_LOCKED(sc);
  4517. +
  4518. +   sc->sc_tx_timer = 0;
  4519. +
  4520. +   if (ifp->if_drv_flags & IFF_DRV_RUNNING)
  4521. +       rt2860_led_cmd(sc, RT2860_LED_CMD_RADIO_OFF);
  4522. +
  4523. +   ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
  4524. +
  4525. +   callout_stop(&sc->periodic_ch);
  4526. +   callout_stop(&sc->tx_watchdog_ch);
  4527. +
  4528. +   RT2860_SOFTC_UNLOCK(sc);
  4529. +
  4530. +   taskqueue_block(sc->taskqueue);
  4531. +
  4532. +   taskqueue_drain(sc->taskqueue, &sc->rx_done_task);
  4533. +   taskqueue_drain(sc->taskqueue, &sc->tx_done_task);
  4534. +   taskqueue_drain(sc->taskqueue, &sc->fifo_sta_full_task);
  4535. +   taskqueue_drain(sc->taskqueue, &sc->periodic_task);
  4536. +
  4537. +   RT2860_SOFTC_LOCK(sc);
  4538. +
  4539. +   /* clear key tables */
  4540. +
  4541. +   rt2860_asic_clear_keytables(sc);
  4542. +
  4543. +   /* disable interrupts */
  4544. +
  4545. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_INT_MASK, 0);
  4546. +
  4547. +   /* disable Tx/Rx */
  4548. +
  4549. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_SYS_CTRL);
  4550. +
  4551. +   tmp &= ~(RT2860_REG_RX_ENABLE | RT2860_REG_TX_ENABLE);
  4552. +
  4553. +   rt2860_io_mac_write(sc, RT2860_REG_SYS_CTRL, tmp);
  4554. +
  4555. +   /* reset adapter */
  4556. +
  4557. +   rt2860_io_mac_write(sc, RT2860_REG_SYS_CTRL,
  4558. +       RT2860_REG_MAC_SRST | RT2860_REG_BBP_HRST);
  4559. +   rt2860_io_mac_write(sc, RT2860_REG_SYS_CTRL, 0);
  4560. + }
  4561. +
  4562. + /*
  4563. +  * rt2860_stop
  4564. +  */
  4565. + static void rt2860_stop(void *priv)
  4566. + {
  4567. +   struct rt2860_softc *sc;
  4568. +
  4569. +   sc = priv;
  4570. +
  4571. +   RT2860_SOFTC_LOCK(sc);
  4572. +
  4573. +   rt2860_stop_locked(sc);
  4574. +
  4575. +   RT2860_SOFTC_UNLOCK(sc);
  4576. + }
  4577. +
  4578. + /*
  4579. +  * rt2860_start
  4580. +  */
  4581. + static void rt2860_start(struct ifnet *ifp)
  4582. + {
  4583. +   struct rt2860_softc *sc;
  4584. +   struct ieee80211_node *ni;
  4585. +   struct mbuf *m;
  4586. +   int qid;
  4587. +
  4588. +   sc = ifp->if_softc;
  4589. +
  4590. +   if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
  4591. +       return;
  4592. +
  4593. +   for (;;)
  4594. +   {
  4595. +       IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
  4596. +       if (m == NULL)
  4597. +           break;
  4598. +
  4599. +       ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
  4600. +
  4601. +       m->m_pkthdr.rcvif = NULL;
  4602. +
  4603. +       qid = M_WME_GETAC(m);
  4604. +
  4605. +       RT2860_SOFTC_TX_RING_LOCK(&sc->tx_ring[qid]);
  4606. +
  4607. +       if (sc->tx_ring[qid].data_queued >= RT2860_SOFTC_TX_RING_DATA_COUNT)
  4608. +       {
  4609. +           RT2860_SOFTC_TX_RING_UNLOCK(&sc->tx_ring[qid]);
  4610. +
  4611. +           RT2860_DPRINTF(sc, RT2860_DEBUG_TX,
  4612. +               "%s: if_start: Tx ring with qid=%d is full\n",
  4613. +               device_get_nameunit(sc->sc_dev), qid);
  4614. +
  4615. +           m_freem(m);
  4616. +           ieee80211_free_node(ni);
  4617. +
  4618. +           ifp->if_drv_flags |= IFF_DRV_OACTIVE;
  4619. +           ifp->if_oerrors++;
  4620. +
  4621. +           sc->tx_data_queue_full[qid]++;
  4622. +
  4623. +           break;
  4624. +       }
  4625. +
  4626. +       if (rt2860_tx_data(sc, m, ni, qid) != 0)
  4627. +       {
  4628. +           RT2860_SOFTC_TX_RING_UNLOCK(&sc->tx_ring[qid]);
  4629. +
  4630. +           ieee80211_free_node(ni);
  4631. +
  4632. +           ifp->if_oerrors++;
  4633. +
  4634. +           break;
  4635. +       }
  4636. +
  4637. +       RT2860_SOFTC_TX_RING_UNLOCK(&sc->tx_ring[qid]);
  4638. +
  4639. +       rt2860_drain_fifo_stats(sc);
  4640. +
  4641. +       sc->sc_tx_timer = RT2860_TX_WATCHDOG_TIMEOUT;
  4642. +
  4643. +       callout_reset(&sc->tx_watchdog_ch, hz, rt2860_tx_watchdog, sc);
  4644. +   }
  4645. + }
  4646. +
  4647. + /*
  4648. +  * rt2860_ioctl
  4649. +  */
  4650. + static int rt2860_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
  4651. + {
  4652. +   struct rt2860_softc *sc;
  4653. +   struct ieee80211com *ic;
  4654. +   struct ifreq *ifr;
  4655. +   int error, startall;
  4656. +
  4657. +   sc = ifp->if_softc;
  4658. +   ic = ifp->if_l2com;
  4659. +   ifr = (struct ifreq *) data;
  4660. +
  4661. +   error = 0;
  4662. +
  4663. +   switch (cmd)
  4664. +   {
  4665. +       case SIOCSIFFLAGS:
  4666. +           startall = 0;
  4667. +
  4668. +           RT2860_SOFTC_LOCK(sc);
  4669. +
  4670. +           if (ifp->if_flags & IFF_UP)
  4671. +           {
  4672. +               if (ifp->if_drv_flags & IFF_DRV_RUNNING)
  4673. +               {
  4674. +                   if ((ifp->if_flags ^ sc->if_flags) & IFF_PROMISC)
  4675. +                       rt2860_asic_update_promisc(sc);
  4676. +               }
  4677. +               else
  4678. +               {
  4679. +                   rt2860_init_locked(sc);
  4680. +                   startall = 1;
  4681. +               }
  4682. +           }
  4683. +           else
  4684. +           {
  4685. +               if (ifp->if_drv_flags & IFF_DRV_RUNNING)
  4686. +                   rt2860_stop_locked(sc);
  4687. +           }
  4688. +
  4689. +           sc->if_flags = ifp->if_flags;
  4690. +
  4691. +           RT2860_SOFTC_UNLOCK(sc);
  4692. +
  4693. +           if (startall)
  4694. +               ieee80211_start_all(ic);
  4695. +       break;
  4696. +
  4697. +       case SIOCGIFMEDIA:
  4698. +       case SIOCSIFMEDIA:
  4699. +           error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
  4700. +       break;
  4701. +
  4702. +       case SIOCGIFADDR:
  4703. +           error = ether_ioctl(ifp, cmd, data);
  4704. +       break;
  4705. +
  4706. +       default:
  4707. +           error = EINVAL;
  4708. +       break;
  4709. +   }
  4710. +
  4711. +   return error;
  4712. + }
  4713. +
  4714. + /*
  4715. +  * rt2860_vap_create
  4716. +  */
  4717. + static struct ieee80211vap *rt2860_vap_create(struct ieee80211com *ic,
  4718. +   const char name[IFNAMSIZ], int unit, int opmode, int flags,
  4719. +   const uint8_t bssid[IEEE80211_ADDR_LEN],
  4720. +   const uint8_t mac[IEEE80211_ADDR_LEN])
  4721. + {
  4722. +   struct rt2860_softc *sc;
  4723. +   struct ifnet *ifp;
  4724. +   struct rt2860_softc_vap *rvap;
  4725. +   struct ieee80211vap *vap;
  4726. +
  4727. +   ifp = ic->ic_ifp;
  4728. +   sc = ifp->if_softc;
  4729. +
  4730. +   RT2860_DPRINTF(sc, RT2860_DEBUG_STATE,
  4731. +       "%s: VAP create: opmode=%s\n",
  4732. +       device_get_nameunit(sc->sc_dev),
  4733. +       ieee80211_opmode_name[opmode]);
  4734. +
  4735. +   switch (opmode)
  4736. +   {
  4737. +       case IEEE80211_M_IBSS:
  4738. +       case IEEE80211_M_STA:
  4739. +       case IEEE80211_M_AHDEMO:
  4740. +       case IEEE80211_M_HOSTAP:
  4741. +       case IEEE80211_M_MBSS:
  4742. +           if ((sc->napvaps + sc->nadhocvaps + sc->nstavaps) != 0)
  4743. +           {
  4744. +               if_printf(ifp, "only 1 VAP supported\n");
  4745. +               return NULL;
  4746. +           }
  4747. +      
  4748. +           if (opmode == IEEE80211_M_STA)
  4749. +               flags |= IEEE80211_CLONE_NOBEACONS;
  4750. +       break;
  4751. +
  4752. +       case IEEE80211_M_WDS:
  4753. +           if (sc->napvaps == 0)
  4754. +           {
  4755. +               if_printf(ifp, "WDS only supported in AP mode\n");
  4756. +               return NULL;
  4757. +           }
  4758. +       break;
  4759. +
  4760. +       case IEEE80211_M_MONITOR:
  4761. +       break;
  4762. +
  4763. +       default:
  4764. +           if_printf(ifp, "unknown opmode %d\n", opmode);
  4765. +           return NULL;
  4766. +   }
  4767. +
  4768. +   rvap = (struct rt2860_softc_vap *) malloc(sizeof(struct rt2860_softc_vap),
  4769. +       M_80211_VAP, M_NOWAIT | M_ZERO);
  4770. +   if (rvap == NULL)
  4771. +       return NULL;
  4772. +
  4773. +   vap = &rvap->vap;
  4774. +
  4775. +   ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
  4776. +
  4777. +   rvap->newstate = vap->iv_newstate;
  4778. +   vap->iv_newstate = rt2860_vap_newstate;
  4779. +
  4780. +   vap->iv_reset = rt2860_vap_reset;
  4781. +   vap->iv_key_update_begin = rt2860_vap_key_update_begin;
  4782. +   vap->iv_key_update_end = rt2860_vap_key_update_end;
  4783. +   vap->iv_key_set = rt2860_vap_key_set;
  4784. +   vap->iv_key_delete = rt2860_vap_key_delete;
  4785. +   vap->iv_update_beacon = rt2860_vap_update_beacon;
  4786. +
  4787. +   rt2860_amrr_init(&rvap->amrr, vap,
  4788. +       sc->ntxpath,
  4789. +       RT2860_AMRR_MIN_SUCCESS_THRESHOLD,
  4790. +       RT2860_AMRR_MAX_SUCCESS_THRESHOLD,
  4791. +       500);
  4792. +
  4793. +   vap->iv_max_aid = RT2860_SOFTC_STAID_COUNT;
  4794. +
  4795. +   /* overwrite default Rx A-MPDU factor */
  4796. +
  4797. +   vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_32K;
  4798. +   vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_NA;
  4799. +   vap->iv_ampdu_limit = vap->iv_ampdu_rxmax;
  4800. +
  4801. +   ieee80211_vap_attach(vap, rt2860_media_change, ieee80211_media_status);
  4802. +
  4803. +   switch (vap->iv_opmode)
  4804. +   {
  4805. +       case IEEE80211_M_HOSTAP:
  4806. +       case IEEE80211_M_MBSS:
  4807. +       case IEEE80211_M_AHDEMO:
  4808. +           sc->napvaps++;
  4809. +       break;
  4810. +
  4811. +       case IEEE80211_M_IBSS:
  4812. +           sc->nadhocvaps++;
  4813. +       break;
  4814. +
  4815. +       case IEEE80211_M_STA:
  4816. +           sc->nstavaps++;
  4817. +       break;
  4818. +
  4819. +       case IEEE80211_M_WDS:
  4820. +           sc->nwdsvaps++;
  4821. +       break;
  4822. +
  4823. +       default:
  4824. +       break;
  4825. +   }
  4826. +
  4827. +   sc->nvaps++;
  4828. +
  4829. +   if (sc->napvaps > 0)
  4830. +       ic->ic_opmode = IEEE80211_M_HOSTAP;
  4831. +   else if (sc->nadhocvaps > 0)
  4832. +       ic->ic_opmode = IEEE80211_M_IBSS;
  4833. +   else if (sc->nstavaps > 0)
  4834. +       ic->ic_opmode = IEEE80211_M_STA;
  4835. +   else
  4836. +       ic->ic_opmode = opmode;
  4837. +
  4838. +   return vap;
  4839. + }
  4840. +
  4841. + /*
  4842. +  * rt2860_vap_delete
  4843. +  */
  4844. + static void rt2860_vap_delete(struct ieee80211vap *vap)
  4845. + {
  4846. +   struct rt2860_softc *sc;
  4847. +   struct ieee80211com *ic;
  4848. +   struct ifnet *ifp;
  4849. +   struct rt2860_softc_vap *rvap;
  4850. +   enum ieee80211_opmode opmode;
  4851. +
  4852. +   ic = vap->iv_ic;
  4853. +   ifp = ic->ic_ifp;
  4854. +   sc = ifp->if_softc;
  4855. +   rvap = (struct rt2860_softc_vap *) vap;
  4856. +   opmode = vap->iv_opmode;
  4857. +
  4858. +   RT2860_DPRINTF(sc, RT2860_DEBUG_STATE,
  4859. +       "%s: VAP delete: opmode=%s\n",
  4860. +       device_get_nameunit(sc->sc_dev), ieee80211_opmode_name[opmode]);
  4861. +
  4862. +   rt2860_amrr_cleanup(&rvap->amrr);
  4863. +
  4864. +   ieee80211_vap_detach(vap);
  4865. +
  4866. +   if (rvap->beacon_mbuf != NULL)
  4867. +   {
  4868. +       m_free(rvap->beacon_mbuf);
  4869. +       rvap->beacon_mbuf = NULL;
  4870. +   }
  4871. +
  4872. +   switch (opmode)
  4873. +   {
  4874. +       case IEEE80211_M_HOSTAP:
  4875. +       case IEEE80211_M_MBSS:
  4876. +       case IEEE80211_M_AHDEMO:
  4877. +           sc->napvaps--;
  4878. +       break;
  4879. +
  4880. +       case IEEE80211_M_IBSS:
  4881. +           sc->nadhocvaps--;
  4882. +       break;
  4883. +
  4884. +       case IEEE80211_M_STA:
  4885. +           sc->nstavaps--;
  4886. +       break;
  4887. +
  4888. +       case IEEE80211_M_WDS:
  4889. +           sc->nwdsvaps--;
  4890. +       break;
  4891. +
  4892. +       default:
  4893. +       break;
  4894. +   }
  4895. +
  4896. +   sc->nvaps--;
  4897. +
  4898. +   if (sc->napvaps > 0)
  4899. +       ic->ic_opmode = IEEE80211_M_HOSTAP;
  4900. +   else if (sc->nadhocvaps > 0)
  4901. +       ic->ic_opmode = IEEE80211_M_IBSS;
  4902. +   else if (sc->nstavaps > 0)
  4903. +       ic->ic_opmode = IEEE80211_M_STA;
  4904. +
  4905. +   free(rvap, M_80211_VAP);
  4906. + }
  4907. +
  4908. + /*
  4909. +  * rt2860_reset_vap
  4910. +  */
  4911. + static int rt2860_vap_reset(struct ieee80211vap *vap, u_long cmd)
  4912. + {
  4913. +   struct rt2860_softc *sc;
  4914. +   struct ieee80211com *ic;
  4915. +   struct ifnet *ifp;
  4916. +   struct rt2860_softc_vap *rvap;
  4917. +   int error;
  4918. +
  4919. +   ic = vap->iv_ic;
  4920. +   ifp = ic->ic_ifp;
  4921. +   sc = ifp->if_softc;
  4922. +   rvap = (struct rt2860_softc_vap *) vap;
  4923. +
  4924. +   RT2860_DPRINTF(sc, RT2860_DEBUG_STATE,
  4925. +       "%s: VAP reset: cmd=%lu\n",
  4926. +       device_get_nameunit(sc->sc_dev), cmd);
  4927. +
  4928. +   error = 0;
  4929. +
  4930. +   switch (cmd)
  4931. +   {
  4932. +       case IEEE80211_IOC_RTSTHRESHOLD:
  4933. +       case IEEE80211_IOC_AMSDU:
  4934. +           rt2860_asic_update_rtsthreshold(sc);
  4935. +       break;
  4936. +
  4937. +       case IEEE80211_IOC_PROTMODE:
  4938. +       case IEEE80211_IOC_HTPROTMODE:
  4939. +           rt2860_asic_updateprot(sc);
  4940. +       break;
  4941. +
  4942. +       case IEEE80211_IOC_TXPOWER:
  4943. +           rt2860_asic_update_txpower(sc);
  4944. +       break;
  4945. +
  4946. +       case IEEE80211_IOC_BURST:
  4947. +           rt2860_asic_updateslot(sc);
  4948. +       break;
  4949. +
  4950. +       case IEEE80211_IOC_SHORTGI:
  4951. +       case IEEE80211_IOC_AMPDU_DENSITY:
  4952. +       case IEEE80211_IOC_SMPS:
  4953. +       break;
  4954. +
  4955. +       default:
  4956. +           error = ENETRESET;
  4957. +       break;
  4958. +   }
  4959. +
  4960. +   return error;
  4961. + }
  4962. +
  4963. + /*
  4964. +  * rt2860_vap_newstate
  4965. +  */
  4966. + static int rt2860_vap_newstate(struct ieee80211vap *vap,
  4967. +   enum ieee80211_state nstate, int arg)
  4968. + {
  4969. +   struct rt2860_softc *sc;
  4970. +   struct ieee80211com *ic;
  4971. +   struct ifnet *ifp;
  4972. +   struct rt2860_softc_vap *rvap;
  4973. +   struct ieee80211_node *ni;
  4974. +   enum ieee80211_state ostate;
  4975. +   int error;
  4976. +
  4977. +   ic = vap->iv_ic;
  4978. +   ifp = ic->ic_ifp;
  4979. +   sc = ifp->if_softc;
  4980. +   rvap = (struct rt2860_softc_vap *) vap;
  4981. +
  4982. +   ostate = vap->iv_state;
  4983. +
  4984. +   RT2860_DPRINTF(sc, RT2860_DEBUG_STATE,
  4985. +       "%s: VAP newstate: %s -> %s\n",
  4986. +       device_get_nameunit(sc->sc_dev),
  4987. +       ieee80211_state_name[ostate], ieee80211_state_name[nstate]);
  4988. +
  4989. +   error = rvap->newstate(vap, nstate, arg);
  4990. +   if (error != 0)
  4991. +       return error;
  4992. +
  4993. +   IEEE80211_UNLOCK(ic);
  4994. +
  4995. +   RT2860_SOFTC_LOCK(sc);
  4996. +
  4997. +   /* turn link LED off */
  4998. +
  4999. +   if (nstate != IEEE80211_S_RUN)
  5000. +       rt2860_led_cmd(sc, RT2860_LED_CMD_RADIO_OFF);
  5001. +
  5002. +   switch (nstate)
  5003. +   {
  5004. +       case IEEE80211_S_INIT:
  5005. +           rt2860_asic_disable_tsf_sync(sc);
  5006. +       break;
  5007. +
  5008. +       case IEEE80211_S_RUN:
  5009. +           ni = vap->iv_bss;
  5010. +
  5011. +           rt2860_rf_set_chan(sc, ni->ni_chan);
  5012. +
  5013. +           if (vap->iv_opmode != IEEE80211_M_MONITOR)
  5014. +           {
  5015. +               rt2860_asic_enable_mrr(sc);
  5016. +               rt2860_asic_set_txpreamble(sc);
  5017. +               rt2860_asic_set_basicrates(sc);
  5018. +               rt2860_asic_update_txpower(sc);
  5019. +               rt2860_asic_set_bssid(sc, ni->ni_bssid);
  5020. +           }
  5021. +
  5022. +           if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
  5023. +               vap->iv_opmode == IEEE80211_M_IBSS ||
  5024. +               vap->iv_opmode == IEEE80211_M_MBSS)
  5025. +           {
  5026. +               error = rt2860_beacon_alloc(sc, vap);
  5027. +               if (error != 0)
  5028. +                   break;
  5029. +
  5030. +               rt2860_asic_update_beacon(sc, vap);
  5031. +           }
  5032. +
  5033. +           if (vap->iv_opmode != IEEE80211_M_MONITOR)
  5034. +               rt2860_asic_enable_tsf_sync(sc);
  5035. +
  5036. +           /* turn link LED on */
  5037. +
  5038. +           if (vap->iv_opmode != IEEE80211_M_MONITOR)
  5039. +           {
  5040. +               rt2860_led_cmd(sc, RT2860_LED_CMD_RADIO_ON |
  5041. +                   (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan) ?
  5042. +                       RT2860_LED_CMD_LINK_2GHZ : RT2860_LED_CMD_LINK_5GHZ));
  5043. +           }
  5044. +       break;
  5045. +
  5046. +       case IEEE80211_S_SLEEP:
  5047. +       break;
  5048. +
  5049. +       default:
  5050. +       break;
  5051. +   }
  5052. +
  5053. +   RT2860_SOFTC_UNLOCK(sc);
  5054. +
  5055. +   IEEE80211_LOCK(ic);
  5056. +
  5057. +   return error;
  5058. + }
  5059. +
  5060. + /*
  5061. +  * rt2860_vap_key_update_begin
  5062. +  */
  5063. + static void rt2860_vap_key_update_begin(struct ieee80211vap *vap)
  5064. + {
  5065. +   struct rt2860_softc *sc;
  5066. +   struct ieee80211com *ic;
  5067. +   struct ifnet *ifp;
  5068. +
  5069. +   ic = vap->iv_ic;
  5070. +   ifp = ic->ic_ifp;
  5071. +   sc = ifp->if_softc;
  5072. +
  5073. +   RT2860_DPRINTF(sc, RT2860_DEBUG_KEY,
  5074. +       "%s: VAP key update begin\n",
  5075. +       device_get_nameunit(sc->sc_dev));
  5076. +
  5077. +   taskqueue_block(sc->taskqueue);
  5078. +
  5079. +   IF_LOCK(&ifp->if_snd);
  5080. + }
  5081. +
  5082. + /*
  5083. +  * rt2860_vap_key_update_end
  5084. +  */
  5085. + static void rt2860_vap_key_update_end(struct ieee80211vap *vap)
  5086. + {
  5087. +   struct rt2860_softc *sc;
  5088. +   struct ieee80211com *ic;
  5089. +   struct ifnet *ifp;
  5090. +
  5091. +   ic = vap->iv_ic;
  5092. +   ifp = ic->ic_ifp;
  5093. +   sc = ifp->if_softc;
  5094. +
  5095. +   RT2860_DPRINTF(sc, RT2860_DEBUG_KEY,
  5096. +       "%s: VAP key update end\n",
  5097. +       device_get_nameunit(sc->sc_dev));
  5098. +
  5099. +   IF_UNLOCK(&ifp->if_snd);
  5100. +
  5101. +   taskqueue_unblock(sc->taskqueue);
  5102. + }
  5103. +
  5104. + /*
  5105. +  * rt2860_vap_key_set
  5106. +  */
  5107. + static int rt2860_vap_key_set(struct ieee80211vap *vap,
  5108. +   const struct ieee80211_key *k, const uint8_t mac[IEEE80211_ADDR_LEN])
  5109. + {
  5110. +   struct rt2860_softc *sc;
  5111. +   struct ieee80211com *ic;
  5112. +   struct ifnet *ifp;
  5113. +   struct ieee80211_node *ni;
  5114. +   struct rt2860_softc_node *rni;
  5115. +   uint16_t key_base, keymode_base;
  5116. +   uint8_t mode, vapid, wcid, iv[8];
  5117. +   uint32_t tmp;
  5118. +
  5119. +   if (k->wk_cipher->ic_cipher != IEEE80211_CIPHER_WEP &&
  5120. +       k->wk_cipher->ic_cipher != IEEE80211_CIPHER_TKIP &&
  5121. +       k->wk_cipher->ic_cipher != IEEE80211_CIPHER_AES_CCM)
  5122. +       return 0;
  5123. +
  5124. +   ic = vap->iv_ic;
  5125. +   ifp = ic->ic_ifp;
  5126. +   sc = ifp->if_softc;
  5127. +
  5128. +   switch (k->wk_cipher->ic_cipher)
  5129. +   {
  5130. +       case IEEE80211_CIPHER_WEP:
  5131. +           if(k->wk_keylen < 8)
  5132. +               mode = RT2860_REG_CIPHER_MODE_WEP40;
  5133. +           else
  5134. +               mode = RT2860_REG_CIPHER_MODE_WEP104;
  5135. +       break;
  5136. +
  5137. +       case IEEE80211_CIPHER_TKIP:
  5138. +           mode = RT2860_REG_CIPHER_MODE_TKIP;
  5139. +       break;
  5140. +
  5141. +       case IEEE80211_CIPHER_AES_CCM:
  5142. +           mode = RT2860_REG_CIPHER_MODE_AES_CCMP;
  5143. +       break;
  5144. +
  5145. +       default:
  5146. +           return 0;
  5147. +   }
  5148. +
  5149. +   RT2860_DPRINTF(sc, RT2860_DEBUG_KEY,
  5150. +       "%s: VAP key set: keyix=%d, keylen=%d, macaddr=%s, mode=%d, group=%d\n",
  5151. +       device_get_nameunit(sc->sc_dev), k->wk_keyix, k->wk_keylen, ether_sprintf(k->wk_macaddr),
  5152. +       mode, (k->wk_flags & IEEE80211_KEY_GROUP) ? 1 : 0);
  5153. +
  5154. +   if (!(k->wk_flags & IEEE80211_KEY_GROUP))
  5155. +   {
  5156. +       /* install pairwise key */
  5157. +
  5158. +       ni = ieee80211_find_vap_node(&ic->ic_sta, vap, mac);
  5159. +       if (!ni) {
  5160. +           printf("ieee80211_find_vap_node return 0\n");
  5161. +           return 0;
  5162. +       }
  5163. +       rni = (struct rt2860_softc_node *) ni;
  5164. +
  5165. +       vapid = 0;
  5166. +       wcid = rni->staid;
  5167. +       key_base = RT2860_REG_PKEY(wcid);
  5168. +
  5169. +       ieee80211_free_node(ni);
  5170. +
  5171. +       if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP)
  5172. +       {
  5173. +           memset(iv, 0, 8);
  5174. +
  5175. +           iv[3] = (k->wk_keyix << 6);
  5176. +       }
  5177. +       else
  5178. +       {
  5179. +           if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP)
  5180. +           {
  5181. +               iv[0] = (k->wk_keytsc >> 8);
  5182. +               iv[1] = ((iv[0] | 0x20) & 0x7f);
  5183. +               iv[2] = k->wk_keytsc;
  5184. +           }
  5185. +           else
  5186. +           {
  5187. +               /* AES CCMP */
  5188. +
  5189. +               iv[0] = k->wk_keytsc;
  5190. +               iv[1] = k->wk_keytsc >> 8;
  5191. +               iv[2] = 0;
  5192. +           }
  5193. +
  5194. +           iv[3] = ((k->wk_keyix << 6) | IEEE80211_WEP_EXTIV);
  5195. +           iv[4] = (k->wk_keytsc >> 16);
  5196. +           iv[5] = (k->wk_keytsc >> 24);
  5197. +           iv[6] = (k->wk_keytsc >> 32);
  5198. +           iv[7] = (k->wk_keytsc >> 40);
  5199. +
  5200. +           RT2860_DPRINTF(sc, RT2860_DEBUG_KEY,
  5201. +               "%s: VAP key set: iv=%02x %02x %02x %02x %02x %02x %02x %02x\n",
  5202. +               device_get_nameunit(sc->sc_dev),
  5203. +               iv[0], iv[1], iv[2], iv[3], iv[4], iv[5], iv[6], iv[7]);
  5204. +       }
  5205. +
  5206. +       rt2860_io_mac_write_multi(sc, RT2860_REG_IVEIV(wcid), iv, 8);
  5207. +
  5208. +       if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP)
  5209. +       {
  5210. +           rt2860_io_mac_write_multi(sc, key_base, k->wk_key, 16);
  5211. +
  5212. +           if (vap->iv_opmode != IEEE80211_M_HOSTAP)
  5213. +           {
  5214. +               rt2860_io_mac_write_multi(sc, key_base + 16, &k->wk_key[16], 8);
  5215. +               rt2860_io_mac_write_multi(sc, key_base + 24, &k->wk_key[24], 8);
  5216. +           }
  5217. +           else
  5218. +           {
  5219. +               rt2860_io_mac_write_multi(sc, key_base + 16, &k->wk_key[24], 8);
  5220. +               rt2860_io_mac_write_multi(sc, key_base + 24, &k->wk_key[16], 8);
  5221. +           }
  5222. +       }
  5223. +       else
  5224. +       {
  5225. +           rt2860_io_mac_write_multi(sc, key_base, k->wk_key, k->wk_keylen);
  5226. +       }
  5227. +
  5228. +       tmp = ((vapid & RT2860_REG_VAP_MASK) << RT2860_REG_VAP_SHIFT) |
  5229. +           (mode << RT2860_REG_CIPHER_MODE_SHIFT) | RT2860_REG_PKEY_ENABLE;
  5230. +
  5231. +       rt2860_io_mac_write(sc, RT2860_REG_WCID_ATTR(wcid), tmp);
  5232. +   }
  5233. +
  5234. +   if ((k->wk_flags & IEEE80211_KEY_GROUP) ||
  5235. +       (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP))
  5236. +   {
  5237. +       /* install group key */
  5238. +
  5239. +       vapid = 0;
  5240. +       wcid = RT2860_WCID_MCAST;
  5241. +       key_base = RT2860_REG_SKEY(vapid, k->wk_keyix);
  5242. +       keymode_base = RT2860_REG_SKEY_MODE(vapid);
  5243. +
  5244. +       if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP)
  5245. +       {
  5246. +           rt2860_io_mac_write_multi(sc, key_base, k->wk_key, 16);
  5247. +
  5248. +           if (vap->iv_opmode != IEEE80211_M_HOSTAP)
  5249. +           {
  5250. +               rt2860_io_mac_write_multi(sc, key_base + 16, &k->wk_key[16], 8);
  5251. +               rt2860_io_mac_write_multi(sc, key_base + 24, &k->wk_key[24], 8);
  5252. +           }
  5253. +           else
  5254. +           {
  5255. +               rt2860_io_mac_write_multi(sc, key_base + 16, &k->wk_key[24], 8);
  5256. +               rt2860_io_mac_write_multi(sc, key_base + 24, &k->wk_key[16], 8);
  5257. +           }
  5258. +       }
  5259. +       else
  5260. +       {
  5261. +           rt2860_io_mac_write_multi(sc, key_base, k->wk_key, k->wk_keylen);
  5262. +       }
  5263. +
  5264. +       tmp = rt2860_io_mac_read(sc, keymode_base);
  5265. +
  5266. +       tmp &= ~(0xf << (k->wk_keyix * 4 + 16 * (vapid % 2)));
  5267. +       tmp |= (mode << (k->wk_keyix * 4 + 16 * (vapid % 2)));
  5268. +
  5269. +       rt2860_io_mac_write(sc, keymode_base, tmp);
  5270. +
  5271. +       if (vap->iv_opmode == IEEE80211_M_HOSTAP)
  5272. +       {
  5273. +           if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_WEP)
  5274. +           {
  5275. +               memset(iv, 0, 8);
  5276. +
  5277. +               iv[3] = (k->wk_keyix << 6);
  5278. +           }
  5279. +           else
  5280. +           {
  5281. +               if (k->wk_cipher->ic_cipher == IEEE80211_CIPHER_TKIP)
  5282. +               {
  5283. +                   iv[0] = (k->wk_keytsc >> 8);
  5284. +                   iv[1] = ((iv[0] | 0x20) & 0x7f);
  5285. +                   iv[2] = k->wk_keytsc;
  5286. +               }
  5287. +               else
  5288. +               {
  5289. +                   /* AES CCMP */
  5290. +
  5291. +                   iv[0] = k->wk_keytsc;
  5292. +                   iv[1] = k->wk_keytsc >> 8;
  5293. +                   iv[2] = 0;
  5294. +               }
  5295. +
  5296. +               iv[3] = ((k->wk_keyix << 6) | IEEE80211_WEP_EXTIV);
  5297. +               iv[4] = (k->wk_keytsc >> 16);
  5298. +               iv[5] = (k->wk_keytsc >> 24);
  5299. +               iv[6] = (k->wk_keytsc >> 32);
  5300. +               iv[7] = (k->wk_keytsc >> 40);
  5301. +
  5302. +               RT2860_DPRINTF(sc, RT2860_DEBUG_KEY,
  5303. +                   "%s: VAP key set: iv=%02x %02x %02x %02x %02x %02x %02x %02x\n",
  5304. +                   device_get_nameunit(sc->sc_dev),
  5305. +                   iv[0], iv[1], iv[2], iv[3], iv[4], iv[5], iv[6], iv[7]);
  5306. +           }
  5307. +
  5308. +           rt2860_io_mac_write_multi(sc, RT2860_REG_IVEIV(wcid), iv, 8);
  5309. +
  5310. +           tmp = ((vapid & RT2860_REG_VAP_MASK) << RT2860_REG_VAP_SHIFT) |
  5311. +               (mode << RT2860_REG_CIPHER_MODE_SHIFT);
  5312. +
  5313. +           rt2860_io_mac_write(sc, RT2860_REG_WCID_ATTR(wcid), tmp);
  5314. +       }
  5315. +   }
  5316. +
  5317. +   return 1;
  5318. + }
  5319. +
  5320. + /*
  5321. +  * rt2860_vap_key_delete
  5322. +  */
  5323. + static int rt2860_vap_key_delete(struct ieee80211vap *vap,
  5324. +   const struct ieee80211_key *k)
  5325. + {
  5326. +   struct rt2860_softc *sc;
  5327. +   struct ieee80211com *ic;
  5328. +   struct ifnet *ifp;
  5329. +   uint8_t vapid, wcid;
  5330. +   uint32_t tmp;
  5331. +
  5332. +   ic = vap->iv_ic;
  5333. +   ifp = ic->ic_ifp;
  5334. +   sc = ifp->if_softc;
  5335. +
  5336. +   RT2860_DPRINTF(sc, RT2860_DEBUG_KEY,
  5337. +       "%s: VAP key delete: keyix=%d, keylen=%d, macaddr=%s, group=%d\n",
  5338. +       device_get_nameunit(sc->sc_dev), k->wk_keyix, k->wk_keylen, ether_sprintf(k->wk_macaddr),
  5339. +       (k->wk_flags & IEEE80211_KEY_GROUP) ? 1 : 0);
  5340. +
  5341. +   if (k->wk_flags & IEEE80211_KEY_GROUP)
  5342. +   {
  5343. +       /* remove group key */
  5344. +
  5345. +       vapid = 0;
  5346. +       wcid = RT2860_WCID_MCAST;
  5347. +
  5348. +       tmp = rt2860_io_mac_read(sc, RT2860_REG_SKEY_MODE(vapid));
  5349. +
  5350. +       tmp &= ~(0xf << (k->wk_keyix * 4 + 16 * (vapid % 2)));
  5351. +       tmp |= (RT2860_REG_CIPHER_MODE_NONE << (k->wk_keyix * 4 + 16 * (vapid % 2)));
  5352. +
  5353. +       rt2860_io_mac_write(sc, RT2860_REG_SKEY_MODE(vapid), tmp);
  5354. +
  5355. +       if (vap->iv_opmode == IEEE80211_M_HOSTAP)
  5356. +       {
  5357. +           tmp = ((vapid & RT2860_REG_VAP_MASK) << RT2860_REG_VAP_SHIFT) |
  5358. +               (RT2860_REG_CIPHER_MODE_NONE << RT2860_REG_CIPHER_MODE_SHIFT) | RT2860_REG_PKEY_ENABLE;
  5359. +
  5360. +           rt2860_io_mac_write(sc, RT2860_REG_WCID_ATTR(wcid), tmp);
  5361. +       }
  5362. +   }
  5363. +
  5364. +   return 1;
  5365. + }
  5366. +
  5367. + /*
  5368. +  * rt2860_vap_update_beacon
  5369. +  */
  5370. + static void rt2860_vap_update_beacon(struct ieee80211vap *vap, int what)
  5371. + {
  5372. +   struct rt2860_softc *sc;
  5373. +   struct ieee80211com *ic;
  5374. +   struct ifnet *ifp;
  5375. +   struct rt2860_softc_vap *rvap;
  5376. +   struct mbuf *m;
  5377. +   struct ieee80211_beacon_offsets *bo;
  5378. +   int error;
  5379. +
  5380. +   ic = vap->iv_ic;
  5381. +   ifp = ic->ic_ifp;
  5382. +   sc = ifp->if_softc;
  5383. +   rvap = (struct rt2860_softc_vap *) vap;
  5384. +   m = rvap->beacon_mbuf;
  5385. +   bo = &rvap->beacon_offsets;
  5386. +
  5387. +   RT2860_DPRINTF(sc, RT2860_DEBUG_BEACON,
  5388. +       "%s: VAP update beacon: what=%d\n",
  5389. +       device_get_nameunit(sc->sc_dev), what);
  5390. +
  5391. +   setbit(bo->bo_flags, what);
  5392. +
  5393. +   if (m == NULL)
  5394. +   {
  5395. +       error = rt2860_beacon_alloc(sc, vap);
  5396. +       if (error != 0)
  5397. +           return;
  5398. +
  5399. +       m = rvap->beacon_mbuf;
  5400. +   }
  5401. +
  5402. +   ieee80211_beacon_update(vap->iv_bss, bo, m, 0);
  5403. +
  5404. +   rt2860_asic_update_beacon(sc, vap);
  5405. + }
  5406. +
  5407. + /*
  5408. +  * rt2860_media_change
  5409. +  */
  5410. + static int rt2860_media_change(struct ifnet *ifp)
  5411. + {
  5412. +   int error;
  5413. +
  5414. +   error = ieee80211_media_change(ifp);
  5415. +
  5416. +   return (error == ENETRESET ? 0 : error);
  5417. + }
  5418. +
  5419. + /*
  5420. +  * rt2860_node_alloc
  5421. +  */
  5422. + static struct ieee80211_node *rt2860_node_alloc(struct ieee80211vap *vap,
  5423. +   const uint8_t mac[IEEE80211_ADDR_LEN])
  5424. + {
  5425. +   return malloc(sizeof(struct rt2860_softc_node),
  5426. +       M_80211_NODE, M_NOWAIT | M_ZERO);
  5427. + }
  5428. +
  5429. + /*
  5430. +  * rt2860_node_cleanup
  5431. +  */
  5432. + static void rt2860_node_cleanup(struct ieee80211_node *ni)
  5433. + {
  5434. +   struct rt2860_softc *sc;
  5435. +   struct ieee80211com *ic;
  5436. +   struct ifnet *ifp;
  5437. +   struct rt2860_softc_node *rni;
  5438. +   uint8_t vapid, wcid;
  5439. +   uint32_t tmp;
  5440. +
  5441. +   ic = ni->ni_ic;
  5442. +   ifp = ic->ic_ifp;
  5443. +   sc = ifp->if_softc;
  5444. +   rni = (struct rt2860_softc_node *) ni;
  5445. +
  5446. +   RT2860_DPRINTF(sc, RT2860_DEBUG_NODE,
  5447. +       "%s: node cleanup: macaddr=%s, associd=0x%04x, staid=0x%02x\n",
  5448. +       device_get_nameunit(sc->sc_dev), ether_sprintf(ni->ni_macaddr),
  5449. +       ni->ni_associd, rni->staid);
  5450. +
  5451. +   if (rni->staid != 0)
  5452. +   {
  5453. +       vapid = 0;
  5454. +       wcid = rni->staid;
  5455. +
  5456. +       tmp = ((vapid & RT2860_REG_VAP_MASK) << RT2860_REG_VAP_SHIFT) |
  5457. +           (RT2860_REG_CIPHER_MODE_NONE << RT2860_REG_CIPHER_MODE_SHIFT) | RT2860_REG_PKEY_ENABLE;
  5458. +
  5459. +       rt2860_io_mac_write(sc, RT2860_REG_WCID_ATTR(wcid), tmp);
  5460. +
  5461. +       rt2860_io_mac_write(sc, RT2860_REG_WCID(wcid), 0x00000000);
  5462. +       rt2860_io_mac_write(sc, RT2860_REG_WCID(wcid) + 4, 0x00000000);
  5463. +
  5464. +       rt2860_staid_delete(sc, rni->staid);
  5465. +
  5466. +       rni->staid = 0;
  5467. +   }
  5468. +
  5469. +   sc->node_cleanup(ni);
  5470. + }
  5471. +
  5472. + /*
  5473. +  * rt2860_node_getmimoinfo
  5474. +  */
  5475. + static void rt2860_node_getmimoinfo(const struct ieee80211_node *ni,
  5476. +   struct ieee80211_mimo_info *mi)
  5477. + {
  5478. +   const struct rt2860_softc_node *rni;
  5479. +   int i;
  5480. +
  5481. +   rni = (const struct rt2860_softc_node *) ni;
  5482. +
  5483. +   for (i = 0; i < RT2860_SOFTC_RSSI_COUNT; i++)
  5484. +   {
  5485. +       mi->rssi[i] = rni->last_rssi_dbm[i];
  5486. +       mi->noise[i] = RT2860_NOISE_FLOOR;
  5487. +   }
  5488. + }
  5489. +
  5490. + /*
  5491. +  * rt2860_setregdomain
  5492. +  */
  5493. + static int rt2860_setregdomain(struct ieee80211com *ic,
  5494. +   struct ieee80211_regdomain *reg,
  5495. +   int nchans, struct ieee80211_channel chans[])
  5496. + {
  5497. +   struct rt2860_softc *sc;
  5498. +   struct ifnet *ifp;
  5499. +
  5500. +   ifp = ic->ic_ifp;
  5501. +   sc = ifp->if_softc;
  5502. +
  5503. +   RT2860_DPRINTF(sc, RT2860_DEBUG_STATE,
  5504. +       "%s: set regulatory domain: country=%d, country code string=%c%c, location=%c\n",
  5505. +       device_get_nameunit(sc->sc_dev),
  5506. +       reg->country, reg->isocc[0], reg->isocc[1], reg->location);
  5507. +
  5508. +   return 0;
  5509. + }
  5510. +
  5511. + /*
  5512. +  * rt2860_getradiocaps
  5513. +  */
  5514. + static void rt2860_getradiocaps(struct ieee80211com *ic,
  5515. +   int maxchans, int *nchans, struct ieee80211_channel chans[])
  5516. + {
  5517. +   *nchans = (ic->ic_nchans >= maxchans) ? maxchans : ic->ic_nchans;
  5518. +
  5519. +   memcpy(chans, ic->ic_channels, (*nchans) * sizeof(struct ieee80211_channel));
  5520. + }
  5521. +
  5522. + /*
  5523. +  * rt2860_scan_start
  5524. +  */
  5525. + static void rt2860_scan_start(struct ieee80211com *ic)
  5526. + {
  5527. +   struct rt2860_softc *sc;
  5528. +   struct ifnet *ifp;
  5529. +
  5530. +   ifp = ic->ic_ifp;
  5531. +   sc = ifp->if_softc;
  5532. +
  5533. +   rt2860_asic_disable_tsf_sync(sc);
  5534. + }
  5535. +
  5536. + /*
  5537. +  * rt2860_scan_end
  5538. +  */
  5539. + static void rt2860_scan_end(struct ieee80211com *ic)
  5540. + {
  5541. +   struct rt2860_softc *sc;
  5542. +   struct ifnet *ifp;
  5543. +
  5544. +   ifp = ic->ic_ifp;
  5545. +   sc = ifp->if_softc;
  5546. +
  5547. +   rt2860_asic_enable_tsf_sync(sc);
  5548. + }
  5549. +
  5550. + /*
  5551. +  * rt2860_set_channel
  5552. +  */
  5553. + static void rt2860_set_channel(struct ieee80211com *ic)
  5554. + {
  5555. +   struct rt2860_softc *sc;
  5556. +   struct ifnet *ifp;
  5557. +
  5558. +   ifp = ic->ic_ifp;
  5559. +   sc = ifp->if_softc;
  5560. +
  5561. +   RT2860_DPRINTF(sc, RT2860_DEBUG_CHAN,
  5562. +       "%s: set channel: channel=%u, HT%s%s\n",
  5563. +       device_get_nameunit(sc->sc_dev),
  5564. +       ieee80211_chan2ieee(ic, ic->ic_curchan),
  5565. +       !IEEE80211_IS_CHAN_HT(ic->ic_curchan) ? " disabled" :
  5566. +           IEEE80211_IS_CHAN_HT20(ic->ic_curchan) ? "20":
  5567. +               IEEE80211_IS_CHAN_HT40U(ic->ic_curchan) ? "40U" : "40D",
  5568. +       (ic->ic_flags & IEEE80211_F_SCAN) ? ", scanning" : "");
  5569. +
  5570. +   RT2860_SOFTC_LOCK(sc);
  5571. +
  5572. +   rt2860_rf_set_chan(sc, ic->ic_curchan);
  5573. +
  5574. +   RT2860_SOFTC_UNLOCK(sc);
  5575. + }
  5576. +
  5577. + /*
  5578. +  * rt2860_newassoc
  5579. +  */
  5580. + static void rt2860_newassoc(struct ieee80211_node *ni, int isnew)
  5581. + {
  5582. +   struct rt2860_softc *sc;
  5583. +   struct ieee80211com *ic;
  5584. +   struct ifnet *ifp;
  5585. +   struct ieee80211vap *vap;
  5586. +   struct rt2860_softc_vap *rvap;
  5587. +   struct rt2860_softc_node *rni;
  5588. +   uint16_t aid;
  5589. +   uint8_t wcid;
  5590. +   uint32_t tmp;
  5591. +
  5592. +   vap = ni->ni_vap;
  5593. +   ic = vap->iv_ic;
  5594. +   ifp = ic->ic_ifp;
  5595. +   sc = ifp->if_softc;
  5596. +   rvap = (struct rt2860_softc_vap *) vap;
  5597. +   rni = (struct rt2860_softc_node *) ni;
  5598. +
  5599. +   if (isnew)
  5600. +   {
  5601. +       aid = IEEE80211_AID(ni->ni_associd);
  5602. +       rni->staid = rt2860_staid_alloc(sc, aid);
  5603. +       wcid = rni->staid;
  5604. +
  5605. +       tmp = (ni->ni_macaddr[3] << 24) |
  5606. +           (ni->ni_macaddr[2] << 16) |
  5607. +           (ni->ni_macaddr[1] << 8) |
  5608. +           ni->ni_macaddr[0];
  5609. +
  5610. +       rt2860_io_mac_write(sc, RT2860_REG_WCID(wcid), tmp);
  5611. +
  5612. +       tmp = (ni->ni_macaddr[5] << 8) |
  5613. +           ni->ni_macaddr[4];
  5614. +
  5615. +       rt2860_io_mac_write(sc, RT2860_REG_WCID(wcid) + 4, tmp);
  5616. +
  5617. +       rt2860_amrr_node_init(&rvap->amrr, &sc->amrr_node[wcid], ni);
  5618. +
  5619. +       RT2860_DPRINTF(sc, RT2860_DEBUG_RATE,
  5620. +           "%s: initial%s node Tx rate: associd=0x%04x, rate=0x%02x, max rate=0x%02x\n",
  5621. +           device_get_nameunit(sc->sc_dev),
  5622. +           (ni->ni_flags & IEEE80211_NODE_HT) ? " HT" : "",
  5623. +           ni->ni_associd, ni->ni_txrate,
  5624. +           (ni->ni_flags & IEEE80211_NODE_HT) ?
  5625. +               (ni->ni_htrates.rs_rates[ni->ni_htrates.rs_nrates - 1] | IEEE80211_RATE_MCS) :
  5626. +               (ni->ni_rates.rs_rates[ni->ni_rates.rs_nrates - 1] & IEEE80211_RATE_VAL));
  5627. +
  5628. +       rt2860_asic_updateprot(sc);
  5629. +       rt2860_asic_updateslot(sc);
  5630. +       rt2860_asic_set_txpreamble(sc);
  5631. +   }
  5632. +
  5633. +   RT2860_DPRINTF(sc, RT2860_DEBUG_NODE,
  5634. +       "%s: new association: isnew=%d, macaddr=%s, associd=0x%04x, staid=0x%02x, QoS %s, ERP %s, HT %s\n",
  5635. +       device_get_nameunit(sc->sc_dev), isnew, ether_sprintf(ni->ni_macaddr),
  5636. +       ni->ni_associd, rni->staid,
  5637. +       (ni->ni_flags & IEEE80211_NODE_QOS) ? "enabled" : "disabled",
  5638. +       (ni->ni_flags & IEEE80211_NODE_ERP) ? "enabled" : "disabled",
  5639. +       (ni->ni_flags & IEEE80211_NODE_HT) ? "enabled" : "disabled");
  5640. + }
  5641. +
  5642. + /*
  5643. +  * rt2860_updateslot
  5644. +  */
  5645. + static void rt2860_updateslot(struct ifnet *ifp)
  5646. + {
  5647. +   struct rt2860_softc *sc;
  5648. +
  5649. +   sc = ifp->if_softc;
  5650. +
  5651. +   rt2860_asic_updateslot(sc);
  5652. + }
  5653. +
  5654. + /*
  5655. +  * rt2860_update_promisc
  5656. +  */
  5657. + static void rt2860_update_promisc(struct ifnet *ifp)
  5658. + {
  5659. +   struct rt2860_softc *sc;
  5660. +
  5661. +   sc = ifp->if_softc;
  5662. +
  5663. +   rt2860_asic_update_promisc(sc);
  5664. + }
  5665. +
  5666. + /*
  5667. +  * rt2860_update_mcast
  5668. +  */
  5669. + static void rt2860_update_mcast(struct ifnet *ifp)
  5670. + {
  5671. +   struct rt2860_softc *sc;
  5672. +
  5673. +   sc = ifp->if_softc;
  5674. + }
  5675. +
  5676. + /*
  5677. +  * rt2860_wme_update
  5678. +  */
  5679. + static int rt2860_wme_update(struct ieee80211com *ic)
  5680. + {
  5681. +   struct rt2860_softc *sc;
  5682. +   struct ifnet *ifp;
  5683. +
  5684. +   ifp = ic->ic_ifp;
  5685. +   sc = ifp->if_softc;
  5686. +
  5687. +   rt2860_asic_wme_update(sc);
  5688. +
  5689. +   return 0;
  5690. + }
  5691. +
  5692. + /*
  5693. +  * rt2860_raw_xmit
  5694. +  */
  5695. + static int rt2860_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
  5696. +   const struct ieee80211_bpf_params *params)
  5697. + {
  5698. +   struct rt2860_softc *sc;
  5699. +   struct ieee80211com *ic;
  5700. +   struct ifnet *ifp;
  5701. +
  5702. +   ic = ni->ni_ic;
  5703. +   ifp = ic->ic_ifp;
  5704. +   sc = ifp->if_softc;
  5705. +
  5706. +   if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
  5707. +   {
  5708. +       m_freem(m);
  5709. +       ieee80211_free_node(ni);
  5710. +
  5711. +       return ENETDOWN;
  5712. +   }
  5713. +
  5714. +   RT2860_SOFTC_TX_RING_LOCK(&sc->tx_ring[sc->tx_ring_mgtqid]);
  5715. +
  5716. +   if (sc->tx_ring[sc->tx_ring_mgtqid].data_queued >= RT2860_SOFTC_TX_RING_DATA_COUNT)
  5717. +   {
  5718. +       RT2860_SOFTC_TX_RING_UNLOCK(&sc->tx_ring[sc->tx_ring_mgtqid]);
  5719. +
  5720. +       RT2860_DPRINTF(sc, RT2860_DEBUG_TX,
  5721. +           "%s: raw xmit: Tx ring with qid=%d is full\n",
  5722. +           device_get_nameunit(sc->sc_dev), sc->tx_ring_mgtqid);
  5723. +
  5724. +       ifp->if_drv_flags |= IFF_DRV_OACTIVE;
  5725. +
  5726. +       m_freem(m);
  5727. +       ieee80211_free_node(ni);
  5728. +
  5729. +       sc->tx_data_queue_full[sc->tx_ring_mgtqid]++;
  5730. +
  5731. +       return ENOBUFS;
  5732. +   }
  5733. +
  5734. +   if (rt2860_tx_mgmt(sc, m, ni, sc->tx_ring_mgtqid) != 0)
  5735. +   {
  5736. +       RT2860_SOFTC_TX_RING_UNLOCK(&sc->tx_ring[sc->tx_ring_mgtqid]);
  5737. +
  5738. +       ifp->if_oerrors++;
  5739. +
  5740. +       ieee80211_free_node(ni);
  5741. +
  5742. +       return EIO;
  5743. +   }
  5744. +
  5745. +   RT2860_SOFTC_TX_RING_UNLOCK(&sc->tx_ring[sc->tx_ring_mgtqid]);
  5746. +
  5747. +   sc->sc_tx_timer = RT2860_TX_WATCHDOG_TIMEOUT;
  5748. +
  5749. +   return 0;
  5750. + }
  5751. +
  5752. + /*
  5753. +  * rt2860_recv_action
  5754. +  */
  5755. + static int rt2860_recv_action(struct ieee80211_node *ni,
  5756. +   const struct ieee80211_frame *wh,
  5757. +   const uint8_t *frm, const uint8_t *efrm)
  5758. + {
  5759. +   struct rt2860_softc *sc;
  5760. +   struct ieee80211com *ic;
  5761. +   struct ifnet *ifp;
  5762. +   struct rt2860_softc_node *rni;
  5763. +   const struct ieee80211_action *ia;
  5764. +   uint16_t baparamset;
  5765. +   uint8_t wcid;
  5766. +   int tid;
  5767. +
  5768. +   ic = ni->ni_ic;
  5769. +   ifp = ic->ic_ifp;
  5770. +   sc = ifp->if_softc;
  5771. +   rni = (struct rt2860_softc_node *) ni;
  5772. +
  5773. +   ia = (const struct ieee80211_action *) frm;
  5774. +
  5775. +   if (ia->ia_category == IEEE80211_ACTION_CAT_BA)
  5776. +   {
  5777. +       switch (ia->ia_action)
  5778. +       {
  5779. +           /* IEEE80211_ACTION_BA_DELBA */
  5780. +           case IEEE80211_ACTION_BA_DELBA:
  5781. +               baparamset = LE_READ_2(frm + 2);
  5782. +               tid = RT2860_MS(baparamset, IEEE80211_BAPS_TID);
  5783. +               wcid = rni->staid;
  5784. +
  5785. +               RT2860_DPRINTF(sc, RT2860_DEBUG_BA,
  5786. +                   "%s: received DELBA request: associd=0x%04x, staid=0x%02x, tid=%d\n",
  5787. +                   device_get_nameunit(sc->sc_dev), ni->ni_associd, rni->staid, tid);
  5788. +
  5789. +               if (rni->staid != 0)
  5790. +                   rt2860_asic_del_ba_session(sc, wcid, tid);
  5791. +           break;
  5792. +       }
  5793. +   }
  5794. +
  5795. +   return sc->recv_action(ni, wh, frm, efrm);
  5796. + }
  5797. +
  5798. + /*
  5799. +  * rt2860_send_action
  5800. +  */
  5801. + static int rt2860_send_action(struct ieee80211_node *ni,
  5802. +   int cat, int act, void *sa)
  5803. + {
  5804. +   struct rt2860_softc *sc;
  5805. +   struct ieee80211com *ic;
  5806. +   struct ifnet *ifp;
  5807. +   struct rt2860_softc_node *rni;
  5808. +   uint16_t *args, status, baparamset;
  5809. +   uint8_t wcid;
  5810. +   int tid, bufsize;
  5811. +
  5812. +   ic = ni->ni_ic;
  5813. +   ifp = ic->ic_ifp;
  5814. +   sc = ifp->if_softc;
  5815. +   rni = (struct rt2860_softc_node *) ni;
  5816. +
  5817. +   wcid = rni->staid;
  5818. +   args = sa;
  5819. +
  5820. +   if (cat == IEEE80211_ACTION_CAT_BA)
  5821. +   {
  5822. +       switch (act)
  5823. +       {
  5824. +           /* IEEE80211_ACTION_BA_ADDBA_RESPONSE */
  5825. +           case IEEE80211_ACTION_BA_ADDBA_RESPONSE:
  5826. +               status = args[1];
  5827. +               baparamset = args[2];
  5828. +               tid = RT2860_MS(baparamset, IEEE80211_BAPS_TID);
  5829. +               bufsize = RT2860_MS(baparamset, IEEE80211_BAPS_BUFSIZ);
  5830. +
  5831. +               RT2860_DPRINTF(sc, RT2860_DEBUG_BA,
  5832. +                   "%s: sending ADDBA response: associd=0x%04x, staid=0x%02x, status=%d, tid=%d, bufsize=%d\n",
  5833. +                   device_get_nameunit(sc->sc_dev), ni->ni_associd, rni->staid, status, tid, bufsize);
  5834. +
  5835. +               if (status == IEEE80211_STATUS_SUCCESS)
  5836. +                   rt2860_asic_add_ba_session(sc, wcid, tid);
  5837. +           break;
  5838. +
  5839. +           /* IEEE80211_ACTION_BA_DELBA */
  5840. +           case IEEE80211_ACTION_BA_DELBA:
  5841. +               baparamset = RT2860_SM(args[0], IEEE80211_DELBAPS_TID) | args[1];
  5842. +               tid = RT2860_MS(baparamset, IEEE80211_DELBAPS_TID);
  5843. +
  5844. +               RT2860_DPRINTF(sc, RT2860_DEBUG_BA,
  5845. +                   "%s: sending DELBA request: associd=0x%04x, staid=0x%02x, tid=%d\n",
  5846. +                   device_get_nameunit(sc->sc_dev), ni->ni_associd, rni->staid, tid);
  5847. +
  5848. +               if (RT2860_MS(baparamset, IEEE80211_DELBAPS_INIT) != IEEE80211_DELBAPS_INIT)
  5849. +                   rt2860_asic_del_ba_session(sc, wcid, tid);
  5850. +           break;
  5851. +       }
  5852. +   }
  5853. +
  5854. +   return sc->send_action(ni, cat, act, sa);
  5855. + }
  5856. +
  5857. + /*
  5858. +  * rt2860_addba_response
  5859. +  */
  5860. + static int rt2860_addba_response(struct ieee80211_node *ni,
  5861. +   struct ieee80211_tx_ampdu *tap,
  5862. +   int status, int baparamset, int batimeout)
  5863. + {
  5864. +   struct rt2860_softc *sc;
  5865. +   struct ieee80211com *ic;
  5866. +   struct ifnet *ifp;
  5867. +   struct rt2860_softc_node *rni;
  5868. +   ieee80211_seq seqno;
  5869. +   int ret, tid, old_bufsize, new_bufsize;
  5870. +
  5871. +   ic = ni->ni_ic;
  5872. +   ifp = ic->ic_ifp;
  5873. +   sc = ifp->if_softc;
  5874. +   rni = (struct rt2860_softc_node *) ni;
  5875. +
  5876. +   tid = RT2860_MS(baparamset, IEEE80211_BAPS_TID);
  5877. +   old_bufsize = RT2860_MS(baparamset, IEEE80211_BAPS_BUFSIZ);
  5878. +   new_bufsize = old_bufsize;
  5879. +
  5880. +   if (status == IEEE80211_STATUS_SUCCESS)
  5881. +   {
  5882. +       if (sc->mac_rev >= 0x28830300)
  5883. +       {
  5884. +           if (sc->mac_rev >= 0x30700200)
  5885. +               new_bufsize = 13;
  5886. +           else
  5887. +               new_bufsize = 31;
  5888. +       }
  5889. +       else if (sc->mac_rev >= 0x28720200)
  5890. +       {
  5891. +           new_bufsize = 13;
  5892. +       }
  5893. +       else
  5894. +       {
  5895. +           new_bufsize = 7;
  5896. +       }
  5897. +
  5898. +       if (old_bufsize > new_bufsize)
  5899. +       {
  5900. +           baparamset &= ~IEEE80211_BAPS_BUFSIZ;
  5901. +           baparamset = RT2860_SM(new_bufsize, IEEE80211_BAPS_BUFSIZ);
  5902. +       }
  5903. +
  5904. +       if (!(tap->txa_flags & IEEE80211_AGGR_RUNNING))
  5905. +       {
  5906. +           sc->tx_ampdu_sessions++;
  5907. +
  5908. +           if (sc->tx_ampdu_sessions == 1)
  5909. +               rt2860_asic_updateprot(sc);
  5910. +       }
  5911. +   }
  5912. +
  5913. +   RT2860_DPRINTF(sc, RT2860_DEBUG_BA,
  5914. +       "%s: received ADDBA response: associd=0x%04x, staid=0x%02x, status=%d, tid=%d, "
  5915. +       "old bufsize=%d, new bufsize=%d\n",
  5916. +       device_get_nameunit(sc->sc_dev), ni->ni_associd, rni->staid, status, tid,
  5917. +       old_bufsize, new_bufsize);
  5918. +
  5919. +   ret = sc->addba_response(ni, tap, status, baparamset, batimeout);
  5920. +
  5921. +   if (status == IEEE80211_STATUS_SUCCESS)
  5922. +   {
  5923. +       seqno = ni->ni_txseqs[tid];
  5924. +
  5925. +       rt2860_send_bar(ni, tap, seqno);
  5926. +   }
  5927. +
  5928. +   return ret;
  5929. + }
  5930. +
  5931. + /*
  5932. +  * rt2860_addba_stop
  5933. +  */
  5934. + static void rt2860_addba_stop(struct ieee80211_node *ni,
  5935. +   struct ieee80211_tx_ampdu *tap)
  5936. + {
  5937. +   struct rt2860_softc *sc;
  5938. +   struct ieee80211com *ic;
  5939. +   struct ifnet *ifp;
  5940. +   struct rt2860_softc_node *rni;
  5941. +   int tid;
  5942. +
  5943. +   ic = ni->ni_ic;
  5944. +   ifp = ic->ic_ifp;
  5945. +   sc = ifp->if_softc;
  5946. +   rni = (struct rt2860_softc_node *) ni;
  5947. +
  5948. +   tid = WME_AC_TO_TID(tap->txa_ac);
  5949. +
  5950. +   RT2860_DPRINTF(sc, RT2860_DEBUG_BA,
  5951. +       "%s: stopping A-MPDU Tx: associd=0x%04x, staid=0x%02x, tid=%d\n",
  5952. +       device_get_nameunit(sc->sc_dev), ni->ni_associd, rni->staid, tid);
  5953. +
  5954. +   if (tap->txa_flags & IEEE80211_AGGR_RUNNING)
  5955. +   {
  5956. +       if (sc->tx_ampdu_sessions > 0)
  5957. +       {
  5958. +           sc->tx_ampdu_sessions--;
  5959. +
  5960. +           if (sc->tx_ampdu_sessions == 0)
  5961. +               rt2860_asic_updateprot(sc);
  5962. +       }
  5963. +       else
  5964. +       {
  5965. +           printf("%s: number of A-MPDU Tx sessions cannot be negative\n",
  5966. +               device_get_nameunit(sc->sc_dev));
  5967. +       }
  5968. +   }
  5969. +
  5970. +   sc->addba_stop(ni, tap);
  5971. + }
  5972. +
  5973. + /*
  5974. +  * rt2860_ampdu_rx_start
  5975. +  */
  5976. + static int rt2860_ampdu_rx_start(struct ieee80211_node *ni,
  5977. +   struct ieee80211_rx_ampdu *rap,
  5978. +   int baparamset, int batimeout, int baseqctl)
  5979. + {
  5980. +   struct rt2860_softc *sc;
  5981. +   struct ieee80211com *ic;
  5982. +   struct ifnet *ifp;
  5983. +   struct rt2860_softc_node *rni;
  5984. +   int tid;
  5985. +
  5986. +   ic = ni->ni_ic;
  5987. +   ifp = ic->ic_ifp;
  5988. +   sc = ifp->if_softc;
  5989. +   rni = (struct rt2860_softc_node *) ni;
  5990. +
  5991. +   tid = RT2860_MS(baparamset, IEEE80211_BAPS_TID);
  5992. +
  5993. +   RT2860_DPRINTF(sc, RT2860_DEBUG_BA,
  5994. +       "%s: starting A-MPDU Rx: associd=0x%04x, staid=0x%02x, tid=%d\n",
  5995. +       device_get_nameunit(sc->sc_dev), ni->ni_associd, rni->staid, tid);
  5996. +
  5997. +   if (!(rap->rxa_flags & IEEE80211_AGGR_RUNNING))
  5998. +       sc->rx_ampdu_sessions++;
  5999. +
  6000. +   return sc->ampdu_rx_start(ni, rap, baparamset, batimeout, baseqctl);
  6001. + }
  6002. +
  6003. + /*
  6004. +  * rt2860_ampdu_rx_stop
  6005. +  */
  6006. + static void rt2860_ampdu_rx_stop(struct ieee80211_node *ni,
  6007. +   struct ieee80211_rx_ampdu *rap)
  6008. + {
  6009. +   struct rt2860_softc *sc;
  6010. +   struct ieee80211com *ic;
  6011. +   struct ifnet *ifp;
  6012. +   struct rt2860_softc_node *rni;
  6013. +
  6014. +   ic = ni->ni_ic;
  6015. +   ifp = ic->ic_ifp;
  6016. +   sc = ifp->if_softc;
  6017. +   rni = (struct rt2860_softc_node *) ni;
  6018. +
  6019. +   RT2860_DPRINTF(sc, RT2860_DEBUG_BA,
  6020. +       "%s: stopping A-MPDU Rx: associd=0x%04x, staid=0x%02x\n",
  6021. +       device_get_nameunit(sc->sc_dev), ni->ni_associd, rni->staid);
  6022. +
  6023. +   if (rap->rxa_flags & IEEE80211_AGGR_RUNNING)
  6024. +   {
  6025. +       if (sc->rx_ampdu_sessions > 0)
  6026. +           sc->rx_ampdu_sessions--;
  6027. +       else
  6028. +           printf("%s: number of A-MPDU Rx sessions cannot be negative\n",
  6029. +               device_get_nameunit(sc->sc_dev));
  6030. +   }
  6031. +
  6032. +   sc->ampdu_rx_stop(ni, rap);
  6033. + }
  6034. +
  6035. + /*
  6036. +  * rt2860_send_bar
  6037. +  */
  6038. + static int rt2860_send_bar(struct ieee80211_node *ni,
  6039. +   struct ieee80211_tx_ampdu *tap, ieee80211_seq seqno)
  6040. + {
  6041. +   struct rt2860_softc *sc;
  6042. +   struct ieee80211com *ic;
  6043. +   struct ifnet *ifp;
  6044. +   struct ieee80211vap *vap;
  6045. +   struct ieee80211_frame_bar *bar;
  6046. +   struct rt2860_softc_node *rni;
  6047. +   struct mbuf *m;
  6048. +   uint16_t barctl, barseqctl;
  6049. +   uint8_t *frm;
  6050. +   int ret, tid;
  6051. +
  6052. +   ic = ni->ni_ic;
  6053. +   ifp = ic->ic_ifp;
  6054. +   sc = ifp->if_softc;
  6055. +   vap = ni->ni_vap;
  6056. +   rni = (struct rt2860_softc_node *) ni;
  6057. +
  6058. +   if (!(tap->txa_flags & IEEE80211_AGGR_RUNNING))
  6059. +       return EINVAL;
  6060. +
  6061. +   m = ieee80211_getmgtframe(&frm, ic->ic_headroom, sizeof(struct ieee80211_frame_bar));
  6062. +   if (m == NULL)
  6063. +       return ENOMEM;
  6064. +
  6065. +   bar = mtod(m, struct ieee80211_frame_bar *);
  6066. +
  6067. +   bar->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR;
  6068. +   bar->i_fc[1] = 0;
  6069. +
  6070. +   IEEE80211_ADDR_COPY(bar->i_ra, ni->ni_macaddr);
  6071. +   IEEE80211_ADDR_COPY(bar->i_ta, vap->iv_myaddr);
  6072. +
  6073. +   tid = WME_AC_TO_TID(tap->txa_ac);
  6074. +
  6075. +   barctl = (tap->txa_flags & IEEE80211_AGGR_IMMEDIATE ?  0 : IEEE80211_BAR_NOACK) |
  6076. +       IEEE80211_BAR_COMP |
  6077. +       RT2860_SM(tid, IEEE80211_BAR_TID);
  6078. +   barseqctl = RT2860_SM(seqno, IEEE80211_BAR_SEQ_START);
  6079. +
  6080. +   bar->i_ctl = htole16(barctl);
  6081. +   bar->i_seq = htole16(barseqctl);
  6082. +
  6083. +   m->m_pkthdr.len = m->m_len = sizeof(struct ieee80211_frame_bar);
  6084. +
  6085. +   tap->txa_start = seqno;
  6086. +
  6087. +   ieee80211_ref_node(ni);
  6088. +
  6089. +   RT2860_DPRINTF(sc, RT2860_DEBUG_BA,
  6090. +       "%s: sending BAR: associd=0x%04x, staid=0x%02x, tid=%d, seqno=%d\n",
  6091. +       device_get_nameunit(sc->sc_dev), ni->ni_associd, rni->staid, tid, seqno);
  6092. +
  6093. +   ret = ic->ic_raw_xmit(ni, m, NULL);
  6094. +   if (ret != 0)
  6095. +       ieee80211_free_node(ni);
  6096. +
  6097. +   return ret;
  6098. + }
  6099. +
  6100. + /*
  6101. +  * rt2860_amrr_update_iter_func
  6102. +  */
  6103. + static void rt2860_amrr_update_iter_func(void *arg, struct ieee80211_node *ni)
  6104. + {
  6105. +   struct rt2860_softc *sc;
  6106. +   struct ieee80211com *ic;
  6107. +   struct ifnet *ifp;
  6108. +   struct ieee80211vap *vap;
  6109. +   struct rt2860_softc_vap *rvap;
  6110. +   struct rt2860_softc_node *rni;
  6111. +   uint8_t wcid;
  6112. +
  6113. +   vap = arg;
  6114. +   ic = vap->iv_ic;
  6115. +   ifp = ic->ic_ifp;
  6116. +   sc = ifp->if_softc;
  6117. +   rvap = (struct rt2860_softc_vap *) vap;
  6118. +   rni = (struct rt2860_softc_node *) ni;
  6119. +
  6120. +   /* only associated stations */
  6121. +
  6122. +   if ((ni->ni_vap == vap) && (rni->staid != 0))
  6123. +   {
  6124. +       wcid = rni->staid;
  6125. +
  6126. +       RT2860_DPRINTF(sc, RT2860_DEBUG_RATE,
  6127. +           "%s: AMRR node: staid=0x%02x, txcnt=%d, success=%d, retrycnt=%d\n",
  6128. +           device_get_nameunit(sc->sc_dev),
  6129. +           rni->staid, sc->amrr_node[wcid].txcnt, sc->amrr_node[wcid].success, sc->amrr_node[wcid].retrycnt);
  6130. +
  6131. +       rt2860_amrr_choose(ni, &sc->amrr_node[wcid]);
  6132. +
  6133. +       RT2860_DPRINTF(sc, RT2860_DEBUG_RATE,
  6134. +           "%s:%s node Tx rate: associd=0x%04x, staid=0x%02x, rate=0x%02x, max rate=0x%02x\n",
  6135. +           device_get_nameunit(sc->sc_dev),
  6136. +           (ni->ni_flags & IEEE80211_NODE_HT) ? " HT" : "",
  6137. +           ni->ni_associd, rni->staid, ni->ni_txrate,
  6138. +           (ni->ni_flags & IEEE80211_NODE_HT) ?
  6139. +               (ni->ni_htrates.rs_rates[ni->ni_htrates.rs_nrates - 1] | IEEE80211_RATE_MCS) :
  6140. +               (ni->ni_rates.rs_rates[ni->ni_rates.rs_nrates - 1] & IEEE80211_RATE_VAL));
  6141. +   }
  6142. + }
  6143. +
  6144. + /*
  6145. +  * rt2860_periodic
  6146. +  */
  6147. + static void rt2860_periodic(void *arg)
  6148. + {
  6149. +   struct rt2860_softc *sc;
  6150. +
  6151. +   sc = arg;
  6152. +
  6153. +   RT2860_DPRINTF(sc, RT2860_DEBUG_PERIODIC,
  6154. +       "%s: periodic\n",
  6155. +       device_get_nameunit(sc->sc_dev));
  6156. +
  6157. +   taskqueue_enqueue(sc->taskqueue, &sc->periodic_task);
  6158. + }
  6159. +
  6160. + /*
  6161. +  * rt2860_tx_watchdog
  6162. +  */
  6163. + static void rt2860_tx_watchdog(void *arg)
  6164. + {
  6165. +   struct rt2860_softc *sc;
  6166. +   struct ifnet *ifp;
  6167. +
  6168. +   sc = arg;
  6169. +   ifp = sc->sc_ifp;
  6170. +
  6171. +   if (sc->sc_tx_timer == 0)
  6172. +       return;
  6173. +
  6174. +   if (--sc->sc_tx_timer == 0)
  6175. +   {
  6176. +       printf("%s: Tx watchdog timeout: resetting\n",
  6177. +           device_get_nameunit(sc->sc_dev));
  6178. +
  6179. +       rt2860_stop_locked(sc);
  6180. +       rt2860_init_locked(sc);
  6181. +
  6182. +       ifp->if_oerrors++;
  6183. +
  6184. +       sc->tx_watchdog_timeouts++;
  6185. +   }
  6186. +
  6187. +   callout_reset(&sc->tx_watchdog_ch, hz, rt2860_tx_watchdog, sc);
  6188. + }
  6189. +
  6190. + /*
  6191. +  * rt2860_staid_alloc
  6192. +  */
  6193. + static int rt2860_staid_alloc(struct rt2860_softc *sc, int aid)
  6194. + {
  6195. +   int staid;
  6196. +
  6197. +   if ((aid > 0 && aid < RT2860_SOFTC_STAID_COUNT) && isclr(sc->staid_mask, aid))
  6198. +   {
  6199. +       staid = aid;
  6200. +   }
  6201. +   else
  6202. +   {
  6203. +       for (staid = 1; staid < RT2860_SOFTC_STAID_COUNT; staid++)
  6204. +       {
  6205. +           if (isclr(sc->staid_mask, staid))
  6206. +               break;
  6207. +       }
  6208. +   }
  6209. +
  6210. +   setbit(sc->staid_mask, staid);
  6211. +
  6212. +   return staid;
  6213. + }
  6214. +
  6215. + /*
  6216. +  * rt2860_staid_delete
  6217. +  */
  6218. + static void rt2860_staid_delete(struct rt2860_softc *sc, int staid)
  6219. + {
  6220. +   clrbit(sc->staid_mask, staid);
  6221. + }
  6222. +
  6223. + /*
  6224. +  * rt2860_asic_set_bssid
  6225. +  */
  6226. + static void rt2860_asic_set_bssid(struct rt2860_softc *sc,
  6227. +   const uint8_t *bssid)
  6228. + {
  6229. +   uint32_t tmp;
  6230. +
  6231. +   RT2860_DPRINTF(sc, RT2860_DEBUG_STATE,
  6232. +       "%s: set bssid: bssid=%s\n",
  6233. +       device_get_nameunit(sc->sc_dev),
  6234. +       ether_sprintf(bssid));
  6235. +
  6236. +   tmp = bssid[0] | (bssid[1]) << 8 | (bssid[2] << 16) | (bssid[3] << 24);
  6237. +
  6238. +   rt2860_io_mac_write(sc, RT2860_REG_BSSID_DW0, tmp);
  6239. +
  6240. +   tmp = bssid[4] | (bssid[5] << 8);
  6241. +
  6242. +   rt2860_io_mac_write(sc, RT2860_REG_BSSID_DW1, tmp);
  6243. + }
  6244. +
  6245. + /*
  6246. +  * rt2860_asic_set_macaddr
  6247. +  */
  6248. + static void rt2860_asic_set_macaddr(struct rt2860_softc *sc,
  6249. +   const uint8_t *addr)
  6250. + {
  6251. +   uint32_t tmp;
  6252. +
  6253. +   tmp = addr[0] | (addr[1] << 8) | (addr[2] << 16) | (addr[3] << 24);
  6254. +
  6255. +   rt2860_io_mac_write(sc, RT2860_REG_ADDR_DW0, tmp);
  6256. +
  6257. +   tmp = addr[4] | (addr[5] << 8) | (0xff << 16);
  6258. +
  6259. +   rt2860_io_mac_write(sc, RT2860_REG_ADDR_DW1, tmp);
  6260. + }
  6261. +
  6262. + /*
  6263. +  * rt2860_asic_enable_tsf_sync
  6264. +  */
  6265. + static void rt2860_asic_enable_tsf_sync(struct rt2860_softc *sc)
  6266. + {
  6267. +   struct ifnet *ifp;
  6268. +   struct ieee80211com *ic;
  6269. +   struct ieee80211vap *vap;
  6270. +   uint32_t tmp;
  6271. +
  6272. +   ifp = sc->sc_ifp;
  6273. +   ic = ifp->if_l2com;
  6274. +   vap = TAILQ_FIRST(&ic->ic_vaps);
  6275. +
  6276. +   RT2860_DPRINTF(sc, RT2860_DEBUG_BEACON,
  6277. +       "%s: enabling TSF\n",
  6278. +       device_get_nameunit(sc->sc_dev));
  6279. +
  6280. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_BCN_TIME_CFG);
  6281. +
  6282. +   tmp &= ~0x1fffff;
  6283. +   tmp |= vap->iv_bss->ni_intval * 16;
  6284. +   tmp |= (RT2860_REG_TSF_TIMER_ENABLE | RT2860_REG_TBTT_TIMER_ENABLE);
  6285. +
  6286. +   if (vap->iv_opmode == IEEE80211_M_STA)
  6287. +   {
  6288. +       tmp |= (RT2860_REG_TSF_SYNC_MODE_STA << RT2860_REG_TSF_SYNC_MODE_SHIFT);
  6289. +   }
  6290. +   else if (vap->iv_opmode == IEEE80211_M_IBSS)
  6291. +   {
  6292. +       tmp |= RT2860_REG_BCN_TX_ENABLE;
  6293. +       tmp |= (RT2860_REG_TSF_SYNC_MODE_IBSS << RT2860_REG_TSF_SYNC_MODE_SHIFT);
  6294. +   }
  6295. +   else if (vap->iv_opmode == IEEE80211_M_HOSTAP)
  6296. +   {
  6297. +       tmp |= RT2860_REG_BCN_TX_ENABLE;
  6298. +       tmp |= (RT2860_REG_TSF_SYNC_MODE_HOSTAP << RT2860_REG_TSF_SYNC_MODE_SHIFT);
  6299. +   }
  6300. +
  6301. +   rt2860_io_mac_write(sc, RT2860_REG_BCN_TIME_CFG, tmp);
  6302. + }
  6303. +
  6304. + /*
  6305. +  * rt2860_asic_disable_tsf_sync
  6306. +  */
  6307. + static void rt2860_asic_disable_tsf_sync(struct rt2860_softc *sc)
  6308. + {
  6309. +   uint32_t tmp;
  6310. +
  6311. +   RT2860_DPRINTF(sc, RT2860_DEBUG_BEACON,
  6312. +       "%s: disabling TSF\n",
  6313. +       device_get_nameunit(sc->sc_dev));
  6314. +
  6315. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_BCN_TIME_CFG);
  6316. +
  6317. +   tmp &= ~(RT2860_REG_BCN_TX_ENABLE |
  6318. +       RT2860_REG_TSF_TIMER_ENABLE |
  6319. +       RT2860_REG_TBTT_TIMER_ENABLE);
  6320. +
  6321. +   tmp &= ~(RT2860_REG_TSF_SYNC_MODE_MASK << RT2860_REG_TSF_SYNC_MODE_SHIFT);
  6322. +   tmp |= (RT2860_REG_TSF_SYNC_MODE_DISABLE << RT2860_REG_TSF_SYNC_MODE_SHIFT);
  6323. +
  6324. +   rt2860_io_mac_write(sc, RT2860_REG_BCN_TIME_CFG, tmp);
  6325. + }
  6326. +
  6327. + /*
  6328. +  * rt2860_asic_enable_mrr
  6329. +  */
  6330. + static void rt2860_asic_enable_mrr(struct rt2860_softc *sc)
  6331. + {
  6332. + #define CCK(mcs)  (mcs)
  6333. + #define OFDM(mcs) ((1 << 3) | (mcs))
  6334. + #define HT(mcs)       (mcs)
  6335. +
  6336. +   rt2860_io_mac_write(sc, RT2860_REG_TX_LG_FBK_CFG0,
  6337. +       (OFDM(6) << 28) |   /* 54 -> 48 */
  6338. +       (OFDM(5) << 24) |   /* 48 -> 36 */
  6339. +       (OFDM(4) << 20) |   /* 36 -> 24 */
  6340. +       (OFDM(3) << 16) |   /* 24 -> 18 */
  6341. +       (OFDM(2) << 12) |   /* 18 -> 12 */
  6342. +       (OFDM(1) << 8)  |   /* 12 -> 9 */
  6343. +       (OFDM(0) << 4)  |   /*  9 -> 6 */
  6344. +       OFDM(0));           /*  6 -> 6 */
  6345. +
  6346. +   rt2860_io_mac_write(sc, RT2860_REG_TX_LG_FBK_CFG1,
  6347. +       (CCK(2) << 12) |    /* 11  -> 5.5 */
  6348. +       (CCK(1) << 8)  |    /* 5.5 -> 2 */
  6349. +       (CCK(0) << 4)  |    /*   2 -> 1 */
  6350. +       CCK(0));            /*   1 -> 1 */
  6351. +
  6352. +   rt2860_io_mac_write(sc, RT2860_REG_TX_HT_FBK_CFG0,
  6353. +       (HT(6) << 28) |
  6354. +       (HT(5) << 24) |
  6355. +       (HT(4) << 20) |
  6356. +       (HT(3) << 16) |
  6357. +       (HT(2) << 12) |
  6358. +       (HT(1) << 8)  |
  6359. +       (HT(0) << 4)  |
  6360. +       HT(0));
  6361. +
  6362. +   rt2860_io_mac_write(sc, RT2860_REG_TX_HT_FBK_CFG1,
  6363. +       (HT(14) << 28) |
  6364. +       (HT(13) << 24) |
  6365. +       (HT(12) << 20) |
  6366. +       (HT(11) << 16) |
  6367. +       (HT(10) << 12) |
  6368. +       (HT(9) << 8)   |
  6369. +       (HT(8) << 4)   |
  6370. +       HT(7));
  6371. +
  6372. + #undef HT
  6373. + #undef OFDM
  6374. + #undef CCK
  6375. + }
  6376. +
  6377. + /*
  6378. +  * rt2860_asic_set_txpreamble
  6379. +  */
  6380. + static void rt2860_asic_set_txpreamble(struct rt2860_softc *sc)
  6381. + {
  6382. +   struct ifnet *ifp;
  6383. +   struct ieee80211com *ic;
  6384. +   uint32_t tmp;
  6385. +
  6386. +   ifp = sc->sc_ifp;
  6387. +   ic = ifp->if_l2com;
  6388. +
  6389. +   RT2860_DPRINTF(sc, RT2860_DEBUG_STATE,
  6390. +       "%s: %s short Tx preamble\n",
  6391. +       device_get_nameunit(sc->sc_dev),
  6392. +       (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "enabling" : "disabling");
  6393. +
  6394. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_AUTO_RSP_CFG);
  6395. +
  6396. +   tmp &= ~RT2860_REG_CCK_SHORT_ENABLE;
  6397. +
  6398. +   if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
  6399. +       tmp |= RT2860_REG_CCK_SHORT_ENABLE;
  6400. +
  6401. +   rt2860_io_mac_write(sc, RT2860_REG_AUTO_RSP_CFG, tmp);
  6402. + }
  6403. +
  6404. + /*
  6405. +  * rt2860_asic_set_basicrates
  6406. +  */
  6407. + static void rt2860_asic_set_basicrates(struct rt2860_softc *sc)
  6408. + {
  6409. +   struct ifnet *ifp;
  6410. +   struct ieee80211com *ic;
  6411. +
  6412. +   ifp = sc->sc_ifp;
  6413. +   ic = ifp->if_l2com;
  6414. +
  6415. +   if (ic->ic_curmode == IEEE80211_MODE_11B)
  6416. +       rt2860_io_mac_write(sc, RT2860_REG_LEGACY_BASIC_RATE, 0xf);
  6417. +   else if (ic->ic_curmode == IEEE80211_MODE_11A)
  6418. +       rt2860_io_mac_write(sc, RT2860_REG_LEGACY_BASIC_RATE, 0x150);
  6419. +   else
  6420. +       rt2860_io_mac_write(sc, RT2860_REG_LEGACY_BASIC_RATE, 0x15f);
  6421. + }
  6422. +
  6423. + /*
  6424. +  * rt2860_asic_update_rtsthreshold
  6425. +  */
  6426. + static void rt2860_asic_update_rtsthreshold(struct rt2860_softc *sc)
  6427. + {
  6428. +   struct ifnet *ifp;
  6429. +   struct ieee80211com *ic;
  6430. +   struct ieee80211vap *vap;
  6431. +   uint32_t tmp;
  6432. +   uint16_t threshold;
  6433. +
  6434. +   ifp = sc->sc_ifp;
  6435. +   ic = ifp->if_l2com;
  6436. +   vap = TAILQ_FIRST(&ic->ic_vaps);
  6437. +
  6438. +   if (vap == NULL)
  6439. +       threshold = IEEE80211_RTS_MAX;
  6440. +   else if (vap->iv_flags_ht & IEEE80211_FHT_AMSDU_TX)
  6441. +       threshold = 0x1000;
  6442. +   else
  6443. +       threshold = vap->iv_rtsthreshold;
  6444. +
  6445. +   RT2860_DPRINTF(sc, RT2860_DEBUG_PROT,
  6446. +       "%s: updating RTS threshold: %d\n",
  6447. +       device_get_nameunit(sc->sc_dev), threshold);
  6448. +
  6449. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_TX_RTS_CFG);
  6450. +
  6451. +   tmp &= ~(RT2860_REG_TX_RTS_THRESHOLD_MASK << RT2860_REG_TX_RTS_THRESHOLD_SHIFT);
  6452. +
  6453. +   tmp |= ((threshold & RT2860_REG_TX_RTS_THRESHOLD_MASK) <<
  6454. +       RT2860_REG_TX_RTS_THRESHOLD_SHIFT);
  6455. +
  6456. +   rt2860_io_mac_write(sc, RT2860_REG_TX_RTS_CFG, tmp);
  6457. + }
  6458. +
  6459. + /*
  6460. +  * rt2860_asic_update_txpower
  6461. +  */
  6462. + static void rt2860_asic_update_txpower(struct rt2860_softc *sc)
  6463. + {
  6464. +   struct ifnet *ifp;
  6465. +   struct ieee80211com *ic;
  6466. +   uint32_t *txpow_rate;
  6467. +   int8_t delta;
  6468. +   uint8_t val;
  6469. +   uint32_t tmp;
  6470. +   int i;
  6471. +
  6472. +   ifp = sc->sc_ifp;
  6473. +   ic = ifp->if_l2com;
  6474. +
  6475. +   RT2860_DPRINTF(sc, RT2860_DEBUG_STATE,
  6476. +       "%s: updating Tx power: %d\n",
  6477. +       device_get_nameunit(sc->sc_dev), ic->ic_txpowlimit);
  6478. +
  6479. +   if (!IEEE80211_IS_CHAN_HT40(ic->ic_curchan))
  6480. +   {
  6481. +       txpow_rate = sc->txpow_rate_20mhz;
  6482. +   }
  6483. +   else
  6484. +   {
  6485. +       if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
  6486. +           txpow_rate = sc->txpow_rate_40mhz_2ghz;
  6487. +       else
  6488. +           txpow_rate = sc->txpow_rate_40mhz_5ghz;
  6489. +   }
  6490. +
  6491. +   delta = 0;
  6492. +
  6493. +   val = rt2860_io_bbp_read(sc, 1);
  6494. +   val &= 0xfc;
  6495. +
  6496. +   if (ic->ic_txpowlimit > 90)
  6497. +   {
  6498. +       /* do nothing */
  6499. +   }
  6500. +   else if (ic->ic_txpowlimit > 60)
  6501. +   {
  6502. +       delta -= 1;
  6503. +   }
  6504. +   else if (ic->ic_txpowlimit > 30)
  6505. +   {
  6506. +       delta -= 3;
  6507. +   }
  6508. +   else if (ic->ic_txpowlimit > 15)
  6509. +   {
  6510. +       val |= 0x1;
  6511. +   }
  6512. +   else if (ic->ic_txpowlimit > 9)
  6513. +   {
  6514. +       val |= 0x1;
  6515. +       delta -= 3;
  6516. +   }
  6517. +   else
  6518. +   {
  6519. +       val |= 0x2;
  6520. +   }
  6521. +
  6522. +   rt2860_io_bbp_write(sc, 1, val);
  6523. +
  6524. +   for (i = 0; i < RT2860_SOFTC_TXPOW_RATE_COUNT; i++)
  6525. +   {
  6526. +       if (txpow_rate[i] == 0xffffffff)
  6527. +           continue;
  6528. +
  6529. +       tmp = rt2860_read_eeprom_txpow_rate_add_delta(txpow_rate[i], delta);
  6530. +
  6531. +       rt2860_io_mac_write(sc, RT2860_REG_TX_PWR_CFG(i), tmp);
  6532. +   }
  6533. + }
  6534. +
  6535. + /*
  6536. +  * rt2860_asic_update_promisc
  6537. +  */
  6538. + static void rt2860_asic_update_promisc(struct rt2860_softc *sc)
  6539. + {
  6540. +   struct ifnet *ifp;
  6541. +   uint32_t tmp;
  6542. +
  6543. +   ifp = sc->sc_ifp;
  6544. +
  6545. +   printf("%s: %s promiscuous mode\n",
  6546. +       device_get_nameunit(sc->sc_dev),
  6547. +       (ifp->if_flags & IFF_PROMISC) ? "entering" : "leaving");
  6548. +
  6549. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_RX_FILTER_CFG);
  6550. +
  6551. +   tmp &= ~RT2860_REG_RX_FILTER_DROP_UC_NOME;
  6552. +
  6553. +   if (!(ifp->if_flags & IFF_PROMISC))
  6554. +       tmp |= RT2860_REG_RX_FILTER_DROP_UC_NOME;
  6555. +
  6556. +   rt2860_io_mac_write(sc, RT2860_REG_RX_FILTER_CFG, tmp);
  6557. + }
  6558. +
  6559. + /*
  6560. +  * rt2860_asic_updateprot
  6561. +  */
  6562. + static void rt2860_asic_updateprot(struct rt2860_softc *sc)
  6563. + {
  6564. +   struct ifnet *ifp;
  6565. +   struct ieee80211com *ic;
  6566. +   struct ieee80211vap *vap;
  6567. +   uint32_t cck_prot, ofdm_prot, mm20_prot, mm40_prot, gf20_prot, gf40_prot;
  6568. +   uint8_t htopmode;
  6569. +   enum ieee80211_protmode htprotmode;
  6570. +
  6571. +   ifp = sc->sc_ifp;
  6572. +   ic = ifp->if_l2com;
  6573. +   vap = TAILQ_FIRST(&ic->ic_vaps);
  6574. +
  6575. +   /* CCK frame protection */
  6576. +
  6577. +   cck_prot = RT2860_REG_RTSTH_ENABLE | RT2860_REG_PROT_NAV_SHORT |
  6578. +       RT2860_REG_TXOP_ALLOW_ALL | RT2860_REG_PROT_CTRL_NONE;
  6579. +
  6580. +   /* set up protection frame phy mode and rate (MCS code) */
  6581. +
  6582. +   if (ic->ic_curmode == IEEE80211_MODE_11A)
  6583. +       cck_prot |= (RT2860_REG_PROT_PHYMODE_OFDM << RT2860_REG_PROT_PHYMODE_SHIFT) |
  6584. +           (0 << RT2860_REG_PROT_MCS_SHIFT);
  6585. +   else
  6586. +       cck_prot |= ((RT2860_REG_PROT_PHYMODE_CCK << RT2860_REG_PROT_PHYMODE_SHIFT) |
  6587. +           (3 << RT2860_REG_PROT_MCS_SHIFT));
  6588. +
  6589. +   rt2860_io_mac_write(sc, RT2860_REG_TX_CCK_PROT_CFG, cck_prot);
  6590. +
  6591. +   /* OFDM frame protection */
  6592. +
  6593. +   ofdm_prot = RT2860_REG_RTSTH_ENABLE | RT2860_REG_PROT_NAV_SHORT |
  6594. +       RT2860_REG_TXOP_ALLOW_ALL;
  6595. +
  6596. +   if (ic->ic_flags & IEEE80211_F_USEPROT)
  6597. +   {
  6598. +       RT2860_DPRINTF(sc, RT2860_DEBUG_PROT,
  6599. +           "%s: updating protection mode: b/g protection mode=%s\n",
  6600. +           device_get_nameunit(sc->sc_dev),
  6601. +           (ic->ic_protmode == IEEE80211_PROT_RTSCTS) ? "RTS/CTS" :
  6602. +               ((ic->ic_protmode == IEEE80211_PROT_CTSONLY) ? "CTS-to-self" : "none"));
  6603. +
  6604. +       if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
  6605. +           ofdm_prot |= RT2860_REG_PROT_CTRL_RTS_CTS;
  6606. +       else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
  6607. +           ofdm_prot |= RT2860_REG_PROT_CTRL_CTS;
  6608. +       else
  6609. +           ofdm_prot |= RT2860_REG_PROT_CTRL_NONE;
  6610. +   }
  6611. +   else
  6612. +   {
  6613. +       RT2860_DPRINTF(sc, RT2860_DEBUG_PROT,
  6614. +           "%s: updating protection mode: b/g protection mode=%s\n",
  6615. +           device_get_nameunit(sc->sc_dev), "none");
  6616. +
  6617. +       ofdm_prot |= RT2860_REG_PROT_CTRL_NONE;
  6618. +   }
  6619. +
  6620. +   rt2860_io_mac_write(sc, RT2860_REG_TX_OFDM_PROT_CFG, ofdm_prot);
  6621. +
  6622. +   /* HT frame protection */
  6623. +
  6624. +   if ((vap != NULL) && (vap->iv_opmode == IEEE80211_M_STA) && (vap->iv_state == IEEE80211_S_RUN))
  6625. +       htopmode = vap->iv_bss->ni_htopmode;
  6626. +   else
  6627. +       htopmode = ic->ic_curhtprotmode;
  6628. +
  6629. +   htprotmode = ic->ic_htprotmode;
  6630. +
  6631. +   /* force HT mixed mode and RTS/CTS protection if A-MPDU Tx aggregation is enabled */
  6632. +
  6633. +   if (sc->tx_ampdu_sessions > 0)
  6634. +   {
  6635. +       RT2860_DPRINTF(sc, RT2860_DEBUG_PROT,
  6636. +           "%s: updating protection mode: forcing HT mixed mode and RTS/CTS protection\n",
  6637. +           device_get_nameunit(sc->sc_dev));
  6638. +
  6639. +       htopmode = IEEE80211_HTINFO_OPMODE_MIXED;
  6640. +       htprotmode = IEEE80211_PROT_RTSCTS;
  6641. +   }
  6642. +
  6643. +   RT2860_DPRINTF(sc, RT2860_DEBUG_PROT,
  6644. +       "%s: updating protection mode: HT operation mode=0x%02x, protection mode=%s\n",
  6645. +       device_get_nameunit(sc->sc_dev),
  6646. +       htopmode & IEEE80211_HTINFO_OPMODE,
  6647. +       (htprotmode == IEEE80211_PROT_RTSCTS) ? "RTS/CTS" :
  6648. +           ((htprotmode == IEEE80211_PROT_CTSONLY) ? "CTS-to-self" : "none"));
  6649. +
  6650. +   switch (htopmode & IEEE80211_HTINFO_OPMODE)
  6651. +   {
  6652. +       /* IEEE80211_HTINFO_OPMODE_HT20PR */
  6653. +       case IEEE80211_HTINFO_OPMODE_HT20PR:
  6654. +           mm20_prot = RT2860_REG_PROT_NAV_SHORT | RT2860_REG_PROT_CTRL_NONE |
  6655. +               RT2860_REG_TXOP_ALLOW_CCK | RT2860_REG_TXOP_ALLOW_OFDM |
  6656. +               RT2860_REG_TXOP_ALLOW_MM20 | RT2860_REG_TXOP_ALLOW_GF20 |
  6657. +               (RT2860_REG_PROT_PHYMODE_OFDM << RT2860_REG_PROT_PHYMODE_SHIFT) |
  6658. +               (4 << RT2860_REG_PROT_MCS_SHIFT);
  6659. +
  6660. +           gf20_prot = mm20_prot;
  6661. +
  6662. +           mm40_prot = RT2860_REG_PROT_NAV_SHORT | RT2860_REG_TXOP_ALLOW_ALL |
  6663. +               (RT2860_REG_PROT_PHYMODE_OFDM << RT2860_REG_PROT_PHYMODE_SHIFT) |
  6664. +               (0x84 << RT2860_REG_PROT_MCS_SHIFT);
  6665. +
  6666. +           if (htprotmode == IEEE80211_PROT_RTSCTS)
  6667. +               mm40_prot |= RT2860_REG_PROT_CTRL_RTS_CTS;
  6668. +           else if (htprotmode == IEEE80211_PROT_CTSONLY)
  6669. +               mm40_prot |= RT2860_REG_PROT_CTRL_CTS;
  6670. +           else
  6671. +               mm40_prot |= RT2860_REG_PROT_CTRL_NONE;
  6672. +
  6673. +           gf40_prot = mm40_prot;
  6674. +       break;
  6675. +
  6676. +       /* IEEE80211_HTINFO_OPMODE_MIXED */
  6677. +       case IEEE80211_HTINFO_OPMODE_MIXED:
  6678. +           mm20_prot = RT2860_REG_PROT_NAV_SHORT |
  6679. +               RT2860_REG_TXOP_ALLOW_CCK | RT2860_REG_TXOP_ALLOW_OFDM |
  6680. +               RT2860_REG_TXOP_ALLOW_MM20 | RT2860_REG_TXOP_ALLOW_GF20;
  6681. +
  6682. +           if (ic->ic_flags & IEEE80211_F_USEPROT)
  6683. +               mm20_prot |= (RT2860_REG_PROT_PHYMODE_CCK << RT2860_REG_PROT_PHYMODE_SHIFT) |
  6684. +                   (3 << RT2860_REG_PROT_MCS_SHIFT);
  6685. +           else
  6686. +               mm20_prot |= (RT2860_REG_PROT_PHYMODE_OFDM << RT2860_REG_PROT_PHYMODE_SHIFT) |
  6687. +                   (4 << RT2860_REG_PROT_MCS_SHIFT);
  6688. +
  6689. +           if (htprotmode == IEEE80211_PROT_RTSCTS)
  6690. +               mm20_prot |= RT2860_REG_PROT_CTRL_RTS_CTS;
  6691. +           else if (htprotmode == IEEE80211_PROT_CTSONLY)
  6692. +               mm20_prot |= RT2860_REG_PROT_CTRL_CTS;
  6693. +           else
  6694. +               mm20_prot |= RT2860_REG_PROT_CTRL_NONE;
  6695. +
  6696. +           gf20_prot = mm20_prot;
  6697. +
  6698. +           mm40_prot = RT2860_REG_PROT_NAV_SHORT | RT2860_REG_TXOP_ALLOW_ALL;
  6699. +
  6700. +           if (ic->ic_flags & IEEE80211_F_USEPROT)
  6701. +               mm40_prot |= (RT2860_REG_PROT_PHYMODE_CCK << RT2860_REG_PROT_PHYMODE_SHIFT) |
  6702. +                   (3 << RT2860_REG_PROT_MCS_SHIFT);
  6703. +           else
  6704. +               mm40_prot |= (RT2860_REG_PROT_PHYMODE_OFDM << RT2860_REG_PROT_PHYMODE_SHIFT) |
  6705. +                   (0x84 << RT2860_REG_PROT_MCS_SHIFT);
  6706. +
  6707. +           if (htprotmode == IEEE80211_PROT_RTSCTS)
  6708. +               mm40_prot |= RT2860_REG_PROT_CTRL_RTS_CTS;
  6709. +           else if (htprotmode == IEEE80211_PROT_CTSONLY)
  6710. +               mm40_prot |= RT2860_REG_PROT_CTRL_CTS;
  6711. +           else
  6712. +               mm40_prot |= RT2860_REG_PROT_CTRL_NONE;
  6713. +
  6714. +           gf40_prot = mm40_prot;
  6715. +       break;
  6716. +
  6717. +       /*
  6718. +        * IEEE80211_HTINFO_OPMODE_PURE
  6719. +        * IEEE80211_HTINFO_OPMODE_PROTOPT
  6720. +        */
  6721. +       case IEEE80211_HTINFO_OPMODE_PURE:
  6722. +       case IEEE80211_HTINFO_OPMODE_PROTOPT:
  6723. +       default:
  6724. +           mm20_prot = RT2860_REG_PROT_NAV_SHORT | RT2860_REG_PROT_CTRL_NONE |
  6725. +               RT2860_REG_TXOP_ALLOW_CCK | RT2860_REG_TXOP_ALLOW_OFDM |
  6726. +               RT2860_REG_TXOP_ALLOW_MM20 | RT2860_REG_TXOP_ALLOW_GF20 |
  6727. +               (RT2860_REG_PROT_PHYMODE_OFDM << RT2860_REG_PROT_PHYMODE_SHIFT) |
  6728. +               (4 << RT2860_REG_PROT_MCS_SHIFT);
  6729. +
  6730. +           gf20_prot = mm20_prot;
  6731. +
  6732. +           mm40_prot = RT2860_REG_PROT_NAV_SHORT | RT2860_REG_PROT_CTRL_NONE |
  6733. +               RT2860_REG_TXOP_ALLOW_ALL |
  6734. +               (RT2860_REG_PROT_PHYMODE_OFDM << RT2860_REG_PROT_PHYMODE_SHIFT) |
  6735. +               (0x84 << RT2860_REG_PROT_MCS_SHIFT);
  6736. +
  6737. +           gf40_prot = mm40_prot;
  6738. +       break;
  6739. +   }
  6740. +
  6741. +   rt2860_io_mac_write(sc, RT2860_REG_TX_MM20_PROT_CFG, mm20_prot);
  6742. +   rt2860_io_mac_write(sc, RT2860_REG_TX_MM40_PROT_CFG, mm40_prot);
  6743. +   rt2860_io_mac_write(sc, RT2860_REG_TX_GF20_PROT_CFG, gf20_prot);
  6744. +   rt2860_io_mac_write(sc, RT2860_REG_TX_GF40_PROT_CFG, gf40_prot);
  6745. + }
  6746. +
  6747. + /*
  6748. +  * rt2860_asic_updateslot
  6749. +  */
  6750. + static void rt2860_asic_updateslot(struct rt2860_softc *sc)
  6751. + {
  6752. +   struct ifnet *ifp;
  6753. +   struct ieee80211com *ic;
  6754. +   struct ieee80211vap *vap;
  6755. +   uint32_t tmp;
  6756. +
  6757. +   ifp = sc->sc_ifp;
  6758. +   ic = ifp->if_l2com;
  6759. +   vap = TAILQ_FIRST(&ic->ic_vaps);
  6760. +
  6761. +   RT2860_DPRINTF(sc, RT2860_DEBUG_STATE,
  6762. +       "%s: %s short slot time\n",
  6763. +       device_get_nameunit(sc->sc_dev),
  6764. +       ((ic->ic_flags & IEEE80211_F_SHSLOT) ||
  6765. +        ((vap != NULL) && (vap->iv_flags & IEEE80211_F_BURST))) ? "enabling" : "disabling");
  6766. +
  6767. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_BKOFF_SLOT_CFG);
  6768. +
  6769. +   tmp &= ~0xff;
  6770. +
  6771. +   if ((ic->ic_flags & IEEE80211_F_SHSLOT) ||
  6772. +       ((vap != NULL) && (vap->iv_flags & IEEE80211_F_BURST)))
  6773. +       tmp |= IEEE80211_DUR_SHSLOT;
  6774. +   else
  6775. +       tmp |= IEEE80211_DUR_SLOT;
  6776. +
  6777. +   rt2860_io_mac_write(sc, RT2860_REG_BKOFF_SLOT_CFG, tmp);
  6778. + }
  6779. +
  6780. + /*
  6781. +  * rt2860_asic_wme_update
  6782. +  */
  6783. + static void rt2860_asic_wme_update(struct rt2860_softc *sc)
  6784. + {
  6785. +   struct ifnet *ifp;
  6786. +   struct ieee80211com *ic;
  6787. +   struct ieee80211_wme_state *wme;
  6788. +   const struct wmeParams *wmep;
  6789. +   int i;
  6790. +
  6791. +   ifp = sc->sc_ifp;
  6792. +   ic = ifp->if_l2com;
  6793. +   wme = &ic->ic_wme;
  6794. +   wmep = wme->wme_chanParams.cap_wmeParams;
  6795. +
  6796. +   RT2860_DPRINTF(sc, RT2860_DEBUG_WME,
  6797. +       "%s: wme update: WME_AC_VO=%d/%d/%d/%d, WME_AC_VI=%d/%d/%d/%d, "
  6798. +       "WME_AC_BK=%d/%d/%d/%d, WME_AC_BE=%d/%d/%d/%d\n",
  6799. +       device_get_nameunit(sc->sc_dev),
  6800. +       wmep[WME_AC_VO].wmep_aifsn,
  6801. +       wmep[WME_AC_VO].wmep_logcwmin, wmep[WME_AC_VO].wmep_logcwmax,
  6802. +       wmep[WME_AC_VO].wmep_txopLimit,
  6803. +       wmep[WME_AC_VI].wmep_aifsn,
  6804. +       wmep[WME_AC_VI].wmep_logcwmin, wmep[WME_AC_VI].wmep_logcwmax,
  6805. +       wmep[WME_AC_VI].wmep_txopLimit,
  6806. +       wmep[WME_AC_BK].wmep_aifsn,
  6807. +       wmep[WME_AC_BK].wmep_logcwmin, wmep[WME_AC_BK].wmep_logcwmax,
  6808. +       wmep[WME_AC_BK].wmep_txopLimit,
  6809. +       wmep[WME_AC_BE].wmep_aifsn,
  6810. +       wmep[WME_AC_BE].wmep_logcwmin, wmep[WME_AC_BE].wmep_logcwmax,
  6811. +       wmep[WME_AC_BE].wmep_txopLimit);
  6812. +
  6813. +   for (i = 0; i < WME_NUM_AC; i++)
  6814. +       rt2860_io_mac_write(sc, RT2860_REG_TX_EDCA_AC_CFG(i),
  6815. +           (wmep[i].wmep_logcwmax << 16) | (wmep[i].wmep_logcwmin << 12) |
  6816. +           (wmep[i].wmep_aifsn << 8) | wmep[i].wmep_txopLimit);
  6817. +
  6818. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WMM_AIFSN_CFG,
  6819. +       (wmep[WME_AC_VO].wmep_aifsn << 12) | (wmep[WME_AC_VI].wmep_aifsn << 8) |
  6820. +       (wmep[WME_AC_BK].wmep_aifsn << 4) | wmep[WME_AC_BE].wmep_aifsn);
  6821. +
  6822. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WMM_CWMIN_CFG,
  6823. +       (wmep[WME_AC_VO].wmep_logcwmin << 12) | (wmep[WME_AC_VI].wmep_logcwmin << 8) |
  6824. +       (wmep[WME_AC_BK].wmep_logcwmin << 4) | wmep[WME_AC_BE].wmep_logcwmin);
  6825. +
  6826. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WMM_CWMAX_CFG,
  6827. +       (wmep[WME_AC_VO].wmep_logcwmax << 12) | (wmep[WME_AC_VI].wmep_logcwmax << 8) |
  6828. +       (wmep[WME_AC_BK].wmep_logcwmax << 4) | wmep[WME_AC_BE].wmep_logcwmax);
  6829. +
  6830. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WMM_TXOP0_CFG,
  6831. +       (wmep[WME_AC_BK].wmep_txopLimit << 16) | wmep[WME_AC_BE].wmep_txopLimit);
  6832. +
  6833. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WMM_TXOP1_CFG,
  6834. +       (wmep[WME_AC_VO].wmep_txopLimit << 16) | wmep[WME_AC_VI].wmep_txopLimit);
  6835. + }
  6836. +
  6837. + /*
  6838. +  * rt2860_asic_update_beacon
  6839. +  */
  6840. + static void rt2860_asic_update_beacon(struct rt2860_softc *sc,
  6841. +   struct ieee80211vap *vap)
  6842. + {
  6843. +   struct rt2860_softc_vap *rvap;
  6844. +   struct mbuf *m;
  6845. +   struct rt2860_txwi *txwi;
  6846. +   uint32_t tmp;
  6847. +
  6848. +   rvap = (struct rt2860_softc_vap *) vap;
  6849. +
  6850. +   m = rvap->beacon_mbuf;
  6851. +   txwi = &rvap->beacon_txwi;
  6852. +
  6853. +   /* disable temporarily TSF sync */
  6854. +
  6855. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_BCN_TIME_CFG);
  6856. +
  6857. +   tmp &= ~(RT2860_REG_BCN_TX_ENABLE |
  6858. +       RT2860_REG_TSF_TIMER_ENABLE |
  6859. +       RT2860_REG_TBTT_TIMER_ENABLE);
  6860. +
  6861. +   rt2860_io_mac_write(sc, RT2860_REG_BCN_TIME_CFG, tmp);
  6862. +
  6863. +   /* write Tx wireless info and beacon frame to on-chip memory */
  6864. +
  6865. +   rt2860_io_mac_write_multi(sc, RT2860_REG_BEACON_BASE(0),
  6866. +       txwi, sizeof(struct rt2860_txwi));
  6867. +
  6868. +   rt2860_io_mac_write_multi(sc, RT2860_REG_BEACON_BASE(0) + sizeof(struct rt2860_txwi),
  6869. +       mtod(m, uint8_t *), m->m_pkthdr.len);
  6870. +
  6871. +   /* enable again TSF sync */
  6872. +
  6873. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_BCN_TIME_CFG);
  6874. +
  6875. +   tmp |= (RT2860_REG_BCN_TX_ENABLE |
  6876. +       RT2860_REG_TSF_TIMER_ENABLE |
  6877. +       RT2860_REG_TBTT_TIMER_ENABLE);
  6878. +
  6879. +   rt2860_io_mac_write(sc, RT2860_REG_BCN_TIME_CFG, tmp);
  6880. + }
  6881. +
  6882. + /*
  6883. +  * rt2860_asic_clear_keytables
  6884. +  */
  6885. + static void rt2860_asic_clear_keytables(struct rt2860_softc *sc)
  6886. + {
  6887. +   int i;
  6888. +
  6889. +   /* clear Rx WCID search table (entries = 256, entry size = 8) */
  6890. +
  6891. +   for (i = 0; i < 256; i++)
  6892. +   {
  6893. +       rt2860_io_mac_write(sc, RT2860_REG_WCID(i), 0xffffffff);
  6894. +       rt2860_io_mac_write(sc, RT2860_REG_WCID(i) + 4, 0x0000ffff);
  6895. +   }
  6896. +
  6897. +   /* clear WCID attribute table (entries = 256, entry size = 4) */
  6898. +
  6899. +   rt2860_io_mac_set_region_4(sc, RT2860_REG_WCID_ATTR(0), 0, 256);
  6900. +
  6901. +   /* clear IV/EIV table (entries = 256, entry size = 8) */
  6902. +
  6903. +   rt2860_io_mac_set_region_4(sc, RT2860_REG_IVEIV(0), 0, 2 * 256);
  6904. +
  6905. +   /* clear pairwise key table (entries = 64, entry size = 32) */
  6906. +
  6907. +   rt2860_io_mac_set_region_4(sc, RT2860_REG_PKEY(0), 0, 8 * 64);
  6908. +
  6909. +   /* clear shared key table (entries = 32, entry size = 32) */
  6910. +
  6911. +   rt2860_io_mac_set_region_4(sc, RT2860_REG_SKEY(0, 0), 0, 8 * 32);
  6912. +
  6913. +   /* clear shared key mode (entries = 32, entry size = 2) */
  6914. +
  6915. +   rt2860_io_mac_set_region_4(sc, RT2860_REG_SKEY_MODE(0), 0, 16);
  6916. + }
  6917. +
  6918. + /*
  6919. +  * rt2860_asic_add_ba_session
  6920. +  */
  6921. + static void rt2860_asic_add_ba_session(struct rt2860_softc *sc,
  6922. +   uint8_t wcid, int tid)
  6923. + {
  6924. +   uint32_t tmp;
  6925. +
  6926. +   RT2860_DPRINTF(sc, RT2860_DEBUG_BA,
  6927. +       "%s: adding BA session: wcid=0x%02x, tid=%d\n",
  6928. +       device_get_nameunit(sc->sc_dev), wcid, tid);
  6929. +
  6930. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_WCID(wcid) + 4);
  6931. +
  6932. +   tmp |= (0x10000 << tid);
  6933. +
  6934. +   rt2860_io_mac_write(sc, RT2860_REG_WCID(wcid) + 4, tmp);
  6935. + }
  6936. +
  6937. + /*
  6938. +  * rt2860_asic_del_ba_session
  6939. +  */
  6940. + static void rt2860_asic_del_ba_session(struct rt2860_softc *sc,
  6941. +   uint8_t wcid, int tid)
  6942. + {
  6943. +   uint32_t tmp;
  6944. +
  6945. +   RT2860_DPRINTF(sc, RT2860_DEBUG_BA,
  6946. +       "%s: deleting BA session: wcid=0x%02x, tid=%d\n",
  6947. +       device_get_nameunit(sc->sc_dev), wcid, tid);
  6948. +
  6949. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_WCID(wcid) + 4);
  6950. +
  6951. +   tmp &= ~(0x10000 << tid);
  6952. +
  6953. +   rt2860_io_mac_write(sc, RT2860_REG_WCID(wcid) + 4, tmp);
  6954. + }
  6955. +
  6956. + /*
  6957. +  * rt2860_beacon_alloc
  6958. +  */
  6959. + static int rt2860_beacon_alloc(struct rt2860_softc *sc,
  6960. +   struct ieee80211vap *vap)
  6961. + {
  6962. +   struct ieee80211com *ic;
  6963. +   struct rt2860_softc_vap *rvap;
  6964. +   struct mbuf *m;
  6965. +   struct rt2860_txwi txwi;
  6966. +   uint8_t rate, mcs;
  6967. +
  6968. +   ic = vap->iv_ic;
  6969. +   rvap = (struct rt2860_softc_vap *) vap;
  6970. +
  6971. +   m = ieee80211_beacon_alloc(vap->iv_bss, &rvap->beacon_offsets);
  6972. +   if (m == NULL)
  6973. +       return ENOMEM;
  6974. +
  6975. +   rate = IEEE80211_IS_CHAN_5GHZ(vap->iv_bss->ni_chan) ? 12 : 2;
  6976. +   mcs = rt2860_rate2mcs(rate);
  6977. +
  6978. +   RT2860_DPRINTF(sc, RT2860_DEBUG_BEACON,
  6979. +       "%s: beacon allocate: mcs=0x%02x\n",
  6980. +       device_get_nameunit(sc->sc_dev), mcs);
  6981. +
  6982. +   memset(&txwi, 0, sizeof(struct rt2860_txwi));
  6983. +
  6984. +   txwi.wcid = RT2860_WCID_RESERVED;
  6985. +   txwi.pid_mpdu_len = ((htole16(m->m_pkthdr.len) & RT2860_TXWI_MPDU_LEN_MASK) <<
  6986. +        RT2860_TXWI_MPDU_LEN_SHIFT);
  6987. +   txwi.txop = (RT2860_TXWI_TXOP_HT << RT2860_TXWI_TXOP_SHIFT);
  6988. +   txwi.mpdu_density_flags |=
  6989. +       (RT2860_TXWI_FLAGS_TS << RT2860_TXWI_FLAGS_SHIFT);
  6990. +   txwi.bawin_size_xflags |=
  6991. +       (RT2860_TXWI_XFLAGS_NSEQ << RT2860_TXWI_XFLAGS_SHIFT);
  6992. +
  6993. +   if (rate == 2)
  6994. +   {
  6995. +       txwi.phymode_ifs_stbc_shortgi =
  6996. +           (RT2860_TXWI_PHYMODE_CCK << RT2860_TXWI_PHYMODE_SHIFT);
  6997. +
  6998. +       if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
  6999. +           mcs |= RT2860_TXWI_MCS_SHOTPRE;
  7000. +   }
  7001. +   else
  7002. +   {
  7003. +       txwi.phymode_ifs_stbc_shortgi =
  7004. +           (RT2860_TXWI_PHYMODE_OFDM << RT2860_TXWI_PHYMODE_SHIFT);
  7005. +   }
  7006. +
  7007. +   txwi.bw_mcs = (RT2860_TXWI_BW_20 << RT2860_TXWI_BW_SHIFT) |
  7008. +       ((mcs & RT2860_TXWI_MCS_MASK) << RT2860_TXWI_MCS_SHIFT);
  7009. +
  7010. +   if (rvap->beacon_mbuf != NULL)
  7011. +   {
  7012. +       m_free(rvap->beacon_mbuf);
  7013. +       rvap->beacon_mbuf = NULL;
  7014. +   }
  7015. +
  7016. +   rvap->beacon_mbuf = m;
  7017. +   rvap->beacon_txwi = txwi;
  7018. +
  7019. +   return 0;
  7020. + }
  7021. +
  7022. + /*
  7023. +  * rt2860_rxrate
  7024. +  */
  7025. + static uint8_t rt2860_rxrate(struct rt2860_rxwi *rxwi)
  7026. + {
  7027. +   uint8_t mcs, phymode;
  7028. +   uint8_t rate;
  7029. +
  7030. +   mcs = (rxwi->bw_mcs >> RT2860_RXWI_MCS_SHIFT) & RT2860_RXWI_MCS_MASK;
  7031. +   phymode = (rxwi->phymode_stbc_shortgi >> RT2860_RXWI_PHYMODE_SHIFT) &
  7032. +       RT2860_RXWI_PHYMODE_MASK;
  7033. +
  7034. +   rate = 2;
  7035. +
  7036. +   switch (phymode)
  7037. +   {
  7038. +       case RT2860_RXWI_PHYMODE_CCK:
  7039. +           switch (mcs & ~RT2860_RXWI_MCS_SHOTPRE)
  7040. +           {
  7041. +               case 0: rate = 2; break;    /* 1 Mbps */
  7042. +               case 1: rate = 4; break;    /* 2 MBps */
  7043. +               case 2: rate = 11; break;   /* 5.5 Mbps */
  7044. +               case 3: rate = 22; break;   /* 11 Mbps */
  7045. +           }
  7046. +       break;
  7047. +
  7048. +       case RT2860_RXWI_PHYMODE_OFDM:
  7049. +           switch (mcs)
  7050. +           {
  7051. +               case 0: rate = 12; break;   /* 6 Mbps */
  7052. +               case 1: rate = 18; break;   /* 9 Mbps */
  7053. +               case 2: rate = 24; break;   /* 12 Mbps */
  7054. +               case 3: rate = 36; break;   /* 18 Mbps */
  7055. +               case 4: rate = 48; break;   /* 24 Mbps */
  7056. +               case 5: rate = 72; break;   /* 36 Mbps */
  7057. +               case 6: rate = 96; break;   /* 48 Mbps */
  7058. +               case 7: rate = 108; break;  /* 54 Mbps */
  7059. +           }
  7060. +       break;
  7061. +
  7062. +       case RT2860_RXWI_PHYMODE_HT_MIXED:
  7063. +       case RT2860_RXWI_PHYMODE_HT_GF:
  7064. +       break;
  7065. +   }
  7066. +
  7067. +   return rate;
  7068. + }
  7069. +
  7070. + /*
  7071. +  * rt2860_maxrssi_rxpath
  7072. +  */
  7073. + static uint8_t rt2860_maxrssi_rxpath(struct rt2860_softc *sc,
  7074. +   const struct rt2860_rxwi *rxwi)
  7075. + {
  7076. +   uint8_t rxpath;
  7077. +
  7078. +   rxpath = 0;
  7079. +
  7080. +   if (sc->nrxpath > 1)
  7081. +       if (rxwi->rssi[1] > rxwi->rssi[rxpath])
  7082. +           rxpath = 1;
  7083. +
  7084. +   if (sc->nrxpath > 2)
  7085. +       if (rxwi->rssi[2] > rxwi->rssi[rxpath])
  7086. +           rxpath = 2;
  7087. +
  7088. +   return rxpath;
  7089. + }
  7090. +
  7091. + /*
  7092. +  * rt2860_rssi2dbm
  7093. +  */
  7094. + static int8_t rt2860_rssi2dbm(struct rt2860_softc *sc,
  7095. +   uint8_t rssi, uint8_t rxpath)
  7096. + {
  7097. +   struct ifnet *ifp;
  7098. +   struct ieee80211com *ic;
  7099. +   struct ieee80211_channel *c;
  7100. +   int chan;
  7101. +   int8_t rssi_off, lna_gain;
  7102. +
  7103. +   if (rssi == 0)
  7104. +       return -99;
  7105. +
  7106. +   ifp = sc->sc_ifp;
  7107. +   ic = ifp->if_l2com;
  7108. +   c = ic->ic_curchan;
  7109. +   chan = ieee80211_chan2ieee(ic, c);
  7110. +
  7111. +   if (IEEE80211_IS_CHAN_5GHZ(c))
  7112. +   {
  7113. +       rssi_off = sc->rssi_off_5ghz[rxpath];
  7114. +
  7115. +       if (chan <= 64)
  7116. +           lna_gain = sc->lna_gain[1];
  7117. +       else if (chan <= 128)
  7118. +           lna_gain = sc->lna_gain[2];
  7119. +       else
  7120. +           lna_gain = sc->lna_gain[3];
  7121. +   }
  7122. +   else
  7123. +   {
  7124. +       rssi_off = sc->rssi_off_2ghz[rxpath] - sc->lna_gain[0];
  7125. +       lna_gain = sc->lna_gain[0];
  7126. +   }
  7127. +
  7128. +   return (-12 - rssi_off - lna_gain - rssi);
  7129. + }
  7130. +
  7131. + /*
  7132. +  * rt2860_rate2mcs
  7133. +  */
  7134. + static uint8_t rt2860_rate2mcs(uint8_t rate)
  7135. + {
  7136. +   switch (rate)
  7137. +   {
  7138. +       /* CCK rates */
  7139. +       case 2: return 0;
  7140. +       case 4: return 1;
  7141. +       case 11: return 2;
  7142. +       case 22: return 3;
  7143. +
  7144. +       /* OFDM rates */
  7145. +       case 12: return 0;
  7146. +       case 18: return 1;
  7147. +       case 24: return 2;
  7148. +       case 36: return 3;
  7149. +       case 48: return 4;
  7150. +       case 72: return 5;
  7151. +       case 96: return 6;
  7152. +       case 108: return 7;
  7153. +   }
  7154. +
  7155. +   return 0;
  7156. + }
  7157. +
  7158. + /*
  7159. +  * rt2860_tx_mgmt
  7160. +  */
  7161. + static int rt2860_tx_mgmt(struct rt2860_softc *sc,
  7162. +   struct mbuf *m, struct ieee80211_node *ni, int qid)
  7163. + {
  7164. +   struct ifnet *ifp;
  7165. +   struct ieee80211com *ic;
  7166. +   struct ieee80211vap *vap;
  7167. +   const struct ieee80211_txparam *tp;
  7168. +   struct rt2860_softc_node *rni;
  7169. +   struct rt2860_softc_tx_ring *ring;
  7170. +   struct rt2860_softc_tx_data *data;
  7171. +   struct rt2860_txdesc *desc;
  7172. +   struct rt2860_txwi *txwi;
  7173. +   struct ieee80211_frame *wh;
  7174. +   struct rt2860_softc_tx_radiotap_header *tap;
  7175. +   bus_dma_segment_t dma_seg[RT2860_SOFTC_MAX_SCATTER];
  7176. +   u_int hdrsize, hdrspace;
  7177. +   uint8_t rate, mcs, pid, qsel;
  7178. +   uint16_t len, dmalen, mpdu_len, dur;
  7179. +   int error, mimops, ndmasegs, ndescs, i, j;
  7180. +
  7181. +   KASSERT(qid >= 0 && qid < RT2860_SOFTC_TX_RING_COUNT,
  7182. +       ("%s: Tx MGMT: invalid qid=%d\n",
  7183. +        device_get_nameunit(sc->sc_dev), qid));
  7184. +
  7185. +   RT2860_SOFTC_TX_RING_ASSERT_LOCKED(&sc->tx_ring[qid]);
  7186. +
  7187. +   ifp = sc->sc_ifp;
  7188. +   ic = ifp->if_l2com;
  7189. +   vap = ni->ni_vap;
  7190. +   rni = (struct rt2860_softc_node *) ni;
  7191. +   tp = ni->ni_txparms;
  7192. +
  7193. +   ring = &sc->tx_ring[qid];
  7194. +   desc = &ring->desc[ring->desc_cur];
  7195. +   data = &ring->data[ring->data_cur];
  7196. +   txwi = (struct rt2860_txwi *) (ring->seg0 + ring->data_cur * RT2860_TX_DATA_SEG0_SIZE);
  7197. +
  7198. +   wh = mtod(m, struct ieee80211_frame *);
  7199. +
  7200. +   rate = tp->mgmtrate & IEEE80211_RATE_VAL;
  7201. + /* XXX */
  7202. +   if (!rate)
  7203. +       return EFBIG;
  7204. +
  7205. +   /* fill Tx wireless info */
  7206. +
  7207. +   if (ni->ni_flags & IEEE80211_NODE_HT)
  7208. +       mcs = rate;
  7209. +   else
  7210. +       mcs = rt2860_rate2mcs(rate);
  7211. +
  7212. +   /* calculate MPDU length without padding */
  7213. +
  7214. +   hdrsize = ieee80211_anyhdrsize(wh);
  7215. +   hdrspace = ieee80211_anyhdrspace(ic, wh);
  7216. +   mpdu_len = m->m_pkthdr.len - hdrspace + hdrsize;
  7217. +
  7218. +   memset(txwi, 0, sizeof(struct rt2860_txwi));
  7219. +
  7220. +   /* management frames do not need encryption */
  7221. +
  7222. +   txwi->wcid = RT2860_WCID_RESERVED;
  7223. +
  7224. +   /* MIMO power save */
  7225. +
  7226. +   if ((ni->ni_flags & IEEE80211_NODE_HT) && (ni->ni_flags & IEEE80211_NODE_MIMO_PS))
  7227. +   {
  7228. +       if (mcs > 7)
  7229. +       {
  7230. +           if (ni->ni_flags & IEEE80211_NODE_MIMO_RTS)
  7231. +           {
  7232. +               /* dynamic MIMO power save */
  7233. +
  7234. +               txwi->mpdu_density_flags |=
  7235. +                   (RT2860_TXWI_FLAGS_MIMOPS << RT2860_TXWI_FLAGS_SHIFT);
  7236. +           }
  7237. +           else
  7238. +           {
  7239. +               /* static MIMO power save */
  7240. +
  7241. +               mcs = 7;
  7242. +           }
  7243. +       }
  7244. +
  7245. +       mimops = 1;
  7246. +   }
  7247. +   else
  7248. +   {
  7249. +       mimops = 0;
  7250. +   }
  7251. +
  7252. +   pid = (mcs < 0xf) ? (mcs + 1) : mcs;
  7253. +
  7254. +   txwi->pid_mpdu_len = ((htole16(pid) & RT2860_TXWI_PID_MASK) <<
  7255. +       RT2860_TXWI_PID_SHIFT) | ((htole16(mpdu_len) & RT2860_TXWI_MPDU_LEN_MASK) <<
  7256. +           RT2860_TXWI_MPDU_LEN_SHIFT);
  7257. +
  7258. +   if (ni->ni_flags & IEEE80211_NODE_HT)
  7259. +   {
  7260. +       txwi->phymode_ifs_stbc_shortgi |=
  7261. +           (RT2860_TXWI_PHYMODE_HT_MIXED << RT2860_TXWI_PHYMODE_SHIFT);
  7262. +   }
  7263. +   else
  7264. +   {
  7265. +       if (ieee80211_rate2phytype(ic->ic_rt, rate) != IEEE80211_T_OFDM)
  7266. +       {
  7267. +           txwi->phymode_ifs_stbc_shortgi |=
  7268. +               (RT2860_TXWI_PHYMODE_CCK << RT2860_TXWI_PHYMODE_SHIFT);
  7269. +
  7270. +           if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
  7271. +               mcs |= RT2860_TXWI_MCS_SHOTPRE;
  7272. +       }
  7273. +       else
  7274. +       {
  7275. +           txwi->phymode_ifs_stbc_shortgi |=
  7276. +               (RT2860_TXWI_PHYMODE_OFDM << RT2860_TXWI_PHYMODE_SHIFT);
  7277. +       }
  7278. +   }
  7279. +
  7280. +   txwi->bw_mcs = (RT2860_TXWI_BW_20 << RT2860_TXWI_BW_SHIFT) |
  7281. +       ((mcs & RT2860_TXWI_MCS_MASK) << RT2860_TXWI_MCS_SHIFT);
  7282. +
  7283. +   txwi->txop = (RT2860_TXWI_TXOP_BACKOFF << RT2860_TXWI_TXOP_SHIFT);
  7284. +
  7285. +   /* skip ACKs for multicast frames */
  7286. +
  7287. +   if (!IEEE80211_IS_MULTICAST(wh->i_addr1))
  7288. +   {
  7289. +       txwi->bawin_size_xflags |=
  7290. +           (RT2860_TXWI_XFLAGS_ACK << RT2860_TXWI_XFLAGS_SHIFT);
  7291. +
  7292. +       if (ni->ni_flags & IEEE80211_NODE_HT)
  7293. +       {
  7294. +           /* preamble + plcp + signal extension + SIFS */
  7295. +
  7296. +           dur = 16 + 4 + 6 + 10;
  7297. +       }
  7298. +       else
  7299. +       {
  7300. +           dur = ieee80211_ack_duration(ic->ic_rt, rate,
  7301. +               ic->ic_flags & IEEE80211_F_SHPREAMBLE);
  7302. +       }
  7303. +
  7304. +       *(uint16_t *) wh->i_dur = htole16(dur);
  7305. +   }
  7306. +
  7307. +   /* ask MAC to insert timestamp into probe responses */
  7308. +
  7309. +   if ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
  7310. +       (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
  7311. +       txwi->mpdu_density_flags |=
  7312. +           (RT2860_TXWI_FLAGS_TS << RT2860_TXWI_FLAGS_SHIFT);
  7313. +
  7314. +   if (ieee80211_radiotap_active_vap(vap))
  7315. +   {
  7316. +       tap = &sc->txtap;
  7317. +
  7318. +       tap->flags = IEEE80211_RADIOTAP_F_DATAPAD;
  7319. +       tap->chan_flags = htole32(ic->ic_curchan->ic_flags);
  7320. +       tap->chan_freq = htole16(ic->ic_curchan->ic_freq);
  7321. +       tap->chan_ieee = ic->ic_curchan->ic_ieee;
  7322. +       tap->chan_maxpow = 0;
  7323. +
  7324. +       if (ni->ni_flags & IEEE80211_NODE_HT)
  7325. +           tap->rate = mcs | IEEE80211_RATE_MCS;
  7326. +       else
  7327. +           tap->rate = rate;
  7328. +
  7329. +       if (mcs & RT2860_TXWI_MCS_SHOTPRE)
  7330. +           tap->flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  7331. +
  7332. +       if (wh->i_fc[1] & IEEE80211_FC1_WEP)
  7333. +           tap->flags |= IEEE80211_RADIOTAP_F_WEP;
  7334. +
  7335. +       if (wh->i_fc[1] & IEEE80211_FC1_WEP)
  7336. +       {
  7337. +           wh->i_fc[1] &= ~IEEE80211_FC1_WEP;
  7338. +
  7339. +           ieee80211_radiotap_tx(vap, m);
  7340. +
  7341. +           wh->i_fc[1] |= IEEE80211_FC1_WEP;
  7342. +       }
  7343. +       else
  7344. +       {
  7345. +           ieee80211_radiotap_tx(vap, m);
  7346. +       }
  7347. +   }
  7348. +
  7349. +   /* copy and trim 802.11 header */
  7350. +
  7351. +   m_copydata(m, 0, hdrsize, (caddr_t) (txwi + 1));
  7352. +   m_adj(m, hdrspace);
  7353. +
  7354. +   error = bus_dmamap_load_mbuf_sg(ring->data_dma_tag, data->dma_map, m,
  7355. +       dma_seg, &ndmasegs, BUS_DMA_NOWAIT);
  7356. +   if (error != 0)
  7357. +   {
  7358. +       /* too many fragments, linearize */
  7359. +
  7360. +       RT2860_DPRINTF(sc, RT2860_DEBUG_TX,
  7361. +           "%s: could not load mbuf DMA map, trying to linearize mbuf: ndmasegs=%d, len=%d, error=%d\n",
  7362. +           device_get_nameunit(sc->sc_dev), ndmasegs, m->m_pkthdr.len, error);
  7363. +
  7364. +       m = m_defrag(m, M_DONTWAIT);
  7365. +       if (m == NULL)
  7366. +           return ENOMEM;
  7367. +
  7368. +       sc->tx_defrag_packets++;
  7369. +
  7370. +       error = bus_dmamap_load_mbuf_sg(ring->data_dma_tag, data->dma_map, m,
  7371. +           dma_seg, &ndmasegs, BUS_DMA_NOWAIT);
  7372. +       if (error != 0)
  7373. +       {
  7374. +           printf("%s: could not load mbuf DMA map: ndmasegs=%d, len=%d, error=%d\n",
  7375. +               device_get_nameunit(sc->sc_dev), ndmasegs, m->m_pkthdr.len, error);
  7376. +           m_freem(m);
  7377. +           return error;
  7378. +       }
  7379. +   }
  7380. +
  7381. +   if (m->m_pkthdr.len == 0)
  7382. +       ndmasegs = 0;
  7383. +
  7384. +   /* determine how many Tx descs are required */
  7385. +
  7386. +   ndescs = 1 + ndmasegs / 2;
  7387. +   if ((ring->desc_queued + ndescs) > (RT2860_SOFTC_TX_RING_DESC_COUNT - 2))
  7388. +   {
  7389. +       RT2860_DPRINTF(sc, RT2860_DEBUG_TX,
  7390. +           "%s: there are not enough Tx descs\n",
  7391. +           device_get_nameunit(sc->sc_dev));
  7392. +
  7393. +       sc->no_tx_desc_avail++;
  7394. +
  7395. +       bus_dmamap_unload(ring->data_dma_tag, data->dma_map);
  7396. +       m_freem(m);
  7397. +       return EFBIG;
  7398. +   }
  7399. +
  7400. +   data->m = m;
  7401. +   data->ni = ni;
  7402. +
  7403. +   /* set up Tx descs */
  7404. +
  7405. +   /* first segment is Tx wireless info and 802.11 header */
  7406. +
  7407. +   len = sizeof(struct rt2860_txwi) + hdrsize;
  7408. +
  7409. +   /* align end on a 4-bytes boundary */
  7410. +
  7411. +   dmalen = (len + 3) & ~ 3;
  7412. +
  7413. +   memset((caddr_t) txwi + len, 0, dmalen - len);
  7414. +
  7415. +   qsel = RT2860_TXDESC_QSEL_EDCA;
  7416. +
  7417. +   desc->sdp0 = htole32(ring->seg0_phys_addr + ring->data_cur * RT2860_TX_DATA_SEG0_SIZE);
  7418. +   desc->sdl0 = htole16(dmalen);
  7419. +   desc->qsel_flags = (qsel << RT2860_TXDESC_QSEL_SHIFT);
  7420. +
  7421. +   /* set up payload segments */
  7422. +
  7423. +   for (i = ndmasegs, j = 0; i >= 2; i -= 2)
  7424. +   {
  7425. +       desc->sdp1 = htole32(dma_seg[j].ds_addr);
  7426. +       desc->sdl1 = htole16(dma_seg[j].ds_len);
  7427. +
  7428. +       ring->desc_queued++;
  7429. +       ring->desc_cur = (ring->desc_cur + 1) % RT2860_SOFTC_TX_RING_DESC_COUNT;
  7430. +
  7431. +       j++;
  7432. +
  7433. +       desc = &ring->desc[ring->desc_cur];
  7434. +
  7435. +       desc->sdp0 = htole32(dma_seg[j].ds_addr);
  7436. +       desc->sdl0 = htole16(dma_seg[j].ds_len);
  7437. +       desc->qsel_flags = (qsel << RT2860_TXDESC_QSEL_SHIFT);
  7438. +
  7439. +       j++;
  7440. +   }
  7441. +
  7442. +   /* finalize last payload segment */
  7443. +
  7444. +   if (i > 0)
  7445. +   {
  7446. +       desc->sdp1 = htole32(dma_seg[j].ds_addr);
  7447. +       desc->sdl1 = htole16(dma_seg[j].ds_len | RT2860_TXDESC_SDL1_LASTSEG);
  7448. +   }
  7449. +   else
  7450. +   {
  7451. +       desc->sdl0 |= htole16(RT2860_TXDESC_SDL0_LASTSEG);
  7452. +       desc->sdl1 = 0;
  7453. +   }
  7454. +
  7455. +   RT2860_DPRINTF(sc, RT2860_DEBUG_TX,
  7456. +       "%s: sending MGMT frame: qid=%d, hdrsize=%d, hdrspace=%d, len=%d, "
  7457. +       "mcs=%d, mimops=%d, DMA len=%d, ndmasegs=%d, DMA ds_len=%d/%d/%d/%d/%d\n",
  7458. +       device_get_nameunit(sc->sc_dev),
  7459. +       qid, hdrsize, hdrspace, m->m_pkthdr.len + hdrsize,
  7460. +       mcs, mimops, dmalen, ndmasegs,
  7461. +       (int) dma_seg[0].ds_len, (int) dma_seg[1].ds_len, (int) dma_seg[2].ds_len, (int) dma_seg[3].ds_len, (int) dma_seg[4].ds_len);
  7462. +
  7463. +   bus_dmamap_sync(ring->seg0_dma_tag, ring->seg0_dma_map,
  7464. +       BUS_DMASYNC_PREWRITE);
  7465. +   bus_dmamap_sync(ring->data_dma_tag, data->dma_map,
  7466. +       BUS_DMASYNC_PREWRITE);
  7467. +   bus_dmamap_sync(ring->desc_dma_tag, ring->desc_dma_map,
  7468. +       BUS_DMASYNC_PREWRITE);
  7469. +
  7470. +   ring->desc_queued++;
  7471. +   ring->desc_cur = (ring->desc_cur + 1) % RT2860_SOFTC_TX_RING_DESC_COUNT;
  7472. +
  7473. +   ring->data_queued++;
  7474. +   ring->data_cur = (ring->data_cur + 1) % RT2860_SOFTC_TX_RING_DATA_COUNT;
  7475. +
  7476. +   /* kick Tx */
  7477. +
  7478. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(qid), ring->desc_cur);
  7479. +
  7480. +   return 0;
  7481. + }
  7482. +
  7483. + /*
  7484. +  * rt2860_tx_data
  7485. +  */
  7486. + static int rt2860_tx_data(struct rt2860_softc *sc,
  7487. +   struct mbuf *m, struct ieee80211_node *ni, int qid)
  7488. + {
  7489. +   struct ifnet *ifp;
  7490. +   struct ieee80211com *ic;
  7491. +   struct ieee80211vap *vap;
  7492. +   const struct ieee80211_txparam *tp;
  7493. +   struct rt2860_softc_node *rni;
  7494. +   struct rt2860_softc_tx_ring *ring;
  7495. +   struct rt2860_softc_tx_data *data;
  7496. +   struct rt2860_txdesc *desc;
  7497. +   struct rt2860_txwi *txwi;
  7498. +   struct ieee80211_frame *wh;
  7499. +   struct ieee80211_tx_ampdu *tx_ampdu;
  7500. +   ieee80211_seq seqno;
  7501. +   struct rt2860_softc_tx_radiotap_header *tap;
  7502. +   bus_dma_segment_t dma_seg[RT2860_SOFTC_MAX_SCATTER];
  7503. +   u_int hdrsize, hdrspace;
  7504. +   uint8_t type, rate, bw, stbc, shortgi, mcs, pid, wcid, mpdu_density, bawin_size, qsel;
  7505. +   uint16_t qos, len, dmalen, mpdu_len, dur;
  7506. +   int error, hasqos, ac, tid, ampdu, mimops, ndmasegs, ndescs, i, j;
  7507. +
  7508. +   KASSERT(qid >= 0 && qid < RT2860_SOFTC_TX_RING_COUNT,
  7509. +       ("%s: Tx data: invalid qid=%d\n",
  7510. +        device_get_nameunit(sc->sc_dev), qid));
  7511. +
  7512. +   RT2860_SOFTC_TX_RING_ASSERT_LOCKED(&sc->tx_ring[qid]);
  7513. +
  7514. +   ifp = sc->sc_ifp;
  7515. +   ic = ifp->if_l2com;
  7516. +   vap = ni->ni_vap;
  7517. +   rni = (struct rt2860_softc_node *) ni;
  7518. +   tp = ni->ni_txparms;
  7519. +
  7520. +   ring = &sc->tx_ring[qid];
  7521. +   desc = &ring->desc[ring->desc_cur];
  7522. +   data = &ring->data[ring->data_cur];
  7523. +   txwi = (struct rt2860_txwi *) (ring->seg0 + ring->data_cur * RT2860_TX_DATA_SEG0_SIZE);
  7524. +
  7525. +   wh = mtod(m, struct ieee80211_frame *);
  7526. +
  7527. +   type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
  7528. +
  7529. +   hasqos = IEEE80211_QOS_HAS_SEQ(wh);
  7530. +   if (hasqos)
  7531. +   {
  7532. +       if (IEEE80211_HAS_ADDR4(wh))
  7533. +           qos = le16toh(*(const uint16_t *)
  7534. +               (((struct ieee80211_qosframe_addr4 *) wh)->i_qos));
  7535. +       else
  7536. +           qos = le16toh(*(const uint16_t *)
  7537. +               (((struct ieee80211_qosframe *) wh)->i_qos));
  7538. +   }
  7539. +   else
  7540. +   {
  7541. +       qos = 0;
  7542. +   }
  7543. +
  7544. +   if (IEEE80211_IS_MULTICAST(wh->i_addr1))
  7545. +       rate = tp->mcastrate;
  7546. +   else if (m->m_flags & M_EAPOL)
  7547. +       rate = tp->mgmtrate;
  7548. +   else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
  7549. +       rate = tp->ucastrate;
  7550. +   else
  7551. +       rate = ni->ni_txrate;
  7552. +
  7553. +   rate &= IEEE80211_RATE_VAL;
  7554. + /* XXX */
  7555. +   if (!rate)
  7556. +       return EFBIG;
  7557. +
  7558. +   /* fill Tx wireless info */
  7559. +
  7560. +   if (ni->ni_flags & IEEE80211_NODE_HT)
  7561. +       mcs = rate;
  7562. +   else
  7563. +       mcs = rt2860_rate2mcs(rate);
  7564. +
  7565. +   if (type == IEEE80211_FC0_TYPE_DATA)
  7566. +       wcid = !IEEE80211_IS_MULTICAST(wh->i_addr1) ? rni->staid : RT2860_WCID_MCAST;
  7567. +   else
  7568. +       wcid = RT2860_WCID_RESERVED;
  7569. +
  7570. +   /* calculate MPDU length without padding */
  7571. +
  7572. +   hdrsize = ieee80211_anyhdrsize(wh);
  7573. +   hdrspace = ieee80211_anyhdrspace(ic, wh);
  7574. +   mpdu_len = m->m_pkthdr.len - hdrspace + hdrsize;
  7575. +
  7576. +   memset(txwi, 0, sizeof(struct rt2860_txwi));
  7577. +
  7578. +   txwi->wcid = wcid;
  7579. +
  7580. +   /* MIMO power save */
  7581. +
  7582. +   if ((ni->ni_flags & IEEE80211_NODE_HT) && (ni->ni_flags & IEEE80211_NODE_MIMO_PS))
  7583. +   {
  7584. +       if (mcs > 7)
  7585. +       {
  7586. +           if (ni->ni_flags & IEEE80211_NODE_MIMO_RTS)
  7587. +           {
  7588. +               /* dynamic MIMO power save */
  7589. +
  7590. +               txwi->mpdu_density_flags |=
  7591. +                   (RT2860_TXWI_FLAGS_MIMOPS << RT2860_TXWI_FLAGS_SHIFT);
  7592. +           }
  7593. +           else
  7594. +           {
  7595. +               /* static MIMO power save */
  7596. +
  7597. +               mcs = 7;
  7598. +           }
  7599. +       }
  7600. +
  7601. +       mimops = 1;
  7602. +   }
  7603. +   else
  7604. +   {
  7605. +       mimops = 0;
  7606. +   }
  7607. +
  7608. +   pid = (mcs < 0xf) ? (mcs + 1) : mcs;
  7609. +
  7610. +   txwi->pid_mpdu_len = ((htole16(pid) & RT2860_TXWI_PID_MASK) <<
  7611. +       RT2860_TXWI_PID_SHIFT) | ((htole16(mpdu_len) & RT2860_TXWI_MPDU_LEN_MASK) <<
  7612. +           RT2860_TXWI_MPDU_LEN_SHIFT);
  7613. +
  7614. +   stbc = sc->tx_stbc && (mcs <= 7) && (vap->iv_htcaps & IEEE80211_HTCAP_TXSTBC) &&
  7615. +       (ni->ni_flags & IEEE80211_NODE_HT) && (ni->ni_htcap & IEEE80211_HTCAP_RXSTBC);
  7616. +
  7617. +   shortgi = ((vap->iv_flags_ht & IEEE80211_FHT_SHORTGI20) && (ni->ni_flags & IEEE80211_NODE_SGI20) && (ni->ni_chw == 20)) ||
  7618. +       ((vap->iv_flags_ht & IEEE80211_FHT_SHORTGI40) && (ni->ni_flags & IEEE80211_NODE_SGI40) && (ni->ni_chw == 40));
  7619. +
  7620. +   txwi->phymode_ifs_stbc_shortgi |=
  7621. +       ((stbc & RT2860_TXWI_STBC_MASK) << RT2860_TXWI_STBC_SHIFT) |
  7622. +       ((shortgi & RT2860_TXWI_SHORTGI_MASK) << RT2860_TXWI_SHORTGI_SHIFT);
  7623. +
  7624. +   if (ni->ni_flags & IEEE80211_NODE_HT)
  7625. +   {
  7626. +       txwi->phymode_ifs_stbc_shortgi |=
  7627. +           (RT2860_TXWI_PHYMODE_HT_MIXED << RT2860_TXWI_PHYMODE_SHIFT);
  7628. +   }
  7629. +   else
  7630. +   {
  7631. +       if (ieee80211_rate2phytype(ic->ic_rt, rate) != IEEE80211_T_OFDM)
  7632. +       {
  7633. +           txwi->phymode_ifs_stbc_shortgi |=
  7634. +               (RT2860_TXWI_PHYMODE_CCK << RT2860_TXWI_PHYMODE_SHIFT);
  7635. +
  7636. +           if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
  7637. +               mcs |= RT2860_TXWI_MCS_SHOTPRE;
  7638. +       }
  7639. +       else
  7640. +       {
  7641. +           txwi->phymode_ifs_stbc_shortgi |=
  7642. +               (RT2860_TXWI_PHYMODE_OFDM << RT2860_TXWI_PHYMODE_SHIFT);
  7643. +       }
  7644. +   }
  7645. +
  7646. +   if ((ni->ni_flags & IEEE80211_NODE_HT) && (ni->ni_chw == 40))
  7647. +       bw = RT2860_TXWI_BW_40;
  7648. +   else
  7649. +       bw = RT2860_TXWI_BW_20;
  7650. +
  7651. +   txwi->bw_mcs = ((bw & RT2860_TXWI_BW_MASK) << RT2860_TXWI_BW_SHIFT) |
  7652. +       ((mcs & RT2860_TXWI_MCS_MASK) << RT2860_TXWI_MCS_SHIFT);
  7653. +
  7654. +   txwi->txop = (RT2860_TXWI_TXOP_HT << RT2860_TXWI_TXOP_SHIFT);
  7655. +
  7656. +   if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
  7657. +       (!hasqos || (qos & IEEE80211_QOS_ACKPOLICY) != IEEE80211_QOS_ACKPOLICY_NOACK))
  7658. +   {
  7659. +       txwi->bawin_size_xflags |=
  7660. +           (RT2860_TXWI_XFLAGS_ACK << RT2860_TXWI_XFLAGS_SHIFT);
  7661. +
  7662. +       if (ni->ni_flags & IEEE80211_NODE_HT)
  7663. +       {
  7664. +           /* preamble + plcp + signal extension + SIFS */
  7665. +
  7666. +           dur = 16 + 4 + 6 + 10;
  7667. +       }
  7668. +       else
  7669. +       {
  7670. +           dur = ieee80211_ack_duration(ic->ic_rt, rate,
  7671. +               ic->ic_flags & IEEE80211_F_SHPREAMBLE);
  7672. +       }
  7673. +
  7674. +       *(uint16_t *) wh->i_dur = htole16(dur);
  7675. +   }
  7676. +
  7677. +   /* check for A-MPDU */
  7678. +
  7679. +   if (m->m_flags & M_AMPDU_MPDU)
  7680. +   {
  7681. +       ac = M_WME_GETAC(m);
  7682. +       tid = WME_AC_TO_TID(ac);
  7683. +       tx_ampdu = &ni->ni_tx_ampdu[ac];
  7684. +
  7685. +       mpdu_density = RT2860_MS(ni->ni_htparam, IEEE80211_HTCAP_MPDUDENSITY);
  7686. +       bawin_size = tx_ampdu->txa_wnd;
  7687. +
  7688. +       txwi->mpdu_density_flags |=
  7689. +           ((mpdu_density & RT2860_TXWI_MPDU_DENSITY_MASK) << RT2860_TXWI_MPDU_DENSITY_SHIFT) |
  7690. +           (RT2860_TXWI_FLAGS_AMPDU << RT2860_TXWI_FLAGS_SHIFT);
  7691. +
  7692. +       txwi->bawin_size_xflags |=
  7693. +           ((bawin_size & RT2860_TXWI_BAWIN_SIZE_MASK) << RT2860_TXWI_BAWIN_SIZE_SHIFT);
  7694. +
  7695. +       seqno = ni->ni_txseqs[tid]++;
  7696. +
  7697. +       *(uint16_t *) &wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
  7698. +
  7699. +       ampdu = 1;
  7700. +   }
  7701. +   else
  7702. +   {
  7703. +       mpdu_density = 0;
  7704. +       bawin_size = 0;
  7705. +       ampdu = 0;
  7706. +   }
  7707. +
  7708. +   /* ask MAC to insert timestamp into probe responses */
  7709. +
  7710. +   if ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
  7711. +       (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
  7712. +       txwi->mpdu_density_flags |=
  7713. +           (RT2860_TXWI_FLAGS_TS << RT2860_TXWI_FLAGS_SHIFT);
  7714. +
  7715. +   if (ieee80211_radiotap_active_vap(vap))
  7716. +   {
  7717. +       tap = &sc->txtap;
  7718. +
  7719. +       tap->flags = IEEE80211_RADIOTAP_F_DATAPAD;
  7720. +       tap->chan_flags = htole32(ic->ic_curchan->ic_flags);
  7721. +       tap->chan_freq = htole16(ic->ic_curchan->ic_freq);
  7722. +       tap->chan_ieee = ic->ic_curchan->ic_ieee;
  7723. +       tap->chan_maxpow = 0;
  7724. +
  7725. +       if (ni->ni_flags & IEEE80211_NODE_HT)
  7726. +           tap->rate = mcs | IEEE80211_RATE_MCS;
  7727. +       else
  7728. +           tap->rate = rate;
  7729. +
  7730. +       if (mcs & RT2860_TXWI_MCS_SHOTPRE)
  7731. +           tap->flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  7732. +
  7733. +       if (shortgi)
  7734. +           tap->flags |= IEEE80211_RADIOTAP_F_SHORTGI;
  7735. +
  7736. +       if (wh->i_fc[1] & IEEE80211_FC1_WEP)
  7737. +           tap->flags |= IEEE80211_RADIOTAP_F_WEP;
  7738. +
  7739. +       /* XXX use temporarily radiotap CFP flag as A-MPDU flag */
  7740. +
  7741. +       if (ampdu)
  7742. +           tap->flags |= IEEE80211_RADIOTAP_F_CFP;
  7743. +
  7744. +       if (wh->i_fc[1] & IEEE80211_FC1_WEP)
  7745. +       {
  7746. +           wh->i_fc[1] &= ~IEEE80211_FC1_WEP;
  7747. +
  7748. +           ieee80211_radiotap_tx(vap, m);
  7749. +
  7750. +           wh->i_fc[1] |= IEEE80211_FC1_WEP;
  7751. +       }
  7752. +       else
  7753. +       {
  7754. +           ieee80211_radiotap_tx(vap, m);
  7755. +       }
  7756. +   }
  7757. +
  7758. +   /* copy and trim 802.11 header */
  7759. +
  7760. +   m_copydata(m, 0, hdrsize, (caddr_t) (txwi + 1));
  7761. +   m_adj(m, hdrspace);
  7762. +
  7763. +   error = bus_dmamap_load_mbuf_sg(ring->data_dma_tag, data->dma_map, m,
  7764. +       dma_seg, &ndmasegs, BUS_DMA_NOWAIT);
  7765. +   if (error != 0)
  7766. +   {
  7767. +       /* too many fragments, linearize */
  7768. +
  7769. +       RT2860_DPRINTF(sc, RT2860_DEBUG_TX,
  7770. +           "%s: could not load mbuf DMA map, trying to linearize mbuf: ndmasegs=%d, len=%d, error=%d\n",
  7771. +           device_get_nameunit(sc->sc_dev), ndmasegs, m->m_pkthdr.len, error);
  7772. +
  7773. +       m = m_defrag(m, M_DONTWAIT);
  7774. +       if (m == NULL)
  7775. +           return ENOMEM;
  7776. +
  7777. +       sc->tx_defrag_packets++;
  7778. +
  7779. +       error = bus_dmamap_load_mbuf_sg(ring->data_dma_tag, data->dma_map, m,
  7780. +           dma_seg, &ndmasegs, BUS_DMA_NOWAIT);
  7781. +       if (error != 0)
  7782. +       {
  7783. +           printf("%s: could not load mbuf DMA map: ndmasegs=%d, len=%d, error=%d\n",
  7784. +               device_get_nameunit(sc->sc_dev), ndmasegs, m->m_pkthdr.len, error);
  7785. +           m_freem(m);
  7786. +           return error;
  7787. +       }
  7788. +   }
  7789. +
  7790. +   if (m->m_pkthdr.len == 0)
  7791. +       ndmasegs = 0;
  7792. +
  7793. +   /* determine how many Tx descs are required */
  7794. +
  7795. +   ndescs = 1 + ndmasegs / 2;
  7796. +   if ((ring->desc_queued + ndescs) > (RT2860_SOFTC_TX_RING_DESC_COUNT - 2))
  7797. +   {
  7798. +       RT2860_DPRINTF(sc, RT2860_DEBUG_TX,
  7799. +           "%s: there are not enough Tx descs\n",
  7800. +           device_get_nameunit(sc->sc_dev));
  7801. +
  7802. +       sc->no_tx_desc_avail++;
  7803. +
  7804. +       bus_dmamap_unload(ring->data_dma_tag, data->dma_map);
  7805. +       m_freem(m);
  7806. +       return EFBIG;
  7807. +   }
  7808. +
  7809. +   data->m = m;
  7810. +   data->ni = ni;
  7811. +
  7812. +   /* set up Tx descs */
  7813. +
  7814. +   /* first segment is Tx wireless info and 802.11 header */
  7815. +
  7816. +   len = sizeof(struct rt2860_txwi) + hdrsize;
  7817. +
  7818. +   /* align end on a 4-bytes boundary */
  7819. +
  7820. +   dmalen = (len + 3) & ~ 3;
  7821. +
  7822. +   memset((caddr_t) txwi + len, 0, dmalen - len);
  7823. +
  7824. +   qsel = RT2860_TXDESC_QSEL_EDCA;
  7825. +
  7826. +   desc->sdp0 = htole32(ring->seg0_phys_addr + ring->data_cur * RT2860_TX_DATA_SEG0_SIZE);
  7827. +   desc->sdl0 = htole16(dmalen);
  7828. +   desc->qsel_flags = (qsel << RT2860_TXDESC_QSEL_SHIFT);
  7829. +
  7830. +   /* set up payload segments */
  7831. +
  7832. +   for (i = ndmasegs, j = 0; i >= 2; i -= 2)
  7833. +   {
  7834. +       desc->sdp1 = htole32(dma_seg[j].ds_addr);
  7835. +       desc->sdl1 = htole16(dma_seg[j].ds_len);
  7836. +
  7837. +       ring->desc_queued++;
  7838. +       ring->desc_cur = (ring->desc_cur + 1) % RT2860_SOFTC_TX_RING_DESC_COUNT;
  7839. +
  7840. +       j++;
  7841. +
  7842. +       desc = &ring->desc[ring->desc_cur];
  7843. +
  7844. +       desc->sdp0 = htole32(dma_seg[j].ds_addr);
  7845. +       desc->sdl0 = htole16(dma_seg[j].ds_len);
  7846. +       desc->qsel_flags = (qsel << RT2860_TXDESC_QSEL_SHIFT);
  7847. +
  7848. +       j++;
  7849. +   }
  7850. +
  7851. +   /* finalize last payload segment */
  7852. +
  7853. +   if (i > 0)
  7854. +   {
  7855. +       desc->sdp1 = htole32(dma_seg[j].ds_addr);
  7856. +       desc->sdl1 = htole16(dma_seg[j].ds_len | RT2860_TXDESC_SDL1_LASTSEG);
  7857. +   }
  7858. +   else
  7859. +   {
  7860. +       desc->sdl0 |= htole16(RT2860_TXDESC_SDL0_LASTSEG);
  7861. +       desc->sdl1 = 0;
  7862. +   }
  7863. +
  7864. +   RT2860_DPRINTF(sc, RT2860_DEBUG_TX,
  7865. +       "%s: sending data: qid=%d, hdrsize=%d, hdrspace=%d, len=%d, "
  7866. +       "bw=%d, stbc=%d, shortgi=%d, mcs=%d, wcid=0x%02x, "
  7867. +       "ampdu=%d (density=%d, winsize=%d), mimops=%d, DMA len=%d, ndmasegs=%d, DMA ds_len=%d/%d/%d/%d/%d\n",
  7868. +       device_get_nameunit(sc->sc_dev),
  7869. +       qid, hdrsize, hdrspace, m->m_pkthdr.len + hdrsize,
  7870. +       bw, stbc, shortgi, mcs, wcid, ampdu, mpdu_density, bawin_size, mimops, dmalen, ndmasegs,
  7871. +       (int) dma_seg[0].ds_len, (int) dma_seg[1].ds_len, (int) dma_seg[2].ds_len, (int) dma_seg[3].ds_len, (int) dma_seg[4].ds_len);
  7872. +
  7873. +   bus_dmamap_sync(ring->seg0_dma_tag, ring->seg0_dma_map,
  7874. +       BUS_DMASYNC_PREWRITE);
  7875. +   bus_dmamap_sync(ring->data_dma_tag, data->dma_map,
  7876. +       BUS_DMASYNC_PREWRITE);
  7877. +   bus_dmamap_sync(ring->desc_dma_tag, ring->desc_dma_map,
  7878. +       BUS_DMASYNC_PREWRITE);
  7879. +
  7880. +   ring->desc_queued++;
  7881. +   ring->desc_cur = (ring->desc_cur + 1) % RT2860_SOFTC_TX_RING_DESC_COUNT;
  7882. +
  7883. +   ring->data_queued++;
  7884. +   ring->data_cur = (ring->data_cur + 1) % RT2860_SOFTC_TX_RING_DATA_COUNT;
  7885. +
  7886. +   /* kick Tx */
  7887. +
  7888. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(qid), ring->desc_cur);
  7889. +
  7890. +   return 0;
  7891. + }
  7892. +
  7893. + /*
  7894. +  * rt2860_tx_raw
  7895. + static int rt2860_tx_raw(struct rt2860_softc *sc,
  7896. +   struct mbuf *m, struct ieee80211_node *ni,
  7897. +   const struct ieee80211_bpf_params *params)
  7898. + {
  7899. +   RT2860_DPRINTF(sc, RT2860_DEBUG_TX,
  7900. +       "%s: Tx raw\n",
  7901. +       device_get_nameunit(sc->sc_dev));
  7902. +
  7903. +   return 0;
  7904. + }
  7905. +  */
  7906. +
  7907. + /*
  7908. +  * rt2860_intr
  7909. +  */
  7910. + void rt2860_intr(void *arg)
  7911. + {
  7912. +   struct rt2860_softc *sc;
  7913. +   struct ifnet *ifp;
  7914. +   uint32_t status;
  7915. +
  7916. +   sc = arg;
  7917. +   ifp = sc->sc_ifp;
  7918. +
  7919. +   /* acknowledge interrupts */
  7920. +
  7921. +   status = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_INT_STATUS);
  7922. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_INT_STATUS, status);
  7923. +
  7924. +   RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
  7925. +       "%s: interrupt: status = 0x%08x\n",
  7926. +       device_get_nameunit(sc->sc_dev), status);
  7927. +
  7928. +   if (status == 0xffffffff ||     /* device likely went away */
  7929. +       status == 0)                /* not for us */
  7930. +       return;
  7931. +
  7932. +   sc->interrupts++;
  7933. +
  7934. +   if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
  7935. +       return;
  7936. +
  7937. +   if (status & RT2860_REG_INT_TX_COHERENT)
  7938. +       rt2860_tx_coherent_intr(sc);
  7939. +
  7940. +   if (status & RT2860_REG_INT_RX_COHERENT)
  7941. +       rt2860_rx_coherent_intr(sc);
  7942. +
  7943. +   if (status & RT2860_REG_INT_TXRX_COHERENT)
  7944. +       rt2860_txrx_coherent_intr(sc);
  7945. +
  7946. +   if (status & RT2860_REG_INT_FIFO_STA_FULL)
  7947. +       rt2860_fifo_sta_full_intr(sc);
  7948. +
  7949. +   if (status & RT2860_REG_INT_TX_MGMT_DONE)
  7950. +       rt2860_tx_intr(sc, 5);
  7951. +
  7952. +   if (status & RT2860_REG_INT_RX_DONE)
  7953. +       rt2860_rx_intr(sc);
  7954. +
  7955. +   if (status & RT2860_REG_INT_RX_DELAY_DONE)
  7956. +       rt2860_rx_delay_intr(sc);
  7957. +
  7958. +   if (status & RT2860_REG_INT_TX_HCCA_DONE)
  7959. +       rt2860_tx_intr(sc, 4);
  7960. +
  7961. +   if (status & RT2860_REG_INT_TX_AC3_DONE)
  7962. +       rt2860_tx_intr(sc, 3);
  7963. +
  7964. +   if (status & RT2860_REG_INT_TX_AC2_DONE)
  7965. +       rt2860_tx_intr(sc, 2);
  7966. +
  7967. +   if (status & RT2860_REG_INT_TX_AC1_DONE)
  7968. +       rt2860_tx_intr(sc, 1);
  7969. +
  7970. +   if (status & RT2860_REG_INT_TX_AC0_DONE)
  7971. +       rt2860_tx_intr(sc, 0);
  7972. +
  7973. +   if (status & RT2860_REG_INT_TX_DELAY_DONE)
  7974. +       rt2860_tx_delay_intr(sc);
  7975. +
  7976. +   if (status & RT2860_REG_INT_PRE_TBTT)
  7977. +       rt2860_pre_tbtt_intr(sc);
  7978. +
  7979. +   if (status & RT2860_REG_INT_TBTT)
  7980. +       rt2860_tbtt_intr(sc);
  7981. +
  7982. +   if (status & RT2860_REG_INT_MCU_CMD)
  7983. +       rt2860_mcu_cmd_intr(sc);
  7984. +
  7985. +   if (status & RT2860_REG_INT_AUTO_WAKEUP)
  7986. +       rt2860_auto_wakeup_intr(sc);
  7987. +
  7988. +   if (status & RT2860_REG_INT_GP_TIMER)
  7989. +       rt2860_gp_timer_intr(sc);
  7990. + }
  7991. +
  7992. + /*
  7993. +  * rt2860_tx_coherent_intr
  7994. +  */
  7995. + static void rt2860_tx_coherent_intr(struct rt2860_softc *sc)
  7996. + {
  7997. +   uint32_t tmp;
  7998. +   int i;
  7999. +
  8000. +   RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
  8001. +       "%s: Tx coherent interrupt\n",
  8002. +       device_get_nameunit(sc->sc_dev));
  8003. +
  8004. +   sc->tx_coherent_interrupts++;
  8005. +
  8006. +   /* restart DMA engine */
  8007. +
  8008. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
  8009. +
  8010. +   tmp &= ~(RT2860_REG_TX_WB_DDONE |
  8011. +       RT2860_REG_RX_DMA_ENABLE |
  8012. +       RT2860_REG_TX_DMA_ENABLE);
  8013. +
  8014. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
  8015. +
  8016. +   /* init Tx rings (4 EDCAs + HCCA + MGMT) */
  8017. +
  8018. +   for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++)
  8019. +       rt2860_reset_tx_ring(sc, &sc->tx_ring[i]);
  8020. +
  8021. +   for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++)
  8022. +   {
  8023. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_BASE_PTR(i),
  8024. +           sc->tx_ring[i].desc_phys_addr);
  8025. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_MAX_CNT(i),
  8026. +           RT2860_SOFTC_TX_RING_DESC_COUNT);
  8027. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(i), 0);
  8028. +   }
  8029. +
  8030. +   /* init Rx ring */
  8031. +
  8032. +   rt2860_reset_rx_ring(sc, &sc->rx_ring);
  8033. +
  8034. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_BASE_PTR,
  8035. +       sc->rx_ring.desc_phys_addr);
  8036. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_MAX_CNT,
  8037. +       RT2860_SOFTC_RX_RING_DATA_COUNT);
  8038. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_CALC_IDX,
  8039. +       RT2860_SOFTC_RX_RING_DATA_COUNT - 1);
  8040. +
  8041. +   rt2860_txrx_enable(sc);
  8042. + }
  8043. +
  8044. + /*
  8045. +  * rt2860_rx_coherent_intr
  8046. +  */
  8047. + static void rt2860_rx_coherent_intr(struct rt2860_softc *sc)
  8048. + {
  8049. +   uint32_t tmp;
  8050. +   int i;
  8051. +
  8052. +   RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
  8053. +       "%s: Rx coherent interrupt\n",
  8054. +       device_get_nameunit(sc->sc_dev));
  8055. +
  8056. +   sc->rx_coherent_interrupts++;
  8057. +
  8058. +   /* restart DMA engine */
  8059. +
  8060. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
  8061. +
  8062. +   tmp &= ~(RT2860_REG_TX_WB_DDONE |
  8063. +       RT2860_REG_RX_DMA_ENABLE |
  8064. +       RT2860_REG_TX_DMA_ENABLE);
  8065. +
  8066. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
  8067. +
  8068. +   /* init Tx rings (4 EDCAs + HCCA + MGMT) */
  8069. +
  8070. +   for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++)
  8071. +       rt2860_reset_tx_ring(sc, &sc->tx_ring[i]);
  8072. +
  8073. +   for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++)
  8074. +   {
  8075. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_BASE_PTR(i),
  8076. +           sc->tx_ring[i].desc_phys_addr);
  8077. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_MAX_CNT(i),
  8078. +           RT2860_SOFTC_TX_RING_DESC_COUNT);
  8079. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(i), 0);
  8080. +   }
  8081. +
  8082. +   /* init Rx ring */
  8083. +
  8084. +   rt2860_reset_rx_ring(sc, &sc->rx_ring);
  8085. +
  8086. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_BASE_PTR,
  8087. +       sc->rx_ring.desc_phys_addr);
  8088. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_MAX_CNT,
  8089. +       RT2860_SOFTC_RX_RING_DATA_COUNT);
  8090. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_CALC_IDX,
  8091. +       RT2860_SOFTC_RX_RING_DATA_COUNT - 1);
  8092. +
  8093. +   rt2860_txrx_enable(sc);
  8094. + }
  8095. +
  8096. + /*
  8097. +  * rt2860_txrx_coherent_intr
  8098. +  */
  8099. + static void rt2860_txrx_coherent_intr(struct rt2860_softc *sc)
  8100. + {
  8101. +   uint32_t tmp;
  8102. +   int i;
  8103. +
  8104. +   RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
  8105. +       "%s: Tx/Rx coherent interrupt\n",
  8106. +       device_get_nameunit(sc->sc_dev));
  8107. +
  8108. +   sc->txrx_coherent_interrupts++;
  8109. +
  8110. +   /* restart DMA engine */
  8111. +
  8112. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
  8113. +
  8114. +   tmp &= ~(RT2860_REG_TX_WB_DDONE |
  8115. +       RT2860_REG_RX_DMA_ENABLE |
  8116. +       RT2860_REG_TX_DMA_ENABLE);
  8117. +
  8118. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
  8119. +
  8120. +   /* init Tx rings (4 EDCAs + HCCA + MGMT) */
  8121. +
  8122. +   for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++)
  8123. +       rt2860_reset_tx_ring(sc, &sc->tx_ring[i]);
  8124. +
  8125. +   for (i = 0; i < RT2860_SOFTC_TX_RING_COUNT; i++)
  8126. +   {
  8127. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_BASE_PTR(i),
  8128. +           sc->tx_ring[i].desc_phys_addr);
  8129. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_MAX_CNT(i),
  8130. +           RT2860_SOFTC_TX_RING_DESC_COUNT);
  8131. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_TX_CTX_IDX(i), 0);
  8132. +   }
  8133. +
  8134. +   /* init Rx ring */
  8135. +
  8136. +   rt2860_reset_rx_ring(sc, &sc->rx_ring);
  8137. +
  8138. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_BASE_PTR,
  8139. +       sc->rx_ring.desc_phys_addr);
  8140. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_MAX_CNT,
  8141. +       RT2860_SOFTC_RX_RING_DATA_COUNT);
  8142. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_CALC_IDX,
  8143. +       RT2860_SOFTC_RX_RING_DATA_COUNT - 1);
  8144. +
  8145. +   rt2860_txrx_enable(sc);
  8146. + }
  8147. +
  8148. + /*
  8149. +  * rt2860_fifo_sta_full_intr
  8150. +  */
  8151. + static void rt2860_fifo_sta_full_intr(struct rt2860_softc *sc)
  8152. + {
  8153. +   RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
  8154. +       "%s: FIFO statistic full interrupt\n",
  8155. +       device_get_nameunit(sc->sc_dev));
  8156. +
  8157. +   sc->fifo_sta_full_interrupts++;
  8158. +
  8159. +   RT2860_SOFTC_LOCK(sc);
  8160. +
  8161. +   if (!(sc->intr_disable_mask & RT2860_REG_INT_FIFO_STA_FULL))
  8162. +   {
  8163. +       rt2860_intr_disable(sc, RT2860_REG_INT_FIFO_STA_FULL);
  8164. +
  8165. +       taskqueue_enqueue(sc->taskqueue, &sc->fifo_sta_full_task);
  8166. +   }
  8167. +
  8168. +   sc->intr_pending_mask |= RT2860_REG_INT_FIFO_STA_FULL;
  8169. +
  8170. +   RT2860_SOFTC_UNLOCK(sc);
  8171. + }
  8172. +
  8173. + /*
  8174. +  * rt2860_rx_intr
  8175. +  */
  8176. + static void rt2860_rx_intr(struct rt2860_softc *sc)
  8177. + {
  8178. +   RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
  8179. +       "%s: Rx interrupt\n",
  8180. +       device_get_nameunit(sc->sc_dev));
  8181. +
  8182. +   sc->rx_interrupts++;
  8183. +
  8184. +   RT2860_SOFTC_LOCK(sc);
  8185. +
  8186. +   if (!(sc->intr_disable_mask & RT2860_REG_INT_RX_DONE))
  8187. +   {
  8188. +       rt2860_intr_disable(sc, RT2860_REG_INT_RX_DONE);
  8189. +
  8190. +       taskqueue_enqueue(sc->taskqueue, &sc->rx_done_task);
  8191. +   }
  8192. +
  8193. +   sc->intr_pending_mask |= RT2860_REG_INT_RX_DONE;
  8194. +
  8195. +   RT2860_SOFTC_UNLOCK(sc);
  8196. + }
  8197. +
  8198. + /*
  8199. +  * rt2860_rx_delay_intr
  8200. +  */
  8201. + static void rt2860_rx_delay_intr(struct rt2860_softc *sc)
  8202. + {
  8203. +   RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
  8204. +       "%s: Rx delay interrupt\n",
  8205. +       device_get_nameunit(sc->sc_dev));
  8206. +
  8207. +   sc->rx_delay_interrupts++;
  8208. + }
  8209. +
  8210. + /*
  8211. +  * rt2860_tx_intr
  8212. +  */
  8213. + static void rt2860_tx_intr(struct rt2860_softc *sc, int qid)
  8214. + {
  8215. +   KASSERT(qid >= 0 && qid < RT2860_SOFTC_TX_RING_COUNT,
  8216. +       ("%s: Tx interrupt: invalid qid=%d\n",
  8217. +        device_get_nameunit(sc->sc_dev), qid));
  8218. +
  8219. +   RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
  8220. +       "%s: Tx interrupt: qid=%d\n",
  8221. +       device_get_nameunit(sc->sc_dev), qid);
  8222. +
  8223. +   sc->tx_interrupts[qid]++;
  8224. +
  8225. +   RT2860_SOFTC_LOCK(sc);
  8226. +
  8227. +   if (!(sc->intr_disable_mask & (RT2860_REG_INT_TX_AC0_DONE << qid)))
  8228. +   {
  8229. +       rt2860_intr_disable(sc, (RT2860_REG_INT_TX_AC0_DONE << qid));
  8230. +
  8231. +       taskqueue_enqueue(sc->taskqueue, &sc->tx_done_task);
  8232. +   }
  8233. +
  8234. +   sc->intr_pending_mask |= (RT2860_REG_INT_TX_AC0_DONE << qid);
  8235. +
  8236. +   RT2860_SOFTC_UNLOCK(sc);
  8237. + }
  8238. +
  8239. + /*
  8240. +  * rt2860_tx_delay_intr
  8241. +  */
  8242. + static void rt2860_tx_delay_intr(struct rt2860_softc *sc)
  8243. + {
  8244. +   RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
  8245. +       "%s: Tx delay interrupt\n",
  8246. +       device_get_nameunit(sc->sc_dev));
  8247. +
  8248. +   sc->tx_delay_interrupts++;
  8249. + }
  8250. +
  8251. + /*
  8252. +  * rt2860_pre_tbtt_intr
  8253. +  */
  8254. + static void rt2860_pre_tbtt_intr(struct rt2860_softc *sc)
  8255. + {
  8256. +   RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
  8257. +       "%s: Pre-TBTT interrupt\n",
  8258. +       device_get_nameunit(sc->sc_dev));
  8259. +
  8260. +   sc->pre_tbtt_interrupts++;
  8261. + }
  8262. +
  8263. + /*
  8264. +  * rt2860_tbtt_intr
  8265. +  */
  8266. + static void rt2860_tbtt_intr(struct rt2860_softc *sc)
  8267. + {
  8268. +   RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
  8269. +       "%s: TBTT interrupt\n",
  8270. +       device_get_nameunit(sc->sc_dev));
  8271. +
  8272. +   sc->tbtt_interrupts++;
  8273. + }
  8274. +
  8275. + /*
  8276. +  * rt2860_mcu_cmd_intr
  8277. +  */
  8278. + static void rt2860_mcu_cmd_intr(struct rt2860_softc *sc)
  8279. + {
  8280. +   RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
  8281. +       "%s: MCU command interrupt\n",
  8282. +       device_get_nameunit(sc->sc_dev));
  8283. +
  8284. +   sc->mcu_cmd_interrupts++;
  8285. + }
  8286. +
  8287. + /*
  8288. +  * rt2860_auto_wakeup_intr
  8289. +  */
  8290. + static void rt2860_auto_wakeup_intr(struct rt2860_softc *sc)
  8291. + {
  8292. +   RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
  8293. +       "%s: auto wakeup interrupt\n",
  8294. +       device_get_nameunit(sc->sc_dev));
  8295. +
  8296. +   sc->auto_wakeup_interrupts++;
  8297. + }
  8298. +
  8299. + /*
  8300. +  * rt2860_gp_timer_intr
  8301. +  */
  8302. + static void rt2860_gp_timer_intr(struct rt2860_softc *sc)
  8303. + {
  8304. +   RT2860_DPRINTF(sc, RT2860_DEBUG_INTR,
  8305. +       "%s: GP timer interrupt\n",
  8306. +       device_get_nameunit(sc->sc_dev));
  8307. +
  8308. +   sc->gp_timer_interrupts++;
  8309. + }
  8310. +
  8311. + /*
  8312. +  * rt2860_rx_done_task
  8313. +  */
  8314. + static void rt2860_rx_done_task(void *context, int pending)
  8315. + {
  8316. +   struct rt2860_softc *sc;
  8317. +   struct ifnet *ifp;
  8318. +   int again;
  8319. +
  8320. +   sc = context;
  8321. +   ifp = sc->sc_ifp;
  8322. +
  8323. +   RT2860_DPRINTF(sc, RT2860_DEBUG_RX,
  8324. +       "%s: Rx done task\n",
  8325. +       device_get_nameunit(sc->sc_dev));
  8326. +
  8327. +   if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
  8328. +       return;
  8329. +
  8330. +   sc->intr_pending_mask &= ~RT2860_REG_INT_RX_DONE;
  8331. +
  8332. +   again = rt2860_rx_eof(sc, sc->rx_process_limit);
  8333. +
  8334. +   RT2860_SOFTC_LOCK(sc);
  8335. +
  8336. +   if ((sc->intr_pending_mask & RT2860_REG_INT_RX_DONE) || again)
  8337. +   {
  8338. +       RT2860_DPRINTF(sc, RT2860_DEBUG_RX,
  8339. +           "%s: Rx done task: scheduling again\n",
  8340. +           device_get_nameunit(sc->sc_dev));
  8341. +
  8342. +       taskqueue_enqueue(sc->taskqueue, &sc->rx_done_task);
  8343. +   }
  8344. +   else
  8345. +   {
  8346. +       rt2860_intr_enable(sc, RT2860_REG_INT_RX_DONE);
  8347. +   }
  8348. +
  8349. +   RT2860_SOFTC_UNLOCK(sc);
  8350. + }
  8351. +
  8352. + /*
  8353. +  * rt2860_tx_done_task
  8354. +  */
  8355. + static void rt2860_tx_done_task(void *context, int pending)
  8356. + {
  8357. +   struct rt2860_softc *sc;
  8358. +   struct ifnet *ifp;
  8359. +   uint32_t intr_mask;
  8360. +   int i;
  8361. +
  8362. +   sc = context;
  8363. +   ifp = sc->sc_ifp;
  8364. +
  8365. +   RT2860_DPRINTF(sc, RT2860_DEBUG_TX,
  8366. +       "%s: Tx done task\n",
  8367. +       device_get_nameunit(sc->sc_dev));
  8368. +
  8369. +   if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
  8370. +       return;
  8371. +
  8372. +   for (i = RT2860_SOFTC_TX_RING_COUNT - 1; i >= 0; i--)
  8373. +   {
  8374. +       if (sc->intr_pending_mask & (RT2860_REG_INT_TX_AC0_DONE << i))
  8375. +       {
  8376. +           sc->intr_pending_mask &= ~(RT2860_REG_INT_TX_AC0_DONE << i);
  8377. +
  8378. +           rt2860_tx_eof(sc, &sc->tx_ring[i]);
  8379. +       }
  8380. +   }
  8381. +
  8382. +   sc->sc_tx_timer = 0;
  8383. +
  8384. +   ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
  8385. +
  8386. +   intr_mask = (RT2860_REG_INT_TX_MGMT_DONE |
  8387. +       RT2860_REG_INT_TX_HCCA_DONE |
  8388. +       RT2860_REG_INT_TX_AC3_DONE |
  8389. +       RT2860_REG_INT_TX_AC2_DONE |
  8390. +       RT2860_REG_INT_TX_AC1_DONE |
  8391. +       RT2860_REG_INT_TX_AC0_DONE);
  8392. +
  8393. +   RT2860_SOFTC_LOCK(sc);
  8394. +
  8395. +   rt2860_intr_enable(sc, ~sc->intr_pending_mask &
  8396. +       (sc->intr_disable_mask & intr_mask));
  8397. +
  8398. +   if (sc->intr_pending_mask & intr_mask)
  8399. +   {
  8400. +       RT2860_DPRINTF(sc, RT2860_DEBUG_TX,
  8401. +           "%s: Tx done task: scheduling again\n",
  8402. +           device_get_nameunit(sc->sc_dev));
  8403. +
  8404. +       taskqueue_enqueue(sc->taskqueue, &sc->tx_done_task);
  8405. +   }
  8406. +
  8407. +   RT2860_SOFTC_UNLOCK(sc);
  8408. +
  8409. +   if (!IFQ_IS_EMPTY(&ifp->if_snd))
  8410. +       rt2860_start(ifp);
  8411. + }
  8412. +
  8413. + /*
  8414. +  * rt2860_fifo_sta_full_task
  8415. +  */
  8416. + static void rt2860_fifo_sta_full_task(void *context, int pending)
  8417. + {
  8418. +   struct rt2860_softc *sc;
  8419. +   struct ifnet *ifp;
  8420. +
  8421. +   sc = context;
  8422. +   ifp = sc->sc_ifp;
  8423. +
  8424. +   RT2860_DPRINTF(sc, RT2860_DEBUG_STATS,
  8425. +       "%s: FIFO statistic full task\n",
  8426. +       device_get_nameunit(sc->sc_dev));
  8427. +
  8428. +   if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
  8429. +       return;
  8430. +
  8431. +   sc->intr_pending_mask &= ~RT2860_REG_INT_FIFO_STA_FULL;
  8432. +
  8433. +   rt2860_drain_fifo_stats(sc);
  8434. +
  8435. +   RT2860_SOFTC_LOCK(sc);
  8436. +
  8437. +   if (sc->intr_pending_mask & RT2860_REG_INT_FIFO_STA_FULL)
  8438. +   {
  8439. +       RT2860_DPRINTF(sc, RT2860_DEBUG_STATS,
  8440. +           "%s: FIFO statistic full task: scheduling again\n",
  8441. +           device_get_nameunit(sc->sc_dev));
  8442. +
  8443. +       taskqueue_enqueue(sc->taskqueue, &sc->fifo_sta_full_task);
  8444. +   }
  8445. +   else
  8446. +   {
  8447. +       rt2860_intr_enable(sc, RT2860_REG_INT_FIFO_STA_FULL);
  8448. +   }
  8449. +
  8450. +   RT2860_SOFTC_UNLOCK(sc);
  8451. +
  8452. +   if (!IFQ_IS_EMPTY(&ifp->if_snd))
  8453. +       rt2860_start(ifp);
  8454. + }
  8455. +
  8456. + /*
  8457. +  * rt2860_periodic_task
  8458. +  */
  8459. + static void rt2860_periodic_task(void *context, int pending)
  8460. + {
  8461. +   struct rt2860_softc *sc;
  8462. +   struct ifnet *ifp;
  8463. +   struct ieee80211com *ic;
  8464. +   struct ieee80211vap *vap;
  8465. +
  8466. +   sc = context;
  8467. +   ifp = sc->sc_ifp;
  8468. +   ic = ifp->if_l2com;
  8469. +   vap = TAILQ_FIRST(&ic->ic_vaps);
  8470. +
  8471. +   RT2860_DPRINTF(sc, RT2860_DEBUG_PERIODIC,
  8472. +       "%s: periodic task: round=%lu\n",
  8473. +       device_get_nameunit(sc->sc_dev), sc->periodic_round);
  8474. +
  8475. +   if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
  8476. +       return;
  8477. +
  8478. +   RT2860_SOFTC_LOCK(sc);
  8479. +
  8480. +   sc->periodic_round++;
  8481. +
  8482. +   rt2860_update_stats(sc);
  8483. +
  8484. +   if ((sc->periodic_round % 10) == 0)
  8485. +   {
  8486. +       rt2860_bbp_tuning(sc);
  8487. +
  8488. +       rt2860_update_raw_counters(sc);
  8489. +
  8490. +       rt2860_watchdog(sc);
  8491. +
  8492. +       if (vap != NULL && vap->iv_opmode != IEEE80211_M_MONITOR && vap->iv_state == IEEE80211_S_RUN)
  8493. +       {
  8494. +           if (vap->iv_opmode == IEEE80211_M_STA)
  8495. +               rt2860_amrr_update_iter_func(vap, vap->iv_bss);
  8496. +           else
  8497. +               ieee80211_iterate_nodes(&ic->ic_sta, rt2860_amrr_update_iter_func, vap);
  8498. +       }
  8499. +   }
  8500. +
  8501. +   RT2860_SOFTC_UNLOCK(sc);
  8502. +
  8503. +   callout_reset(&sc->periodic_ch, hz / 10, rt2860_periodic, sc);
  8504. + }
  8505. +
  8506. + /*
  8507. +  * rt2860_rx_eof
  8508. +  */
  8509. + static int rt2860_rx_eof(struct rt2860_softc *sc, int limit)
  8510. + {
  8511. +   struct ifnet *ifp;
  8512. +   struct ieee80211com *ic;
  8513. +   struct ieee80211_frame *wh;
  8514. +   struct ieee80211_node *ni;
  8515. +   struct rt2860_softc_node *rni;
  8516. +   struct rt2860_softc_rx_radiotap_header *tap;
  8517. +   struct rt2860_softc_rx_ring *ring;
  8518. +   struct rt2860_rxdesc *desc;
  8519. +   struct rt2860_softc_rx_data *data;
  8520. +   struct rt2860_rxwi *rxwi;
  8521. +   struct mbuf *m, *mnew;
  8522. +   bus_dma_segment_t segs[1];
  8523. +   bus_dmamap_t dma_map;
  8524. +   uint32_t index, desc_flags;
  8525. +   uint8_t cipher_err, rssi, ant, phymode, bw, shortgi, stbc, mcs, keyidx, tid, frag;
  8526. +   uint16_t seq;
  8527. +   int8_t rssi_dbm;
  8528. +   int error, nsegs, len, ampdu, amsdu, rssi_dbm_rel, nframes, i;
  8529. +  
  8530. +   ifp = sc->sc_ifp;
  8531. +   ic = ifp->if_l2com;
  8532. +   ring = &sc->rx_ring;
  8533. +
  8534. +   nframes = 0;
  8535. +
  8536. +   while (limit != 0)
  8537. +   {
  8538. +       index = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_RX_DRX_IDX);
  8539. +       if (ring->cur == index)
  8540. +           break;
  8541. +
  8542. +       desc = &ring->desc[ring->cur];
  8543. +       data = &ring->data[ring->cur];
  8544. +
  8545. +       bus_dmamap_sync(ring->desc_dma_tag, ring->desc_dma_map,
  8546. +           BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
  8547. + #ifdef XXX_TESTED_AND_WORKED
  8548. +       if (!(desc->sdl0 & htole16(RT2860_RXDESC_SDL0_DDONE)))
  8549. +           break;
  8550. + #endif
  8551. +
  8552. +       nframes++;
  8553. +
  8554. +       mnew = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
  8555. +       if (mnew == NULL)
  8556. +       {
  8557. +           sc->rx_mbuf_alloc_errors++;
  8558. +           ifp->if_ierrors++;
  8559. +           goto skip;
  8560. +       }
  8561. +
  8562. +       mnew->m_len = mnew->m_pkthdr.len = MJUMPAGESIZE;
  8563. +
  8564. +       error = bus_dmamap_load_mbuf_sg(ring->data_dma_tag, ring->spare_dma_map,
  8565. +           mnew, segs, &nsegs, BUS_DMA_NOWAIT);
  8566. +       if (error != 0)
  8567. +       {
  8568. +           RT2860_DPRINTF(sc, RT2860_DEBUG_RX,
  8569. +               "%s: could not load Rx mbuf DMA map: error=%d, nsegs=%d\n",
  8570. +               device_get_nameunit(sc->sc_dev), error, nsegs);
  8571. +
  8572. +           m_freem(mnew);
  8573. +
  8574. +           sc->rx_mbuf_dmamap_errors++;
  8575. +           ifp->if_ierrors++;
  8576. +
  8577. +           goto skip;
  8578. +       }
  8579. +
  8580. +       KASSERT(nsegs == 1, ("%s: too many DMA segments",
  8581. +           device_get_nameunit(sc->sc_dev)));
  8582. +
  8583. +       bus_dmamap_sync(ring->data_dma_tag, data->dma_map,
  8584. +           BUS_DMASYNC_POSTREAD);
  8585. +       bus_dmamap_unload(ring->data_dma_tag, data->dma_map);
  8586. +
  8587. +       dma_map = data->dma_map;
  8588. +       data->dma_map = ring->spare_dma_map;
  8589. +       ring->spare_dma_map = dma_map;
  8590. +
  8591. +       bus_dmamap_sync(ring->data_dma_tag, data->dma_map,
  8592. +           BUS_DMASYNC_PREREAD);
  8593. +
  8594. +       m = data->m;
  8595. +
  8596. +       data->m = mnew;
  8597. +       desc->sdp0 = htole32(segs[0].ds_addr);
  8598. +
  8599. +       desc_flags = le32toh(desc->flags);
  8600. +
  8601. +       RT2860_DPRINTF(sc, RT2860_DEBUG_RX,
  8602. +           "%s: Rx frame: rxdesc flags=0x%08x\n",
  8603. +           device_get_nameunit(sc->sc_dev), desc_flags);
  8604. +
  8605. +       /* get Rx wireless info */
  8606. +
  8607. +       rxwi = mtod(m, struct rt2860_rxwi *);
  8608. +       len = (le16toh(rxwi->tid_size) >> RT2860_RXWI_SIZE_SHIFT) &
  8609. +           RT2860_RXWI_SIZE_MASK;
  8610. +
  8611. +       /* check for L2 padding between IEEE 802.11 frame header and body */
  8612. +
  8613. +       if (desc_flags & RT2860_RXDESC_FLAGS_L2PAD)
  8614. +       {
  8615. +           RT2860_DPRINTF(sc, RT2860_DEBUG_RX,
  8616. +               "%s: L2 padding: len=%d\n",
  8617. +               device_get_nameunit(sc->sc_dev), len);
  8618. +
  8619. +           len += 2;
  8620. +       }
  8621. +
  8622. +       m->m_pkthdr.rcvif = ifp;
  8623. +       m->m_data = (caddr_t) (rxwi + 1);
  8624. +       m->m_pkthdr.len = m->m_len = len;
  8625. +
  8626. +       /* check for crc errors */
  8627. +
  8628. +       if (desc_flags & RT2860_RXDESC_FLAGS_CRC_ERR)
  8629. +       {
  8630. +           RT2860_DPRINTF(sc, RT2860_DEBUG_RX,
  8631. +               "%s: rxdesc: crc error\n",
  8632. +               device_get_nameunit(sc->sc_dev));
  8633. +
  8634. +           ifp->if_ierrors++;
  8635. +
  8636. +           if (!(ifp->if_flags & IFF_PROMISC))
  8637. +           {
  8638. +               m_freem(m);
  8639. +               goto skip;
  8640. +           }
  8641. +       }
  8642. +
  8643. +       wh = (struct ieee80211_frame *) (rxwi + 1);
  8644. +
  8645. +       /* check for cipher errors */
  8646. +
  8647. +       if (desc_flags & RT2860_RXDESC_FLAGS_DECRYPTED)
  8648. +       {
  8649. +           cipher_err = ((desc_flags >> RT2860_RXDESC_FLAGS_CIPHER_ERR_SHIFT) &
  8650. +               RT2860_RXDESC_FLAGS_CIPHER_ERR_MASK);
  8651. +           if (cipher_err == RT2860_RXDESC_FLAGS_CIPHER_ERR_NONE)
  8652. +           {
  8653. +               if (wh->i_fc[1] & IEEE80211_FC1_WEP)
  8654. +                   wh->i_fc[1] &= ~IEEE80211_FC1_WEP;
  8655. +
  8656. +               m->m_flags |= M_WEP;
  8657. +
  8658. +               sc->rx_cipher_no_errors++;
  8659. +           }
  8660. +           else
  8661. +           {
  8662. +               RT2860_DPRINTF(sc, RT2860_DEBUG_RX,
  8663. +                   "%s: rxdesc: cipher error=0x%02x\n",
  8664. +                   device_get_nameunit(sc->sc_dev), cipher_err);
  8665. +
  8666. +               if (cipher_err == RT2860_RXDESC_FLAGS_CIPHER_ERR_ICV)
  8667. +                   sc->rx_cipher_icv_errors++;
  8668. +               else if (cipher_err == RT2860_RXDESC_FLAGS_CIPHER_ERR_MIC)
  8669. +                   sc->rx_cipher_mic_errors++;
  8670. +               else if (cipher_err == RT2860_RXDESC_FLAGS_CIPHER_ERR_INVALID_KEY)
  8671. +                   sc->rx_cipher_invalid_key_errors++;
  8672. +
  8673. +               if ((cipher_err == RT2860_RXDESC_FLAGS_CIPHER_ERR_MIC) &&
  8674. +                   (desc_flags & RT2860_RXDESC_FLAGS_MYBSS))
  8675. +               {
  8676. +                   ni = ieee80211_find_rxnode(ic, (const struct ieee80211_frame_min *) wh);
  8677. +                   if (ni != NULL)
  8678. +                   {
  8679. +                       keyidx = (rxwi->udf_bssidx_keyidx >> RT2860_RXWI_KEYIDX_SHIFT) &
  8680. +                           RT2860_RXWI_KEYIDX_MASK;
  8681. +
  8682. +                       ieee80211_notify_michael_failure(ni->ni_vap, wh, keyidx);
  8683. +
  8684. +                       ieee80211_free_node(ni);
  8685. +                   }
  8686. +               }
  8687. +
  8688. +               ifp->if_ierrors++;
  8689. +
  8690. +               if (!(ifp->if_flags & IFF_PROMISC))
  8691. +               {
  8692. +                   m_free(m);
  8693. +                   goto skip;
  8694. +               }
  8695. +           }
  8696. +       }
  8697. +       else
  8698. +       {
  8699. +           if (wh->i_fc[1] & IEEE80211_FC1_WEP)
  8700. +           {
  8701. +               RT2860_DPRINTF(sc, RT2860_DEBUG_RX,
  8702. +                   "%s: rxdesc: not decrypted but protected flag set\n",
  8703. +                   device_get_nameunit(sc->sc_dev));
  8704. +
  8705. +               ifp->if_ierrors++;
  8706. +
  8707. +               if (!(ifp->if_flags & IFF_PROMISC))
  8708. +               {
  8709. +                   m_free(m);
  8710. +                   goto skip;
  8711. +               }
  8712. +           }
  8713. +       }
  8714. +
  8715. +       /* check for A-MPDU */
  8716. +
  8717. +       if (desc_flags & RT2860_RXDESC_FLAGS_BA)
  8718. +       {
  8719. +           m->m_flags |= M_AMPDU;
  8720. +
  8721. +           sc->rx_ampdu++;
  8722. +
  8723. +           if (wh->i_fc[1] & IEEE80211_FC1_RETRY)
  8724. +               sc->rx_ampdu_retries++;
  8725. +
  8726. +           ampdu = 1;
  8727. +       }
  8728. +       else
  8729. +       {
  8730. +           ampdu = 0;
  8731. +       }
  8732. +
  8733. +       /* check for A-MSDU */
  8734. +
  8735. +       if (desc_flags & RT2860_RXDESC_FLAGS_AMSDU)
  8736. +       {
  8737. +           sc->rx_amsdu++;
  8738. +
  8739. +           amsdu = 1;
  8740. +       }
  8741. +       else
  8742. +       {
  8743. +           amsdu = 0;
  8744. +       }
  8745. +
  8746. +       ant = rt2860_maxrssi_rxpath(sc, rxwi);
  8747. +       rssi = rxwi->rssi[ant];
  8748. +       rssi_dbm = rt2860_rssi2dbm(sc, rssi, ant);
  8749. +       phymode = ((rxwi->phymode_stbc_shortgi >> RT2860_RXWI_PHYMODE_SHIFT) &
  8750. +           RT2860_RXWI_PHYMODE_MASK);
  8751. +       bw = ((rxwi->bw_mcs >> RT2860_RXWI_BW_SHIFT) & RT2860_RXWI_BW_MASK);
  8752. +       shortgi = ((rxwi->phymode_stbc_shortgi >> RT2860_RXWI_SHORTGI_SHIFT) &
  8753. +           RT2860_RXWI_SHORTGI_MASK);
  8754. +       stbc = ((rxwi->phymode_stbc_shortgi >> RT2860_RXWI_STBC_SHIFT) &
  8755. +           RT2860_RXWI_STBC_MASK);
  8756. +       mcs = ((rxwi->bw_mcs >> RT2860_RXWI_MCS_SHIFT) & RT2860_RXWI_MCS_MASK);
  8757. +       tid = ((rxwi->tid_size >> RT2860_RXWI_TID_SHIFT) & RT2860_RXWI_TID_MASK);
  8758. +       seq = ((rxwi->seq_frag >> RT2860_RXWI_SEQ_SHIFT) & RT2860_RXWI_SEQ_MASK);
  8759. +       frag = ((rxwi->seq_frag >> RT2860_RXWI_FRAG_SHIFT) & RT2860_RXWI_FRAG_MASK);
  8760. +
  8761. +       if (ieee80211_radiotap_active(ic))
  8762. +       {
  8763. +           tap = &sc->rxtap;
  8764. +
  8765. +           tap->flags = (desc_flags & RT2860_RXDESC_FLAGS_L2PAD) ? IEEE80211_RADIOTAP_F_DATAPAD : 0;
  8766. +           tap->dbm_antsignal = rssi_dbm;
  8767. +           tap->dbm_antnoise = RT2860_NOISE_FLOOR;
  8768. +           tap->antenna = ant;
  8769. +           tap->antsignal = rssi;
  8770. +           tap->chan_flags = htole32(ic->ic_curchan->ic_flags);
  8771. +           tap->chan_freq = htole16(ic->ic_curchan->ic_freq);
  8772. +           tap->chan_ieee = ic->ic_curchan->ic_ieee;
  8773. +           tap->chan_maxpow = 0;
  8774. +
  8775. +           if (phymode == RT2860_TXWI_PHYMODE_HT_MIXED || phymode == RT2860_TXWI_PHYMODE_HT_GF)
  8776. +               tap->rate = mcs | IEEE80211_RATE_MCS;
  8777. +           else
  8778. +               tap->rate = rt2860_rxrate(rxwi);
  8779. +
  8780. +           if (desc_flags & RT2860_RXDESC_FLAGS_CRC_ERR)
  8781. +               tap->flags |= IEEE80211_RADIOTAP_F_BADFCS;
  8782. +
  8783. +           if (desc_flags & RT2860_RXDESC_FLAGS_FRAG)
  8784. +               tap->flags |= IEEE80211_RADIOTAP_F_FRAG;
  8785. +
  8786. +           if (rxwi->bw_mcs & RT2860_RXWI_MCS_SHOTPRE)
  8787. +               tap->flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  8788. +
  8789. +           if ((desc_flags & RT2860_RXDESC_FLAGS_DECRYPTED) ||
  8790. +               (wh->i_fc[1] & IEEE80211_FC1_WEP))
  8791. +               tap->flags |= IEEE80211_RADIOTAP_F_WEP;
  8792. +
  8793. +           if (shortgi)
  8794. +               tap->flags |= IEEE80211_RADIOTAP_F_SHORTGI;
  8795. +
  8796. +           /* XXX use temporarily radiotap CFP flag as A-MPDU flag */
  8797. +
  8798. +           if (ampdu)
  8799. +               tap->flags |= IEEE80211_RADIOTAP_F_CFP;
  8800. +       }
  8801. +
  8802. +       /*
  8803. +        * net80211 assumes that RSSI data are in the range [-127..127] and
  8804. +        * in .5 dBm units relative to the current noise floor
  8805. +        */
  8806. +
  8807. +       rssi_dbm_rel = (rssi_dbm - RT2860_NOISE_FLOOR) * 2;
  8808. +       if (rssi_dbm_rel > 127)
  8809. +           rssi_dbm_rel = 127;
  8810. +
  8811. +       RT2860_DPRINTF(sc, RT2860_DEBUG_RX,
  8812. +           "%s: received frame: len=%d, phymode=%d, bw=%d, shortgi=%d, stbc=0x%02x, mcs=%d, "
  8813. +           "ant=%d, rssi=%d/%d/%d, snr=%d/%d, wcid=0x%02x, ampdu=%d, amsdu=%d, tid=%d, seq=%d, frag=%d, "
  8814. +           "retry=%d, rssi_dbm=%d, rssi_dbm_rel=%d\n",
  8815. +           device_get_nameunit(sc->sc_dev),
  8816. +           len, phymode, bw, shortgi, stbc, mcs,
  8817. +           ant, rxwi->rssi[0], rxwi->rssi[1], rxwi->rssi[2],
  8818. +           rxwi->snr[0], rxwi->snr[1],
  8819. +           rxwi->wcid, ampdu, amsdu, tid, seq, frag, (wh->i_fc[1] & IEEE80211_FC1_RETRY) ? 1 : 0,
  8820. +           rssi_dbm, rssi_dbm_rel);
  8821. +
  8822. +       ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *) wh);
  8823. +       if (ni != NULL)
  8824. +       {
  8825. +           rni = (struct rt2860_softc_node *) ni;
  8826. +
  8827. +           for (i = 0; i < RT2860_SOFTC_RSSI_COUNT; i++)
  8828. +           {
  8829. +               rni->last_rssi[i] = rxwi->rssi[i];
  8830. +               rni->last_rssi_dbm[i] = rt2860_rssi2dbm(sc, rxwi->rssi[i], i);
  8831. +           }
  8832. +
  8833. +           ieee80211_input(ni, m, rssi_dbm_rel, RT2860_NOISE_FLOOR);
  8834. +           ieee80211_free_node(ni);
  8835. +       }
  8836. +       else
  8837. +       {
  8838. +           ieee80211_input_all(ic, m, rssi_dbm_rel, RT2860_NOISE_FLOOR);
  8839. +       }
  8840. +
  8841. + skip:
  8842. +
  8843. +       desc->sdl0 &= ~htole16(RT2860_RXDESC_SDL0_DDONE);
  8844. +
  8845. +       bus_dmamap_sync(ring->desc_dma_tag, ring->desc_dma_map,
  8846. +           BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
  8847. +
  8848. +       ring->cur = (ring->cur + 1) % RT2860_SOFTC_RX_RING_DATA_COUNT;
  8849. +
  8850. +       limit--;
  8851. +   }
  8852. +
  8853. +   if (ring->cur == 0)
  8854. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_CALC_IDX,
  8855. +           RT2860_SOFTC_RX_RING_DATA_COUNT - 1);
  8856. +   else
  8857. +       rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_RX_CALC_IDX,
  8858. +           ring->cur - 1);
  8859. +
  8860. +   RT2860_DPRINTF(sc, RT2860_DEBUG_RX,
  8861. +       "%s: Rx eof: nframes=%d\n",
  8862. +       device_get_nameunit(sc->sc_dev), nframes);
  8863. +
  8864. +   sc->rx_packets += nframes;
  8865. +
  8866. +   return (limit == 0);
  8867. + }
  8868. +
  8869. + /*
  8870. +  * rt2860_tx_eof
  8871. +  */
  8872. + static void rt2860_tx_eof(struct rt2860_softc *sc,
  8873. +   struct rt2860_softc_tx_ring *ring)
  8874. + {
  8875. +   struct ifnet *ifp;
  8876. +   struct rt2860_txdesc *desc;
  8877. +   struct rt2860_softc_tx_data *data;
  8878. +   uint32_t index;
  8879. +   int ndescs, nframes;
  8880. +
  8881. +   ifp = sc->sc_ifp;
  8882. +
  8883. +   ndescs = 0;
  8884. +   nframes = 0;
  8885. +
  8886. +   for (;;)
  8887. +   {
  8888. +       index = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_TX_DTX_IDX(ring->qid));
  8889. +       if (ring->desc_next == index)
  8890. +           break;
  8891. +
  8892. +       ndescs++;
  8893. +
  8894. +       rt2860_drain_fifo_stats(sc);
  8895. +
  8896. +       desc = &ring->desc[ring->desc_next];
  8897. +
  8898. +       bus_dmamap_sync(ring->desc_dma_tag, ring->desc_dma_map,
  8899. +           BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
  8900. +
  8901. +       if (desc->sdl0 & htole16(RT2860_TXDESC_SDL0_LASTSEG) ||
  8902. +           desc->sdl1 & htole16(RT2860_TXDESC_SDL1_LASTSEG))
  8903. +       {
  8904. +           nframes++;
  8905. +
  8906. +           data = &ring->data[ring->data_next];
  8907. +
  8908. +           if (data->m->m_flags & M_TXCB)
  8909. +               ieee80211_process_callback(data->ni, data->m, 0);
  8910. +
  8911. +           bus_dmamap_sync(ring->data_dma_tag, data->dma_map,
  8912. +               BUS_DMASYNC_POSTWRITE);
  8913. +           bus_dmamap_unload(ring->data_dma_tag, data->dma_map);
  8914. +
  8915. +           m_freem(data->m);
  8916. +
  8917. +           ieee80211_free_node(data->ni);
  8918. +
  8919. +           data->m = NULL;
  8920. +           data->ni = NULL;
  8921. +
  8922. +           ifp->if_opackets++;
  8923. +
  8924. +           RT2860_SOFTC_TX_RING_LOCK(ring);
  8925. +
  8926. +           ring->data_queued--;
  8927. +           ring->data_next = (ring->data_next + 1) % RT2860_SOFTC_TX_RING_DATA_COUNT;
  8928. +
  8929. +           RT2860_SOFTC_TX_RING_UNLOCK(ring);
  8930. +       }
  8931. +
  8932. +       desc->sdl0 &= ~htole16(RT2860_TXDESC_SDL0_DDONE);
  8933. +
  8934. +       bus_dmamap_sync(ring->desc_dma_tag, ring->desc_dma_map,
  8935. +           BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
  8936. +
  8937. +       RT2860_SOFTC_TX_RING_LOCK(ring);
  8938. +
  8939. +       ring->desc_queued--;
  8940. +       ring->desc_next = (ring->desc_next + 1) % RT2860_SOFTC_TX_RING_DESC_COUNT;
  8941. +
  8942. +       RT2860_SOFTC_TX_RING_UNLOCK(ring);
  8943. +   }
  8944. +
  8945. +   RT2860_DPRINTF(sc, RT2860_DEBUG_TX,
  8946. +       "%s: Tx eof: qid=%d, ndescs=%d, nframes=%d\n",
  8947. +       device_get_nameunit(sc->sc_dev), ring->qid, ndescs, nframes);
  8948. + }
  8949. +
  8950. + /*
  8951. +  * rt2860_update_stats
  8952. +  */
  8953. + static void rt2860_update_stats(struct rt2860_softc *sc)
  8954. + {
  8955. +   struct ifnet *ifp;
  8956. +   struct ieee80211com *ic;
  8957. +   uint32_t stacnt[3];
  8958. +   int beacons, noretryok, retryok, failed, underflows, zerolen;
  8959. +
  8960. +   ifp = sc->sc_ifp;
  8961. +   ic = ifp->if_l2com;
  8962. +
  8963. +   RT2860_DPRINTF(sc, RT2860_DEBUG_STATS,
  8964. +       "%s: update statistic\n",
  8965. +       device_get_nameunit(sc->sc_dev));
  8966. +
  8967. +   rt2860_drain_fifo_stats(sc);
  8968. +
  8969. +   /* read and clear Tx statistic registers */
  8970. +
  8971. +   rt2860_io_mac_read_multi(sc, RT2860_REG_TX_STA_CNT0,
  8972. +       stacnt, sizeof(stacnt));
  8973. +
  8974. +   stacnt[0] = le32toh(stacnt[0]);
  8975. +   stacnt[1] = le32toh(stacnt[1]);
  8976. +   stacnt[2] = le32toh(stacnt[2]);
  8977. +
  8978. +   beacons = stacnt[0] >> 16;
  8979. +   noretryok = stacnt[1] & 0xffff;
  8980. +   retryok = stacnt[1] >> 16;
  8981. +   failed = stacnt[0] & 0xffff;
  8982. +   underflows = stacnt[2] >> 16;
  8983. +   zerolen = stacnt[2] & 0xffff;
  8984. +
  8985. +   RT2860_DPRINTF(sc, RT2860_DEBUG_STATS,
  8986. +       "%s: update statistic: beacons=%d, noretryok=%d, retryok=%d, failed=%d, underflows=%d, zerolen=%d\n",
  8987. +       device_get_nameunit(sc->sc_dev),
  8988. +       beacons, noretryok, retryok, failed, underflows, zerolen);
  8989. +
  8990. +   ifp->if_oerrors += failed;
  8991. +
  8992. +   sc->tx_beacons += beacons;
  8993. +   sc->tx_noretryok += noretryok;
  8994. +   sc->tx_retryok += retryok;
  8995. +   sc->tx_failed += failed;
  8996. +   sc->tx_underflows += underflows;
  8997. +   sc->tx_zerolen += zerolen;
  8998. + }
  8999. +
  9000. + /*
  9001. +  * rt2860_bbp_tuning
  9002. +  */
  9003. + static void rt2860_bbp_tuning(struct rt2860_softc *sc)
  9004. + {
  9005. +   struct ifnet *ifp;
  9006. +   struct ieee80211com *ic;
  9007. +   struct ieee80211vap *vap;
  9008. +   struct ieee80211_node *ni;
  9009. +   int chan, group;
  9010. +   int8_t rssi, old, new;
  9011. +
  9012. +   /* RT2860C does not support BBP tuning */
  9013. +
  9014. +   if (sc->mac_rev == 0x28600100)
  9015. +       return;
  9016. +
  9017. +   ifp = sc->sc_ifp;
  9018. +   ic = ifp->if_l2com;
  9019. +   vap = TAILQ_FIRST(&ic->ic_vaps);
  9020. +
  9021. +   if ((ic->ic_flags & IEEE80211_F_SCAN) || vap == NULL ||
  9022. +       vap->iv_opmode != IEEE80211_M_STA || vap->iv_state != IEEE80211_S_RUN)
  9023. +       return;
  9024. +
  9025. +   ni = vap->iv_bss;
  9026. +
  9027. +   chan = ieee80211_chan2ieee(ic, ni->ni_chan);
  9028. +
  9029. +   if (chan <= 14)
  9030. +       group = 0;
  9031. +   else if (chan <= 64)
  9032. +       group = 1;
  9033. +   else if (chan <= 128)
  9034. +       group = 2;
  9035. +   else
  9036. +       group = 3;
  9037. +
  9038. +   rssi = ieee80211_getrssi(vap);
  9039. +
  9040. +   if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
  9041. +   {
  9042. +       new = 0x2e + sc->lna_gain[group];
  9043. +   }
  9044. +   else
  9045. +   {
  9046. +       if (!IEEE80211_IS_CHAN_HT40(ni->ni_chan))
  9047. +           new = 0x32 + sc->lna_gain[group] * 5 / 3;
  9048. +       else
  9049. +           new = 0x3a + sc->lna_gain[group] * 5 / 3;
  9050. +   }
  9051. +
  9052. +   /* Tune if absolute average RSSI is greater than -80 */
  9053. +
  9054. +   if (rssi > 30)
  9055. +       new += 0x10;
  9056. +
  9057. +   old = rt2860_io_bbp_read(sc, 66);
  9058. +
  9059. +   if (old != new)
  9060. +       rt2860_io_bbp_write(sc, 66, new);
  9061. + }
  9062. +
  9063. + /*
  9064. +  * rt2860_watchdog
  9065. +  */
  9066. + static void rt2860_watchdog(struct rt2860_softc *sc)
  9067. + {
  9068. +   uint32_t tmp;
  9069. +   int ntries;
  9070. +
  9071. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_PBF_TXRXQ_PCNT);
  9072. +
  9073. +   RT2860_DPRINTF(sc, RT2860_DEBUG_WATCHDOG,
  9074. +       "%s: watchdog: TXRXQ_PCNT=0x%08x\n",
  9075. +       device_get_nameunit(sc->sc_dev), tmp);
  9076. +
  9077. +   if (((tmp >> RT2860_REG_TX0Q_PCNT_SHIFT) & RT2860_REG_TX0Q_PCNT_MASK) != 0)
  9078. +   {
  9079. +       sc->tx_queue_not_empty[0]++;
  9080. +
  9081. +       rt2860_io_mac_write(sc, RT2860_REG_PBF_CFG, 0xf40012);
  9082. +
  9083. +       for (ntries = 0; ntries < 10; ntries++)
  9084. +       {
  9085. +           tmp = rt2860_io_mac_read(sc, RT2860_REG_PBF_TXRXQ_PCNT);
  9086. +           if (((tmp >> RT2860_REG_TX0Q_PCNT_SHIFT) & RT2860_REG_TX0Q_PCNT_MASK) == 0)
  9087. +               break;
  9088. +
  9089. +           DELAY(1);
  9090. +       }
  9091. +
  9092. +       rt2860_io_mac_write(sc, RT2860_REG_PBF_CFG, 0xf40006);
  9093. +   }
  9094. +
  9095. +   if (((tmp >> RT2860_REG_TX1Q_PCNT_SHIFT) & RT2860_REG_TX1Q_PCNT_MASK) != 0)
  9096. +   {
  9097. +       sc->tx_queue_not_empty[1]++;
  9098. +
  9099. +       rt2860_io_mac_write(sc, RT2860_REG_PBF_CFG, 0xf4000a);
  9100. +
  9101. +       for (ntries = 0; ntries < 10; ntries++)
  9102. +       {
  9103. +           tmp = rt2860_io_mac_read(sc, RT2860_REG_PBF_TXRXQ_PCNT);
  9104. +           if (((tmp >> RT2860_REG_TX1Q_PCNT_SHIFT) & RT2860_REG_TX1Q_PCNT_MASK) == 0)
  9105. +               break;
  9106. +
  9107. +           DELAY(1);
  9108. +       }
  9109. +
  9110. +       rt2860_io_mac_write(sc, RT2860_REG_PBF_CFG, 0xf40006);
  9111. +   }
  9112. + }
  9113. +
  9114. + /*
  9115. +  * rt2860_drain_fifo_stats
  9116. +  */
  9117. + static void rt2860_drain_fifo_stats(struct rt2860_softc *sc)
  9118. + {
  9119. +   struct ifnet *ifp;
  9120. +   uint32_t stats;
  9121. +   uint8_t wcid, mcs, pid;
  9122. +   int ok, agg, retrycnt;
  9123. +
  9124. +   ifp = sc->sc_ifp;
  9125. +
  9126. +   /* drain Tx status FIFO (maxsize = 16) */
  9127. +
  9128. +   while ((stats = rt2860_io_mac_read(sc, RT2860_REG_TX_STA_FIFO)) &
  9129. +       RT2860_REG_TX_STA_FIFO_VALID)
  9130. +   {
  9131. +       wcid = (stats >> RT2860_REG_TX_STA_FIFO_WCID_SHIFT) &
  9132. +           RT2860_REG_TX_STA_FIFO_WCID_MASK;
  9133. +
  9134. +       /* if no ACK was requested, no feedback is available */
  9135. +
  9136. +       if (!(stats & RT2860_REG_TX_STA_FIFO_ACK_REQ) || wcid == RT2860_WCID_RESERVED)
  9137. +           continue;
  9138. +
  9139. +       /* update AMRR statistic */
  9140. +
  9141. +       ok = (stats & RT2860_REG_TX_STA_FIFO_TX_OK) ? 1 : 0;
  9142. +       agg = (stats & RT2860_REG_TX_STA_FIFO_AGG) ? 1 : 0;
  9143. +       mcs = (stats >> RT2860_REG_TX_STA_FIFO_MCS_SHIFT) &
  9144. +           RT2860_REG_TX_STA_FIFO_MCS_MASK;
  9145. +       pid = (stats >> RT2860_REG_TX_STA_FIFO_PID_SHIFT) &
  9146. +           RT2860_REG_TX_STA_FIFO_PID_MASK;
  9147. +       retrycnt = (mcs < 0xf) ? (pid - mcs - 1) : 0;
  9148. +
  9149. +       RT2860_DPRINTF(sc, RT2860_DEBUG_STATS,
  9150. +           "%s: FIFO statistic: wcid=0x%02x, ok=%d, agg=%d, mcs=0x%02x, pid=0x%02x, retrycnt=%d\n",
  9151. +           device_get_nameunit(sc->sc_dev),
  9152. +           wcid, ok, agg, mcs, pid, retrycnt);
  9153. +
  9154. +       rt2860_amrr_tx_complete(&sc->amrr_node[wcid], ok, retrycnt);
  9155. +
  9156. +       if (!ok)
  9157. +           ifp->if_oerrors++;
  9158. +   }
  9159. + }
  9160. +
  9161. + /*
  9162. +  * rt2860_update_raw_counters
  9163. +  */
  9164. + static void rt2860_update_raw_counters(struct rt2860_softc *sc)
  9165. + {
  9166. +   uint32_t tmp;
  9167. +
  9168. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_TX_AGG_CNT);
  9169. +
  9170. +   sc->tx_nonagg += tmp & 0xffff;
  9171. +   sc->tx_agg += tmp >> 16;
  9172. +
  9173. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_TX_AGG_CNT0);
  9174. +
  9175. +   sc->tx_ampdu += (tmp & 0xffff) / 1 + (tmp >> 16) / 2;
  9176. +
  9177. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_TX_AGG_CNT1);
  9178. +
  9179. +   sc->tx_ampdu += (tmp & 0xffff) / 3 + (tmp >> 16) / 4;
  9180. +
  9181. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_TX_AGG_CNT2);
  9182. +
  9183. +   sc->tx_ampdu += (tmp & 0xffff) / 5 + (tmp >> 16) / 6;
  9184. +
  9185. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_TX_AGG_CNT3);
  9186. +
  9187. +   sc->tx_ampdu += (tmp & 0xffff) / 7 + (tmp >> 16) / 8;
  9188. +
  9189. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_TX_AGG_CNT4);
  9190. +
  9191. +   sc->tx_ampdu += (tmp & 0xffff) / 9 + (tmp >> 16) / 10;
  9192. +
  9193. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_TX_AGG_CNT5);
  9194. +
  9195. +   sc->tx_ampdu += (tmp & 0xffff) / 11 + (tmp >> 16) / 12;
  9196. +
  9197. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_TX_AGG_CNT6);
  9198. +
  9199. +   sc->tx_ampdu += (tmp & 0xffff) / 13 + (tmp >> 16) / 14;
  9200. +
  9201. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_TX_AGG_CNT7);
  9202. +
  9203. +   sc->tx_ampdu += (tmp & 0xffff) / 15 + (tmp >> 16) / 16;
  9204. +
  9205. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_RX_STA_CNT0);
  9206. +
  9207. +   sc->rx_crc_errors += tmp & 0xffff;
  9208. +   sc->rx_phy_errors += tmp >> 16;
  9209. +
  9210. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_RX_STA_CNT1);
  9211. +
  9212. +   sc->rx_false_ccas += tmp & 0xffff;
  9213. +   sc->rx_plcp_errors += tmp >> 16;
  9214. +
  9215. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_RX_STA_CNT2);
  9216. +
  9217. +   sc->rx_dup_packets += tmp & 0xffff;
  9218. +   sc->rx_fifo_overflows += tmp >> 16;
  9219. +
  9220. +   tmp = rt2860_io_mac_read(sc, RT2860_REG_TXRX_MPDU_DEN_CNT);
  9221. +
  9222. +   sc->tx_mpdu_zero_density += tmp & 0xffff;
  9223. +   sc->rx_mpdu_zero_density += tmp >> 16;
  9224. + }
  9225. +
  9226. + /*
  9227. +  * rt2860_intr_enable
  9228. +  */
  9229. + static void rt2860_intr_enable(struct rt2860_softc *sc, uint32_t intr_mask)
  9230. + {
  9231. +   uint32_t tmp;
  9232. +
  9233. +   sc->intr_disable_mask &= ~intr_mask;
  9234. +
  9235. +   tmp = sc->intr_enable_mask & ~sc->intr_disable_mask;
  9236. +
  9237. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_INT_MASK, tmp);
  9238. + }
  9239. +
  9240. + /*
  9241. +  * rt2860_intr_disable
  9242. +  */
  9243. + static void rt2860_intr_disable(struct rt2860_softc *sc, uint32_t intr_mask)
  9244. + {
  9245. +   uint32_t tmp;
  9246. +
  9247. +   sc->intr_disable_mask |= intr_mask;
  9248. +
  9249. +   tmp = sc->intr_enable_mask & ~sc->intr_disable_mask;
  9250. +
  9251. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_INT_MASK, tmp);
  9252. + }
  9253. +
  9254. + /*
  9255. +  * rt2860_txrx_enable
  9256. +  */
  9257. + static int rt2860_txrx_enable(struct rt2860_softc *sc)
  9258. + {
  9259. +   struct ieee80211com *ic;
  9260. +   struct ifnet *ifp;
  9261. +   uint32_t tmp;
  9262. +   int ntries;
  9263. +
  9264. +   ifp = sc->sc_ifp;
  9265. +   ic = ifp->if_l2com;
  9266. +
  9267. +   /* enable Tx/Rx DMA engine */
  9268. +
  9269. +   rt2860_io_mac_write(sc, RT2860_REG_SYS_CTRL, RT2860_REG_TX_ENABLE);
  9270. +
  9271. +   for (ntries = 0; ntries < 200; ntries++)
  9272. +   {
  9273. +       tmp = rt2860_io_mac_read(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG);
  9274. +       if (!(tmp & (RT2860_REG_TX_DMA_BUSY | RT2860_REG_RX_DMA_BUSY)))
  9275. +           break;
  9276. +
  9277. +       DELAY(1000);
  9278. +   }
  9279. +
  9280. +   if (ntries == 200)
  9281. +   {
  9282. +       printf("%s: timeout waiting for DMA engine\n",
  9283. +           device_get_nameunit(sc->sc_dev));
  9284. +       return -1;
  9285. +   }
  9286. +
  9287. +   DELAY(50);
  9288. +
  9289. +   tmp |= RT2860_REG_TX_WB_DDONE |
  9290. +       RT2860_REG_RX_DMA_ENABLE |
  9291. +       RT2860_REG_TX_DMA_ENABLE |
  9292. +       (RT2860_REG_WPDMA_BT_SIZE64 << RT2860_REG_WPDMA_BT_SIZE_SHIFT);
  9293. +
  9294. +   rt2860_io_mac_write(sc, RT2860_REG_SCHDMA_WPDMA_GLO_CFG, tmp);
  9295. +
  9296. +   /* set Rx filter */
  9297. +
  9298. +   tmp = RT2860_REG_RX_FILTER_DROP_CRC_ERR |
  9299. +       RT2860_REG_RX_FILTER_DROP_PHY_ERR;
  9300. +
  9301. +   if (ic->ic_opmode != IEEE80211_M_MONITOR)
  9302. +   {
  9303. +       tmp |= RT2860_REG_RX_FILTER_DROP_DUPL |
  9304. +           RT2860_REG_RX_FILTER_DROP_CTS |
  9305. +           RT2860_REG_RX_FILTER_DROP_BA |
  9306. +           RT2860_REG_RX_FILTER_DROP_ACK |
  9307. +           RT2860_REG_RX_FILTER_DROP_VER_ERR |
  9308. +           RT2860_REG_RX_FILTER_DROP_CTRL_RSV |
  9309. +           RT2860_REG_RX_FILTER_DROP_CFACK |
  9310. +           RT2860_REG_RX_FILTER_DROP_CFEND;
  9311. +
  9312. +       if (ic->ic_opmode == IEEE80211_M_STA)
  9313. +           tmp |= RT2860_REG_RX_FILTER_DROP_RTS |
  9314. +               RT2860_REG_RX_FILTER_DROP_PSPOLL;
  9315. +
  9316. +       if (!(ifp->if_flags & IFF_PROMISC))
  9317. +           tmp |= RT2860_REG_RX_FILTER_DROP_UC_NOME;
  9318. +   }
  9319. +
  9320. +   rt2860_io_mac_write(sc, RT2860_REG_RX_FILTER_CFG, tmp);
  9321. +
  9322. +   rt2860_io_mac_write(sc, RT2860_REG_SYS_CTRL,
  9323. +       RT2860_REG_RX_ENABLE | RT2860_REG_TX_ENABLE);
  9324. +
  9325. +   return 0;
  9326. + }
  9327. +
  9328. + /*
  9329. +  * rt2860_alloc_rx_ring
  9330. +  */
  9331. + static int rt2860_alloc_rx_ring(struct rt2860_softc *sc,
  9332. +   struct rt2860_softc_rx_ring *ring)
  9333. + {
  9334. +   struct rt2860_rxdesc *desc;
  9335. +   struct rt2860_softc_rx_data *data;
  9336. +   bus_dma_segment_t segs[1];
  9337. +   int i, nsegs, error;
  9338. +
  9339. +   error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), PAGE_SIZE, 0,
  9340. +       BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
  9341. +       RT2860_SOFTC_RX_RING_DATA_COUNT * sizeof(struct rt2860_rxdesc), 1,
  9342. +       RT2860_SOFTC_RX_RING_DATA_COUNT * sizeof(struct rt2860_rxdesc),
  9343. +       0, NULL, NULL, &ring->desc_dma_tag);
  9344. +   if (error != 0)
  9345. +   {
  9346. +       printf("%s: could not create Rx desc DMA tag\n",
  9347. +           device_get_nameunit(sc->sc_dev));
  9348. +       goto fail;
  9349. +   }
  9350. +
  9351. +   error = bus_dmamem_alloc(ring->desc_dma_tag, (void **) &ring->desc,
  9352. +       BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_dma_map);
  9353. +   if (error != 0)
  9354. +   {
  9355. +       printf("%s: could not allocate Rx desc DMA memory\n",
  9356. +           device_get_nameunit(sc->sc_dev));
  9357. +       goto fail;
  9358. +   }
  9359. +
  9360. +   error = bus_dmamap_load(ring->desc_dma_tag, ring->desc_dma_map,
  9361. +       ring->desc,
  9362. +       RT2860_SOFTC_RX_RING_DATA_COUNT * sizeof(struct rt2860_rxdesc),
  9363. +       rt2860_dma_map_addr, &ring->desc_phys_addr, 0);
  9364. +   if (error != 0)
  9365. +   {
  9366. +       printf("%s: could not load Rx desc DMA map\n",
  9367. +           device_get_nameunit(sc->sc_dev));
  9368. +       goto fail;
  9369. +   }
  9370. +
  9371. +   error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), PAGE_SIZE, 0,
  9372. +       BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
  9373. +       MJUMPAGESIZE, 1, MJUMPAGESIZE, 0, NULL, NULL,
  9374. +       &ring->data_dma_tag);
  9375. +   if (error != 0)
  9376. +   {
  9377. +       printf("%s: could not create Rx data DMA tag\n",
  9378. +           device_get_nameunit(sc->sc_dev));
  9379. +       goto fail;
  9380. +   }
  9381. +
  9382. +   for (i = 0; i < RT2860_SOFTC_RX_RING_DATA_COUNT; i++)
  9383. +   {
  9384. +       desc = &ring->desc[i];
  9385. +       data = &ring->data[i];
  9386. +
  9387. +       error = bus_dmamap_create(ring->data_dma_tag, 0, &data->dma_map);
  9388. +       if (error != 0)
  9389. +       {
  9390. +           printf("%s: could not create Rx data DMA map\n",
  9391. +               device_get_nameunit(sc->sc_dev));
  9392. +           goto fail;
  9393. +       }
  9394. +
  9395. +       data->m = m_getjcl(M_DONTWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE);
  9396. +       if (data->m == NULL)
  9397. +       {
  9398. +           printf("%s: could not allocate Rx mbuf\n",
  9399. +               device_get_nameunit(sc->sc_dev));
  9400. +           error = ENOMEM;
  9401. +           goto fail;
  9402. +       }
  9403. +
  9404. +       data->m->m_len = data->m->m_pkthdr.len = MJUMPAGESIZE;
  9405. +
  9406. +       error = bus_dmamap_load_mbuf_sg(ring->data_dma_tag, data->dma_map,
  9407. +           data->m, segs, &nsegs, BUS_DMA_NOWAIT);
  9408. +       if (error != 0)
  9409. +       {
  9410. +           printf("%s: could not load Rx mbuf DMA map\n",
  9411. +               device_get_nameunit(sc->sc_dev));
  9412. +           goto fail;
  9413. +       }
  9414. +
  9415. +       KASSERT(nsegs == 1, ("%s: too many DMA segments",
  9416. +           device_get_nameunit(sc->sc_dev)));
  9417. +
  9418. +       desc->sdp0 = htole32(segs[0].ds_addr);
  9419. +       desc->sdl0 = htole16(MJUMPAGESIZE);
  9420. +   }
  9421. +
  9422. +   error = bus_dmamap_create(ring->data_dma_tag, 0, &ring->spare_dma_map);
  9423. +   if (error != 0)
  9424. +   {
  9425. +       printf("%s: could not create Rx spare DMA map\n",
  9426. +           device_get_nameunit(sc->sc_dev));
  9427. +       goto fail;
  9428. +   }
  9429. +
  9430. +   bus_dmamap_sync(ring->desc_dma_tag, ring->desc_dma_map,
  9431. +       BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
  9432. +
  9433. +   return 0;
  9434. +
  9435. + fail:
  9436. +  
  9437. +   rt2860_free_rx_ring(sc, ring);
  9438. +
  9439. +   return error;
  9440. + }
  9441. +
  9442. + /*
  9443. +  * rt2860_reset_rx_ring
  9444. +  */
  9445. + static void rt2860_reset_rx_ring(struct rt2860_softc *sc,
  9446. +   struct rt2860_softc_rx_ring *ring)
  9447. + {
  9448. +   struct rt2860_rxdesc *desc;
  9449. +   int i;
  9450. +
  9451. +   for (i = 0; i < RT2860_SOFTC_RX_RING_DATA_COUNT; i++)
  9452. +   {
  9453. +       desc = &ring->desc[i];
  9454. +
  9455. +       desc->sdl0 &= ~htole16(RT2860_RXDESC_SDL0_DDONE);
  9456. +   }
  9457. +
  9458. +   bus_dmamap_sync(ring->desc_dma_tag, ring->desc_dma_map,
  9459. +       BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
  9460. +
  9461. +   ring->cur = 0;
  9462. + }
  9463. +
  9464. + /*
  9465. +  * rt2860_free_rx_ring
  9466. +  */
  9467. + static void rt2860_free_rx_ring(struct rt2860_softc *sc,
  9468. +   struct rt2860_softc_rx_ring *ring)
  9469. + {
  9470. +   struct rt2860_softc_rx_data *data;
  9471. +   int i;
  9472. +
  9473. +   if (ring->desc != NULL)
  9474. +   {
  9475. +       bus_dmamap_sync(ring->desc_dma_tag, ring->desc_dma_map,
  9476. +           BUS_DMASYNC_POSTWRITE);
  9477. +       bus_dmamap_unload(ring->desc_dma_tag, ring->desc_dma_map);
  9478. +       bus_dmamem_free(ring->desc_dma_tag, ring->desc,
  9479. +           ring->desc_dma_map);
  9480. +   }
  9481. +
  9482. +   if (ring->desc_dma_tag != NULL)
  9483. +       bus_dma_tag_destroy(ring->desc_dma_tag);
  9484. +
  9485. +   for (i = 0; i < RT2860_SOFTC_RX_RING_DATA_COUNT; i++)
  9486. +   {
  9487. +       data = &ring->data[i];
  9488. +
  9489. +       if (data->m != NULL)
  9490. +       {
  9491. +           bus_dmamap_sync(ring->data_dma_tag, data->dma_map,
  9492. +               BUS_DMASYNC_POSTREAD);
  9493. +           bus_dmamap_unload(ring->data_dma_tag, data->dma_map);
  9494. +           m_freem(data->m);
  9495. +       }
  9496. +
  9497. +       if (data->dma_map != NULL)
  9498. +           bus_dmamap_destroy(ring->data_dma_tag, data->dma_map);
  9499. +   }
  9500. +
  9501. +   if (ring->spare_dma_map != NULL)
  9502. +       bus_dmamap_destroy(ring->data_dma_tag, ring->spare_dma_map);
  9503. +
  9504. +   if (ring->data_dma_tag != NULL)
  9505. +       bus_dma_tag_destroy(ring->data_dma_tag);
  9506. + }
  9507. +
  9508. + /*
  9509. +  * rt2860_alloc_tx_ring
  9510. +  */
  9511. + static int rt2860_alloc_tx_ring(struct rt2860_softc *sc,
  9512. +   struct rt2860_softc_tx_ring *ring, int qid)
  9513. + {
  9514. +   struct rt2860_softc_tx_data *data;
  9515. +   int error, i;
  9516. +
  9517. +   mtx_init(&ring->lock, device_get_nameunit(sc->sc_dev), NULL, MTX_DEF);
  9518. +
  9519. +   error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), PAGE_SIZE, 0,
  9520. +       BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
  9521. +       RT2860_SOFTC_TX_RING_DESC_COUNT * sizeof(struct rt2860_txdesc), 1,
  9522. +       RT2860_SOFTC_TX_RING_DESC_COUNT * sizeof(struct rt2860_txdesc),
  9523. +       0, NULL, NULL, &ring->desc_dma_tag);
  9524. +   if (error != 0)
  9525. +   {
  9526. +       printf("%s: could not create Tx desc DMA tag\n",
  9527. +           device_get_nameunit(sc->sc_dev));
  9528. +       goto fail;
  9529. +   }
  9530. +
  9531. +   error = bus_dmamem_alloc(ring->desc_dma_tag, (void **) &ring->desc,
  9532. +       BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_dma_map);
  9533. +   if (error != 0)
  9534. +   {
  9535. +       printf("%s: could not allocate Tx desc DMA memory\n",
  9536. +           device_get_nameunit(sc->sc_dev));
  9537. +       goto fail;
  9538. +   }
  9539. +
  9540. +   error = bus_dmamap_load(ring->desc_dma_tag, ring->desc_dma_map,
  9541. +       ring->desc,
  9542. +       RT2860_SOFTC_TX_RING_DESC_COUNT * sizeof(struct rt2860_txdesc),
  9543. +       rt2860_dma_map_addr, &ring->desc_phys_addr, 0);
  9544. +   if (error != 0)
  9545. +   {
  9546. +       printf("%s: could not load Tx desc DMA map\n",
  9547. +           device_get_nameunit(sc->sc_dev));
  9548. +       goto fail;
  9549. +   }
  9550. +
  9551. +   ring->desc_queued = 0;
  9552. +   ring->desc_cur = 0;
  9553. +   ring->desc_next = 0;
  9554. +
  9555. +   error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), PAGE_SIZE, 0,
  9556. +       BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
  9557. +       RT2860_SOFTC_TX_RING_DATA_COUNT * RT2860_TX_DATA_SEG0_SIZE, 1,
  9558. +       RT2860_SOFTC_TX_RING_DATA_COUNT * RT2860_TX_DATA_SEG0_SIZE,
  9559. +       0, NULL, NULL, &ring->seg0_dma_tag);
  9560. +   if (error != 0)
  9561. +   {
  9562. +       printf("%s: could not create Tx seg0 DMA tag\n",
  9563. +           device_get_nameunit(sc->sc_dev));
  9564. +       goto fail;
  9565. +   }
  9566. +
  9567. +   error = bus_dmamem_alloc(ring->seg0_dma_tag, (void **) &ring->seg0,
  9568. +       BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->seg0_dma_map);
  9569. +   if (error != 0)
  9570. +   {
  9571. +       printf("%s: could not allocate Tx seg0 DMA memory\n",
  9572. +           device_get_nameunit(sc->sc_dev));
  9573. +       goto fail;
  9574. +   }
  9575. +
  9576. +   error = bus_dmamap_load(ring->seg0_dma_tag, ring->seg0_dma_map,
  9577. +       ring->seg0,
  9578. +       RT2860_SOFTC_TX_RING_DATA_COUNT * RT2860_TX_DATA_SEG0_SIZE,
  9579. +       rt2860_dma_map_addr, &ring->seg0_phys_addr, 0);
  9580. +   if (error != 0)
  9581. +   {
  9582. +       printf("%s: could not load Tx seg0 DMA map\n",
  9583. +           device_get_nameunit(sc->sc_dev));
  9584. +       goto fail;
  9585. +   }
  9586. +
  9587. +   error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), PAGE_SIZE, 0,
  9588. +       BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
  9589. +       MJUMPAGESIZE, RT2860_SOFTC_MAX_SCATTER, MJUMPAGESIZE, 0, NULL, NULL,
  9590. +       &ring->data_dma_tag);
  9591. +   if (error != 0)
  9592. +   {
  9593. +       printf("%s: could not create Tx data DMA tag\n",
  9594. +           device_get_nameunit(sc->sc_dev));
  9595. +       goto fail;
  9596. +   }
  9597. +
  9598. +   for (i = 0; i < RT2860_SOFTC_TX_RING_DATA_COUNT; i++)
  9599. +   {
  9600. +       data = &ring->data[i];
  9601. +
  9602. +       error = bus_dmamap_create(ring->data_dma_tag, 0, &data->dma_map);
  9603. +       if (error != 0)
  9604. +       {
  9605. +           printf("%s: could not create Tx data DMA map\n",
  9606. +               device_get_nameunit(sc->sc_dev));
  9607. +           goto fail;
  9608. +       }
  9609. +   }
  9610. +
  9611. +   ring->data_queued = 0;
  9612. +   ring->data_cur = 0;
  9613. +   ring->data_next = 0;
  9614. +
  9615. +   ring->qid = qid;
  9616. +
  9617. +   return 0;
  9618. +
  9619. + fail:
  9620. +  
  9621. +   rt2860_free_tx_ring(sc, ring);
  9622. +
  9623. +   return error;
  9624. + }
  9625. +
  9626. + /*
  9627. +  * rt2860_reset_tx_ring
  9628. +  */
  9629. + static void rt2860_reset_tx_ring(struct rt2860_softc *sc,
  9630. +   struct rt2860_softc_tx_ring *ring)
  9631. + {
  9632. +   struct rt2860_softc_tx_data *data;
  9633. +   struct rt2860_txdesc *desc;
  9634. +   int i;
  9635. +
  9636. +   for (i = 0; i < RT2860_SOFTC_TX_RING_DESC_COUNT; i++)
  9637. +   {
  9638. +       desc = &ring->desc[i];
  9639. +
  9640. +       desc->sdl0 = 0;
  9641. +       desc->sdl1 = 0;
  9642. +   }
  9643. +
  9644. +   ring->desc_queued = 0;
  9645. +   ring->desc_cur = 0;
  9646. +   ring->desc_next = 0;
  9647. +
  9648. +   bus_dmamap_sync(ring->desc_dma_tag, ring->desc_dma_map,
  9649. +       BUS_DMASYNC_PREWRITE);
  9650. +
  9651. +   bus_dmamap_sync(ring->seg0_dma_tag, ring->seg0_dma_map,
  9652. +       BUS_DMASYNC_PREWRITE);
  9653. +
  9654. +   for (i = 0; i < RT2860_SOFTC_TX_RING_DATA_COUNT; i++)
  9655. +   {
  9656. +       data = &ring->data[i];
  9657. +
  9658. +       if (data->m != NULL)
  9659. +       {
  9660. +           bus_dmamap_sync(ring->data_dma_tag, data->dma_map,
  9661. +               BUS_DMASYNC_POSTWRITE);
  9662. +           bus_dmamap_unload(ring->data_dma_tag, data->dma_map);
  9663. +           m_freem(data->m);
  9664. +           data->m = NULL;
  9665. +       }
  9666. +
  9667. +       if (data->ni != NULL)
  9668. +       {
  9669. +           ieee80211_free_node(data->ni);
  9670. +           data->ni = NULL;
  9671. +       }
  9672. +   }
  9673. +
  9674. +   ring->data_queued = 0;
  9675. +   ring->data_cur = 0;
  9676. +   ring->data_next = 0;
  9677. + }
  9678. +
  9679. + /*
  9680. +  * rt2860_free_tx_ring
  9681. +  */
  9682. + static void rt2860_free_tx_ring(struct rt2860_softc *sc,
  9683. +   struct rt2860_softc_tx_ring *ring)
  9684. + {
  9685. +   struct rt2860_softc_tx_data *data;
  9686. +   int i;
  9687. +
  9688. +   if (ring->desc != NULL)
  9689. +   {
  9690. +       bus_dmamap_sync(ring->desc_dma_tag, ring->desc_dma_map,
  9691. +           BUS_DMASYNC_POSTWRITE);
  9692. +       bus_dmamap_unload(ring->desc_dma_tag, ring->desc_dma_map);
  9693. +       bus_dmamem_free(ring->desc_dma_tag, ring->desc,
  9694. +           ring->desc_dma_map);
  9695. +   }
  9696. +
  9697. +   if (ring->desc_dma_tag != NULL)
  9698. +       bus_dma_tag_destroy(ring->desc_dma_tag);
  9699. +
  9700. +   if (ring->seg0 != NULL)
  9701. +   {
  9702. +       bus_dmamap_sync(ring->seg0_dma_tag, ring->seg0_dma_map,
  9703. +           BUS_DMASYNC_POSTWRITE);
  9704. +       bus_dmamap_unload(ring->seg0_dma_tag, ring->seg0_dma_map);
  9705. +       bus_dmamem_free(ring->seg0_dma_tag, ring->seg0,
  9706. +           ring->seg0_dma_map);
  9707. +   }
  9708. +
  9709. +   if (ring->seg0_dma_tag != NULL)
  9710. +       bus_dma_tag_destroy(ring->seg0_dma_tag);
  9711. +
  9712. +   for (i = 0; i < RT2860_SOFTC_TX_RING_DATA_COUNT; i++)
  9713. +   {
  9714. +       data = &ring->data[i];
  9715. +
  9716. +       if (data->m != NULL)
  9717. +       {
  9718. +           bus_dmamap_sync(ring->data_dma_tag, data->dma_map,
  9719. +               BUS_DMASYNC_POSTWRITE);
  9720. +           bus_dmamap_unload(ring->data_dma_tag, data->dma_map);
  9721. +           m_freem(data->m);
  9722. +       }
  9723. +
  9724. +       if (data->ni != NULL)
  9725. +           ieee80211_free_node(data->ni);
  9726. +
  9727. +       if (data->dma_map != NULL)
  9728. +           bus_dmamap_destroy(ring->data_dma_tag, data->dma_map);
  9729. +   }
  9730. +
  9731. +   if (ring->data_dma_tag != NULL)
  9732. +       bus_dma_tag_destroy(ring->data_dma_tag);
  9733. +
  9734. +   mtx_destroy(&ring->lock);
  9735. + }
  9736. +
  9737. + /*
  9738. +  * rt2860_dma_map_addr
  9739. +  */
  9740. + static void rt2860_dma_map_addr(void *arg, bus_dma_segment_t *segs,
  9741. +   int nseg, int error)
  9742. + {
  9743. +   if (error != 0)
  9744. +       return;
  9745. +
  9746. +   KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
  9747. +
  9748. +   *(bus_addr_t *) arg = segs[0].ds_addr;
  9749. + }
  9750. +
  9751. + /*
  9752. +  * rt2860_sysctl_attach
  9753. +  */
  9754. + static void rt2860_sysctl_attach(struct rt2860_softc *sc)
  9755. + {
  9756. +   struct sysctl_ctx_list *ctx;
  9757. +   struct sysctl_oid *tree;
  9758. +   struct sysctl_oid *stats;
  9759. +
  9760. +   ctx = device_get_sysctl_ctx(sc->sc_dev);
  9761. +   tree = device_get_sysctl_tree(sc->sc_dev);
  9762. +
  9763. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
  9764. +       "tx_stbc", CTLFLAG_RW, &sc->tx_stbc, 0,
  9765. +       "Tx STBC");
  9766. +
  9767. +   /* statistic counters */
  9768. +
  9769. +   stats = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
  9770. +       "stats", CTLFLAG_RD, 0, "statistic");
  9771. +
  9772. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9773. +       "interrupts", CTLFLAG_RD, &sc->interrupts, 0,
  9774. +       "all interrupts");
  9775. +
  9776. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9777. +       "tx_coherent_interrupts", CTLFLAG_RD, &sc->tx_coherent_interrupts, 0,
  9778. +       "Tx coherent interrupts");
  9779. +
  9780. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9781. +       "rx_coherent_interrupts", CTLFLAG_RD, &sc->rx_coherent_interrupts, 0,
  9782. +       "Rx coherent interrupts");
  9783. +
  9784. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9785. +       "txrx_coherent_interrupts", CTLFLAG_RD, &sc->txrx_coherent_interrupts, 0,
  9786. +       "Tx/Rx coherent interrupts");
  9787. +
  9788. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9789. +       "fifo_sta_full_interrupts", CTLFLAG_RD, &sc->fifo_sta_full_interrupts, 0,
  9790. +       "FIFO statistic full interrupts");
  9791. +
  9792. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9793. +       "rx_interrupts", CTLFLAG_RD, &sc->rx_interrupts, 0,
  9794. +       "Rx interrupts");
  9795. +
  9796. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9797. +       "rx_delay_interrupts", CTLFLAG_RD, &sc->rx_delay_interrupts, 0,
  9798. +       "Rx delay interrupts");
  9799. +
  9800. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9801. +       "tx_mgmt_interrupts", CTLFLAG_RD, &sc->tx_interrupts[5], 0,
  9802. +       "Tx MGMT interrupts");
  9803. +
  9804. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9805. +       "tx_hcca_interrupts", CTLFLAG_RD, &sc->tx_interrupts[4], 0,
  9806. +       "Tx HCCA interrupts");
  9807. +
  9808. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9809. +       "tx_ac3_interrupts", CTLFLAG_RD, &sc->tx_interrupts[3], 0,
  9810. +       "Tx AC3 interrupts");
  9811. +
  9812. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9813. +       "tx_ac2_interrupts", CTLFLAG_RD, &sc->tx_interrupts[2], 0,
  9814. +       "Tx AC2 interrupts");
  9815. +
  9816. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9817. +       "tx_ac1_interrupts", CTLFLAG_RD, &sc->tx_interrupts[1], 0,
  9818. +       "Tx AC1 interrupts");
  9819. +
  9820. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9821. +       "tx_ac0_interrupts", CTLFLAG_RD, &sc->tx_interrupts[0], 0,
  9822. +       "Tx AC0 interrupts");
  9823. +
  9824. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9825. +       "tx_delay_interrupts", CTLFLAG_RD, &sc->tx_delay_interrupts, 0,
  9826. +       "Tx delay interrupts");
  9827. +
  9828. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9829. +       "pre_tbtt_interrupts", CTLFLAG_RD, &sc->pre_tbtt_interrupts, 0,
  9830. +       "Pre-TBTT interrupts");
  9831. +
  9832. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9833. +       "tbtt_interrupts", CTLFLAG_RD, &sc->tbtt_interrupts, 0,
  9834. +       "TBTT interrupts");
  9835. +
  9836. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9837. +       "mcu_cmd_interrupts", CTLFLAG_RD, &sc->mcu_cmd_interrupts, 0,
  9838. +       "MCU command interrupts");
  9839. +
  9840. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9841. +       "auto_wakeup_interrupts", CTLFLAG_RD, &sc->auto_wakeup_interrupts, 0,
  9842. +       "auto wakeup interrupts");
  9843. +
  9844. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9845. +       "gp_timer_interrupts", CTLFLAG_RD, &sc->gp_timer_interrupts, 0,
  9846. +       "GP timer interrupts");
  9847. +
  9848. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9849. +       "tx_mgmt_desc_queued", CTLFLAG_RD, &sc->tx_ring[5].desc_queued, 0,
  9850. +       "Tx MGMT descriptors queued");
  9851. +
  9852. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9853. +       "tx_mgmt_data_queued", CTLFLAG_RD, &sc->tx_ring[5].data_queued, 0,
  9854. +       "Tx MGMT data queued");
  9855. +
  9856. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9857. +       "tx_hcca_desc_queued", CTLFLAG_RD, &sc->tx_ring[4].desc_queued, 0,
  9858. +       "Tx HCCA descriptors queued");
  9859. +
  9860. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9861. +       "tx_hcca_data_queued", CTLFLAG_RD, &sc->tx_ring[4].data_queued, 0,
  9862. +       "Tx HCCA data queued");
  9863. +
  9864. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9865. +       "tx_ac3_desc_queued", CTLFLAG_RD, &sc->tx_ring[3].desc_queued, 0,
  9866. +       "Tx AC3 descriptors queued");
  9867. +
  9868. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9869. +       "tx_ac3_data_queued", CTLFLAG_RD, &sc->tx_ring[3].data_queued, 0,
  9870. +       "Tx AC3 data queued");
  9871. +
  9872. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9873. +       "tx_ac2_desc_queued", CTLFLAG_RD, &sc->tx_ring[2].desc_queued, 0,
  9874. +       "Tx AC2 descriptors queued");
  9875. +
  9876. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9877. +       "tx_ac2_data_queued", CTLFLAG_RD, &sc->tx_ring[2].data_queued, 0,
  9878. +       "Tx AC2 data queued");
  9879. +
  9880. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9881. +       "tx_ac1_desc_queued", CTLFLAG_RD, &sc->tx_ring[1].desc_queued, 0,
  9882. +       "Tx AC1 descriptors queued");
  9883. +
  9884. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9885. +       "tx_ac1_data_queued", CTLFLAG_RD, &sc->tx_ring[1].data_queued, 0,
  9886. +       "Tx AC1 data queued");
  9887. +
  9888. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9889. +       "tx_ac0_desc_queued", CTLFLAG_RD, &sc->tx_ring[0].desc_queued, 0,
  9890. +       "Tx AC0 descriptors queued");
  9891. +
  9892. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9893. +       "tx_ac0_data_queued", CTLFLAG_RD, &sc->tx_ring[0].data_queued, 0,
  9894. +       "Tx AC0 data queued");
  9895. +
  9896. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9897. +       "tx_mgmt_data_queue_full", CTLFLAG_RD, &sc->tx_data_queue_full[5], 0,
  9898. +       "Tx MGMT data queue full");
  9899. +
  9900. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9901. +       "tx_hcca_data_queue_full", CTLFLAG_RD, &sc->tx_data_queue_full[4], 0,
  9902. +       "Tx HCCA data queue full");
  9903. +
  9904. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9905. +       "tx_ac3_data_queue_full", CTLFLAG_RD, &sc->tx_data_queue_full[3], 0,
  9906. +       "Tx AC3 data queue full");
  9907. +
  9908. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9909. +       "tx_ac2_data_queue_full", CTLFLAG_RD, &sc->tx_data_queue_full[2], 0,
  9910. +       "Tx AC2 data queue full");
  9911. +
  9912. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9913. +       "tx_ac1_data_queue_full", CTLFLAG_RD, &sc->tx_data_queue_full[1], 0,
  9914. +       "Tx AC1 data queue full");
  9915. +
  9916. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9917. +       "tx_ac0_data_queue_full", CTLFLAG_RD, &sc->tx_data_queue_full[0], 0,
  9918. +       "Tx AC0 data queue full");
  9919. +
  9920. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9921. +       "tx_watchdog_timeouts", CTLFLAG_RD, &sc->tx_watchdog_timeouts, 0,
  9922. +       "Tx watchdog timeouts");
  9923. +
  9924. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9925. +       "tx_defrag_packets", CTLFLAG_RD, &sc->tx_defrag_packets, 0,
  9926. +       "Tx defragmented packets");
  9927. +
  9928. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9929. +       "no_tx_desc_avail", CTLFLAG_RD, &sc->no_tx_desc_avail, 0,
  9930. +       "no Tx descriptors available");
  9931. +
  9932. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9933. +       "rx_mbuf_alloc_errors", CTLFLAG_RD, &sc->rx_mbuf_alloc_errors, 0,
  9934. +       "Rx mbuf allocation errors");
  9935. +
  9936. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9937. +       "rx_mbuf_dmamap_errors", CTLFLAG_RD, &sc->rx_mbuf_dmamap_errors, 0,
  9938. +       "Rx mbuf DMA mapping errors");
  9939. +
  9940. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9941. +       "tx_queue_0_not_empty", CTLFLAG_RD, &sc->tx_queue_not_empty[0], 0,
  9942. +       "Tx queue 0 not empty");
  9943. +
  9944. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9945. +       "tx_queue_1_not_empty", CTLFLAG_RD, &sc->tx_queue_not_empty[1], 0,
  9946. +       "Tx queue 1 not empty");
  9947. +
  9948. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9949. +       "tx_beacons", CTLFLAG_RD, &sc->tx_beacons, 0,
  9950. +       "Tx beacons");
  9951. +
  9952. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9953. +       "tx_noretryok", CTLFLAG_RD, &sc->tx_noretryok, 0,
  9954. +       "Tx successfull without retries");
  9955. +
  9956. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9957. +       "tx_retryok", CTLFLAG_RD, &sc->tx_retryok, 0,
  9958. +       "Tx successfull with retries");
  9959. +
  9960. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9961. +       "tx_failed", CTLFLAG_RD, &sc->tx_failed, 0,
  9962. +       "Tx failed");
  9963. +
  9964. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9965. +       "tx_underflows", CTLFLAG_RD, &sc->tx_underflows, 0,
  9966. +       "Tx underflows");
  9967. +
  9968. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9969. +       "tx_zerolen", CTLFLAG_RD, &sc->tx_zerolen, 0,
  9970. +       "Tx zero length");
  9971. +
  9972. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9973. +       "tx_nonagg", CTLFLAG_RD, &sc->tx_nonagg, 0,
  9974. +       "Tx non-aggregated");
  9975. +
  9976. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9977. +       "tx_agg", CTLFLAG_RD, &sc->tx_agg, 0,
  9978. +       "Tx aggregated");
  9979. +
  9980. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9981. +       "tx_ampdu", CTLFLAG_RD, &sc->tx_ampdu, 0,
  9982. +       "Tx A-MPDU");
  9983. +
  9984. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9985. +       "tx_mpdu_zero_density", CTLFLAG_RD, &sc->tx_mpdu_zero_density, 0,
  9986. +       "Tx MPDU with zero density");
  9987. +
  9988. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9989. +       "tx_ampdu_sessions", CTLFLAG_RD, &sc->tx_ampdu_sessions, 0,
  9990. +       "Tx A-MPDU sessions");
  9991. +
  9992. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9993. +       "rx_packets", CTLFLAG_RD, &sc->rx_packets, 0,
  9994. +       "Rx packets");
  9995. +
  9996. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  9997. +       "rx_ampdu", CTLFLAG_RD, &sc->rx_ampdu, 0,
  9998. +       "Rx A-MPDU");
  9999. +
  10000. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  10001. +       "rx_ampdu_retries", CTLFLAG_RD, &sc->rx_ampdu_retries, 0,
  10002. +       "Rx A-MPDU retries");
  10003. +
  10004. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  10005. +       "rx_mpdu_zero_density", CTLFLAG_RD, &sc->rx_mpdu_zero_density, 0,
  10006. +       "Rx MPDU with zero density");
  10007. +
  10008. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  10009. +       "rx_ampdu_sessions", CTLFLAG_RD, &sc->rx_ampdu_sessions, 0,
  10010. +       "Rx A-MPDU sessions");
  10011. +
  10012. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  10013. +       "rx_amsdu", CTLFLAG_RD, &sc->rx_amsdu, 0,
  10014. +       "Rx A-MSDU");
  10015. +
  10016. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  10017. +       "rx_crc_errors", CTLFLAG_RD, &sc->rx_crc_errors, 0,
  10018. +       "Rx CRC errors");
  10019. +
  10020. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  10021. +       "rx_phy_errors", CTLFLAG_RD, &sc->rx_phy_errors, 0,
  10022. +       "Rx PHY errors");
  10023. +
  10024. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  10025. +       "rx_false_ccas", CTLFLAG_RD, &sc->rx_false_ccas, 0,
  10026. +       "Rx false CCAs");
  10027. +
  10028. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  10029. +       "rx_plcp_errors", CTLFLAG_RD, &sc->rx_plcp_errors, 0,
  10030. +       "Rx PLCP errors");
  10031. +
  10032. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  10033. +       "rx_dup_packets", CTLFLAG_RD, &sc->rx_dup_packets, 0,
  10034. +       "Rx duplicate packets");
  10035. +
  10036. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  10037. +       "rx_fifo_overflows", CTLFLAG_RD, &sc->rx_fifo_overflows, 0,
  10038. +       "Rx FIFO overflows");
  10039. +
  10040. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  10041. +       "rx_cipher_no_errors", CTLFLAG_RD, &sc->rx_cipher_no_errors, 0,
  10042. +       "Rx cipher no errors");
  10043. +
  10044. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  10045. +       "rx_cipher_icv_errors", CTLFLAG_RD, &sc->rx_cipher_icv_errors, 0,
  10046. +       "Rx cipher ICV errors");
  10047. +
  10048. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  10049. +       "rx_cipher_mic_errors", CTLFLAG_RD, &sc->rx_cipher_mic_errors, 0,
  10050. +       "Rx cipher MIC errors");
  10051. +
  10052. +   SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(stats), OID_AUTO,
  10053. +       "rx_cipher_invalid_key_errors", CTLFLAG_RD, &sc->rx_cipher_invalid_key_errors, 0,
  10054. +       "Rx cipher invalid key errors");
  10055. + }
  10056. +
  10057. +
  10058. *** /dev/null   Mon Jun  6 17:35:57 2011
  10059. --- rt2860_amrr.h   Sat Jun  4 02:54:23 2011
  10060. ***************
  10061. *** 0 ****
  10062. --- 1,80 ----
  10063. +
  10064. + /*-
  10065. +  * Copyright (c) 2009-2010 Alexander Egorenkov <[email protected]>
  10066. +  * Copyright (c) 2009 Damien Bergamini <[email protected]>
  10067. +  *
  10068. +  * Permission to use, copy, modify, and distribute this software for any
  10069. +  * purpose with or without fee is hereby granted, provided that the above
  10070. +  * copyright notice and this permission notice appear in all copies.
  10071. +  *
  10072. +  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10073. +  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10074. +  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10075. +  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  10076. +  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  10077. +  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  10078. +  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  10079. +  */
  10080. +
  10081. + #ifndef _RT2860_AMRR_H_
  10082. + #define _RT2860_AMRR_H_
  10083. +
  10084. + #define RT2860_AMRR_MIN_SUCCESS_THRESHOLD                 1
  10085. + #define RT2860_AMRR_MAX_SUCCESS_THRESHOLD                 15
  10086. +
  10087. + struct rt2860_amrr
  10088. + {
  10089. +   int ntxpath;
  10090. +
  10091. +   unsigned int min_success_threshold;
  10092. +   unsigned int max_success_threshold;
  10093. +
  10094. +   int interval;
  10095. + };
  10096. +
  10097. + struct rt2860_amrr_node
  10098. + {
  10099. +   struct rt2860_amrr *amrr;
  10100. +
  10101. +   int rate_index;
  10102. +
  10103. +   int ticks;
  10104. +
  10105. +   unsigned int txcnt;
  10106. +   unsigned int success;
  10107. +   unsigned int success_threshold;
  10108. +   unsigned int recovery;
  10109. +   unsigned int retrycnt;
  10110. + };
  10111. +
  10112. + void rt2860_amrr_init(struct rt2860_amrr *amrr, struct ieee80211vap *vap,
  10113. +   int ntxpath, int min_success_threshold, int max_success_threshold, int msecs);
  10114. +
  10115. + void rt2860_amrr_cleanup(struct rt2860_amrr *amrr);
  10116. +
  10117. + void rt2860_amrr_node_init(struct rt2860_amrr *amrr,
  10118. +     struct rt2860_amrr_node *amrr_node, struct ieee80211_node *ni);
  10119. +
  10120. + int rt2860_amrr_choose(struct ieee80211_node *ni,
  10121. +   struct rt2860_amrr_node *amrr_node);
  10122. +
  10123. + static __inline void rt2860_amrr_tx_complete(struct rt2860_amrr_node *amrr_node,
  10124. +   int ok, int retries)
  10125. + {
  10126. +   amrr_node->txcnt++;
  10127. +
  10128. +   if (ok)
  10129. +       amrr_node->success++;
  10130. +
  10131. +   amrr_node->retrycnt += retries;
  10132. + }
  10133. +
  10134. + static __inline void rt2860_amrr_tx_update(struct rt2860_amrr_node *amrr_node,
  10135. +   int txcnt, int success, int retrycnt)
  10136. + {
  10137. +   amrr_node->txcnt = txcnt;
  10138. +   amrr_node->success = success;
  10139. +   amrr_node->retrycnt = retrycnt;
  10140. + }
  10141. +
  10142. + #endif /* #ifndef _RT2860_AMRR_H_ */
  10143. *** /dev/null   Mon Jun  6 17:35:57 2011
  10144. --- rt2860_debug.h  Sat Jun  4 02:54:31 2011
  10145. ***************
  10146. *** 0 ****
  10147. --- 1,53 ----
  10148. +
  10149. + /*-
  10150. +  * Copyright (c) 2009-2010 Alexander Egorenkov <[email protected]>
  10151. +  * Copyright (c) 2009 Damien Bergamini <[email protected]>
  10152. +  *
  10153. +  * Permission to use, copy, modify, and distribute this software for any
  10154. +  * purpose with or without fee is hereby granted, provided that the above
  10155. +  * copyright notice and this permission notice appear in all copies.
  10156. +  *
  10157. +  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10158. +  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10159. +  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10160. +  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  10161. +  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  10162. +  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  10163. +  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  10164. +  */
  10165. +
  10166. + #ifndef _RT2860_DEBUG_H_
  10167. + #define _RT2860_DEBUG_H_
  10168. +
  10169. + #ifdef RT2860_DEBUG
  10170. +
  10171. + enum
  10172. + {
  10173. +   RT2860_DEBUG_EEPROM = 0x00000001,
  10174. +   RT2860_DEBUG_RX = 0x00000002,
  10175. +   RT2860_DEBUG_TX = 0x00000004,
  10176. +   RT2860_DEBUG_INTR = 0x00000008,
  10177. +   RT2860_DEBUG_STATE = 0x00000010,
  10178. +   RT2860_DEBUG_CHAN = 0x00000020,
  10179. +   RT2860_DEBUG_NODE = 0x00000040,
  10180. +   RT2860_DEBUG_KEY = 0x00000080,
  10181. +   RT2860_DEBUG_PROT = 0x00000100,
  10182. +   RT2860_DEBUG_WME = 0x00000200,
  10183. +   RT2860_DEBUG_BEACON = 0x00000400,
  10184. +   RT2860_DEBUG_BA = 0x00000800,
  10185. +   RT2860_DEBUG_STATS = 0x00001000,
  10186. +   RT2860_DEBUG_RATE = 0x00002000,
  10187. +   RT2860_DEBUG_PERIODIC = 0x00004000,
  10188. +   RT2860_DEBUG_WATCHDOG = 0x00008000,
  10189. +   RT2860_DEBUG_ANY = 0xffffffff
  10190. + };
  10191. +
  10192. + #define RT2860_DPRINTF(sc, m, fmt, ...)       do { if ((sc)->debug & (m)) printf(fmt, __VA_ARGS__); } while (0)
  10193. +
  10194. + #else
  10195. +
  10196. + #define RT2860_DPRINTF(sc, m, fmt, ...)
  10197. +
  10198. + #endif /* #ifdef RT2860_DEBUG */
  10199. +
  10200. + #endif /* #ifndef _RT2860_DEBUG_H_ */
  10201. *** /dev/null   Mon Jun  6 17:35:57 2011
  10202. --- rt2860_eeprom.h Sat Jun  4 02:54:39 2011
  10203. ***************
  10204. *** 0 ****
  10205. --- 1,91 ----
  10206. +
  10207. + /*-
  10208. +  * Copyright (c) 2009-2010 Alexander Egorenkov <[email protected]>
  10209. +  * Copyright (c) 2009 Damien Bergamini <[email protected]>
  10210. +  *
  10211. +  * Permission to use, copy, modify, and distribute this software for any
  10212. +  * purpose with or without fee is hereby granted, provided that the above
  10213. +  * copyright notice and this permission notice appear in all copies.
  10214. +  *
  10215. +  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10216. +  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10217. +  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10218. +  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  10219. +  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  10220. +  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  10221. +  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  10222. +  */
  10223. +
  10224. + #ifndef _RT2860_EEPROM_H_
  10225. + #define _RT2860_EEPROM_H_
  10226. +
  10227. + #define RT2860_EEPROM_VERSION                 0x0002
  10228. + #define RT2860_EEPROM_ADDRESS01                   0x0004
  10229. + #define RT2860_EEPROM_ADDRESS23                   0x0006
  10230. + #define RT2860_EEPROM_ADDRESS45                   0x0008
  10231. + #define RT2860_EEPROM_POWERSAVE_LEVEL         0x0022
  10232. + #define RT2860_EEPROM_ANTENNA                 0x0034
  10233. + #define RT2860_EEPROM_NIC_CONFIG              0x0036
  10234. + #define RT2860_EEPROM_COUNTRY                 0x0038
  10235. + #define RT2860_EEPROM_RF_FREQ_OFF             0x003a
  10236. + #define RT2860_EEPROM_LED1_OFF                    0x003c
  10237. + #define RT2860_EEPROM_LED2_OFF                    0x003e
  10238. + #define RT2860_EEPROM_LED3_OFF                    0x0040
  10239. + #define RT2860_EEPROM_LNA_GAIN                    0x0044
  10240. + #define RT2860_EEPROM_RSSI_OFF_2GHZ_BASE      0x0046
  10241. + #define RT2860_EEPROM_RSSI2_OFF_2GHZ_BASE     0x0048
  10242. + #define RT2860_EEPROM_RSSI_OFF_5GHZ_BASE      0x004a
  10243. + #define RT2860_EEPROM_RSSI2_OFF_5GHZ_BASE     0x004c
  10244. + #define RT2860_EEPROM_TXPOW_RATE_DELTA            0x0050
  10245. + #define RT2860_EEPROM_TXPOW1_2GHZ_BASE            0x0052
  10246. + #define RT2860_EEPROM_TXPOW2_2GHZ_BASE            0x0060
  10247. + #define RT2860_EEPROM_TSSI_2GHZ_BASE          0x006e
  10248. + #define RT2860_EEPROM_TXPOW1_5GHZ_BASE            0x0078
  10249. + #define RT2860_EEPROM_TXPOW2_5GHZ_BASE            0x00a6
  10250. + #define RT2860_EEPROM_TSSI_5GHZ_BASE          0x00d4
  10251. + #define RT2860_EEPROM_TXPOW_RATE_BASE         0x00de
  10252. + #define RT2860_EEPROM_BBP_BASE                0x00f0
  10253. + #define RT3071_EEPROM_RF_BASE             0x0082
  10254. +
  10255. + #define RT2860_EEPROM_RF_2820                 1 /* 2.4GHz 2T3R */
  10256. + #define RT2860_EEPROM_RF_2850                 2 /* 2.4/5GHz 2T3R */
  10257. + #define RT2860_EEPROM_RF_2720                 3 /* 2.4GHz 1T2R */
  10258. + #define RT2860_EEPROM_RF_2750                 4 /* 2.4G/5GHz 1T2R */
  10259. + #define RT2860_EEPROM_RF_3020                 5 /* 2.4G 1T1R */
  10260. + #define RT2860_EEPROM_RF_2020                 6 /* 2.4G B/G */
  10261. + #define RT2860_EEPROM_RF_3021                 7 /* 2.4G 1T2R */
  10262. + #define RT2860_EEPROM_RF_3022                 8 /* 2.4G 2T2R */
  10263. + #define RT2860_EEPROM_RF_3052                 9 /* 2.4G/5G 2T2R */
  10264. + #define RT2860_EEPROM_RF_2853                 10 /* 2.4G.5G 3T3R */
  10265. + #define RT2860_EEPROM_RF_3320                 11 /* 2.4G 1T1R with PA (RT3350/RT3370/RT3390) */
  10266. + #define RT2860_EEPROM_RF_3322                 12 /* 2.4G 2T2R with PA (RT3352/RT3371/RT3372/RT3391/RT3392) */
  10267. + #define RT2860_EEPROM_RF_3053                 13 /* 2.4G/5G 3T3R (RT3883/RT3563/RT3573/RT3593/RT3662) */
  10268. + #define RT2860_EEPROM_RF_3853                 13 /* 2.4G/5G 3T3R (RT3883/RT3563/RT3573/RT3593/RT3662) */
  10269. +
  10270. + /*
  10271. +  * RT2860_EEPROM_NIC_CONFIG flags
  10272. +  */
  10273. + #define RT2860_EEPROM_EXT_LNA_5GHZ                (1 << 3)
  10274. + #define RT2860_EEPROM_EXT_LNA_2GHZ                (1 << 2)
  10275. + #define RT2860_EEPROM_TX_AGC_CNTL             (1 << 1)
  10276. + #define RT2860_EEPROM_HW_RADIO_CNTL               (1 << 0)
  10277. +
  10278. + #define RT2860_EEPROM_LED_POLARITY                (1 << 7)
  10279. + #define RT2860_EEPROM_LED_MODE_MASK               0x7f
  10280. +
  10281. + #define RT2860_EEPROM_LED_CNTL_DEFAULT            0x01
  10282. + #define RT2860_EEPROM_LED1_OFF_DEFAULT            0x5555
  10283. + #define RT2860_EEPROM_LED2_OFF_DEFAULT            0x2221
  10284. + #define RT2860_EEPROM_LED3_OFF_DEFAULT            0xa9f8
  10285. +
  10286. + #define RT2860_EEPROM_RSSI_OFF_MIN                -10
  10287. + #define RT2860_EEPROM_RSSI_OFF_MAX                10
  10288. +
  10289. + #define RT2860_EEPROM_TXPOW_2GHZ_MIN          0
  10290. + #define RT2860_EEPROM_TXPOW_2GHZ_MAX          31
  10291. + #define RT2860_EEPROM_TXPOW_2GHZ_DEFAULT      5
  10292. + #define RT2860_EEPROM_TXPOW_5GHZ_MIN          -7
  10293. + #define RT2860_EEPROM_TXPOW_5GHZ_MAX          15
  10294. + #define RT2860_EEPROM_TXPOW_5GHZ_DEFAULT      5
  10295. +
  10296. + #endif /* #ifndef _RT2860_EEPROM_H_ */
  10297. *** /dev/null   Mon Jun  6 17:35:57 2011
  10298. --- rt2860_io.h Sat Jun  4 02:54:45 2011
  10299. ***************
  10300. *** 0 ****
  10301. --- 1,73 ----
  10302. +
  10303. + /*-
  10304. +  * Copyright (c) 2009-2010 Alexander Egorenkov <[email protected]>
  10305. +  * Copyright (c) 2009 Damien Bergamini <[email protected]>
  10306. +  *
  10307. +  * Permission to use, copy, modify, and distribute this software for any
  10308. +  * purpose with or without fee is hereby granted, provided that the above
  10309. +  * copyright notice and this permission notice appear in all copies.
  10310. +  *
  10311. +  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10312. +  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10313. +  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10314. +  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  10315. +  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  10316. +  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  10317. +  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  10318. +  */
  10319. +
  10320. + #ifndef _RT2860_IO_H_
  10321. + #define _RT2860_IO_H_
  10322. +
  10323. + #include <dev/ral/rt2860_softc.h>
  10324. +
  10325. + #define RT2860_IO_MCU_CMD_SLEEP               0x30
  10326. + #define RT2860_IO_MCU_CMD_WAKEUP          0x31
  10327. + #define RT2860_IO_MCU_CMD_RADIOOFF            0x35
  10328. + #define RT2860_IO_MCU_CMD_LEDS                0x50
  10329. + #define RT2860_IO_MCU_CMD_LED_BRIGHTNESS      0x51
  10330. + #define RT2860_IO_MCU_CMD_LED1                0x52
  10331. + #define RT2860_IO_MCU_CMD_LED2                0x53
  10332. + #define RT2860_IO_MCU_CMD_LED3                0x54
  10333. + #define RT2860_IO_MCU_CMD_BOOT                0x72
  10334. + #define RT2860_IO_MCU_CMD_BBP             0x80
  10335. + #define RT2860_IO_MCU_CMD_POWERSAVE_LEVEL     0x83
  10336. +
  10337. + void rt2860_io_rf_load_defaults(struct rt2860_softc *sc);
  10338. + uint32_t rt2860_io_mac_read(struct rt2860_softc *sc, uint16_t reg);
  10339. +
  10340. + void rt2860_io_mac_read_multi(struct rt2860_softc *sc,
  10341. +   uint16_t reg, void *buf, size_t len);
  10342. +
  10343. + void rt2860_io_mac_write(struct rt2860_softc *sc,
  10344. +   uint16_t reg, uint32_t val);
  10345. +
  10346. + void rt2860_io_mac_write_multi(struct rt2860_softc *sc,
  10347. +   uint16_t reg, const void *buf, size_t len);
  10348. +
  10349. + void rt2860_io_mac_set_region_4(struct rt2860_softc *sc,
  10350. +   uint16_t reg, uint32_t val, size_t len);
  10351. +
  10352. + uint16_t rt2860_io_eeprom_read(struct rt2860_softc *sc, uint16_t addr);
  10353. +
  10354. + void rt2860_io_eeprom_read_multi(struct rt2860_softc *sc,
  10355. +   uint16_t addr, void *buf, size_t len);
  10356. +
  10357. + uint8_t rt2860_io_bbp_read(struct rt2860_softc *sc, uint8_t reg);
  10358. +
  10359. + void rt2860_io_bbp_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val);
  10360. +
  10361. + void rt2860_io_rf_write(struct rt2860_softc *sc, uint8_t reg, uint32_t val);
  10362. +
  10363. + int32_t rt2860_io_rf_read(struct rt2860_softc *sc, uint8_t reg);
  10364. +
  10365. + void rt2860_io_mcu_cmd(struct rt2860_softc *sc, uint8_t cmd,
  10366. +   uint8_t token, uint16_t arg);
  10367. +
  10368. + int rt2860_io_mcu_cmd_check(struct rt2860_softc *sc, uint8_t cid);
  10369. +
  10370. + int rt2860_io_mcu_load_ucode(struct rt2860_softc *sc,
  10371. +   const uint8_t *ucode, size_t len);
  10372. +
  10373. +
  10374. + #endif /* #ifndef _RT2860_IO_H_ */
  10375. *** /dev/null   Mon Jun  6 17:35:57 2011
  10376. --- rt2860_led.h    Sat Jun  4 02:54:50 2011
  10377. ***************
  10378. *** 0 ****
  10379. --- 1,33 ----
  10380. +
  10381. + /*-
  10382. +  * Copyright (c) 2009-2010 Alexander Egorenkov <[email protected]>
  10383. +  * Copyright (c) 2009 Damien Bergamini <[email protected]>
  10384. +  *
  10385. +  * Permission to use, copy, modify, and distribute this software for any
  10386. +  * purpose with or without fee is hereby granted, provided that the above
  10387. +  * copyright notice and this permission notice appear in all copies.
  10388. +  *
  10389. +  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10390. +  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10391. +  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10392. +  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  10393. +  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  10394. +  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  10395. +  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  10396. +  */
  10397. +
  10398. + #ifndef _RT2860_LED_H_
  10399. + #define _RT2860_LED_H_
  10400. +
  10401. + #include <dev/ral/rt2860_softc.h>
  10402. +
  10403. + #define RT2860_LED_CMD_RADIO_OFF              0
  10404. + #define RT2860_LED_CMD_RADIO_ON                   (1 << 5)
  10405. + #define RT2860_LED_CMD_LINK_2GHZ              (1 << 6)
  10406. + #define RT2860_LED_CMD_LINK_5GHZ              (1 << 7)
  10407. +
  10408. + void rt2860_led_brightness(struct rt2860_softc *sc, uint8_t brightness);
  10409. +
  10410. + void rt2860_led_cmd(struct rt2860_softc *sc, uint8_t cmd);
  10411. +
  10412. + #endif /* #ifndef _RT2860_LED_H_ */
  10413. *** /dev/null   Mon Jun  6 17:35:57 2011
  10414. --- rt2860_read_eeprom.h    Sat Jun  4 02:54:58 2011
  10415. ***************
  10416. *** 0 ****
  10417. --- 1,29 ----
  10418. +
  10419. + /*-
  10420. +  * Copyright (c) 2009-2010 Alexander Egorenkov <[email protected]>
  10421. +  * Copyright (c) 2009 Damien Bergamini <[email protected]>
  10422. +  *
  10423. +  * Permission to use, copy, modify, and distribute this software for any
  10424. +  * purpose with or without fee is hereby granted, provided that the above
  10425. +  * copyright notice and this permission notice appear in all copies.
  10426. +  *
  10427. +  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10428. +  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10429. +  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10430. +  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  10431. +  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  10432. +  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  10433. +  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  10434. +  */
  10435. +
  10436. + #ifndef _RT2860_READ_EEPROM_H_
  10437. + #define _RT2860_READ_EEPROM_H_
  10438. +
  10439. + #include <dev/ral/rt2860_softc.h>
  10440. +
  10441. + void rt2860_read_eeprom(struct rt2860_softc *sc);
  10442. +
  10443. + uint32_t rt2860_read_eeprom_txpow_rate_add_delta(uint32_t txpow_rate,
  10444. +   int8_t delta);
  10445. +
  10446. + #endif /* #ifndef _RT2860_READ_EEPROM_H_ */
  10447. *** /dev/null   Mon Jun  6 17:35:57 2011
  10448. --- rt2860_reg.h    Sat Jun  4 02:49:07 2011
  10449. ***************
  10450. *** 0 ****
  10451. --- 1,559 ----
  10452. +
  10453. + /*-
  10454. +  * Copyright (c) 2009-2010 Alexander Egorenkov <[email protected]>
  10455. +  * Copyright (c) 2009 Damien Bergamini <[email protected]>
  10456. +  *
  10457. +  * Permission to use, copy, modify, and distribute this software for any
  10458. +  * purpose with or without fee is hereby granted, provided that the above
  10459. +  * copyright notice and this permission notice appear in all copies.
  10460. +  *
  10461. +  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10462. +  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10463. +  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  10464. +  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  10465. +  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  10466. +  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  10467. +  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  10468. +  */
  10469. +
  10470. + #ifndef _RT2860_REG_H_
  10471. + #define _RT2860_REG_H_
  10472. +
  10473. + #define RT2860_REG_PCI_CFG                    0x0000
  10474. + #define RT2860_REG_EEPROM_CSR                 0x0004
  10475. + #define RT2860_REG_PCI_MCU_CSR                    0x0008
  10476. + #define RT2860_REG_PCI_SYS_CSR                    0x000c
  10477. + #define RT2860_REG_PCIE_JTAG                  0x0010
  10478. +
  10479. + #define RT2860_REG_SCHDMA_INT_STATUS              0x0200
  10480. + #define RT2860_REG_SCHDMA_INT_MASK                    0x0204
  10481. + #define RT2860_REG_SCHDMA_WPDMA_GLO_CFG               0x0208
  10482. + #define RT2860_REG_SCHDMA_WPDMA_RST_IDX               0x020c
  10483. + #define RT2860_REG_SCHDMA_DELAY_INT_CFG               0x0210
  10484. + #define RT2860_REG_SCHDMA_WMM_AIFSN_CFG               0x0214
  10485. + #define RT2860_REG_SCHDMA_WMM_CWMIN_CFG               0x0218
  10486. + #define RT2860_REG_SCHDMA_WMM_CWMAX_CFG               0x021c
  10487. + #define RT2860_REG_SCHDMA_WMM_TXOP0_CFG               0x0220
  10488. + #define RT2860_REG_SCHDMA_WMM_TXOP1_CFG               0x0224
  10489. + #define RT2860_REG_SCHDMA_GPIO_CTRL_CFG               0x0228
  10490. + #define RT2860_REG_SCHDMA_RX_BASE_PTR             0x0290
  10491. + #define RT2860_REG_SCHDMA_RX_MAX_CNT              0x0294
  10492. + #define RT2860_REG_SCHDMA_RX_CALC_IDX             0x0298
  10493. + #define RT2860_REG_SCHDMA_RX_DRX_IDX              0x029c
  10494. + #define RT2860_REG_SCHDMA_TX_BASE_PTR(qid)            (0x0230 + (qid) * 16)
  10495. + #define RT2860_REG_SCHDMA_TX_MAX_CNT(qid)         (0x0234 + (qid) * 16)
  10496. + #define RT2860_REG_SCHDMA_TX_CTX_IDX(qid)         (0x0238 + (qid) * 16)
  10497. + #define RT2860_REG_SCHDMA_TX_DTX_IDX(qid)         (0x023c + (qid) * 16)
  10498. + #define RT2860_REG_SCHDMA_US_CYC_CNT              0x02a4
  10499. +
  10500. + #define RT2860_REG_PBF_SYS_CTRL                       0x0400
  10501. + #define RT2860_REG_PBF_HOST_CMD                       0x0404
  10502. + #define RT2860_REG_PBF_CFG                        0x0408
  10503. + #define RT2860_REG_PBF_MAX_PCNT                       0x040c
  10504. + #define RT2860_REG_PBF_BUF_CTRL                       0x0410
  10505. + #define RT2860_REG_PBF_MCU_INT_STA                    0x0414
  10506. + #define RT2860_REG_PBF_MCU_INT_ENA                    0x0418
  10507. + #define RT2860_REG_PBF_TX0Q_IO                        0x041c
  10508. + #define RT2860_REG_PBF_TX1Q_IO                        0x0420
  10509. + #define RT2860_REG_PBF_TX2Q_IO                        0x0424
  10510. + #define RT2860_REG_PBF_RX0Q_IO                        0x0428
  10511. + #define RT2860_REG_PBF_BCN_OFFSET0                    0x042c
  10512. + #define RT2860_REG_PBF_BCN_OFFSET1                    0x0430
  10513. + #define RT2860_REG_PBF_TXRXQ_STA                  0x0434
  10514. + #define RT2860_REG_PBF_TXRXQ_PCNT                 0x0438
  10515. + #define RT2860_REG_PBF_DBG                        0x043c
  10516. + #define RT2860_REG_PBF_CAP_CTRL                       0x0440
  10517. +
  10518. + #define RT2872_REG_RF_CSR_CFG                     0x500
  10519. + #define RT2872_REG_RF_SETTING                     0x504
  10520. + #define RT2872_REG_RF_TEST_CONTROL                    0x508
  10521. +
  10522. + #define RT2860_REG_MAC_CSR0                       0x1000
  10523. + #define RT2860_REG_SYS_CTRL                       0x1004
  10524. + #define RT2860_REG_ADDR_DW0                       0x1008
  10525. + #define RT2860_REG_ADDR_DW1                       0x100c
  10526. + #define RT2860_REG_BSSID_DW0                      0x1010
  10527. + #define RT2860_REG_BSSID_DW1                      0x1014
  10528. + #define RT2860_REG_MAX_LEN_CFG                        0x1018
  10529. + #define RT2860_REG_BBP_CSR_CFG                        0x101c
  10530. + #define RT2860_REG_RF_CSR_CFG0                        0x1020
  10531. + #define RT2860_REG_LED_CFG                        0x102c
  10532. + #define RT2860_REG_AMPDU_MAX_LEN_20M1S                    0x1030
  10533. + #define RT2860_REG_AMPDU_MAX_LEN_20M2S                    0x1034
  10534. + #define RT2860_REG_AMPDU_MAX_LEN_40M1S                    0x1038
  10535. + #define RT2860_REG_AMPDU_MAX_LEN_40M2S                    0x103c
  10536. + #define RT2860_REG_AMPDU_BA_WINSIZE                   0x1040
  10537. +
  10538. + #define RT2860_REG_XIFS_TIME_CFG                          0x1100
  10539. + #define RT2860_REG_BKOFF_SLOT_CFG                 0x1104
  10540. + #define RT2860_REG_NAV_TIME_CFG                       0x1108
  10541. + #define RT2860_REG_CH_TIME_CFG                        0x110c
  10542. + #define RT2860_REG_PBF_LIFE_TIMER                 0x1110
  10543. + #define RT2860_REG_BCN_TIME_CFG                       0x1114
  10544. + #define RT2860_REG_TBTT_SYNC_CFG                  0x1118
  10545. + #define RT2860_REG_TSF_TIMER_DW0                  0x111c
  10546. + #define RT2860_REG_TSF_TIMER_DW1                  0x1120
  10547. + #define RT2860_REG_TBTT_TIMER                     0x1124
  10548. + #define RT2860_REG_INT_TIMER                      0x1128
  10549. + #define RT2860_REG_INT_TIMER_EN                       0x112c
  10550. + #define RT2860_REG_CH_IDLE_STA                        0x1130
  10551. +
  10552. + #define RT2860_REG_STATUS_CFG                     0x1200
  10553. + #define RT2860_REG_PWR_PIN_CFG                        0x1204
  10554. + #define RT2860_REG_AUTO_WAKEUP_CFG                    0x1208
  10555. +
  10556. + #define RT2860_REG_TX_EDCA_AC_CFG(aci)                    (0x1300 + (aci) * 4)
  10557. + #define RT2860_REG_TX_EDCA_TID_AC_MAP                 0x1310
  10558. + #define RT2860_REG_TX_PWR_CFG(ridx)                   (0x1314 + (ridx) * 4)
  10559. + #define RT2860_REG_TX_PIN_CFG                     0x1328
  10560. + #define RT2860_REG_TX_BAND_CFG                        0x132c
  10561. + #define RT2860_REG_TX_SW_CFG0                     0x1330
  10562. + #define RT2860_REG_TX_SW_CFG1                     0x1334
  10563. + #define RT2860_REG_TX_SW_CFG2                     0x1338
  10564. + #define RT2860_REG_TX_TXOP_THRES_CFG                  0x133c
  10565. + #define RT2860_REG_TX_TXOP_CTRL_CFG                   0x1340
  10566. + #define RT2860_REG_TX_RTS_CFG                     0x1344
  10567. + #define RT2860_REG_TX_TIMEOUT_CFG                 0x1348
  10568. + #define RT2860_REG_TX_RTY_CFG                     0x134c
  10569. + #define RT2860_REG_TX_LINK_CFG                        0x1350
  10570. + #define RT2860_REG_TX_HT_FBK_CFG0                 0x1354
  10571. + #define RT2860_REG_TX_HT_FBK_CFG1                 0x1358
  10572. + #define RT2860_REG_TX_LG_FBK_CFG0                 0x135c
  10573. + #define RT2860_REG_TX_LG_FBK_CFG1                 0x1360
  10574. + #define RT2860_REG_TX_CCK_PROT_CFG                    0x1364
  10575. + #define RT2860_REG_TX_OFDM_PROT_CFG                   0x1368
  10576. + #define RT2860_REG_TX_MM20_PROT_CFG                   0x136c
  10577. + #define RT2860_REG_TX_MM40_PROT_CFG                   0x1370
  10578. + #define RT2860_REG_TX_GF20_PROT_CFG                   0x1374
  10579. + #define RT2860_REG_TX_GF40_PROT_CFG                   0x1378
  10580. + #define RT2860_REG_TX_EXP_CTS_TIME                    0x137c
  10581. + #define RT2860_REG_TX_EXP_ACK_TIME                    0x1380
  10582. +
  10583. + #define RT2860_REG_RX_FILTER_CFG                  0x1400
  10584. + #define RT2860_REG_AUTO_RSP_CFG                       0x1404
  10585. + #define RT2860_REG_LEGACY_BASIC_RATE                  0x1408
  10586. + #define RT2860_REG_HT_BASIC_RATE                  0x140c
  10587. + #define RT2860_REG_HT_CTRL_CFG                        0x1410
  10588. + #define RT2860_REG_SIFS_COST_CFG                  0x1414
  10589. + #define RT2860_REG_RX_PARSER_CFG                  0x1418
  10590. +
  10591. + #define RT2860_REG_TX_SEC_CNT0                        0x1500
  10592. + #define RT2860_REG_RX_SEC_CNT0                        0x1504
  10593. + #define RT2860_REG_CCMP_FC_MUTE                       0x1508
  10594. +
  10595. + #define RT2860_REG_HCCAPSMP_TXOP_HLDR_ADDR0               0x1600
  10596. + #define RT2860_REG_HCCAPSMP_TXOP_HLDR_ADDR1               0x1604
  10597. + #define RT2860_REG_HCCAPSMP_TXOP_HLDR_ET              0x1608
  10598. + #define RT2860_REG_HCCAPSMP_QOS_CFPOLL_RA_DW0             0x160c
  10599. + #define RT2860_REG_HCCAPSMP_QOS_CFPOLL_A1_DW1             0x1610
  10600. + #define RT2860_REG_HCCAPSMP_QOS_CFPOLL_QC             0x1614
  10601. +
  10602. + #define RT2860_REG_RX_STA_CNT0                        0x1700
  10603. + #define RT2860_REG_RX_STA_CNT1                        0x1704
  10604. + #define RT2860_REG_RX_STA_CNT2                        0x1708
  10605. + #define RT2860_REG_TX_STA_CNT0                        0x170c
  10606. + #define RT2860_REG_TX_STA_CNT1                        0x1710
  10607. + #define RT2860_REG_TX_STA_CNT2                        0x1714
  10608. + #define RT2860_REG_TX_STA_FIFO                        0x1718
  10609. + #define RT2860_REG_TX_AGG_CNT                     0x171c
  10610. + #define RT2860_REG_TX_AGG_CNT0                        0x1720
  10611. + #define RT2860_REG_TX_AGG_CNT1                        0x1724
  10612. + #define RT2860_REG_TX_AGG_CNT2                        0x1728
  10613. + #define RT2860_REG_TX_AGG_CNT3                        0x172c
  10614. + #define RT2860_REG_TX_AGG_CNT4                        0x1730
  10615. + #define RT2860_REG_TX_AGG_CNT5                        0x1734
  10616. + #define RT2860_REG_TX_AGG_CNT6                        0x1738
  10617. + #define RT2860_REG_TX_AGG_CNT7                        0x173c
  10618. + #define RT2860_REG_TXRX_MPDU_DEN_CNT                  0x1740
  10619. +
  10620. + #define RT2860_REG_WCID(wcid)                     (0x1800 + (wcid) * 8)
  10621. + #define RT2860_REG_PKEY(wcid)                     (0x4000 + (wcid) * 32)
  10622. + #define RT2860_REG_IVEIV(wcid)                        (0x6000 + (wcid) * 8)
  10623. + #define RT2860_REG_WCID_ATTR(wcid)                    (0x6800 + (wcid) * 4)
  10624. + #define RT2860_REG_SKEY(vap, kidx)                    (0x6c00 + ((vap) * 4 + (kidx)) * 32)
  10625. + #define RT2860_REG_SKEY_MODE(vap)                 (0x7000 + ((vap) / 2) * 4)
  10626. +
  10627. + #define RT2860_REG_MCU_UCODE_BASE                 0x2000
  10628. +
  10629. + #define RT2860_REG_H2M_HOST_CMD                       0x0404
  10630. + #define RT2860_REG_H2M_MAILBOX                        0x7010
  10631. + #define RT2860_REG_H2M_MAILBOX_CID                    0x7014
  10632. + #define RT2860_REG_H2M_MAILBOX_STATUS             0x701c
  10633. + #define RT2860_REG_H2M_MAILBOX_BBP_AGENT          0x7028
  10634. +
  10635. + #define RT2860_REG_BEACON_BASE(vap)                   (0x7800 + (vap) * 512)
  10636. +
  10637. + /* RT3070 registers */
  10638. + #define RT3070_RF_CSR_CFG     0x0500
  10639. + #define RT3070_EFUSE_CTRL     0x0580
  10640. + #define RT3070_EFUSE_DATA0        0x0590
  10641. + #define RT3070_EFUSE_DATA1        0x0594
  10642. + #define RT3070_EFUSE_DATA2        0x0598
  10643. + #define RT3070_EFUSE_DATA3        0x059c
  10644. + #define RT3090_OSC_CTRL           0x05a4
  10645. + #define RT3070_LDO_CFG0           0x05d4
  10646. + #define RT3070_GPIO_SWITCH        0x05dc
  10647. +
  10648. + #define RT3090_AUX_CTRL           0x010c
  10649. + #define RT3070_OPT_14         0x0114
  10650. +
  10651. + /* possible flags for register RF_CSR_CFG */
  10652. + #define RT3070_RF_KICK        (1 << 17)
  10653. + #define RT3070_RF_WRITE       (1 << 16)
  10654. +
  10655. + /* possible flags for register EFUSE_CTRL */
  10656. + #define RT3070_SEL_EFUSE  (1 << 31)
  10657. + #define RT3070_EFSROM_KICK    (1 << 30)
  10658. + #define RT3070_EFSROM_AIN_MASK    0x03ff0000
  10659. + #define RT3070_EFSROM_AIN_SHIFT   16
  10660. + #define RT3070_EFSROM_MODE_MASK   0x000000c0
  10661. + #define RT3070_EFUSE_AOUT_MASK    0x0000003f
  10662. +
  10663. + /* possible flags for RT3020 RF register 1 */
  10664. + #define RT3070_RF_BLOCK   (1 << 0)
  10665. + #define RT3070_RX0_PD (1 << 2)
  10666. + #define RT3070_TX0_PD (1 << 3)
  10667. + #define RT3070_RX1_PD (1 << 4)
  10668. + #define RT3070_TX1_PD (1 << 5)
  10669. + #define RT3070_RX2_PD (1 << 6)
  10670. + #define RT3070_TX2_PD (1 << 7)
  10671. +
  10672. + /* possible flags for RT3020 RF register 1 */
  10673. + #define RT3070_RF_BLOCK   (1 << 0)
  10674. + #define RT3070_RX0_PD (1 << 2)
  10675. + #define RT3070_TX0_PD (1 << 3)
  10676. + #define RT3070_RX1_PD (1 << 4)
  10677. + #define RT3070_TX1_PD (1 << 5)
  10678. + #define RT3070_RX2_PD (1 << 6)
  10679. + #define RT3070_TX2_PD (1 << 7)
  10680. +
  10681. + /* possible flags for RT3020 RF register 7 */
  10682. + #define RT3070_TUNE   (1 << 0)
  10683. +
  10684. + /* possible flags for RT3020 RF register 15 */
  10685. + #define RT3070_TX_LO2 (1 << 3)
  10686. +
  10687. + /* possible flags for RT3020 RF register 17 */
  10688. + #define RT3070_TX_LO1 (1 << 3)
  10689. +
  10690. + /* possible flags for RT3020 RF register 20 */
  10691. + #define RT3070_RX_LO1 (1 << 3)
  10692. +
  10693. + /* possible flags for RT3020 RF register 21 */
  10694. + #define RT3070_RX_LO2 (1 << 3)
  10695. + #define RT3070_RX_CTB (1 << 7)
  10696. +
  10697. + /* possible flags for RT3020 RF register 22 */
  10698. + #define RT3070_BB_LOOPBACK    (1 << 0)
  10699. +
  10700. + /* possible flags for RT3053 RF register 1 */
  10701. + #define RT3593_VCO    (1 << 0)
  10702. +
  10703. + /* possible flags for RT3053 RF register 2 */
  10704. + #define RT3593_RESCAL (1 << 7)
  10705. +
  10706. + /* possible flags for RT3053 RF register 3 */
  10707. + #define RT3593_VCOCAL (1 << 7)
  10708. +
  10709. + /* possible flags for RT3053 RF register 6 */
  10710. + #define RT3593_VCO_IC (1 << 6)
  10711. +
  10712. + /* possible flags for RT3053 RF register 20 */
  10713. + #define RT3593_LDO_PLL_VC_MASK    0x0e
  10714. + #define RT3593_LDO_RF_VC_MASK 0xe0
  10715. +
  10716. + /* possible flags for RT3053 RF register 22 */
  10717. + #define RT3593_CP_IC_MASK 0xe0
  10718. + #define RT3593_CP_IC_SHIFT    5
  10719. +
  10720. + /* possible flags for RT3053 RF register 46 */
  10721. + #define RT3593_RX_CTB (1 << 5)
  10722. +
  10723. + #define RT3090_DEF_LNA    10
  10724. +
  10725. +
  10726. + #define RT2860_REG_RF_R1                          0
  10727. + #define RT2860_REG_RF_R2                          1
  10728. + #define RT2860_REG_RF_R3                          2
  10729. + #define RT2860_REG_RF_R4                          3
  10730. +
  10731. + /*
  10732. +  * RT2860_REG_EEPROM_CSR flags
  10733. +  */
  10734. + #define RT2860_REG_EERL                               (1 << 7)
  10735. + #define RT2860_REG_EEDO                               (1 << 3)
  10736. + #define RT2860_REG_EEDI                               (1 << 2)
  10737. + #define RT2860_REG_EECS                               (1 << 1)
  10738. + #define RT2860_REG_EESK                               (1 << 0)
  10739. + #define RT2860_REG_EEOP_READ                      0x6
  10740. +
  10741. + /*
  10742. +  * RT2860_REG_SCHDMA_INT_STATUS
  10743. +  * RT2860_REG_SCHDMA_INT_MASK flags
  10744. +  */
  10745. + #define RT2860_REG_INT_TX_COHERENT                    (1 << 17)
  10746. + #define RT2860_REG_INT_RX_COHERENT                    (1 << 16)
  10747. + #define RT2860_REG_INT_GP_TIMER                       (1 << 15)
  10748. + #define RT2860_REG_INT_AUTO_WAKEUP                    (1 << 14)
  10749. + #define RT2860_REG_INT_FIFO_STA_FULL              (1 << 13)
  10750. + #define RT2860_REG_INT_PRE_TBTT                       (1 << 12)
  10751. + #define RT2860_REG_INT_TBTT                           (1 << 11)
  10752. + #define RT2860_REG_INT_TXRX_COHERENT              (1 << 10)
  10753. + #define RT2860_REG_INT_MCU_CMD                        (1 << 9)
  10754. + #define RT2860_REG_INT_TX_MGMT_DONE                   (1 << 8)
  10755. + #define RT2860_REG_INT_TX_HCCA_DONE                   (1 << 7)
  10756. + #define RT2860_REG_INT_TX_AC3_DONE                    (1 << 6)
  10757. + #define RT2860_REG_INT_TX_AC2_DONE                    (1 << 5)
  10758. + #define RT2860_REG_INT_TX_AC1_DONE                    (1 << 4)
  10759. + #define RT2860_REG_INT_TX_AC0_DONE                    (1 << 3)
  10760. + #define RT2860_REG_INT_RX_DONE                        (1 << 2)
  10761. + #define RT2860_REG_INT_TX_DELAY_DONE              (1 << 1)
  10762. + #define RT2860_REG_INT_RX_DELAY_DONE              (1 << 0)
  10763. +
  10764. + /*
  10765. +  * RT2860_REG_SCHDMA_WPDMA_GLO_CFG flags
  10766. +  */
  10767. + #define RT2860_REG_TX_WB_DDONE                        (1 << 6)
  10768. + #define RT2860_REG_RX_DMA_BUSY                        (1 << 3)
  10769. + #define RT2860_REG_RX_DMA_ENABLE                  (1 << 2)
  10770. + #define RT2860_REG_TX_DMA_BUSY                        (1 << 1)
  10771. + #define RT2860_REG_TX_DMA_ENABLE                  (1 << 0)
  10772. + #define RT2860_REG_WPDMA_BT_SIZE_SHIFT                4
  10773. + #define RT2860_REG_WPDMA_BT_SIZE16                    0
  10774. + #define RT2860_REG_WPDMA_BT_SIZE32                    1
  10775. + #define RT2860_REG_WPDMA_BT_SIZE64                    2
  10776. + #define RT2860_REG_WPDMA_BT_SIZE128                   3
  10777. +
  10778. + /*
  10779. +  * RT2860_REG_SCHDMA_WPDMA_RST_IDX flags
  10780. +  */
  10781. + #define RT2860_REG_RST_IDX_RX                     (1 << 16)
  10782. + #define RT2860_REG_RST_IDX_TX_MGMT                    (1 << 5)
  10783. + #define RT2860_REG_RST_IDX_TX_HCCA                    (1 << 4)
  10784. + #define RT2860_REG_RST_IDX_TX_AC3                 (1 << 3)
  10785. + #define RT2860_REG_RST_IDX_TX_AC2                 (1 << 2)
  10786. + #define RT2860_REG_RST_IDX_TX_AC1                 (1 << 1)
  10787. + #define RT2860_REG_RST_IDX_TX_AC0                 (1 << 0)
  10788. +
  10789. + /*
  10790. +  * RT2860_REG_SCHDMA_DELAY_INT_CFG flags
  10791. +  */
  10792. + #define RT2860_REG_INT_TX_DELAY_ENABLE                (1 << 31)
  10793. + #define RT2860_REG_INT_TX_MAX_PINT_SHIFT          24
  10794. + #define RT2860_REG_INT_TX_MAX_PINT_MASK               0x7
  10795. + #define RT2860_REG_INT_TX_MAX_PTIME_SHIFT         16
  10796. + #define RT2860_REG_INT_TX_MAX_PTIME_MASK          0x8
  10797. + #define RT2860_REG_INT_RX_DELAY_ENABLE                (1 << 15)
  10798. + #define RT2860_REG_INT_RX_MAX_PINT_SHIFT          8
  10799. + #define RT2860_REG_INT_RX_MAX_PINT_MASK               0x7
  10800. + #define RT2860_REG_INT_RX_MAX_PTIME_SHIFT         0
  10801. + #define RT2860_REG_INT_RX_MAX_PTIME_MASK          0x8
  10802. +
  10803. + /*
  10804. +  * RT2860_REG_PBF_SYS_CTRL flags
  10805. +  */
  10806. + #define RT2860_REG_HST_PM_SEL                     (1 << 16)
  10807. + #define RT2860_REG_MCU_READY                      (1 << 7)
  10808. + #define RT2860_REG_MCU_RESET                      (1 << 0)
  10809. +
  10810. + /*
  10811. +  * RT2860_REG_PBF_TXRXQ_PCNT flags
  10812. +  */
  10813. + #define RT2860_REG_RXQ_PCNT_SHIFT                 24
  10814. + #define RT2860_REG_RXQ_PCNT_MASK                  0xff
  10815. + #define RT2860_REG_TX2Q_PCNT_SHIFT                    16
  10816. + #define RT2860_REG_TX2Q_PCNT_MASK                 0xff
  10817. + #define RT2860_REG_TX1Q_PCNT_SHIFT                    8
  10818. + #define RT2860_REG_TX1Q_PCNT_MASK                 0xff
  10819. + #define RT2860_REG_TX0Q_PCNT_SHIFT                    0
  10820. + #define RT2860_REG_TX0Q_PCNT_MASK                 0xff
  10821. +
  10822. + /*
  10823. +  * RT2860_REG_SYS_CTRL flags
  10824. +  */
  10825. + #define RT2860_REG_RX_ENABLE                      (1 << 3)
  10826. + #define RT2860_REG_TX_ENABLE                      (1 << 2)
  10827. + #define RT2860_REG_BBP_HRST                           (1 << 1)
  10828. + #define RT2860_REG_MAC_SRST                           (1 << 0)
  10829. +
  10830. + /*
  10831. +  * RT2872_REG_RF_CSR_CFG flags
  10832. +  */
  10833. + #define RT2872_REG_RF_CSR_BUSY                        (1 << 17)
  10834. + #define RT2872_REG_RF_CSR_KICK                        (1 << 17)
  10835. + #define RT2872_REG_RF_CSR_WRITE                       (1 << 16)
  10836. + #define RT2872_REG_RF_ID_SHIFT                        8
  10837. + #define RT2872_REG_RF_ID_MASK                     0x1f
  10838. + #define RT2872_REG_RF_VAL_SHIFT                       0
  10839. + #define RT2872_REG_RF_VAL_MASK                        0xff
  10840. +
  10841. + /*
  10842. +  * RT2860_REG_BBP_CSR_CFG flags
  10843. +  */
  10844. + #define RT2860_REG_BBP_RW_MODE_PARALLEL                   (1 << 19)
  10845. + #define RT2860_REG_BBP_PAR_DUR                        (1 << 19)
  10846. + #define RT2860_REG_BBP_CSR_BUSY                       (1 << 17)
  10847. + #define RT2860_REG_BBP_CSR_KICK                       (1 << 17)
  10848. + #define RT2860_REG_BBP_CSR_READ                       (1 << 16)
  10849. + #define RT2860_REG_BBP_REG_SHIFT                  8
  10850. + #define RT2860_REG_BBP_REG_MASK                       0xff
  10851. + #define RT2860_REG_BBP_VAL_SHIFT                  0
  10852. + #define RT2860_REG_BBP_VAL_MASK                       0xff
  10853. +
  10854. + /*
  10855. +  * RT2860_REG_RF_CSR_CFG0 flags
  10856. +  */
  10857. + #define RT2860_REG_RF_BUSY                            (1 << 31)
  10858. +
  10859. + /*
  10860. +  * RT2860_REG_BCN_TIME_CFG flags
  10861. +  */
  10862. + #define RT2860_REG_BCN_TX_ENABLE                  (1 << 20)
  10863. + #define RT2860_REG_TBTT_TIMER_ENABLE              (1 << 19)
  10864. + #define RT2860_REG_TSF_TIMER_ENABLE                   (1 << 16)
  10865. + #define RT2860_REG_TSF_SYNC_MODE_SHIFT                17
  10866. + #define RT2860_REG_TSF_SYNC_MODE_MASK             0x3
  10867. + #define RT2860_REG_TSF_SYNC_MODE_DISABLE          0
  10868. + #define RT2860_REG_TSF_SYNC_MODE_STA              1
  10869. + #define RT2860_REG_TSF_SYNC_MODE_IBSS             2
  10870. + #define RT2860_REG_TSF_SYNC_MODE_HOSTAP               3
  10871. +
  10872. + /*
  10873. +  * RT2860_REG_STATUS_CFG flags
  10874. +  */
  10875. + #define RT2860_REG_STATUS_RX_BUSY                 (1 << 1)
  10876. + #define RT2860_REG_STATUS_TX_BUSY                 (1 << 0)
  10877. +
  10878. + /*
  10879. +  * RT2860_REG_TX_PIN_CFG flags
  10880. +  */
  10881. + #define RT2860_REG_TRSW_ENABLE                        (1 << 18)
  10882. + #define RT2860_REG_RFTR_ENABLE                        (1 << 16)
  10883. + #define RT2860_REG_LNA_PE_G1_ENABLE                   (1 << 11)
  10884. + #define RT2860_REG_LNA_PE_A1_ENABLE                   (1 << 10)
  10885. + #define RT2860_REG_LNA_PE_G0_ENABLE                   (1 << 9)
  10886. + #define RT2860_REG_LNA_PE_A0_ENABLE                   (1 << 8)
  10887. + #define RT2860_REG_PA_PE_G1_ENABLE                    (1 << 3)
  10888. + #define RT2860_REG_PA_PE_A1_ENABLE                    (1 << 2)
  10889. + #define RT2860_REG_PA_PE_G0_ENABLE                    (1 << 1)
  10890. + #define RT2860_REG_PA_PE_A0_ENABLE                    (1 << 0)
  10891. +
  10892. + /*
  10893. +  * RT2860_REG_TX_BAND_CFG flags
  10894. +  */
  10895. + #define RT2860_REG_TX_BAND_BG                     (1 << 2)
  10896. + #define RT2860_REG_TX_BAND_A                      (1 << 1)
  10897. + #define RT2860_REG_TX_BAND_HT40_ABOVE             (1 << 0)
  10898. + #define RT2860_REG_TX_BAND_HT40_BELOW             (0 << 0)
  10899. +
  10900. + /*
  10901. +  * RT2860_REG_TX_RTS_CFG flags
  10902. +  */
  10903. + #define RT2860_REG_TX_RTS_THRESHOLD_SHIFT         8
  10904. + #define RT2860_REG_TX_RTS_THRESHOLD_MASK          0xffff
  10905. +
  10906. + /*
  10907. +  * RT2860_REG_TX_CCK_PROT_CFG
  10908. +  * RT2860_REG_TX_OFDM_PROT_CFG
  10909. +  * RT2860_REG_TX_MM20_PROT_CFG
  10910. +  * RT2860_REG_TX_MM40_PROT_CFG
  10911. +  * RT2860_REG_TX_GF20_PROT_CFG
  10912. +  * RT2860_REG_TX_GF40_PROT_CFG flags
  10913. +  */
  10914. + #define RT2860_REG_RTSTH_ENABLE                       (1 << 26)
  10915. + #define RT2860_REG_TXOP_ALLOW_GF40                    (1 << 25)
  10916. + #define RT2860_REG_TXOP_ALLOW_GF20                    (1 << 24)
  10917. + #define RT2860_REG_TXOP_ALLOW_MM40                    (1 << 23)
  10918. + #define RT2860_REG_TXOP_ALLOW_MM20                    (1 << 22)
  10919. + #define RT2860_REG_TXOP_ALLOW_OFDM                    (1 << 21)
  10920. + #define RT2860_REG_TXOP_ALLOW_CCK                 (1 << 20)
  10921. + #define RT2860_REG_TXOP_ALLOW_ALL                 (0x3f << 20)
  10922. + #define RT2860_REG_PROT_NAV_NONE                  (0 << 18)
  10923. + #define RT2860_REG_PROT_NAV_SHORT                 (1 << 18)
  10924. + #define RT2860_REG_PROT_NAV_LONG                  (2 << 18)
  10925. + #define RT2860_REG_PROT_CTRL_NONE                 (0 << 16)
  10926. + #define RT2860_REG_PROT_CTRL_RTS_CTS              (1 << 16)
  10927. + #define RT2860_REG_PROT_CTRL_CTS                  (2 << 16)
  10928. + #define RT2860_REG_PROT_PHYMODE_SHIFT             14
  10929. + #define RT2860_REG_PROT_PHYMODE_MASK              0x3
  10930. + #define RT2860_REG_PROT_PHYMODE_CCK                   0
  10931. + #define RT2860_REG_PROT_PHYMODE_OFDM              1
  10932. + #define RT2860_REG_PROT_MCS_SHIFT                 0
  10933. + #define RT2860_REG_PROT_MCS_MASK                  0x7f
  10934. +
  10935. + /*
  10936. +  * RT2860_REG_RX_FILTER_CFG flags
  10937. +  */
  10938. + #define RT2860_REG_RX_FILTER_DROP_CTRL_RSV            (1 << 16)
  10939. + #define RT2860_REG_RX_FILTER_DROP_BAR             (1 << 15)
  10940. + #define RT2860_REG_RX_FILTER_DROP_BA              (1 << 14)
  10941. + #define RT2860_REG_RX_FILTER_DROP_PSPOLL          (1 << 13)
  10942. + #define RT2860_REG_RX_FILTER_DROP_RTS             (1 << 12)
  10943. + #define RT2860_REG_RX_FILTER_DROP_CTS             (1 << 11)
  10944. + #define RT2860_REG_RX_FILTER_DROP_ACK             (1 << 10)
  10945. + #define RT2860_REG_RX_FILTER_DROP_CFEND               (1 << 9)
  10946. + #define RT2860_REG_RX_FILTER_DROP_CFACK               (1 << 8)
  10947. + #define RT2860_REG_RX_FILTER_DROP_DUPL                (1 << 7)
  10948. + #define RT2860_REG_RX_FILTER_DROP_BCAST               (1 << 6)
  10949. + #define RT2860_REG_RX_FILTER_DROP_MCAST               (1 << 5)
  10950. + #define RT2860_REG_RX_FILTER_DROP_VER_ERR         (1 << 4)
  10951. + #define RT2860_REG_RX_FILTER_DROP_NOT_MYBSS           (1 << 3)
  10952. + #define RT2860_REG_RX_FILTER_DROP_UC_NOME         (1 << 2)
  10953. + #define RT2860_REG_RX_FILTER_DROP_PHY_ERR         (1 << 1)
  10954. + #define RT2860_REG_RX_FILTER_DROP_CRC_ERR         (1 << 0)
  10955. +
  10956. + /*
  10957. +  * RT2860_REG_AUTO_RSP_CFG flags
  10958. +  */
  10959. + #define RT2860_REG_CCK_SHORT_ENABLE                   (1 << 4)
  10960. +
  10961. + /*
  10962. +  * RT2860_REG_TX_STA_FIFO flags
  10963. +  */
  10964. + #define RT2860_REG_TX_STA_FIFO_MCS_SHIFT          16
  10965. + #define RT2860_REG_TX_STA_FIFO_MCS_MASK               0x7f
  10966. + #define RT2860_REG_TX_STA_FIFO_WCID_SHIFT         8
  10967. + #define RT2860_REG_TX_STA_FIFO_WCID_MASK          0xff
  10968. + #define RT2860_REG_TX_STA_FIFO_PID_SHIFT          1
  10969. + #define RT2860_REG_TX_STA_FIFO_PID_MASK               0xf
  10970. + #define RT2860_REG_TX_STA_FIFO_ACK_REQ                (1 << 7)
  10971. + #define RT2860_REG_TX_STA_FIFO_AGG                    (1 << 6)
  10972. + #define RT2860_REG_TX_STA_FIFO_TX_OK              (1 << 5)
  10973. + #define RT2860_REG_TX_STA_FIFO_VALID              (1 << 0)
  10974. +
  10975. + /*
  10976. +  * RT2860_REG_WCID_ATTR flags
  10977. +  */
  10978. + #define RT2860_REG_VAP_SHIFT                      4
  10979. + #define RT2860_REG_VAP_MASK                           0x7
  10980. + #define RT2860_REG_CIPHER_MODE_SHIFT              1
  10981. + #define RT2860_REG_CIPHER_MODE_MASK                   0x7
  10982. + #define RT2860_REG_CIPHER_MODE_NONE                   0
  10983. + #define RT2860_REG_CIPHER_MODE_WEP40              1
  10984. + #define RT2860_REG_CIPHER_MODE_WEP104             2
  10985. + #define RT2860_REG_CIPHER_MODE_TKIP                   3
  10986. + #define RT2860_REG_CIPHER_MODE_AES_CCMP               4
  10987. + #define RT2860_REG_CIPHER_MODE_CKIP40             5
  10988. + #define RT2860_REG_CIPHER_MODE_CKIP104                6
  10989. + #define RT2860_REG_CIPHER_MODE_CKIP128                7
  10990. + #define RT2860_REG_PKEY_ENABLE                        (1 << 0)
  10991. +
  10992. + /*
  10993. +  * RT2860_REG_H2M_MAILBOX flags
  10994. +  */
  10995. + #define RT2860_REG_H2M_BUSY                           (1 << 24)
  10996. + #define RT2860_REG_H2M_TOKEN_POWERSAVE                1
  10997. + #define RT2860_REG_H2M_TOKEN_RADIOOFF             2
  10998. + #define RT2860_REG_H2M_TOKEN_WAKEUP                   3
  10999. + #define RT2860_REG_H2M_TOKEN_NO_INTR              0xff
  11000. +
  11001. + /*
  11002. +  * RT2860_REG_H2M_MAILBOX_CID flags
  11003. +  */
  11004. + #define RT2860_REG_H2M_CID0_SHIFT                 0
  11005. + #define RT2860_REG_H2M_CID1_SHIFT                 8
  11006. + #define RT2860_REG_H2M_CID2_SHIFT                 16
  11007. + #define RT2860_REG_H2M_CID3_SHIFT                 24
  11008. + #define RT2860_REG_H2M_CID_MASK                       0xff
  11009. +
  11010. + #endif /* #ifndef _RT2860_REG_H_ */
  11011. *** /dev/null   Mon Jun  6 17:35:57 2011
  11012. --- rt2860_rf.h Sat Jun  4 02:55:09 2011
  11013. ***************
  11014. *** 0 ****
  11015. --- 1,49 ----
  11016. +
  11017. + /*-
  11018. +  * Copyright (c) 2009-2010 Alexander Egorenkov <[email protected]>
  11019. +  * Copyright (c) 2009 Damien Bergamini <[email protected]>
  11020. +  *
  11021. +  * Permission to use, copy, modify, and distribute this software for any
  11022. +  * purpose with or without fee is hereby granted, provided that the above
  11023. +  * copyright notice and this permission notice appear in all copies.
  11024. +  *
  11025. +  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11026. +  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11027. +  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11028. +  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  11029. +  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  11030. +  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  11031. +  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  11032. +  */
  11033. +
  11034. + #ifndef _RT2860_RF_H_
  11035. + #define _RT2860_RF_H_
  11036. +
  11037. + #include <dev/ral/rt2860_softc.h>
  11038. +
  11039. + const char *rt2860_rf_name(int rf_rev);
  11040. +
  11041. + void rt2860_rf_select_chan_group(struct rt2860_softc *sc,
  11042. +   struct ieee80211_channel *c);
  11043. +
  11044. + void rt2860_rf_set_chan(struct rt2860_softc *sc,
  11045. +   struct ieee80211_channel *c);
  11046. +
  11047. + uint8_t rt3090_rf_read(struct rt2860_softc *sc, uint8_t reg);
  11048. +
  11049. + void rt3090_rf_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val);
  11050. +
  11051. + void rt3090_set_chan(struct rt2860_softc *sc, u_int chan);
  11052. +
  11053. + int rt3090_rf_init(struct rt2860_softc *sc);
  11054. +
  11055. + void rt3090_set_rx_antenna(struct rt2860_softc *, int);
  11056. +
  11057. + void rt3090_rf_wakeup(struct rt2860_softc *sc);
  11058. +
  11059. + int rt3090_filter_calib(struct rt2860_softc *sc, uint8_t init, uint8_t target,
  11060. +     uint8_t *val);
  11061. +
  11062. + void rt3090_rf_setup(struct rt2860_softc *sc);
  11063. +
  11064. + #endif /* #ifndef _RT2860_RF_H_ */
  11065. *** /dev/null   Mon Jun  6 17:35:57 2011
  11066. --- rt2860_rxdesc.h Sat Jun  4 02:49:07 2011
  11067. ***************
  11068. *** 0 ****
  11069. --- 1,62 ----
  11070. +
  11071. + /*-
  11072. +  * Copyright (c) 2009-2010 Alexander Egorenkov <[email protected]>
  11073. +  * Copyright (c) 2009 Damien Bergamini <[email protected]>
  11074. +  *
  11075. +  * Permission to use, copy, modify, and distribute this software for any
  11076. +  * purpose with or without fee is hereby granted, provided that the above
  11077. +  * copyright notice and this permission notice appear in all copies.
  11078. +  *
  11079. +  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11080. +  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11081. +  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11082. +  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  11083. +  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  11084. +  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  11085. +  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  11086. +  */
  11087. +
  11088. + #ifndef _RT2860_RXDESC_H_
  11089. + #define _RT2860_RXDESC_H_
  11090. +
  11091. + #define RT2860_RXDESC_SDL0_DDONE                      (1 << 15)
  11092. +
  11093. + #define RT2860_RXDESC_FLAGS_LAST_AMSDU                    (1 << 19)
  11094. + #define RT2860_RXDESC_FLAGS_CIPHER_ALG                    (1 << 18)
  11095. + #define RT2860_RXDESC_FLAGS_PLCP_RSSIL                    (1 << 17)
  11096. + #define RT2860_RXDESC_FLAGS_DECRYPTED                 (1 << 16)
  11097. + #define RT2860_RXDESC_FLAGS_AMPDU                     (1 << 15)
  11098. + #define RT2860_RXDESC_FLAGS_L2PAD                     (1 << 14)
  11099. + #define RT2860_RXDESC_FLAGS_RSSI                      (1 << 13)
  11100. + #define RT2860_RXDESC_FLAGS_HTC                           (1 << 12)
  11101. + #define RT2860_RXDESC_FLAGS_AMSDU                     (1 << 11)
  11102. + #define RT2860_RXDESC_FLAGS_CRC_ERR                       (1 << 8)
  11103. + #define RT2860_RXDESC_FLAGS_MYBSS                     (1 << 7)
  11104. + #define RT2860_RXDESC_FLAGS_BCAST                     (1 << 6)
  11105. + #define RT2860_RXDESC_FLAGS_MCAST                     (1 << 5)
  11106. + #define RT2860_RXDESC_FLAGS_U2M                           (1 << 4)
  11107. + #define RT2860_RXDESC_FLAGS_FRAG                      (1 << 3)
  11108. + #define RT2860_RXDESC_FLAGS_NULL_DATA                 (1 << 2)
  11109. + #define RT2860_RXDESC_FLAGS_DATA                      (1 << 1)
  11110. + #define RT2860_RXDESC_FLAGS_BA                            (1 << 0)
  11111. +
  11112. + #define RT2860_RXDESC_FLAGS_CIPHER_ERR_SHIFT          9
  11113. + #define RT2860_RXDESC_FLAGS_CIPHER_ERR_MASK               0x3
  11114. + #define RT2860_RXDESC_FLAGS_CIPHER_ERR_NONE               0
  11115. + #define RT2860_RXDESC_FLAGS_CIPHER_ERR_ICV                1
  11116. + #define RT2860_RXDESC_FLAGS_CIPHER_ERR_MIC                2
  11117. + #define RT2860_RXDESC_FLAGS_CIPHER_ERR_INVALID_KEY        3
  11118. +
  11119. + #define RT2860_RXDESC_FLAGS_PLCP_SIGNAL_SHIFT         20
  11120. + #define RT2860_RXDESC_FLAGS_PLCP_SIGNAL_MASK          0xfff
  11121. +
  11122. + struct rt2860_rxdesc
  11123. + {
  11124. +   uint32_t sdp0;
  11125. +   uint16_t sdl1;
  11126. +   uint16_t sdl0;
  11127. +   uint32_t sdp1;
  11128. +   uint32_t flags;
  11129. + } __packed;
  11130. +
  11131. + #endif /* #ifndef _RT2860_RXDESC_H_ */
  11132. *** /dev/null   Mon Jun  6 17:35:57 2011
  11133. --- rt2860_rxwi.h   Sat Jun  4 02:55:20 2011
  11134. ***************
  11135. *** 0 ****
  11136. --- 1,79 ----
  11137. +
  11138. + /*-
  11139. +  * Copyright (c) 2009-2010 Alexander Egorenkov <[email protected]>
  11140. +  * Copyright (c) 2009 Damien Bergamini <[email protected]>
  11141. +  *
  11142. +  * Permission to use, copy, modify, and distribute this software for any
  11143. +  * purpose with or without fee is hereby granted, provided that the above
  11144. +  * copyright notice and this permission notice appear in all copies.
  11145. +  *
  11146. +  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11147. +  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11148. +  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11149. +  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  11150. +  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  11151. +  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  11152. +  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  11153. +  */
  11154. +
  11155. + #ifndef _RT2860_RXWI_H_
  11156. + #define _RT2860_RXWI_H_
  11157. +
  11158. + #define RT2860_RXWI_KEYIDX_SHIFT          0
  11159. + #define RT2860_RXWI_KEYIDX_MASK               0x3
  11160. +
  11161. + #define RT2860_RXWI_BSSIDX_SHIFT          2
  11162. + #define RT2860_RXWI_BSSIDX_MASK               0x7
  11163. +
  11164. + #define RT2860_RXWI_UDF_SHIFT             5
  11165. + #define RT2860_RXWI_UDF_MASK              0x7
  11166. +
  11167. + #define RT2860_RXWI_SIZE_SHIFT                0
  11168. + #define RT2860_RXWI_SIZE_MASK             0xfff
  11169. +
  11170. + #define RT2860_RXWI_TID_SHIFT             12
  11171. + #define RT2860_RXWI_TID_MASK              0xf
  11172. +
  11173. + #define RT2860_RXWI_FRAG_SHIFT                0
  11174. + #define RT2860_RXWI_FRAG_MASK             0xf
  11175. +
  11176. + #define RT2860_RXWI_SEQ_SHIFT             4
  11177. + #define RT2860_RXWI_SEQ_MASK              0xfff
  11178. +
  11179. + #define RT2860_RXWI_MCS_SHIFT             0
  11180. + #define RT2860_RXWI_MCS_MASK              0x7f
  11181. + #define RT2860_RXWI_MCS_SHOTPRE               (1 << 3)
  11182. +
  11183. + #define RT2860_RXWI_BW_SHIFT              7
  11184. + #define RT2860_RXWI_BW_MASK                   0x1
  11185. + #define RT2860_RXWI_BW_20                 0
  11186. + #define RT2860_RXWI_BW_40                 1
  11187. +
  11188. + #define RT2860_RXWI_SHORTGI_SHIFT         0
  11189. + #define RT2860_RXWI_SHORTGI_MASK          0x1
  11190. +
  11191. + #define RT2860_RXWI_STBC_SHIFT                1
  11192. + #define RT2860_RXWI_STBC_MASK             0x3
  11193. +
  11194. + #define RT2860_RXWI_PHYMODE_SHIFT         6
  11195. + #define RT2860_RXWI_PHYMODE_MASK          0x3
  11196. + #define RT2860_RXWI_PHYMODE_CCK               0
  11197. + #define RT2860_RXWI_PHYMODE_OFDM          1
  11198. + #define RT2860_RXWI_PHYMODE_HT_MIXED      2
  11199. + #define RT2860_RXWI_PHYMODE_HT_GF         3
  11200. +
  11201. + struct rt2860_rxwi
  11202. + {
  11203. +   uint8_t wcid;
  11204. +   uint8_t udf_bssidx_keyidx;
  11205. +   uint16_t tid_size;
  11206. +   uint16_t seq_frag;
  11207. +   uint8_t bw_mcs;
  11208. +   uint8_t phymode_stbc_shortgi;
  11209. +   uint8_t rssi[3];
  11210. +   uint8_t reserved1;
  11211. +   uint8_t snr[2];
  11212. +   uint16_t reserved2;
  11213. + } __packed;
  11214. +
  11215. + #endif /* #ifndef _RT2860_RXWI_H_ */
  11216. *** /dev/null   Mon Jun  6 17:35:57 2011
  11217. --- rt2860_txdesc.h Sat Jun  4 02:49:07 2011
  11218. ***************
  11219. *** 0 ****
  11220. --- 1,48 ----
  11221. +
  11222. + /*-
  11223. +  * Copyright (c) 2009-2010 Alexander Egorenkov <[email protected]>
  11224. +  * Copyright (c) 2009 Damien Bergamini <[email protected]>
  11225. +  *
  11226. +  * Permission to use, copy, modify, and distribute this software for any
  11227. +  * purpose with or without fee is hereby granted, provided that the above
  11228. +  * copyright notice and this permission notice appear in all copies.
  11229. +  *
  11230. +  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11231. +  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11232. +  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11233. +  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  11234. +  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  11235. +  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  11236. +  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  11237. +  */
  11238. +
  11239. + #ifndef _RT2860_TXDESC_H_
  11240. + #define _RT2860_TXDESC_H_
  11241. +
  11242. + #define RT2860_TXDESC_SDL1_BURST                      (1 << 15)
  11243. + #define RT2860_TXDESC_SDL1_LASTSEG                        (1 << 14)
  11244. +
  11245. + #define RT2860_TXDESC_SDL0_DDONE                      (1 << 15)
  11246. + #define RT2860_TXDESC_SDL0_LASTSEG                        (1 << 14)
  11247. +
  11248. + #define RT2860_TXDESC_FLAGS_SHIFT                     0
  11249. + #define RT2860_TXDESC_FLAGS_MASK                      0xf9
  11250. + #define RT2860_TXDESC_FLAGS_WI_VALID                  (1 << 0)
  11251. +
  11252. + #define RT2860_TXDESC_QSEL_SHIFT                      1
  11253. + #define RT2860_TXDESC_QSEL_MASK                           0x3
  11254. + #define RT2860_TXDESC_QSEL_MGMT                           0
  11255. + #define RT2860_TXDESC_QSEL_HCCA                           1
  11256. + #define RT2860_TXDESC_QSEL_EDCA                           2
  11257. +
  11258. + struct rt2860_txdesc
  11259. + {
  11260. +   uint32_t sdp0;
  11261. +   uint16_t sdl1;
  11262. +   uint16_t sdl0;
  11263. +   uint32_t sdp1;
  11264. +   uint8_t reserved[3];
  11265. +   uint8_t qsel_flags;
  11266. + } __packed;
  11267. +
  11268. + #endif /* #ifndef _RT2860_TXDESC_H_ */
  11269. *** /dev/null   Mon Jun  6 17:35:57 2011
  11270. --- rt2860_txwi.h   Sat Jun  4 02:49:07 2011
  11271. ***************
  11272. *** 0 ****
  11273. --- 1,92 ----
  11274. +
  11275. + /*-
  11276. +  * Copyright (c) 2009-2010 Alexander Egorenkov <[email protected]>
  11277. +  * Copyright (c) 2009 Damien Bergamini <[email protected]>
  11278. +  *
  11279. +  * Permission to use, copy, modify, and distribute this software for any
  11280. +  * purpose with or without fee is hereby granted, provided that the above
  11281. +  * copyright notice and this permission notice appear in all copies.
  11282. +  *
  11283. +  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11284. +  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11285. +  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11286. +  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  11287. +  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  11288. +  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  11289. +  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  11290. +  */
  11291. +
  11292. + #ifndef _RT2860_TXWI_H_
  11293. + #define _RT2860_TXWI_H_
  11294. +
  11295. + #define RT2860_TXWI_FLAGS_SHIFT                   0
  11296. + #define RT2860_TXWI_FLAGS_MASK                    0x1f
  11297. + #define RT2860_TXWI_FLAGS_AMPDU                   (1 << 4)
  11298. + #define RT2860_TXWI_FLAGS_TS                  (1 << 3)
  11299. + #define RT2860_TXWI_FLAGS_CFACK                   (1 << 2)
  11300. + #define RT2860_TXWI_FLAGS_MIMOPS              (1 << 1)
  11301. + #define RT2860_TXWI_FLAGS_FRAG                    (1 << 0)
  11302. +
  11303. + #define RT2860_TXWI_MPDU_DENSITY_SHIFT            5
  11304. + #define RT2860_TXWI_MPDU_DENSITY_MASK         0x7
  11305. +
  11306. + #define RT2860_TXWI_TXOP_SHIFT                    0
  11307. + #define RT2860_TXWI_TXOP_MASK                 0x3
  11308. + #define RT2860_TXWI_TXOP_HT                       0
  11309. + #define RT2860_TXWI_TXOP_PIFS                 1
  11310. + #define RT2860_TXWI_TXOP_SIFS                 2
  11311. + #define RT2860_TXWI_TXOP_BACKOFF              3
  11312. +
  11313. + #define RT2860_TXWI_MCS_SHIFT                 0
  11314. + #define RT2860_TXWI_MCS_MASK                  0x7f
  11315. + #define RT2860_TXWI_MCS_SHOTPRE                   (1 << 3)
  11316. +
  11317. + #define RT2860_TXWI_BW_SHIFT                  7
  11318. + #define RT2860_TXWI_BW_MASK                       0x1
  11319. + #define RT2860_TXWI_BW_20                     0
  11320. + #define RT2860_TXWI_BW_40                     1
  11321. +
  11322. + #define RT2860_TXWI_SHORTGI_SHIFT             0
  11323. + #define RT2860_TXWI_SHORTGI_MASK              0x1
  11324. +
  11325. + #define RT2860_TXWI_STBC_SHIFT                    1
  11326. + #define RT2860_TXWI_STBC_MASK                 0x3
  11327. +
  11328. + #define RT2860_TXWI_IFS_SHIFT                 3
  11329. + #define RT2860_TXWI_IFS_MASK                  0x1
  11330. +
  11331. + #define RT2860_TXWI_PHYMODE_SHIFT             6
  11332. + #define RT2860_TXWI_PHYMODE_MASK              0x3
  11333. + #define RT2860_TXWI_PHYMODE_CCK                   0
  11334. + #define RT2860_TXWI_PHYMODE_OFDM              1
  11335. + #define RT2860_TXWI_PHYMODE_HT_MIXED          2
  11336. + #define RT2860_TXWI_PHYMODE_HT_GF             3
  11337. +
  11338. + #define RT2860_TXWI_XFLAGS_SHIFT              0
  11339. + #define RT2860_TXWI_XFLAGS_MASK                   0x3
  11340. + #define RT2860_TXWI_XFLAGS_NSEQ                   (1 << 1)
  11341. + #define RT2860_TXWI_XFLAGS_ACK                    (1 << 0)
  11342. +
  11343. + #define RT2860_TXWI_BAWIN_SIZE_SHIFT          2
  11344. + #define RT2860_TXWI_BAWIN_SIZE_MASK               0x3f
  11345. +
  11346. + #define RT2860_TXWI_MPDU_LEN_SHIFT                0
  11347. + #define RT2860_TXWI_MPDU_LEN_MASK             0xfff
  11348. +
  11349. + #define RT2860_TXWI_PID_SHIFT                 12
  11350. + #define RT2860_TXWI_PID_MASK                  0xf
  11351. +
  11352. + struct rt2860_txwi
  11353. + {
  11354. +   uint8_t mpdu_density_flags;
  11355. +   uint8_t txop;
  11356. +   uint8_t bw_mcs;
  11357. +   uint8_t phymode_ifs_stbc_shortgi;
  11358. +   uint8_t bawin_size_xflags;
  11359. +   uint8_t wcid;
  11360. +   uint16_t pid_mpdu_len;
  11361. +   uint32_t iv;
  11362. +   uint32_t eiv;
  11363. + } __packed;
  11364. +
  11365. + #endif /* #ifndef _RT2860_TXWI_H_ */
  11366. *** /dev/null   Mon Jun  6 17:35:57 2011
  11367. --- rt2860_ucode.h  Sat Jun  4 02:49:07 2011
  11368. ***************
  11369. *** 0 ****
  11370. --- 1,2104 ----
  11371. +
  11372. + /*
  11373. +  Copyright (c) 2007, Ralink Technology Corporation
  11374. +  All rights reserved.
  11375. +
  11376. +  Redistribution.  Redistribution and use in binary form, without
  11377. +  modification, are permitted provided that the following conditions are
  11378. +  met:
  11379. +
  11380. +   * Redistributions must reproduce the above copyright notice and the
  11381. +   following disclaimer in the documentation and/or other materials
  11382. +   provided with the distribution.
  11383. +   * Neither the name of Ralink Technology Corporation nor the names of its
  11384. +   suppliers may be used to endorse or promote products derived from this
  11385. +   software without specific prior written permission.
  11386. +   * No reverse engineering, decompilation, or disassembly of this software
  11387. +   is permitted.
  11388. +
  11389. +  Limited patent license. Ralink Technology Corporation grants a world-wide,
  11390. +  royalty-free, non-exclusive license under patents it now or hereafter
  11391. +  owns or controls to make, have made, use, import, offer to sell and
  11392. +  sell ("Utilize") this software, but solely to the extent that any
  11393. +  such patent is necessary to Utilize the software alone, or in
  11394. +  combination with an operating system licensed under an approved Open
  11395. +  Source license as listed by the Open Source Initiative at
  11396. +  http://opensource.org/licenses.  The patent license shall not apply to
  11397. +  any other combinations which include this software.  No hardware per
  11398. +  se is licensed hereunder.
  11399. +
  11400. +  DISCLAIMER.  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
  11401. +  CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING,
  11402. +  BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
  11403. +  FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  11404. +  COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  11405. +  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  11406. +  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
  11407. +  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  11408. +  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  11409. +  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  11410. +  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
  11411. +  DAMAGE.
  11412. + */
  11413. +
  11414. + #ifndef _RT2860_UCODE_H_
  11415. + #define _RT2860_UCODE_H_
  11416. +
  11417. + /*
  11418. +  * RT2860 microcode v26
  11419. +  */
  11420. + static const uint8_t rt2860_ucode[] =
  11421. + {
  11422. +   0x02, 0x03, 0x5E, 0x02,
  11423. +   0x02, 0xB1, 0x22, 0x22,
  11424. +   0xFF, 0xFF, 0xFF, 0x02,
  11425. +   0x01, 0x82, 0xFF, 0xFF,
  11426. +   0xFF, 0xFF, 0xFF, 0x02,
  11427. +   0x00, 0x1E, 0xFF, 0xFF,
  11428. +   0xFF, 0xFF, 0xFF, 0x02,
  11429. +   0x01, 0x33, 0xC0, 0xE0,
  11430. +   0xC0, 0xF0, 0xC0, 0x83,
  11431. +   0xC0, 0x82, 0xC0, 0xD0,
  11432. +   0x75, 0xD0, 0x18, 0xC2,
  11433. +   0xAF, 0x30, 0x45, 0x03,
  11434. +   0x12, 0x10, 0x09, 0x90,
  11435. +   0x04, 0x16, 0xE0, 0x30,
  11436. +   0xE3, 0x03, 0x74, 0x08,
  11437. +   0xF0, 0x90, 0x04, 0x14,
  11438. +   0xE0, 0x20, 0xE7, 0x03,
  11439. +   0x02, 0x00, 0xCB, 0x74,
  11440. +   0x80, 0xF0, 0x90, 0x70,
  11441. +   0x12, 0xE0, 0xF5, 0x2F,
  11442. +   0x90, 0x04, 0x04, 0xE0,
  11443. +   0x24, 0xCF, 0x60, 0x30,
  11444. +   0x14, 0x60, 0x42, 0x24,
  11445. +   0xE2, 0x60, 0x47, 0x14,
  11446. +   0x60, 0x55, 0x24, 0x21,
  11447. +   0x70, 0x60, 0xE5, 0x55,
  11448. +   0x24, 0xFE, 0x60, 0x07,
  11449. +   0x14, 0x60, 0x08, 0x24,
  11450. +   0x02, 0x70, 0x08, 0x7D,
  11451. +   0x01, 0x80, 0x28, 0x7D,
  11452. +   0x02, 0x80, 0x24, 0x90,
  11453. +   0x70, 0x10, 0xE0, 0xF5,
  11454. +   0x50, 0x85, 0x2F, 0x40,
  11455. +   0xD2, 0x01, 0x80, 0x3E,
  11456. +   0xE5, 0x55, 0x64, 0x03,
  11457. +   0x60, 0x04, 0xE5, 0x55,
  11458. +   0x70, 0x04, 0x7D, 0x02,
  11459. +   0x80, 0x09, 0x85, 0x2F,
  11460. +   0x41, 0xD2, 0x02, 0x80,
  11461. +   0x29, 0xAD, 0x55, 0xAF,
  11462. +   0x2F, 0x12, 0x02, 0x8D,
  11463. +   0x80, 0x20, 0x90, 0x70,
  11464. +   0x10, 0xE0, 0xF5, 0x47,
  11465. +   0x90, 0x70, 0x11, 0xE0,
  11466. +   0xF5, 0x44, 0x12, 0x10,
  11467. +   0x25, 0x80, 0x06, 0x90,
  11468. +   0x70, 0x10, 0xE0, 0xF5,
  11469. +   0x45, 0xE4, 0xFD, 0xAF,
  11470. +   0x2F, 0x12, 0x02, 0x8D,
  11471. +   0xD2, 0x04, 0x90, 0x70,
  11472. +   0x13, 0xE4, 0xF0, 0xD2,
  11473. +   0xAF, 0xD0, 0xD0, 0xD0,
  11474. +   0x82, 0xD0, 0x83, 0xD0,
  11475. +   0xF0, 0xD0, 0xE0, 0x32,
  11476. +   0x90, 0x70, 0x2A, 0xE0,
  11477. +   0x30, 0xE1, 0x53, 0xC2,
  11478. +   0xAF, 0x90, 0x70, 0x28,
  11479. +   0xE0, 0x90, 0x10, 0x1C,
  11480. +   0xF0, 0x90, 0x70, 0x29,
  11481. +   0xE0, 0x90, 0x10, 0x1D,
  11482. +   0xF0, 0x90, 0x70, 0x2A,
  11483. +   0xE0, 0x90, 0x10, 0x1E,
  11484. +   0xF0, 0x90, 0x10, 0x1C,
  11485. +   0xE0, 0xF5, 0x30, 0x90,
  11486. +   0x10, 0x1E, 0xE0, 0x20,
  11487. +   0xE1, 0xF3, 0x90, 0x10,
  11488. +   0x1C, 0xE0, 0x90, 0x70,
  11489. +   0x28, 0xF0, 0x90, 0x10,
  11490. +   0x1D, 0xE0, 0x90, 0x70,
  11491. +   0x29, 0xF0, 0x90, 0x10,
  11492. +   0x1E, 0xE0, 0x90, 0x70,
  11493. +   0x2A, 0xF0, 0x30, 0x4A,
  11494. +   0x0D, 0x90, 0x70, 0x24,
  11495. +   0xE0, 0x44, 0x01, 0xF0,
  11496. +   0x90, 0x02, 0x2C, 0x74,
  11497. +   0xFF, 0xF0, 0xC2, 0x05,
  11498. +   0xD2, 0xAF, 0x22, 0xC0,
  11499. +   0xE0, 0xC0, 0xF0, 0xC0,
  11500. +   0x83, 0xC0, 0x82, 0xC0,
  11501. +   0xD0, 0xE8, 0xC0, 0xE0,
  11502. +   0xE9, 0xC0, 0xE0, 0xEA,
  11503. +   0xC0, 0xE0, 0xEB, 0xC0,
  11504. +   0xE0, 0xEC, 0xC0, 0xE0,
  11505. +   0xED, 0xC0, 0xE0, 0xEE,
  11506. +   0xC0, 0xE0, 0xEF, 0xC0,
  11507. +   0xE0, 0xC2, 0xAF, 0x30,
  11508. +   0x45, 0x03, 0x12, 0x10,
  11509. +   0x12, 0xD2, 0xAF, 0xD0,
  11510. +   0xE0, 0xFF, 0xD0, 0xE0,
  11511. +   0xFE, 0xD0, 0xE0, 0xFD,
  11512. +   0xD0, 0xE0, 0xFC, 0xD0,
  11513. +   0xE0, 0xFB, 0xD0, 0xE0,
  11514. +   0xFA, 0xD0, 0xE0, 0xF9,
  11515. +   0xD0, 0xE0, 0xF8, 0xD0,
  11516. +   0xD0, 0xD0, 0x82, 0xD0,
  11517. +   0x83, 0xD0, 0xF0, 0xD0,
  11518. +   0xE0, 0x32, 0xC0, 0xE0,
  11519. +   0xC0, 0xF0, 0xC0, 0x83,
  11520. +   0xC0, 0x82, 0xC0, 0xD0,
  11521. +   0x75, 0xD0, 0x10, 0xC2,
  11522. +   0xAF, 0x30, 0x45, 0x03,
  11523. +   0x12, 0x10, 0x0C, 0x30,
  11524. +   0x58, 0x0A, 0xE5, 0x54,
  11525. +   0x60, 0x04, 0x15, 0x54,
  11526. +   0x80, 0x02, 0xC2, 0x58,
  11527. +   0x30, 0x59, 0x0A, 0xE5,
  11528. +   0x50, 0x60, 0x04, 0x15,
  11529. +   0x50, 0x80, 0x02, 0xC2,
  11530. +   0x59, 0xD5, 0x53, 0x07,
  11531. +   0x30, 0x60, 0x04, 0x15,
  11532. +   0x46, 0xD2, 0x04, 0x30,
  11533. +   0x45, 0x03, 0x12, 0x10,
  11534. +   0x0F, 0xC2, 0x8D, 0xD2,
  11535. +   0xAF, 0xD0, 0xD0, 0xD0,
  11536. +   0x82, 0xD0, 0x83, 0xD0,
  11537. +   0xF0, 0xD0, 0xE0, 0x32,
  11538. +   0x12, 0x02, 0xD3, 0x30,
  11539. +   0x45, 0x03, 0x12, 0x10,
  11540. +   0x03, 0x30, 0x01, 0x06,
  11541. +   0x20, 0x09, 0x03, 0x12,
  11542. +   0x10, 0x1C, 0x30, 0x02,
  11543. +   0x06, 0x20, 0x0A, 0x03,
  11544. +   0x12, 0x10, 0x1F, 0x30,
  11545. +   0x03, 0x06, 0x20, 0x0B,
  11546. +   0x03, 0x12, 0x10, 0x1F,
  11547. +   0x30, 0x04, 0x06, 0x20,
  11548. +   0x0C, 0x03, 0x12, 0x10,
  11549. +   0x22, 0x20, 0x13, 0x09,
  11550. +   0x20, 0x11, 0x06, 0xE5,
  11551. +   0x2B, 0x45, 0x2C, 0x60,
  11552. +   0x03, 0xD3, 0x80, 0x01,
  11553. +   0xC3, 0x92, 0xA9, 0x12,
  11554. +   0x02, 0xEC, 0x80, 0xBF,
  11555. +   0xC2, 0x43, 0xD2, 0x45,
  11556. +   0xE4, 0xF5, 0x20, 0xF5,
  11557. +   0x21, 0xF5, 0x53, 0xF5,
  11558. +   0x46, 0xF5, 0x2B, 0xF5,
  11559. +   0x2C, 0xC2, 0x42, 0xF5,
  11560. +   0x51, 0xF5, 0x52, 0xF5,
  11561. +   0x55, 0x90, 0x04, 0x18,
  11562. +   0x74, 0x80, 0xF0, 0x90,
  11563. +   0x04, 0x1A, 0x74, 0x08,
  11564. +   0xF0, 0xC2, 0x19, 0xC2,
  11565. +   0x18, 0xC2, 0x1A, 0x22,
  11566. +   0xC8, 0xEF, 0xC8, 0xE6,
  11567. +   0xFA, 0x08, 0xE6, 0x4A,
  11568. +   0x60, 0x0C, 0xC8, 0xEF,
  11569. +   0xC8, 0x08, 0xE6, 0x16,
  11570. +   0x18, 0x70, 0x01, 0x16,
  11571. +   0xC3, 0x22, 0xED, 0x24,
  11572. +   0xFF, 0xFD, 0xEC, 0x34,
  11573. +   0xFF, 0xC8, 0xEF, 0xC8,
  11574. +   0xF6, 0x08, 0xC6, 0xED,
  11575. +   0xC6, 0xD3, 0x22, 0xD0,
  11576. +   0x83, 0xD0, 0x82, 0xF8,
  11577. +   0xE4, 0x93, 0x70, 0x12,
  11578. +   0x74, 0x01, 0x93, 0x70,
  11579. +   0x0D, 0xA3, 0xA3, 0x93,
  11580. +   0xF8, 0x74, 0x01, 0x93,
  11581. +   0xF5, 0x82, 0x88, 0x83,
  11582. +   0xE4, 0x73, 0x74, 0x02,
  11583. +   0x93, 0x68, 0x60, 0xEF,
  11584. +   0xA3, 0xA3, 0xA3, 0x80,
  11585. +   0xDF, 0xEF, 0xF4, 0x60,
  11586. +   0x1F, 0xE4, 0xFE, 0x12,
  11587. +   0x03, 0x6A, 0xE0, 0xB4,
  11588. +   0xFF, 0x12, 0x12, 0x03,
  11589. +   0x6A, 0xEF, 0xF0, 0x74,
  11590. +   0x1C, 0x2E, 0xF5, 0x82,
  11591. +   0xE4, 0x34, 0x70, 0xF5,
  11592. +   0x83, 0xED, 0xF0, 0x22,
  11593. +   0x0E, 0xBE, 0x04, 0xE3,
  11594. +   0x22, 0xC0, 0xE0, 0xC0,
  11595. +   0xF0, 0xC0, 0x83, 0xC0,
  11596. +   0x82, 0xC0, 0xD0, 0x75,
  11597. +   0xD0, 0x08, 0xC2, 0xAF,
  11598. +   0x30, 0x45, 0x03, 0x12,
  11599. +   0x10, 0x06, 0xD2, 0xAF,
  11600. +   0xD0, 0xD0, 0xD0, 0x82,
  11601. +   0xD0, 0x83, 0xD0, 0xF0,
  11602. +   0xD0, 0xE0, 0x32, 0xC2,
  11603. +   0xAF, 0x12, 0x00, 0x06,
  11604. +   0x12, 0x02, 0x14, 0x12,
  11605. +   0x03, 0x1C, 0xE4, 0xF5,
  11606. +   0x22, 0xF5, 0x47, 0x90,
  11607. +   0x04, 0x00, 0x74, 0x80,
  11608. +   0xF0, 0xD2, 0xAF, 0x22,
  11609. +   0x30, 0x45, 0x03, 0x12,
  11610. +   0x10, 0x15, 0xE5, 0x20,
  11611. +   0x70, 0x03, 0x20, 0x10,
  11612. +   0x03, 0x30, 0x11, 0x03,
  11613. +   0x43, 0x87, 0x01, 0x22,
  11614. +   0xC0, 0x2A, 0x74, 0x03,
  11615. +   0xC0, 0xE0, 0xC0, 0x82,
  11616. +   0xC0, 0x83, 0x75, 0x2A,
  11617. +   0x0A, 0x22, 0xC0, 0x2A,
  11618. +   0x74, 0x03, 0xC0, 0xE0,
  11619. +   0xC0, 0x82, 0xC0, 0x83,
  11620. +   0x75, 0x2A, 0x18, 0x22,
  11621. +   0x75, 0x89, 0x02, 0xE4,
  11622. +   0xF5, 0x8C, 0xF5, 0x8A,
  11623. +   0xF5, 0x88, 0xF5, 0xB8,
  11624. +   0xF5, 0xE8, 0x75, 0x90,
  11625. +   0x18, 0xD2, 0x8C, 0x75,
  11626. +   0xA8, 0x05, 0x22, 0xCE,
  11627. +   0xEF, 0xCE, 0xEE, 0x60,
  11628. +   0x08, 0x7F, 0xFF, 0x12,
  11629. +   0x03, 0x80, 0x1E, 0x80,
  11630. +   0xF5, 0x22, 0xC8, 0xEF,
  11631. +   0xC8, 0xE6, 0x60, 0x03,
  11632. +   0x16, 0xC3, 0x22, 0xED,
  11633. +   0x14, 0xF6, 0xD3, 0x22,
  11634. +   0xC8, 0xEF, 0xC8, 0xE6,
  11635. +   0x60, 0x06, 0x16, 0xE6,
  11636. +   0x24, 0xFF, 0xB3, 0x22,
  11637. +   0xC3, 0x22, 0x78, 0x7F,
  11638. +   0xE4, 0xF6, 0xD8, 0xFD,
  11639. +   0x75, 0x81, 0x5F, 0x02,
  11640. +   0x01, 0xD0, 0x74, 0x14,
  11641. +   0x2E, 0xF5, 0x82, 0xE4,
  11642. +   0x34, 0x70, 0xF5, 0x83,
  11643. +   0x22, 0xEF, 0x90, 0x03,
  11644. +   0x7E, 0x93, 0x90, 0x03,
  11645. +   0x00, 0x73, 0x0A, 0x18,
  11646. +   0xEF, 0x60, 0x03, 0x1F,
  11647. +   0x80, 0xFA, 0x22, 0xFF,
  11648. +   0xFF, 0xFF, 0xFF, 0xFF,
  11649. +   0xFF, 0xFF, 0xFF, 0xFF,
  11650. +   0xFF, 0xFF, 0xFF, 0xFF,
  11651. +   0xFF, 0xFF, 0xFF, 0xFF,
  11652. +   0xFF, 0xFF, 0xFF, 0xFF,
  11653. +   0xFF, 0xFF, 0xFF, 0xFF,
  11654. +   0xFF, 0xFF, 0xFF, 0xFF,
  11655. +   0xFF, 0xFF, 0xFF, 0xFF,
  11656. +   0xFF, 0xFF, 0xFF, 0xFF,
  11657. +   0xFF, 0xFF, 0xFF, 0xFF,
  11658. +   0xFF, 0xFF, 0xFF, 0xFF,
  11659. +   0xFF, 0xFF, 0xFF, 0xFF,
  11660. +   0xFF, 0xFF, 0xFF, 0xFF,
  11661. +   0xFF, 0xFF, 0xFF, 0xFF,
  11662. +   0xFF, 0xFF, 0xFF, 0xFF,
  11663. +   0xFF, 0xFF, 0xFF, 0xFF,
  11664. +   0xFF, 0xFF, 0xFF, 0xFF,
  11665. +   0xFF, 0xFF, 0xFF, 0xFF,
  11666. +   0xFF, 0xFF, 0xFF, 0xFF,
  11667. +   0xFF, 0xFF, 0xFF, 0xFF,
  11668. +   0xFF, 0xFF, 0xFF, 0xFF,
  11669. +   0xFF, 0xFF, 0xFF, 0xFF,
  11670. +   0xFF, 0xFF, 0xFF, 0xFF,
  11671. +   0xFF, 0xFF, 0xFF, 0xFF,
  11672. +   0xFF, 0xFF, 0xFF, 0xFF,
  11673. +   0xFF, 0xFF, 0xFF, 0xFF,
  11674. +   0xFF, 0xFF, 0xFF, 0xFF,
  11675. +   0xFF, 0xFF, 0xFF, 0xFF,
  11676. +   0xFF, 0xFF, 0xFF, 0xFF,
  11677. +   0xFF, 0xFF, 0xFF, 0xFF,
  11678. +   0xFF, 0xFF, 0xFF, 0xFF,
  11679. +   0xFF, 0xFF, 0xFF, 0xFF,
  11680. +   0xFF, 0xFF, 0xFF, 0xFF,
  11681. +   0xFF, 0xFF, 0xFF, 0xFF,
  11682. +   0xFF, 0xFF, 0xFF, 0xFF,
  11683. +   0xFF, 0xFF, 0xFF, 0xFF,
  11684. +   0xFF, 0xFF, 0xFF, 0xFF,
  11685. +   0xFF, 0xFF, 0xFF, 0xFF,
  11686. +   0xFF, 0xFF, 0xFF, 0xFF,
  11687. +   0xFF, 0xFF, 0xFF, 0xFF,
  11688. +   0xFF, 0xFF, 0xFF, 0xFF,
  11689. +   0xFF, 0xFF, 0xFF, 0xFF,
  11690. +   0xFF, 0xFF, 0xFF, 0xFF,
  11691. +   0xFF, 0xFF, 0xFF, 0xFF,
  11692. +   0xFF, 0xFF, 0xFF, 0xFF,
  11693. +   0xFF, 0xFF, 0xFF, 0xFF,
  11694. +   0xFF, 0xFF, 0xFF, 0xFF,
  11695. +   0xFF, 0xFF, 0xFF, 0xFF,
  11696. +   0xFF, 0xFF, 0xFF, 0xFF,
  11697. +   0xFF, 0xFF, 0xFF, 0xFF,
  11698. +   0xFF, 0xFF, 0xFF, 0xFF,
  11699. +   0xFF, 0xFF, 0xFF, 0xFF,
  11700. +   0xFF, 0xFF, 0xFF, 0xFF,
  11701. +   0xFF, 0xFF, 0xFF, 0xFF,
  11702. +   0xFF, 0xFF, 0xFF, 0xFF,
  11703. +   0xFF, 0xFF, 0xFF, 0xFF,
  11704. +   0xFF, 0xFF, 0xFF, 0xFF,
  11705. +   0xFF, 0xFF, 0xFF, 0xFF,
  11706. +   0xFF, 0xFF, 0xFF, 0xFF,
  11707. +   0xFF, 0xFF, 0xFF, 0xFF,
  11708. +   0xFF, 0xFF, 0xFF, 0xFF,
  11709. +   0xFF, 0xFF, 0xFF, 0xFF,
  11710. +   0xFF, 0xFF, 0xFF, 0xFF,
  11711. +   0xFF, 0xFF, 0xFF, 0xFF,
  11712. +   0xFF, 0xFF, 0xFF, 0xFF,
  11713. +   0xFF, 0xFF, 0xFF, 0xFF,
  11714. +   0xFF, 0xFF, 0xFF, 0xFF,
  11715. +   0xFF, 0xFF, 0xFF, 0xFF,
  11716. +   0xFF, 0xFF, 0xFF, 0xFF,
  11717. +   0xFF, 0xFF, 0xFF, 0xFF,
  11718. +   0xFF, 0xFF, 0xFF, 0xFF,
  11719. +   0xFF, 0xFF, 0xFF, 0xFF,
  11720. +   0xFF, 0xFF, 0xFF, 0xFF,
  11721. +   0xFF, 0xFF, 0xFF, 0xFF,
  11722. +   0xFF, 0xFF, 0xFF, 0xFF,
  11723. +   0xFF, 0xFF, 0xFF, 0xFF,
  11724. +   0xFF, 0xFF, 0xFF, 0xFF,
  11725. +   0xFF, 0xFF, 0xFF, 0xFF,
  11726. +   0xFF, 0xFF, 0xFF, 0xFF,
  11727. +   0xFF, 0xFF, 0xFF, 0xFF,
  11728. +   0xFF, 0xFF, 0xFF, 0xFF,
  11729. +   0xFF, 0xFF, 0xFF, 0xFF,
  11730. +   0xFF, 0xFF, 0xFF, 0xFF,
  11731. +   0xFF, 0xFF, 0xFF, 0xFF,
  11732. +   0xFF, 0xFF, 0xFF, 0xFF,
  11733. +   0xFF, 0xFF, 0xFF, 0xFF,
  11734. +   0xFF, 0xFF, 0xFF, 0xFF,
  11735. +   0xFF, 0xFF, 0xFF, 0xFF,
  11736. +   0xFF, 0xFF, 0xFF, 0xFF,
  11737. +   0xFF, 0xFF, 0xFF, 0xFF,
  11738. +   0xFF, 0xFF, 0xFF, 0xFF,
  11739. +   0xFF, 0xFF, 0xFF, 0xFF,
  11740. +   0xFF, 0xFF, 0xFF, 0xFF,
  11741. +   0xFF, 0xFF, 0xFF, 0xFF,
  11742. +   0xFF, 0xFF, 0xFF, 0xFF,
  11743. +   0xFF, 0xFF, 0xFF, 0xFF,
  11744. +   0xFF, 0xFF, 0xFF, 0xFF,
  11745. +   0xFF, 0xFF, 0xFF, 0xFF,
  11746. +   0xFF, 0xFF, 0xFF, 0xFF,
  11747. +   0xFF, 0xFF, 0xFF, 0xFF,
  11748. +   0xFF, 0xFF, 0xFF, 0xFF,
  11749. +   0xFF, 0xFF, 0xFF, 0xFF,
  11750. +   0xFF, 0xFF, 0xFF, 0xFF,
  11751. +   0xFF, 0xFF, 0xFF, 0xFF,
  11752. +   0xFF, 0xFF, 0xFF, 0xFF,
  11753. +   0xFF, 0xFF, 0xFF, 0xFF,
  11754. +   0xFF, 0xFF, 0xFF, 0xFF,
  11755. +   0xFF, 0xFF, 0xFF, 0xFF,
  11756. +   0xFF, 0xFF, 0xFF, 0xFF,
  11757. +   0xFF, 0xFF, 0xFF, 0xFF,
  11758. +   0xFF, 0xFF, 0xFF, 0xFF,
  11759. +   0xFF, 0xFF, 0xFF, 0xFF,
  11760. +   0xFF, 0xFF, 0xFF, 0xFF,
  11761. +   0xFF, 0xFF, 0xFF, 0xFF,
  11762. +   0xFF, 0xFF, 0xFF, 0xFF,
  11763. +   0xFF, 0xFF, 0xFF, 0xFF,
  11764. +   0xFF, 0xFF, 0xFF, 0xFF,
  11765. +   0xFF, 0xFF, 0xFF, 0xFF,
  11766. +   0xFF, 0xFF, 0xFF, 0xFF,
  11767. +   0xFF, 0xFF, 0xFF, 0xFF,
  11768. +   0xFF, 0xFF, 0xFF, 0xFF,
  11769. +   0xFF, 0xFF, 0xFF, 0xFF,
  11770. +   0xFF, 0xFF, 0xFF, 0xFF,
  11771. +   0xFF, 0xFF, 0xFF, 0xFF,
  11772. +   0xFF, 0xFF, 0xFF, 0xFF,
  11773. +   0xFF, 0xFF, 0xFF, 0xFF,
  11774. +   0xFF, 0xFF, 0xFF, 0xFF,
  11775. +   0xFF, 0xFF, 0xFF, 0xFF,
  11776. +   0xFF, 0xFF, 0xFF, 0xFF,
  11777. +   0xFF, 0xFF, 0xFF, 0xFF,
  11778. +   0xFF, 0xFF, 0xFF, 0xFF,
  11779. +   0xFF, 0xFF, 0xFF, 0xFF,
  11780. +   0xFF, 0xFF, 0xFF, 0xFF,
  11781. +   0xFF, 0xFF, 0xFF, 0xFF,
  11782. +   0xFF, 0xFF, 0xFF, 0xFF,
  11783. +   0xFF, 0xFF, 0xFF, 0xFF,
  11784. +   0xFF, 0xFF, 0xFF, 0xFF,
  11785. +   0xFF, 0xFF, 0xFF, 0xFF,
  11786. +   0xFF, 0xFF, 0xFF, 0xFF,
  11787. +   0xFF, 0xFF, 0xFF, 0xFF,
  11788. +   0xFF, 0xFF, 0xFF, 0xFF,
  11789. +   0xFF, 0xFF, 0xFF, 0xFF,
  11790. +   0xFF, 0xFF, 0xFF, 0xFF,
  11791. +   0xFF, 0xFF, 0xFF, 0xFF,
  11792. +   0xFF, 0xFF, 0xFF, 0xFF,
  11793. +   0xFF, 0xFF, 0xFF, 0xFF,
  11794. +   0xFF, 0xFF, 0xFF, 0xFF,
  11795. +   0xFF, 0xFF, 0xFF, 0xFF,
  11796. +   0xFF, 0xFF, 0xFF, 0xFF,
  11797. +   0xFF, 0xFF, 0xFF, 0xFF,
  11798. +   0xFF, 0xFF, 0xFF, 0xFF,
  11799. +   0xFF, 0xFF, 0xFF, 0xFF,
  11800. +   0xFF, 0xFF, 0xFF, 0xFF,
  11801. +   0xFF, 0xFF, 0xFF, 0xFF,
  11802. +   0xFF, 0xFF, 0xFF, 0xFF,
  11803. +   0xFF, 0xFF, 0xFF, 0xFF,
  11804. +   0xFF, 0xFF, 0xFF, 0xFF,
  11805. +   0xFF, 0xFF, 0xFF, 0xFF,
  11806. +   0xFF, 0xFF, 0xFF, 0xFF,
  11807. +   0xFF, 0xFF, 0xFF, 0xFF,
  11808. +   0xFF, 0xFF, 0xFF, 0xFF,
  11809. +   0xFF, 0xFF, 0xFF, 0xFF,
  11810. +   0xFF, 0xFF, 0xFF, 0xFF,
  11811. +   0xFF, 0xFF, 0xFF, 0xFF,
  11812. +   0xFF, 0xFF, 0xFF, 0xFF,
  11813. +   0xFF, 0xFF, 0xFF, 0xFF,
  11814. +   0xFF, 0xFF, 0xFF, 0xFF,
  11815. +   0xFF, 0xFF, 0xFF, 0xFF,
  11816. +   0xFF, 0xFF, 0xFF, 0xFF,
  11817. +   0xFF, 0xFF, 0xFF, 0xFF,
  11818. +   0xFF, 0xFF, 0xFF, 0xFF,
  11819. +   0xFF, 0xFF, 0xFF, 0xFF,
  11820. +   0xFF, 0xFF, 0xFF, 0xFF,
  11821. +   0xFF, 0xFF, 0xFF, 0xFF,
  11822. +   0xFF, 0xFF, 0xFF, 0xFF,
  11823. +   0xFF, 0xFF, 0xFF, 0xFF,
  11824. +   0xFF, 0xFF, 0xFF, 0xFF,
  11825. +   0xFF, 0xFF, 0xFF, 0xFF,
  11826. +   0xFF, 0xFF, 0xFF, 0xFF,
  11827. +   0xFF, 0xFF, 0xFF, 0xFF,
  11828. +   0xFF, 0xFF, 0xFF, 0xFF,
  11829. +   0xFF, 0xFF, 0xFF, 0xFF,
  11830. +   0xFF, 0xFF, 0xFF, 0xFF,
  11831. +   0xFF, 0xFF, 0xFF, 0xFF,
  11832. +   0xFF, 0xFF, 0xFF, 0xFF,
  11833. +   0xFF, 0xFF, 0xFF, 0xFF,
  11834. +   0xFF, 0xFF, 0xFF, 0xFF,
  11835. +   0xFF, 0xFF, 0xFF, 0xFF,
  11836. +   0xFF, 0xFF, 0xFF, 0xFF,
  11837. +   0xFF, 0xFF, 0xFF, 0xFF,
  11838. +   0xFF, 0xFF, 0xFF, 0xFF,
  11839. +   0xFF, 0xFF, 0xFF, 0xFF,
  11840. +   0xFF, 0xFF, 0xFF, 0xFF,
  11841. +   0xFF, 0xFF, 0xFF, 0xFF,
  11842. +   0xFF, 0xFF, 0xFF, 0xFF,
  11843. +   0xFF, 0xFF, 0xFF, 0xFF,
  11844. +   0xFF, 0xFF, 0xFF, 0xFF,
  11845. +   0xFF, 0xFF, 0xFF, 0xFF,
  11846. +   0xFF, 0xFF, 0xFF, 0xFF,
  11847. +   0xFF, 0xFF, 0xFF, 0xFF,
  11848. +   0xFF, 0xFF, 0xFF, 0xFF,
  11849. +   0xFF, 0xFF, 0xFF, 0xFF,
  11850. +   0xFF, 0xFF, 0xFF, 0xFF,
  11851. +   0xFF, 0xFF, 0xFF, 0xFF,
  11852. +   0xFF, 0xFF, 0xFF, 0xFF,
  11853. +   0xFF, 0xFF, 0xFF, 0xFF,
  11854. +   0xFF, 0xFF, 0xFF, 0xFF,
  11855. +   0xFF, 0xFF, 0xFF, 0xFF,
  11856. +   0xFF, 0xFF, 0xFF, 0xFF,
  11857. +   0xFF, 0xFF, 0xFF, 0xFF,
  11858. +   0xFF, 0xFF, 0xFF, 0xFF,
  11859. +   0xFF, 0xFF, 0xFF, 0xFF,
  11860. +   0xFF, 0xFF, 0xFF, 0xFF,
  11861. +   0xFF, 0xFF, 0xFF, 0xFF,
  11862. +   0xFF, 0xFF, 0xFF, 0xFF,
  11863. +   0xFF, 0xFF, 0xFF, 0xFF,
  11864. +   0xFF, 0xFF, 0xFF, 0xFF,
  11865. +   0xFF, 0xFF, 0xFF, 0xFF,
  11866. +   0xFF, 0xFF, 0xFF, 0xFF,
  11867. +   0xFF, 0xFF, 0xFF, 0xFF,
  11868. +   0xFF, 0xFF, 0xFF, 0xFF,
  11869. +   0xFF, 0xFF, 0xFF, 0xFF,
  11870. +   0xFF, 0xFF, 0xFF, 0xFF,
  11871. +   0xFF, 0xFF, 0xFF, 0xFF,
  11872. +   0xFF, 0xFF, 0xFF, 0xFF,
  11873. +   0xFF, 0xFF, 0xFF, 0xFF,
  11874. +   0xFF, 0xFF, 0xFF, 0xFF,
  11875. +   0xFF, 0xFF, 0xFF, 0xFF,
  11876. +   0xFF, 0xFF, 0xFF, 0xFF,
  11877. +   0xFF, 0xFF, 0xFF, 0xFF,
  11878. +   0xFF, 0xFF, 0xFF, 0xFF,
  11879. +   0xFF, 0xFF, 0xFF, 0xFF,
  11880. +   0xFF, 0xFF, 0xFF, 0xFF,
  11881. +   0xFF, 0xFF, 0xFF, 0xFF,
  11882. +   0xFF, 0xFF, 0xFF, 0xFF,
  11883. +   0xFF, 0xFF, 0xFF, 0xFF,
  11884. +   0xFF, 0xFF, 0xFF, 0xFF,
  11885. +   0xFF, 0xFF, 0xFF, 0xFF,
  11886. +   0xFF, 0xFF, 0xFF, 0xFF,
  11887. +   0xFF, 0xFF, 0xFF, 0xFF,
  11888. +   0xFF, 0xFF, 0xFF, 0xFF,
  11889. +   0xFF, 0xFF, 0xFF, 0xFF,
  11890. +   0xFF, 0xFF, 0xFF, 0xFF,
  11891. +   0xFF, 0xFF, 0xFF, 0xFF,
  11892. +   0xFF, 0xFF, 0xFF, 0xFF,
  11893. +   0xFF, 0xFF, 0xFF, 0xFF,
  11894. +   0xFF, 0xFF, 0xFF, 0xFF,
  11895. +   0xFF, 0xFF, 0xFF, 0xFF,
  11896. +   0xFF, 0xFF, 0xFF, 0xFF,
  11897. +   0xFF, 0xFF, 0xFF, 0xFF,
  11898. +   0xFF, 0xFF, 0xFF, 0xFF,
  11899. +   0xFF, 0xFF, 0xFF, 0xFF,
  11900. +   0xFF, 0xFF, 0xFF, 0xFF,
  11901. +   0xFF, 0xFF, 0xFF, 0xFF,
  11902. +   0xFF, 0xFF, 0xFF, 0xFF,
  11903. +   0xFF, 0xFF, 0xFF, 0xFF,
  11904. +   0xFF, 0xFF, 0xFF, 0xFF,
  11905. +   0xFF, 0xFF, 0xFF, 0xFF,
  11906. +   0xFF, 0xFF, 0xFF, 0xFF,
  11907. +   0xFF, 0xFF, 0xFF, 0xFF,
  11908. +   0xFF, 0xFF, 0xFF, 0xFF,
  11909. +   0xFF, 0xFF, 0xFF, 0xFF,
  11910. +   0xFF, 0xFF, 0xFF, 0xFF,
  11911. +   0xFF, 0xFF, 0xFF, 0xFF,
  11912. +   0xFF, 0xFF, 0xFF, 0xFF,
  11913. +   0xFF, 0xFF, 0xFF, 0xFF,
  11914. +   0xFF, 0xFF, 0xFF, 0xFF,
  11915. +   0xFF, 0xFF, 0xFF, 0xFF,
  11916. +   0xFF, 0xFF, 0xFF, 0xFF,
  11917. +   0xFF, 0xFF, 0xFF, 0xFF,
  11918. +   0xFF, 0xFF, 0xFF, 0xFF,
  11919. +   0xFF, 0xFF, 0xFF, 0xFF,
  11920. +   0xFF, 0xFF, 0xFF, 0xFF,
  11921. +   0xFF, 0xFF, 0xFF, 0xFF,
  11922. +   0xFF, 0xFF, 0xFF, 0xFF,
  11923. +   0xFF, 0xFF, 0xFF, 0xFF,
  11924. +   0xFF, 0xFF, 0xFF, 0xFF,
  11925. +   0xFF, 0xFF, 0xFF, 0xFF,
  11926. +   0xFF, 0xFF, 0xFF, 0xFF,
  11927. +   0xFF, 0xFF, 0xFF, 0xFF,
  11928. +   0xFF, 0xFF, 0xFF, 0xFF,
  11929. +   0xFF, 0xFF, 0xFF, 0xFF,
  11930. +   0xFF, 0xFF, 0xFF, 0xFF,
  11931. +   0xFF, 0xFF, 0xFF, 0xFF,
  11932. +   0xFF, 0xFF, 0xFF, 0xFF,
  11933. +   0xFF, 0xFF, 0xFF, 0xFF,
  11934. +   0xFF, 0xFF, 0xFF, 0xFF,
  11935. +   0xFF, 0xFF, 0xFF, 0xFF,
  11936. +   0xFF, 0xFF, 0xFF, 0xFF,
  11937. +   0xFF, 0xFF, 0xFF, 0xFF,
  11938. +   0xFF, 0xFF, 0xFF, 0xFF,
  11939. +   0xFF, 0xFF, 0xFF, 0xFF,
  11940. +   0xFF, 0xFF, 0xFF, 0xFF,
  11941. +   0xFF, 0xFF, 0xFF, 0xFF,
  11942. +   0xFF, 0xFF, 0xFF, 0xFF,
  11943. +   0xFF, 0xFF, 0xFF, 0xFF,
  11944. +   0xFF, 0xFF, 0xFF, 0xFF,
  11945. +   0xFF, 0xFF, 0xFF, 0xFF,
  11946. +   0xFF, 0xFF, 0xFF, 0xFF,
  11947. +   0xFF, 0xFF, 0xFF, 0xFF,
  11948. +   0xFF, 0xFF, 0xFF, 0xFF,
  11949. +   0xFF, 0xFF, 0xFF, 0xFF,
  11950. +   0xFF, 0xFF, 0xFF, 0xFF,
  11951. +   0xFF, 0xFF, 0xFF, 0xFF,
  11952. +   0xFF, 0xFF, 0xFF, 0xFF,
  11953. +   0xFF, 0xFF, 0xFF, 0xFF,
  11954. +   0xFF, 0xFF, 0xFF, 0xFF,
  11955. +   0xFF, 0xFF, 0xFF, 0xFF,
  11956. +   0xFF, 0xFF, 0xFF, 0xFF,
  11957. +   0xFF, 0xFF, 0xFF, 0xFF,
  11958. +   0xFF, 0xFF, 0xFF, 0xFF,
  11959. +   0xFF, 0xFF, 0xFF, 0xFF,
  11960. +   0xFF, 0xFF, 0xFF, 0xFF,
  11961. +   0xFF, 0xFF, 0xFF, 0xFF,
  11962. +   0xFF, 0xFF, 0xFF, 0xFF,
  11963. +   0xFF, 0xFF, 0xFF, 0xFF,
  11964. +   0xFF, 0xFF, 0xFF, 0xFF,
  11965. +   0xFF, 0xFF, 0xFF, 0xFF,
  11966. +   0xFF, 0xFF, 0xFF, 0xFF,
  11967. +   0xFF, 0xFF, 0xFF, 0xFF,
  11968. +   0xFF, 0xFF, 0xFF, 0xFF,
  11969. +   0xFF, 0xFF, 0xFF, 0xFF,
  11970. +   0xFF, 0xFF, 0xFF, 0xFF,
  11971. +   0xFF, 0xFF, 0xFF, 0xFF,
  11972. +   0xFF, 0xFF, 0xFF, 0xFF,
  11973. +   0xFF, 0xFF, 0xFF, 0xFF,
  11974. +   0xFF, 0xFF, 0xFF, 0xFF,
  11975. +   0xFF, 0xFF, 0xFF, 0xFF,
  11976. +   0xFF, 0xFF, 0xFF, 0xFF,
  11977. +   0xFF, 0xFF, 0xFF, 0xFF,
  11978. +   0xFF, 0xFF, 0xFF, 0xFF,
  11979. +   0xFF, 0xFF, 0xFF, 0xFF,
  11980. +   0xFF, 0xFF, 0xFF, 0xFF,
  11981. +   0xFF, 0xFF, 0xFF, 0xFF,
  11982. +   0xFF, 0xFF, 0xFF, 0xFF,
  11983. +   0xFF, 0xFF, 0xFF, 0xFF,
  11984. +   0xFF, 0xFF, 0xFF, 0xFF,
  11985. +   0xFF, 0xFF, 0xFF, 0xFF,
  11986. +   0xFF, 0xFF, 0xFF, 0xFF,
  11987. +   0xFF, 0xFF, 0xFF, 0xFF,
  11988. +   0xFF, 0xFF, 0xFF, 0xFF,
  11989. +   0xFF, 0xFF, 0xFF, 0xFF,
  11990. +   0xFF, 0xFF, 0xFF, 0xFF,
  11991. +   0xFF, 0xFF, 0xFF, 0xFF,
  11992. +   0xFF, 0xFF, 0xFF, 0xFF,
  11993. +   0xFF, 0xFF, 0xFF, 0xFF,
  11994. +   0xFF, 0xFF, 0xFF, 0xFF,
  11995. +   0xFF, 0xFF, 0xFF, 0xFF,
  11996. +   0xFF, 0xFF, 0xFF, 0xFF,
  11997. +   0xFF, 0xFF, 0xFF, 0xFF,
  11998. +   0xFF, 0xFF, 0xFF, 0xFF,
  11999. +   0xFF, 0xFF, 0xFF, 0xFF,
  12000. +   0xFF, 0xFF, 0xFF, 0xFF,
  12001. +   0xFF, 0xFF, 0xFF, 0xFF,
  12002. +   0xFF, 0xFF, 0xFF, 0xFF,
  12003. +   0xFF, 0xFF, 0xFF, 0xFF,
  12004. +   0xFF, 0xFF, 0xFF, 0xFF,
  12005. +   0xFF, 0xFF, 0xFF, 0xFF,
  12006. +   0xFF, 0xFF, 0xFF, 0xFF,
  12007. +   0xFF, 0xFF, 0xFF, 0xFF,
  12008. +   0xFF, 0xFF, 0xFF, 0xFF,
  12009. +   0xFF, 0xFF, 0xFF, 0xFF,
  12010. +   0xFF, 0xFF, 0xFF, 0xFF,
  12011. +   0xFF, 0xFF, 0xFF, 0xFF,
  12012. +   0xFF, 0xFF, 0xFF, 0xFF,
  12013. +   0xFF, 0xFF, 0xFF, 0xFF,
  12014. +   0xFF, 0xFF, 0xFF, 0xFF,
  12015. +   0xFF, 0xFF, 0xFF, 0xFF,
  12016. +   0xFF, 0xFF, 0xFF, 0xFF,
  12017. +   0xFF, 0xFF, 0xFF, 0xFF,
  12018. +   0xFF, 0xFF, 0xFF, 0xFF,
  12019. +   0xFF, 0xFF, 0xFF, 0xFF,
  12020. +   0xFF, 0xFF, 0xFF, 0xFF,
  12021. +   0xFF, 0xFF, 0xFF, 0xFF,
  12022. +   0xFF, 0xFF, 0xFF, 0xFF,
  12023. +   0xFF, 0xFF, 0xFF, 0xFF,
  12024. +   0xFF, 0xFF, 0xFF, 0xFF,
  12025. +   0xFF, 0xFF, 0xFF, 0xFF,
  12026. +   0xFF, 0xFF, 0xFF, 0xFF,
  12027. +   0xFF, 0xFF, 0xFF, 0xFF,
  12028. +   0xFF, 0xFF, 0xFF, 0xFF,
  12029. +   0xFF, 0xFF, 0xFF, 0xFF,
  12030. +   0xFF, 0xFF, 0xFF, 0xFF,
  12031. +   0xFF, 0xFF, 0xFF, 0xFF,
  12032. +   0xFF, 0xFF, 0xFF, 0xFF,
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  12440. +   0xFF, 0xFF, 0xFF, 0xFF,
  12441. +   0xFF, 0xFF, 0xFF, 0xFF,
  12442. +   0xFF, 0xFF, 0xFF, 0xFF,
  12443. +   0xFF, 0xFF, 0xFF, 0xFF,
  12444. +   0xFF, 0xFF, 0xFF, 0xFF,
  12445. +   0xFF, 0xFF, 0xFF, 0xFF,
  12446. +   0xFF, 0xFF, 0xFF, 0x02,
  12447. +   0x10, 0x28, 0x02, 0x10,
  12448. +   0x3B, 0x02, 0x10, 0x3C,
  12449. +   0x02, 0x12, 0xB8, 0x02,
  12450. +   0x12, 0xB9, 0x02, 0x13,
  12451. +   0x3E, 0x02, 0x13, 0x3F,
  12452. +   0xC3, 0x22, 0xFF, 0xFF,
  12453. +   0x02, 0x16, 0x56, 0x02,
  12454. +   0x17, 0x6B, 0x02, 0x14,
  12455. +   0x2A, 0x02, 0x13, 0x40,
  12456. +   0x30, 0x05, 0x06, 0x20,
  12457. +   0x0D, 0x03, 0x12, 0x00,
  12458. +   0xD8, 0x30, 0x06, 0x06,
  12459. +   0x20, 0x0E, 0x03, 0x12,
  12460. +   0x18, 0x5E, 0x22, 0x22,
  12461. +   0x90, 0x04, 0x14, 0xE0,
  12462. +   0x20, 0xE7, 0x03, 0x02,
  12463. +   0x12, 0xB7, 0x90, 0x70,
  12464. +   0x12, 0xE0, 0xF5, 0x56,
  12465. +   0x90, 0x04, 0x04, 0xE0,
  12466. +   0x12, 0x02, 0x67, 0x11,
  12467. +   0x4E, 0x30, 0x11, 0x25,
  12468. +   0x31, 0x10, 0x87, 0x33,
  12469. +   0x10, 0xAA, 0x34, 0x10,
  12470. +   0xC3, 0x35, 0x11, 0x57,
  12471. +   0x50, 0x11, 0x7B, 0x51,
  12472. +   0x11, 0x84, 0x52, 0x11,
  12473. +   0x84, 0x53, 0x11, 0x84,
  12474. +   0x54, 0x11, 0xC5, 0x55,
  12475. +   0x11, 0xDC, 0x70, 0x12,
  12476. +   0x07, 0x71, 0x12, 0x34,
  12477. +   0x72, 0x12, 0x5E, 0x80,
  12478. +   0x12, 0x81, 0x83, 0x00,
  12479. +   0x00, 0x12, 0xB7, 0x75,
  12480. +   0x24, 0x05, 0x75, 0x25,
  12481. +   0xDC, 0x90, 0x70, 0x9F,
  12482. +   0x74, 0x12, 0xF0, 0xD2,
  12483. +   0x18, 0xD2, 0x61, 0x75,
  12484. +   0x35, 0x0D, 0xE4, 0x90,
  12485. +   0x70, 0x13, 0xF0, 0xE5,
  12486. +   0x56, 0xF4, 0x70, 0x03,
  12487. +   0x02, 0x12, 0xB7, 0x02,
  12488. +   0x12, 0xAA, 0xC2, 0x18,
  12489. +   0x90, 0x01, 0x14, 0xE0,
  12490. +   0x54, 0xFD, 0xF0, 0xE4,
  12491. +   0x90, 0x70, 0x13, 0xF0,
  12492. +   0xE5, 0x56, 0xF4, 0x70,
  12493. +   0x03, 0x02, 0x12, 0xB7,
  12494. +   0x02, 0x12, 0xAA, 0xE5,
  12495. +   0x55, 0x64, 0x02, 0x70,
  12496. +   0x37, 0x90, 0x70, 0x10,
  12497. +   0xE0, 0x60, 0x08, 0x90,
  12498. +   0x01, 0x0D, 0x74, 0x09,
  12499. +   0xF0, 0x80, 0x25, 0xE5,
  12500. +   0x34, 0x14, 0x60, 0x0A,
  12501. +   0x14, 0x60, 0x0F, 0x14,
  12502. +   0x60, 0x14, 0x24, 0x03,
  12503. +   0x70, 0x16, 0x90, 0x01,
  12504. +   0x0D, 0x74, 0x08, 0xF0,
  12505. +   0x80, 0x0E, 0x90, 0x01,
  12506. +   0x0D, 0x74, 0x0B, 0xF0,
  12507. +   0x80, 0x06, 0x90, 0x01,
  12508. +   0x0D, 0x74, 0x1B, 0xF0,
  12509. +   0x7D, 0x01, 0x80, 0x02,
  12510. +   0x7D, 0x02, 0xAF, 0x56,
  12511. +   0x12, 0x02, 0x8D, 0x90,
  12512. +   0x70, 0x11, 0xE0, 0x24,
  12513. +   0xFF, 0x92, 0x1B, 0x90,
  12514. +   0x04, 0x14, 0x74, 0x80,
  12515. +   0xF0, 0xE4, 0x90, 0x70,
  12516. +   0x13, 0xF0, 0xE5, 0x56,
  12517. +   0xF4, 0x70, 0x03, 0x02,
  12518. +   0x12, 0xB7, 0x02, 0x12,
  12519. +   0xAA, 0x20, 0x02, 0x03,
  12520. +   0x30, 0x03, 0x1D, 0x7D,
  12521. +   0x02, 0xAF, 0x56, 0x12,
  12522. +   0x02, 0x8D, 0x90, 0x04,
  12523. +   0x14, 0x74, 0x80, 0xF0,
  12524. +   0xE4, 0x90, 0x70, 0x13,
  12525. +   0xF0, 0xE5, 0x56, 0xF4,
  12526. +   0x70, 0x03, 0x02, 0x12,
  12527. +   0xB7, 0x02, 0x12, 0xAA,
  12528. +   0x85, 0x56, 0x41, 0xD2,
  12529. +   0x02, 0x22, 0x90, 0x70,
  12530. +   0x11, 0xE0, 0x24, 0xFF,
  12531. +   0x92, 0x1B, 0x22, 0x90,
  12532. +   0x70, 0x10, 0xE0, 0x54,
  12533. +   0x7F, 0x64, 0x02, 0x60,
  12534. +   0x03, 0x02, 0x12, 0xB7,
  12535. +   0x90, 0x70, 0x11, 0xE0,
  12536. +   0x64, 0x08, 0x60, 0x08,
  12537. +   0xE0, 0x64, 0x20, 0x60,
  12538. +   0x03, 0x02, 0x12, 0xB7,
  12539. +   0x75, 0x4E, 0x03, 0x75,
  12540. +   0x4F, 0x20, 0x22, 0x90,
  12541. +   0x70, 0x11, 0xE0, 0x24,
  12542. +   0xFF, 0x92, 0x47, 0x22,
  12543. +   0x90, 0x04, 0x04, 0xE0,
  12544. +   0x25, 0xE0, 0x24, 0x5D,
  12545. +   0xF5, 0x57, 0x90, 0x70,
  12546. +   0x10, 0xE0, 0xFF, 0x74,
  12547. +   0x47, 0x25, 0x57, 0xF8,
  12548. +   0xC6, 0xEF, 0xC6, 0x90,
  12549. +   0x70, 0x11, 0xE0, 0xFF,
  12550. +   0x74, 0x48, 0x25, 0x57,
  12551. +   0xF8, 0xC6, 0xEF, 0xC6,
  12552. +   0xE4, 0xFD, 0xAF, 0x56,
  12553. +   0x12, 0x02, 0x8D, 0x90,
  12554. +   0x04, 0x14, 0x74, 0x80,
  12555. +   0xF0, 0xE4, 0x90, 0x70,
  12556. +   0x13, 0xF0, 0xE5, 0x56,
  12557. +   0xF4, 0x70, 0x03, 0x02,
  12558. +   0x12, 0xB7, 0x02, 0x12,
  12559. +   0xAA, 0xE5, 0x47, 0xB4,
  12560. +   0x07, 0x08, 0x90, 0x70,
  12561. +   0x11, 0xE0, 0x54, 0x07,
  12562. +   0xF5, 0x26, 0xE4, 0xFD,
  12563. +   0xAF, 0x56, 0x12, 0x02,
  12564. +   0x8D, 0xD2, 0x04, 0x22,
  12565. +   0x90, 0x70, 0x10, 0xE0,
  12566. +   0xFE, 0x90, 0x70, 0x11,
  12567. +   0xE0, 0xFD, 0xED, 0xF8,
  12568. +   0xE6, 0xF5, 0x57, 0xFD,
  12569. +   0xAF, 0x56, 0x12, 0x02,
  12570. +   0x8D, 0x90, 0x04, 0x14,
  12571. +   0x74, 0x80, 0xF0, 0xE4,
  12572. +   0x90, 0x70, 0x13, 0xF0,
  12573. +   0xE5, 0x56, 0xF4, 0x70,
  12574. +   0x03, 0x02, 0x12, 0xB7,
  12575. +   0x02, 0x12, 0xAA, 0x90,
  12576. +   0x70, 0x10, 0xE0, 0xFE,
  12577. +   0x90, 0x70, 0x11, 0xE0,
  12578. +   0xFD, 0xED, 0xF5, 0x82,
  12579. +   0x8E, 0x83, 0xE0, 0xF5,
  12580. +   0x57, 0xFD, 0xAF, 0x56,
  12581. +   0x12, 0x02, 0x8D, 0x90,
  12582. +   0x04, 0x14, 0x74, 0x80,
  12583. +   0xF0, 0xE4, 0x90, 0x70,
  12584. +   0x13, 0xF0, 0xE5, 0x56,
  12585. +   0xF4, 0x70, 0x03, 0x02,
  12586. +   0x12, 0xB7, 0x80, 0x76,
  12587. +   0xE4, 0xF5, 0x4E, 0xF5,
  12588. +   0x4F, 0x75, 0x26, 0xFF,
  12589. +   0xC2, 0x19, 0xC2, 0x18,
  12590. +   0xC2, 0x1A, 0x75, 0x34,
  12591. +   0xFF, 0xAD, 0x57, 0xAF,
  12592. +   0x56, 0x12, 0x02, 0x8D,
  12593. +   0x90, 0x04, 0x14, 0x74,
  12594. +   0x80, 0xF0, 0xE4, 0x90,
  12595. +   0x70, 0x13, 0xF0, 0xE5,
  12596. +   0x56, 0xF4, 0x60, 0x5B,
  12597. +   0x80, 0x4C, 0x90, 0x70,
  12598. +   0x10, 0xE0, 0x24, 0xFF,
  12599. +   0x92, 0x4A, 0xD2, 0x05,
  12600. +   0xAD, 0x57, 0xAF, 0x56,
  12601. +   0x12, 0x02, 0x8D, 0x90,
  12602. +   0x04, 0x14, 0x74, 0x80,
  12603. +   0xF0, 0xE4, 0x90, 0x70,
  12604. +   0x13, 0xF0, 0xE5, 0x56,
  12605. +   0xF4, 0x60, 0x38, 0x80,
  12606. +   0x29, 0x90, 0x70, 0x10,
  12607. +   0xE0, 0xF5, 0x34, 0xD3,
  12608. +   0x94, 0x00, 0x40, 0x07,
  12609. +   0x90, 0x01, 0x0D, 0xE0,
  12610. +   0x54, 0xFB, 0xF0, 0xAD,
  12611. +   0x57, 0xAF, 0x56, 0x12,
  12612. +   0x02, 0x8D, 0x90, 0x04,
  12613. +   0x14, 0x74, 0x80, 0xF0,
  12614. +   0xE4, 0x90, 0x70, 0x13,
  12615. +   0xF0, 0xE5, 0x56, 0xF4,
  12616. +   0x60, 0x0D, 0x90, 0x70,
  12617. +   0x25, 0xE0, 0x44, 0x01,
  12618. +   0xF0, 0x90, 0x02, 0x2C,
  12619. +   0x74, 0xFF, 0xF0, 0x22,
  12620. +   0x22, 0xE5, 0x53, 0x60,
  12621. +   0x03, 0x02, 0x13, 0x3D,
  12622. +   0xE5, 0x4F, 0x45, 0x4E,
  12623. +   0x60, 0x08, 0xE5, 0x4F,
  12624. +   0x15, 0x4F, 0x70, 0x02,
  12625. +   0x15, 0x4E, 0xA2, 0x19,
  12626. +   0xE4, 0x33, 0x90, 0x70,
  12627. +   0x90, 0xF0, 0xA2, 0x18,
  12628. +   0xE4, 0x33, 0xA3, 0xF0,
  12629. +   0x30, 0x19, 0x4D, 0x90,
  12630. +   0x70, 0x98, 0x74, 0x23,
  12631. +   0xF0, 0xA3, 0xE5, 0x25,
  12632. +   0xF0, 0xE5, 0x24, 0xA3,
  12633. +   0xF0, 0x7F, 0x35, 0x7D,
  12634. +   0x32, 0x12, 0x03, 0x42,
  12635. +   0x50, 0x09, 0x90, 0x10,
  12636. +   0x04, 0xE0, 0x54, 0xF7,
  12637. +   0xF0, 0xD2, 0x06, 0xE5,
  12638. +   0x35, 0xD3, 0x94, 0x10,
  12639. +   0x40, 0x1E, 0x30, 0x1A,
  12640. +   0x1B, 0xC2, 0x1A, 0xA2,
  12641. +   0x18, 0x92, 0x19, 0x20,
  12642. +   0x19, 0x12, 0x90, 0x04,
  12643. +   0x09, 0xE0, 0x54, 0xDD,
  12644. +   0xF0, 0x90, 0x10, 0x04,
  12645. +   0xE0, 0x44, 0x08, 0xF0,
  12646. +   0xC2, 0x61, 0xD2, 0x03,
  12647. +   0xE5, 0x35, 0xB4, 0x0B,
  12648. +   0x14, 0xD2, 0x03, 0x22,
  12649. +   0xE4, 0xF5, 0x35, 0xA2,
  12650. +   0x18, 0x92, 0x19, 0x30,
  12651. +   0x19, 0x07, 0x90, 0x04,
  12652. +   0x09, 0xE0, 0x44, 0x22,
  12653. +   0xF0, 0x22, 0x22, 0x22,
  12654. +   0xC2, 0x4B, 0xC2, 0x4C,
  12655. +   0xE5, 0x44, 0x12, 0x02,
  12656. +   0x67, 0x13, 0x62, 0x00,
  12657. +   0x13, 0xF5, 0x04, 0x13,
  12658. +   0xF1, 0x08, 0x13, 0xCC,
  12659. +   0x10, 0x13, 0x76, 0x20,
  12660. +   0x13, 0x96, 0x60, 0x13,
  12661. +   0xA7, 0xA0, 0x00, 0x00,
  12662. +   0x13, 0xF7, 0x85, 0x48,
  12663. +   0x43, 0x85, 0x4A, 0x42,
  12664. +   0x85, 0x4C, 0x5E, 0xE5,
  12665. +   0x47, 0x64, 0x06, 0x60,
  12666. +   0x03, 0x02, 0x13, 0xF7,
  12667. +   0x80, 0x1B, 0xE5, 0x48,
  12668. +   0xC4, 0x54, 0x0F, 0xF5,
  12669. +   0x43, 0xE5, 0x4A, 0xC4,
  12670. +   0x54, 0x0F, 0xF5, 0x42,
  12671. +   0xE5, 0x4C, 0xC4, 0x54,
  12672. +   0x0F, 0xF5, 0x5E, 0xE5,
  12673. +   0x47, 0x64, 0x06, 0x70,
  12674. +   0x66, 0x53, 0x43, 0x0F,
  12675. +   0x80, 0x61, 0x85, 0x49,
  12676. +   0x43, 0x85, 0x4B, 0x42,
  12677. +   0x85, 0x4D, 0x5E, 0xE5,
  12678. +   0x47, 0x64, 0x06, 0x70,
  12679. +   0x52, 0x80, 0x1B, 0xE5,
  12680. +   0x49, 0xC4, 0x54, 0x0F,
  12681. +   0xF5, 0x43, 0xE5, 0x4B,
  12682. +   0xC4, 0x54, 0x0F, 0xF5,
  12683. +   0x42, 0xE5, 0x4D, 0xC4,
  12684. +   0x54, 0x0F, 0xF5, 0x5E,
  12685. +   0xE5, 0x47, 0x64, 0x06,
  12686. +   0x70, 0x35, 0xE5, 0x43,
  12687. +   0x54, 0x0F, 0x44, 0x10,
  12688. +   0xF5, 0x43, 0x80, 0x2B,
  12689. +   0xE5, 0x47, 0xB4, 0x04,
  12690. +   0x06, 0x53, 0x5E, 0xFB,
  12691. +   0x75, 0x42, 0x09, 0xE5,
  12692. +   0x47, 0xB4, 0x05, 0x06,
  12693. +   0x43, 0x5E, 0x04, 0x75,
  12694. +   0x42, 0x09, 0xE5, 0x47,
  12695. +   0xB4, 0x06, 0x10, 0xE5,
  12696. +   0x43, 0x54, 0x0F, 0x44,
  12697. +   0x30, 0xF5, 0x43, 0x80,
  12698. +   0x06, 0xD2, 0x4B, 0x80,
  12699. +   0x02, 0xD2, 0x4C, 0xE4,
  12700. +   0xF5, 0x38, 0xE5, 0x42,
  12701. +   0xC4, 0x54, 0xF0, 0xFF,
  12702. +   0xE5, 0x43, 0x54, 0x0F,
  12703. +   0x4F, 0xF5, 0x5F, 0x90,
  12704. +   0x70, 0x44, 0xF0, 0xA3,
  12705. +   0xE5, 0x5E, 0xF0, 0xA3,
  12706. +   0xE5, 0x4A, 0xF0, 0xA3,
  12707. +   0xE5, 0x48, 0xF0, 0xA3,
  12708. +   0xE5, 0x4C, 0xF0, 0xA3,
  12709. +   0xE5, 0x44, 0xF0, 0xA3,
  12710. +   0xE5, 0x42, 0xF0, 0xA3,
  12711. +   0xE5, 0x43, 0xF0, 0xD2,
  12712. +   0x60, 0x22, 0xE5, 0x47,
  12713. +   0x60, 0x10, 0x24, 0xC0,
  12714. +   0x70, 0x03, 0x12, 0x16,
  12715. +   0x36, 0x12, 0x14, 0x3F,
  12716. +   0xC2, 0xAF, 0xC2, 0x04,
  12717. +   0xD2, 0xAF, 0x22, 0xC2,
  12718. +   0xAF, 0x90, 0x04, 0x14,
  12719. +   0xE0, 0x54, 0x0E, 0x60,
  12720. +   0x04, 0xD2, 0x1C, 0x80,
  12721. +   0x08, 0xE5, 0x4E, 0x45,
  12722. +   0x4F, 0x24, 0xFF, 0x92,
  12723. +   0x1C, 0xD2, 0xAF, 0x90,
  12724. +   0x04, 0x14, 0xE0, 0xA2,
  12725. +   0xE4, 0x92, 0x1D, 0x74,
  12726. +   0x1E, 0xF0, 0xE5, 0x5F,
  12727. +   0x54, 0x0F, 0xF5, 0x2D,
  12728. +   0xE5, 0x38, 0x70, 0x13,
  12729. +   0x30, 0x1C, 0x05, 0xE5,
  12730. +   0x5F, 0x20, 0xE5, 0x0B,
  12731. +   0x30, 0x1D, 0x19, 0xE5,
  12732. +   0x5F, 0x54, 0x30, 0xFF,
  12733. +   0xBF, 0x30, 0x11, 0xE5,
  12734. +   0x38, 0x70, 0x05, 0x75,
  12735. +   0x38, 0x0C, 0x80, 0x02,
  12736. +   0x15, 0x38, 0xD2, 0x6C,
  12737. +   0xD2, 0x6D, 0x80, 0x0F,
  12738. +   0xE5, 0x5F, 0x30, 0xE6,
  12739. +   0x06, 0xC2, 0x6C, 0xD2,
  12740. +   0x6D, 0x80, 0x04, 0xD2,
  12741. +   0x6C, 0xC2, 0x6D, 0xE5,
  12742. +   0x47, 0x64, 0x03, 0x70,
  12743. +   0x21, 0x30, 0x4B, 0x06,
  12744. +   0xC2, 0x6C, 0xD2, 0x6D,
  12745. +   0x80, 0x18, 0xE5, 0x38,
  12746. +   0x70, 0x03, 0x30, 0x4C,
  12747. +   0x11, 0xC2, 0x4C, 0xE5,
  12748. +   0x38, 0x70, 0x05, 0x75,
  12749. +   0x38, 0x07, 0x80, 0x02,
  12750. +   0x15, 0x38, 0xD2, 0x6C,
  12751. +   0xD2, 0x6D, 0x90, 0x70,
  12752. +   0x46, 0xE5, 0x2D, 0xF0,
  12753. +   0x20, 0x69, 0x07, 0xE5,
  12754. +   0x5E, 0x20, 0xE0, 0x02,
  12755. +   0xB2, 0x68, 0x20, 0x6B,
  12756. +   0x07, 0xE5, 0x5E, 0x20,
  12757. +   0xE1, 0x02, 0xB2, 0x6A,
  12758. +   0x20, 0x6D, 0x07, 0xE5,
  12759. +   0x5E, 0x20, 0xE2, 0x02,
  12760. +   0xB2, 0x6C, 0x90, 0x70,
  12761. +   0x47, 0xE5, 0x2D, 0xF0,
  12762. +   0x75, 0x2E, 0x40, 0x20,
  12763. +   0x69, 0x04, 0xA2, 0x68,
  12764. +   0x80, 0x15, 0x30, 0x68,
  12765. +   0x06, 0xE5, 0x46, 0xA2,
  12766. +   0xE3, 0x80, 0x0C, 0xE5,
  12767. +   0x46, 0x54, 0xF0, 0xFF,
  12768. +   0xBF, 0xF0, 0x03, 0xD3,
  12769. +   0x80, 0x01, 0xC3, 0x92,
  12770. +   0x73, 0x92, 0x72, 0x20,
  12771. +   0x6B, 0x04, 0xA2, 0x6A,
  12772. +   0x80, 0x15, 0x30, 0x6A,
  12773. +   0x06, 0xE5, 0x46, 0xA2,
  12774. +   0xE3, 0x80, 0x0C, 0xE5,
  12775. +   0x46, 0x54, 0xF0, 0xFF,
  12776. +   0xBF, 0xF0, 0x03, 0xD3,
  12777. +   0x80, 0x01, 0xC3, 0x92,
  12778. +   0x75, 0x92, 0x74, 0x20,
  12779. +   0x6D, 0x04, 0xA2, 0x6C,
  12780. +   0x80, 0x15, 0x30, 0x6C,
  12781. +   0x06, 0xE5, 0x46, 0xA2,
  12782. +   0xE3, 0x80, 0x0C, 0xE5,
  12783. +   0x46, 0x54, 0xF0, 0xFF,
  12784. +   0xBF, 0xF0, 0x03, 0xD3,
  12785. +   0x80, 0x01, 0xC3, 0x92,
  12786. +   0x71, 0x92, 0x70, 0x90,
  12787. +   0x10, 0x2F, 0xE5, 0x2E,
  12788. +   0xF0, 0xE5, 0x47, 0x64,
  12789. +   0x06, 0x70, 0x46, 0x90,
  12790. +   0x02, 0x29, 0xE0, 0x54,
  12791. +   0xFE, 0xF0, 0xE5, 0x43,
  12792. +   0xC4, 0x54, 0x0F, 0x14,
  12793. +   0x60, 0x14, 0x24, 0xFE,
  12794. +   0x60, 0x1F, 0x24, 0x03,
  12795. +   0x60, 0x03, 0x02, 0x16,
  12796. +   0x35, 0x90, 0x02, 0x28,
  12797. +   0xE0, 0x30, 0x47, 0x0D,
  12798. +   0x80, 0x07, 0x90, 0x02,
  12799. +   0x28, 0xE0, 0x20, 0x47,
  12800. +   0x04, 0x54, 0xFE, 0xF0,
  12801. +   0x22, 0x44, 0x01, 0xF0,
  12802. +   0x22, 0xE5, 0x46, 0x30,
  12803. +   0xE3, 0x04, 0x7F, 0x01,
  12804. +   0x80, 0x02, 0x7F, 0x00,
  12805. +   0x90, 0x02, 0x28, 0xE0,
  12806. +   0x54, 0xFE, 0x4F, 0xF0,
  12807. +   0x22, 0xE5, 0x47, 0x64,
  12808. +   0x07, 0x60, 0x03, 0x02,
  12809. +   0x16, 0x35, 0xF5, 0x27,
  12810. +   0x90, 0x02, 0x29, 0xE0,
  12811. +   0x54, 0xFC, 0xF0, 0xE5,
  12812. +   0x26, 0x14, 0x60, 0x26,
  12813. +   0x14, 0x60, 0x2E, 0x14,
  12814. +   0x60, 0x36, 0x24, 0x03,
  12815. +   0x70, 0x5F, 0xE5, 0x46,
  12816. +   0x13, 0x13, 0x13, 0x54,
  12817. +   0x1F, 0x75, 0xF0, 0x03,
  12818. +   0x84, 0xAF, 0xF0, 0x20,
  12819. +   0x47, 0x04, 0x7E, 0x01,
  12820. +   0x80, 0x02, 0x7E, 0x00,
  12821. +   0xEF, 0x6E, 0x24, 0xFF,
  12822. +   0x80, 0x02, 0xA2, 0x47,
  12823. +   0x92, 0x39, 0xA2, 0x47,
  12824. +   0xB3, 0x92, 0x38, 0x80,
  12825. +   0x3F, 0xE5, 0x46, 0x30,
  12826. +   0xE3, 0x03, 0xD3, 0x80,
  12827. +   0x27, 0xC3, 0x80, 0x24,
  12828. +   0xE5, 0x46, 0x30, 0xE3,
  12829. +   0x0D, 0x54, 0x70, 0xC3,
  12830. +   0x94, 0x60, 0x50, 0x06,
  12831. +   0x7E, 0x00, 0x7F, 0x01,
  12832. +   0x80, 0x04, 0x7E, 0x00,
  12833. +   0x7F, 0x00, 0x20, 0x47,
  12834. +   0x04, 0x7D, 0x01, 0x80,
  12835. +   0x02, 0x7D, 0x00, 0xEF,
  12836. +   0x6D, 0x4E, 0x24, 0xFF,
  12837. +   0x92, 0x38, 0xA2, 0x47,
  12838. +   0xB3, 0x92, 0x39, 0x80,
  12839. +   0x07, 0xA2, 0x47, 0xB3,
  12840. +   0x92, 0x38, 0x92, 0x39,
  12841. +   0x90, 0x02, 0x28, 0xE0,
  12842. +   0x54, 0xFC, 0x45, 0x27,
  12843. +   0xF0, 0x22, 0xE4, 0x90,
  12844. +   0x02, 0x29, 0xF0, 0x30,
  12845. +   0x47, 0x04, 0xAF, 0x45,
  12846. +   0x80, 0x04, 0xE5, 0x45,
  12847. +   0xF4, 0xFF, 0x90, 0x02,
  12848. +   0x28, 0xEF, 0xF0, 0x22,
  12849. +   0x8F, 0x50, 0xD2, 0x59,
  12850. +   0x22, 0x8F, 0x54, 0xD2,
  12851. +   0x58, 0x22, 0xE4, 0xF5,
  12852. +   0x30, 0xC2, 0xAF, 0xE5,
  12853. +   0x51, 0x14, 0x60, 0x4A,
  12854. +   0x14, 0x60, 0x6A, 0x24,
  12855. +   0x02, 0x60, 0x03, 0x02,
  12856. +   0x17, 0x4C, 0xD2, 0x59,
  12857. +   0x75, 0x55, 0x01, 0x20,
  12858. +   0x19, 0x1C, 0x90, 0x02,
  12859. +   0x08, 0xE0, 0x54, 0xFE,
  12860. +   0xF0, 0xE0, 0x20, 0xE1,
  12861. +   0x23, 0x90, 0x04, 0x34,
  12862. +   0xE0, 0xB4, 0x02, 0x1C,
  12863. +   0xA3, 0xE0, 0xB4, 0x02,
  12864. +   0x17, 0xA3, 0xE0, 0xB4,
  12865. +   0x02, 0x12, 0x7F, 0x20,
  12866. +   0x12, 0x16, 0x4C, 0x90,
  12867. +   0x10, 0x04, 0xE0, 0x54,
  12868. +   0xF3, 0xF0, 0x75, 0x51,
  12869. +   0x01, 0x02, 0x17, 0x4C,
  12870. +   0xE5, 0x50, 0x70, 0x06,
  12871. +   0x75, 0x30, 0x03, 0x02,
  12872. +   0x17, 0x4C, 0x90, 0x12,
  12873. +   0x00, 0xE0, 0x54, 0x03,
  12874. +   0x70, 0x15, 0x7F, 0x20,
  12875. +   0x12, 0x16, 0x4C, 0x20,
  12876. +   0x19, 0x07, 0x90, 0x02,
  12877. +   0x08, 0xE0, 0x54, 0xFB,
  12878. +   0xF0, 0x75, 0x51, 0x02,
  12879. +   0x02, 0x17, 0x4C, 0xE5,
  12880. +   0x50, 0x70, 0x02, 0x80,
  12881. +   0x7A, 0x20, 0x19, 0x0F,
  12882. +   0x90, 0x02, 0x08, 0xE0,
  12883. +   0x20, 0xE3, 0x6C, 0x90,
  12884. +   0x04, 0x37, 0xE0, 0x64,
  12885. +   0x22, 0x70, 0x64, 0x90,
  12886. +   0x12, 0x04, 0x74, 0x0A,
  12887. +   0xF0, 0x30, 0x1B, 0x11,
  12888. +   0x90, 0x13, 0x28, 0xE0,
  12889. +   0x54, 0xF0, 0xF0, 0xA3,
  12890. +   0xE0, 0x54, 0xF0, 0xF0,
  12891. +   0xA3, 0xE0, 0x54, 0xFA,
  12892. +   0xF0, 0x20, 0x19, 0x07,
  12893. +   0x90, 0x04, 0x01, 0xE0,
  12894. +   0x44, 0x10, 0xF0, 0xE5,
  12895. +   0x34, 0xF4, 0x90, 0x04,
  12896. +   0x01, 0x60, 0x06, 0xE0,
  12897. +   0x54, 0xFB, 0xF0, 0x80,
  12898. +   0x04, 0xE0, 0x54, 0xF9,
  12899. +   0xF0, 0x20, 0x19, 0x07,
  12900. +   0x90, 0x12, 0x04, 0xE0,
  12901. +   0x44, 0x04, 0xF0, 0xE5,
  12902. +   0x34, 0xF4, 0x60, 0x14,
  12903. +   0x90, 0x01, 0x0D, 0xE0,
  12904. +   0xF5, 0x33, 0xE5, 0x34,
  12905. +   0xD3, 0x94, 0x02, 0x40,
  12906. +   0x07, 0x90, 0x12, 0x04,
  12907. +   0xE0, 0x54, 0xFD, 0xF0,
  12908. +   0x75, 0x30, 0x01, 0x75,
  12909. +   0x55, 0x02, 0xE4, 0xF5,
  12910. +   0x51, 0x80, 0x09, 0xE5,
  12911. +   0x50, 0x70, 0x05, 0x75,
  12912. +   0x30, 0x03, 0xF5, 0x51,
  12913. +   0xE5, 0x30, 0x60, 0x18,
  12914. +   0xC2, 0x01, 0xE4, 0xF5,
  12915. +   0x51, 0xC2, 0x59, 0x20,
  12916. +   0x19, 0x0E, 0xAD, 0x30,
  12917. +   0xAF, 0x40, 0x12, 0x18,
  12918. +   0x2A, 0xE5, 0x30, 0xB4,
  12919. +   0x03, 0x02, 0xD2, 0x03,
  12920. +   0xD2, 0xAF, 0x22, 0xC2,
  12921. +   0xAF, 0x30, 0x01, 0x0E,
  12922. +   0xE4, 0xF5, 0x51, 0xC2,
  12923. +   0x59, 0xC2, 0x01, 0x7D,
  12924. +   0x02, 0xAF, 0x40, 0x12,
  12925. +   0x18, 0x2A, 0xE5, 0x52,
  12926. +   0x14, 0x60, 0x55, 0x14,
  12927. +   0x60, 0x2F, 0x24, 0x02,
  12928. +   0x60, 0x03, 0x02, 0x18,
  12929. +   0x27, 0xE5, 0x34, 0xF4,
  12930. +   0x60, 0x23, 0xE5, 0x34,
  12931. +   0xD3, 0x94, 0x02, 0x40,
  12932. +   0x16, 0x90, 0x12, 0x04,
  12933. +   0xE0, 0x44, 0x02, 0xF0,
  12934. +   0x90, 0x01, 0x0D, 0xE0,
  12935. +   0x20, 0xE3, 0x03, 0x02,
  12936. +   0x18, 0x27, 0x7F, 0x50,
  12937. +   0x12, 0x16, 0x51, 0x75,
  12938. +   0x52, 0x02, 0x75, 0x55,
  12939. +   0x03, 0xE5, 0x34, 0xF4,
  12940. +   0x60, 0x0A, 0xE5, 0x54,
  12941. +   0x70, 0x69, 0x90, 0x01,
  12942. +   0x0D, 0xE5, 0x33, 0xF0,
  12943. +   0x90, 0x12, 0x04, 0xE0,
  12944. +   0x54, 0xFB, 0xF0, 0x7F,
  12945. +   0x20, 0x12, 0x16, 0x51,
  12946. +   0x75, 0x52, 0x01, 0x75,
  12947. +   0x55, 0x03, 0x80, 0x4F,
  12948. +   0xE5, 0x54, 0x70, 0x4B,
  12949. +   0x90, 0x04, 0x01, 0xE0,
  12950. +   0x44, 0x0E, 0xF0, 0x20,
  12951. +   0x19, 0x04, 0xE0, 0x54,
  12952. +   0xEF, 0xF0, 0x90, 0x13,
  12953. +   0x28, 0xE0, 0x44, 0x0F,
  12954. +   0xF0, 0xA3, 0xE0, 0x44,
  12955. +   0x0F, 0xF0, 0xA3, 0xE0,
  12956. +   0x44, 0x05, 0xF0, 0x90,
  12957. +   0x12, 0x04, 0x74, 0x03,
  12958. +   0xF0, 0x20, 0x19, 0x07,
  12959. +   0x90, 0x02, 0x08, 0xE0,
  12960. +   0x44, 0x05, 0xF0, 0x90,
  12961. +   0x10, 0x04, 0xE0, 0x44,
  12962. +   0x0C, 0xF0, 0xE4, 0xF5,
  12963. +   0x52, 0xF5, 0x55, 0x30,
  12964. +   0x02, 0x0B, 0xC2, 0x02,
  12965. +   0x7D, 0x01, 0xAF, 0x41,
  12966. +   0x12, 0x18, 0x2A, 0x80,
  12967. +   0x02, 0xC2, 0x03, 0xD2,
  12968. +   0xAF, 0x22, 0xEF, 0xF4,
  12969. +   0x60, 0x2D, 0xE4, 0xFE,
  12970. +   0x74, 0x14, 0x2E, 0xF5,
  12971. +   0x82, 0xE4, 0x34, 0x70,
  12972. +   0xF5, 0x83, 0xE0, 0xB4,
  12973. +   0xFF, 0x19, 0x74, 0x14,
  12974. +   0x2E, 0xF5, 0x82, 0xE4,
  12975. +   0x34, 0x70, 0xF5, 0x83,
  12976. +   0xEF, 0xF0, 0x74, 0x1C,
  12977. +   0x2E, 0xF5, 0x82, 0xE4,
  12978. +   0x34, 0x70, 0xF5, 0x83,
  12979. +   0xED, 0xF0, 0x22, 0x0E,
  12980. +   0xBE, 0x04, 0xD5, 0x22,
  12981. +   0x22, 0x22, 0x20, 0x19,
  12982. +   0x03, 0x02, 0x19, 0x0F,
  12983. +   0x90, 0x70, 0x80, 0xE0,
  12984. +   0x04, 0xF0, 0x90, 0x04,
  12985. +   0x37, 0xE0, 0x30, 0xE5,
  12986. +   0x03, 0x02, 0x19, 0x0B,
  12987. +   0x90, 0x04, 0x28, 0xE0,
  12988. +   0xF5, 0x31, 0xA3, 0xE0,
  12989. +   0xF5, 0x30, 0xF5, 0x32,
  12990. +   0xE4, 0xF5, 0x37, 0x90,
  12991. +   0x70, 0x81, 0xE0, 0x04,
  12992. +   0xF0, 0x90, 0x70, 0x82,
  12993. +   0xE0, 0x04, 0xF0, 0xE5,
  12994. +   0x32, 0x75, 0xF0, 0x80,
  12995. +   0xA4, 0x24, 0x00, 0xFF,
  12996. +   0xE5, 0xF0, 0x34, 0x80,
  12997. +   0xFE, 0xE5, 0x30, 0x65,
  12998. +   0x32, 0x70, 0x05, 0xFC,
  12999. +   0x7D, 0x18, 0x80, 0x04,
  13000. +   0x7C, 0x00, 0x7D, 0x00,
  13001. +   0xEF, 0x2D, 0xFF, 0xEE,
  13002. +   0x3C, 0xFE, 0x12, 0x19,
  13003. +   0x10, 0x50, 0x25, 0x90,
  13004. +   0x70, 0x83, 0xE0, 0x04,
  13005. +   0xF0, 0x90, 0x01, 0x14,
  13006. +   0xE0, 0x44, 0x02, 0xF0,
  13007. +   0xE0, 0x30, 0xE1, 0x06,
  13008. +   0x90, 0x70, 0x92, 0x74,
  13009. +   0x45, 0xF0, 0x90, 0x70,
  13010. +   0x93, 0xE0, 0x04, 0xF0,
  13011. +   0x90, 0x04, 0x01, 0xE0,
  13012. +   0x90, 0x70, 0x94, 0xF0,
  13013. +   0xE5, 0x32, 0x65, 0x31,
  13014. +   0x60, 0x10, 0xE4, 0x25,
  13015. +   0x32, 0xFF, 0xE4, 0x34,
  13016. +   0x80, 0x8F, 0x82, 0xF5,
  13017. +   0x83, 0xE0, 0xF5, 0x32,
  13018. +   0x80, 0x97, 0x90, 0x04,
  13019. +   0x10, 0x74, 0x01, 0xF0,
  13020. +   0x90, 0x04, 0x28, 0xE5,
  13021. +   0x31, 0xF0, 0xA3, 0xE5,
  13022. +   0x30, 0xF0, 0x90, 0x04,
  13023. +   0x11, 0x74, 0x01, 0xF0,
  13024. +   0x02, 0x18, 0x6A, 0xC2,
  13025. +   0x06, 0xD2, 0x1A, 0x22,
  13026. +   0x90, 0x70, 0x84, 0xE5,
  13027. +   0x37, 0xF0, 0xC3, 0x94,
  13028. +   0x06, 0x50, 0x19, 0x8F,
  13029. +   0x82, 0x8E, 0x83, 0xE0,
  13030. +   0xB4, 0xFF, 0x07, 0x05,
  13031. +   0x37, 0xE4, 0xF5, 0x36,
  13032. +   0x80, 0x59, 0xE4, 0xF5,
  13033. +   0x37, 0x8F, 0x82, 0x8E,
  13034. +   0x83, 0xF0, 0x80, 0x4F,
  13035. +   0xE5, 0x36, 0x75, 0xF0,
  13036. +   0x06, 0x84, 0x74, 0x08,
  13037. +   0x25, 0xF0, 0xF5, 0x82,
  13038. +   0xE4, 0x34, 0x10, 0xF5,
  13039. +   0x83, 0xE0, 0xFD, 0x8F,
  13040. +   0x82, 0x8E, 0x83, 0xE0,
  13041. +   0xFC, 0x6D, 0x70, 0x30,
  13042. +   0x90, 0x70, 0x88, 0xE0,
  13043. +   0x04, 0xF0, 0xA3, 0xE0,
  13044. +   0xFD, 0xD3, 0x95, 0x37,
  13045. +   0x40, 0x02, 0x80, 0x02,
  13046. +   0xAD, 0x37, 0x90, 0x70,
  13047. +   0x89, 0xED, 0xF0, 0x05,
  13048. +   0x37, 0x05, 0x36, 0xE5,
  13049. +   0x36, 0x75, 0xF0, 0x06,
  13050. +   0x84, 0x74, 0x8A, 0x25,
  13051. +   0xF0, 0xF5, 0x82, 0xE4,
  13052. +   0x34, 0x70, 0xF5, 0x83,
  13053. +   0xEC, 0xF0, 0x80, 0x03,
  13054. +   0xE4, 0xF5, 0x37, 0x0F,
  13055. +   0xBF, 0x00, 0x01, 0x0E,
  13056. +   0xEF, 0x54, 0x7F, 0x60,
  13057. +   0x0A, 0xE5, 0x37, 0xC3,
  13058. +   0x94, 0x4E, 0x50, 0x03,
  13059. +   0x02, 0x19, 0x10, 0xE5,
  13060. +   0x37, 0xB4, 0x4E, 0x03,
  13061. +   0xD3, 0x80, 0x01, 0xC3,
  13062. +   0x22, 0x00, 0x00, 0x00,
  13063. +   0x00, 0x00, 0x00, 0x00,
  13064. +   0x00, 0x00, 0x00, 0x00,
  13065. +   0x00, 0x00, 0x00, 0x00,
  13066. +   0x00, 0x00, 0x00, 0x00,
  13067. +   0x00, 0x00, 0x00, 0x00,
  13068. +   0x00, 0x00, 0x00, 0x00,
  13069. +   0x00, 0x00, 0x00, 0x00,
  13070. +   0x00, 0x00, 0x00, 0x00,
  13071. +   0x00, 0x00, 0x00, 0x00,
  13072. +   0x00, 0x00, 0x00, 0x00,
  13073. +   0x00, 0x00, 0x00, 0x00,
  13074. +   0x00, 0x00, 0x00, 0x00,
  13075. +   0x00, 0x00, 0x00, 0x00,
  13076. +   0x00, 0x00, 0x00, 0x00,
  13077. +   0x00, 0x00, 0x00, 0x00,
  13078. +   0x00, 0x00, 0x00, 0x00,
  13079. +   0x00, 0x00, 0x00, 0x00,
  13080. +   0x00, 0x00, 0x00, 0x00,
  13081. +   0x00, 0x00, 0x00, 0x00,
  13082. +   0x00, 0x00, 0x00, 0x00,
  13083. +   0x00, 0x00, 0x00, 0x00,
  13084. +   0x00, 0x00, 0x00, 0x00,
  13085. +   0x00, 0x00, 0x00, 0x00,
  13086. +   0x00, 0x00, 0x00, 0x00,
  13087. +   0x00, 0x00, 0x00, 0x00,
  13088. +   0x00, 0x00, 0x00, 0x00,
  13089. +   0x00, 0x00, 0x00, 0x00,
  13090. +   0x00, 0x00, 0x00, 0x00,
  13091. +   0x00, 0x00, 0x00, 0x00,
  13092. +   0x00, 0x00, 0x00, 0x00,
  13093. +   0x00, 0x00, 0x00, 0x00,
  13094. +   0x00, 0x00, 0x00, 0x00,
  13095. +   0x00, 0x00, 0x00, 0x00,
  13096. +   0x00, 0x00, 0x00, 0x00,
  13097. +   0x00, 0x00, 0x00, 0x00,
  13098. +   0x00, 0x00, 0x00, 0x00,
  13099. +   0x00, 0x00, 0x00, 0x00,
  13100. +   0x00, 0x00, 0x00, 0x00,
  13101. +   0x00, 0x00, 0x00, 0x00,
  13102. +   0x00, 0x00, 0x00, 0x00,
  13103. +   0x00, 0x00, 0x00, 0x00,
  13104. +   0x00, 0x00, 0x00, 0x00,
  13105. +   0x00, 0x00, 0x00, 0x00,
  13106. +   0x00, 0x00, 0x00, 0x00,
  13107. +   0x00, 0x00, 0x00, 0x00,
  13108. +   0x00, 0x00, 0x00, 0x00,
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  13448. +   0x00, 0x00, 0x00, 0x00,
  13449. +   0x00, 0x00, 0x00, 0x00,
  13450. +   0x00, 0x00, 0x00, 0x00,
  13451. +   0x00, 0x00, 0x00, 0x00,
  13452. +   0x00, 0x00, 0x00, 0x00,
  13453. +   0x00, 0x00, 0x00, 0x00,
  13454. +   0x00, 0x00, 0x00, 0x00,
  13455. +   0x00, 0x00, 0x00, 0x00,
  13456. +   0x00, 0x00, 0x00, 0x00,
  13457. +   0x00, 0x00, 0x00, 0x00,
  13458. +   0x00, 0x00, 0x00, 0x00,
  13459. +   0x00, 0x00, 0x00, 0x00,
  13460. +   0x00, 0x00, 0x00, 0x00,
  13461. +   0x00, 0x00, 0x00, 0x00,
  13462. +   0x00, 0x00, 0x00, 0x00,
  13463. +   0x00, 0x00, 0x00, 0x00,
  13464. +   0x00, 0x00, 0x00, 0x00,
  13465. +   0x00, 0x00, 0x00, 0x00,
  13466. +   0x00, 0x00, 0x00, 0x00,
  13467. +   0x00, 0x00, 0x00, 0x00,
  13468. +   0x00, 0x00, 0x00, 0x00,
  13469. +   0x00, 0x0B, 0x94, 0xEB,
  13470. + };
  13471. +
  13472. + #endif /* _RT2860_UCODE_H_ */
  13473. +
  13474. +
  13475. *** /dev/null   Mon Jun  6 17:35:57 2011
  13476. --- rt2860_softc.h  Mon Jun  6 17:39:05 2011
  13477. ***************
  13478. *** 0 ****
  13479. --- 1,441 ----
  13480. +
  13481. + /*-
  13482. +  * Copyright (c) 2009-2010 Alexander Egorenkov <[email protected]>
  13483. +  * Copyright (c) 2009 Damien Bergamini <[email protected]>
  13484. +  *    Bugs, incompatibilities etc added by Matt <[email protected]>
  13485. +  * Permission to use, copy, modify, and distribute this software for any
  13486. +  * purpose with or without fee is hereby granted, provided that the above
  13487. +  * copyright notice and this permission notice appear in all copies.
  13488. +  *
  13489. +  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  13490. +  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  13491. +  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13492. +  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13493. +  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13494. +  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  13495. +  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  13496. +  */
  13497. +
  13498. + #ifndef _RT2860_SOFTC_H_
  13499. + #define _RT2860_SOFTC_H_
  13500. +
  13501. + #include <sys/param.h>
  13502. + #include <sys/sysctl.h>
  13503. + #include <sys/sockio.h>
  13504. + #include <sys/mbuf.h>
  13505. + #include <sys/kernel.h>
  13506. + #include <sys/socket.h>
  13507. + #include <sys/systm.h>
  13508. + #include <sys/malloc.h>
  13509. + #include <sys/taskqueue.h>
  13510. + #include <sys/module.h>
  13511. + #include <sys/bus.h>
  13512. + #include <sys/endian.h>
  13513. +
  13514. + #include <machine/bus.h>
  13515. + #include <machine/resource.h>
  13516. + #include <sys/rman.h>
  13517. +
  13518. + #include <net/bpf.h>
  13519. + #include <net/if.h>
  13520. + #include <net/if_arp.h>
  13521. + #include <net/ethernet.h>
  13522. + #include <net/if_dl.h>
  13523. + #include <net/if_media.h>
  13524. + #include <net/if_types.h>
  13525. +
  13526. + #include <net80211/ieee80211_var.h>
  13527. + #include <net80211/ieee80211_input.h>
  13528. + #include <net80211/ieee80211_radiotap.h>
  13529. + #include <net80211/ieee80211_regdomain.h>
  13530. +
  13531. + #include <dev/ral/rt2860_rxdesc.h>
  13532. + #include <dev/ral/rt2860_txdesc.h>
  13533. + #include <dev/ral/rt2860_txwi.h>
  13534. + #include <dev/ral/rt2860_amrr.h>
  13535. +
  13536. + #define RT2860_SOFTC_LOCK(sc)             mtx_lock(&(sc)->sc_mtx)
  13537. + #define RT2860_SOFTC_UNLOCK(sc)               \
  13538. +       mtx_unlock(&(sc)->sc_mtx)
  13539. + #define   RT2860_SOFTC_ASSERT_LOCKED(sc)          \
  13540. +       mtx_assert(&(sc)->sc_mtx, MA_OWNED)
  13541. +
  13542. + #define RT2860_SOFTC_TX_RING_LOCK(ring)           mtx_lock(&(ring)->lock)
  13543. + #define RT2860_SOFTC_TX_RING_UNLOCK(ring)     \
  13544. +       mtx_unlock(&(ring)->lock)
  13545. + #define   RT2860_SOFTC_TX_RING_ASSERT_LOCKED(ring)    \
  13546. +       mtx_assert(&(ring)->lock, MA_OWNED)
  13547. +
  13548. + #define RT2860_SOFTC_FLAGS_UCODE_LOADED           (1 << 0)
  13549. +
  13550. + #define RT2860_SOFTC_LED_OFF_COUNT            3
  13551. +
  13552. + #define RT2860_SOFTC_RSSI_OFF_COUNT           3
  13553. +
  13554. + #define RT2860_SOFTC_LNA_GAIN_COUNT           4
  13555. +
  13556. + #define RT2860_SOFTC_TXPOW_COUNT          50
  13557. +
  13558. + #define RT2860_SOFTC_TXPOW_RATE_COUNT         5
  13559. +
  13560. + #define RT2860_SOFTC_TSSI_COUNT               9
  13561. +
  13562. + #define RT2860_SOFTC_BBP_EEPROM_COUNT         8
  13563. +
  13564. + #define RT2860_SOFTC_RSSI_COUNT               3
  13565. +
  13566. + #define RT2860_SOFTC_STAID_COUNT          64
  13567. +
  13568. + #define RT2860_SOFTC_TX_RING_COUNT            6
  13569. +
  13570. + #define RT2860_SOFTC_RX_RING_DATA_COUNT           128
  13571. +
  13572. + #define RT2860_SOFTC_MAX_SCATTER          10
  13573. +
  13574. + #define RT2860_SOFTC_TX_RING_DATA_COUNT           256
  13575. + #define RT2860_SOFTC_TX_RING_DESC_COUNT                   \
  13576. +   (RT2860_SOFTC_TX_RING_DATA_COUNT * RT2860_SOFTC_MAX_SCATTER)
  13577. +
  13578. + #define RT2860_SOFTC_RX_RADIOTAP_PRESENT              \
  13579. +   ((1 << IEEE80211_RADIOTAP_FLAGS) |              \
  13580. +    (1 << IEEE80211_RADIOTAP_RATE) |               \
  13581. +    (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |          \
  13582. +    (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |           \
  13583. +    (1 << IEEE80211_RADIOTAP_ANTENNA) |                \
  13584. +    (1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL) |           \
  13585. +    (1 << IEEE80211_RADIOTAP_XCHANNEL))
  13586. +
  13587. + #define RT2860_SOFTC_TX_RADIOTAP_PRESENT              \
  13588. +   ((1 << IEEE80211_RADIOTAP_FLAGS) |              \
  13589. +    (1 << IEEE80211_RADIOTAP_RATE) |               \
  13590. +    (1 << IEEE80211_RADIOTAP_XCHANNEL))
  13591. +
  13592. + struct rt2860_softc_rx_data
  13593. + {
  13594. +   bus_dmamap_t dma_map;
  13595. +   struct mbuf *m;
  13596. + };
  13597. +
  13598. + struct rt2860_softc_rx_ring
  13599. + {
  13600. +   bus_dma_tag_t desc_dma_tag;
  13601. +   bus_dmamap_t desc_dma_map;
  13602. +   bus_addr_t desc_phys_addr;
  13603. +   struct rt2860_rxdesc *desc;
  13604. +   bus_dma_tag_t data_dma_tag;
  13605. +   bus_dmamap_t spare_dma_map;
  13606. +   struct rt2860_softc_rx_data data[RT2860_SOFTC_RX_RING_DATA_COUNT];
  13607. +   int cur;
  13608. + };
  13609. +
  13610. + struct rt2860_softc_tx_data
  13611. + {
  13612. +   bus_dmamap_t dma_map;
  13613. +   struct ieee80211_node *ni;
  13614. +   struct mbuf *m;
  13615. + };
  13616. +
  13617. + struct rt2860_softc_tx_ring
  13618. + {
  13619. +   struct mtx lock;
  13620. +   bus_dma_tag_t desc_dma_tag;
  13621. +   bus_dmamap_t desc_dma_map;
  13622. +   bus_addr_t desc_phys_addr;
  13623. +   struct rt2860_txdesc *desc;
  13624. +   int desc_queued;
  13625. +   int desc_cur;
  13626. +   int desc_next;
  13627. +   bus_dma_tag_t seg0_dma_tag;
  13628. +   bus_dmamap_t seg0_dma_map;
  13629. +   bus_addr_t seg0_phys_addr;
  13630. +   uint8_t *seg0;
  13631. +   bus_dma_tag_t data_dma_tag;
  13632. +   struct rt2860_softc_tx_data data[RT2860_SOFTC_TX_RING_DATA_COUNT];
  13633. +   int data_queued;
  13634. +   int data_cur;
  13635. +   int data_next;
  13636. +   int qid;
  13637. + };
  13638. +
  13639. + struct rt2860_softc_node
  13640. + {
  13641. +   struct ieee80211_node ni;
  13642. +
  13643. +   uint8_t staid;
  13644. +
  13645. +   uint8_t last_rssi[RT2860_SOFTC_RSSI_COUNT];
  13646. +   int8_t last_rssi_dbm[RT2860_SOFTC_RSSI_COUNT];
  13647. + };
  13648. +
  13649. + struct rt2860_softc_vap
  13650. + {
  13651. +   struct ieee80211vap vap;
  13652. +
  13653. +   struct ieee80211_beacon_offsets beacon_offsets;
  13654. +   struct mbuf *beacon_mbuf;
  13655. +   struct rt2860_txwi beacon_txwi;
  13656. +
  13657. +   struct rt2860_amrr amrr;
  13658. +
  13659. +   int (*newstate)(struct ieee80211vap *vap,
  13660. +       enum ieee80211_state nstate, int arg);
  13661. + };
  13662. +
  13663. + struct rt2860_softc_rx_radiotap_header
  13664. + {
  13665. +   struct ieee80211_radiotap_header ihdr;
  13666. +   uint8_t flags;
  13667. +   uint8_t rate;
  13668. +   int8_t dbm_antsignal;
  13669. +   int8_t dbm_antnoise;
  13670. +   uint8_t antenna;
  13671. +   uint8_t antsignal;
  13672. +   uint8_t pad[2];
  13673. +   uint32_t chan_flags;
  13674. +   uint16_t chan_freq;
  13675. +   uint8_t chan_ieee;
  13676. +   int8_t chan_maxpow;
  13677. + } __packed;
  13678. +
  13679. + struct rt2860_softc_tx_radiotap_header
  13680. + {
  13681. +   struct ieee80211_radiotap_header ihdr;
  13682. +   uint8_t flags;
  13683. +   uint8_t rate;
  13684. +   uint8_t pad[2];
  13685. +   uint32_t chan_flags;
  13686. +   uint16_t chan_freq;
  13687. +   uint8_t chan_ieee;
  13688. +   int8_t chan_maxpow;
  13689. + } __packed;
  13690. +
  13691. + struct rt2860_softc
  13692. + {
  13693. +
  13694. +         struct ifnet      *sc_ifp;
  13695. +   device_t        sc_dev;
  13696. +   bus_space_tag_t     sc_st;
  13697. +   bus_space_handle_t  sc_sh;
  13698. +
  13699. +   struct mtx      sc_mtx;
  13700. +
  13701. +   struct callout      watchdog_ch;
  13702. +   int         sc_id;
  13703. +   int         sc_tx_timer;
  13704. +   int                     sc_invalid;
  13705. +   int         sc_debug;
  13706. +
  13707. +
  13708. +   uint32_t flags;
  13709. + /*
  13710. +   int mem_rid;
  13711. +   struct resource *mem;
  13712. +
  13713. +   int irq_rid;
  13714. +   struct resource *irq;
  13715. + */
  13716. +   void *irqh;
  13717. +
  13718. +   int if_flags;
  13719. +
  13720. +   int nvaps;
  13721. +   int napvaps;
  13722. +   int nadhocvaps;
  13723. +   int nstavaps;
  13724. +   int nwdsvaps;
  13725. +
  13726. +   void (*node_cleanup)(struct ieee80211_node *ni);
  13727. +
  13728. +   int (*recv_action)(struct ieee80211_node *ni,
  13729. +       const struct ieee80211_frame *wh,
  13730. +       const uint8_t *frm, const uint8_t *efrm);
  13731. +
  13732. +   int (*send_action)(struct ieee80211_node *ni,
  13733. +       int cat, int act, void *sa);
  13734. +
  13735. +   int (*addba_response)(struct ieee80211_node *ni,
  13736. +       struct ieee80211_tx_ampdu *tap,
  13737. +       int status, int baparamset, int batimeout);
  13738. +
  13739. +   void (*addba_stop)(struct ieee80211_node *ni,
  13740. +       struct ieee80211_tx_ampdu *tap);
  13741. +
  13742. +   int (*ampdu_rx_start)(struct ieee80211_node *ni,
  13743. +       struct ieee80211_rx_ampdu *rap,
  13744. +       int baparamset, int batimeout, int baseqctl);
  13745. +
  13746. +   void (*ampdu_rx_stop)(struct ieee80211_node *ni,
  13747. +       struct ieee80211_rx_ampdu *rap);
  13748. +
  13749. +   struct rt2860_amrr_node amrr_node[RT2860_SOFTC_STAID_COUNT];
  13750. +
  13751. +   uint32_t mac_rev;
  13752. +   uint8_t eeprom_addr_num;
  13753. +   uint16_t eeprom_rev;
  13754. +   uint8_t rf_rev;
  13755. +
  13756. +   uint8_t mac_addr[IEEE80211_ADDR_LEN];
  13757. +
  13758. +   uint8_t ntxpath;
  13759. +   uint8_t nrxpath;
  13760. +
  13761. +   int hw_radio_cntl;
  13762. +   int tx_agc_cntl;
  13763. +   int ext_lna_2ghz;
  13764. +   int ext_lna_5ghz;
  13765. +
  13766. +   uint8_t country_2ghz;
  13767. +   uint8_t country_5ghz;
  13768. +
  13769. +   uint8_t rf_freq_off;
  13770. +
  13771. +   uint8_t led_cntl;
  13772. +   uint16_t led_off[RT2860_SOFTC_LED_OFF_COUNT];
  13773. +
  13774. +   int8_t rssi_off_2ghz[RT2860_SOFTC_RSSI_OFF_COUNT];
  13775. +   int8_t rssi_off_5ghz[RT2860_SOFTC_RSSI_OFF_COUNT];
  13776. +
  13777. +   int8_t lna_gain[RT2860_SOFTC_LNA_GAIN_COUNT];
  13778. +
  13779. +   int8_t txpow1[RT2860_SOFTC_TXPOW_COUNT];
  13780. +   int8_t txpow2[RT2860_SOFTC_TXPOW_COUNT];
  13781. +
  13782. +   int8_t txpow_rate_delta_2ghz;
  13783. +   int8_t txpow_rate_delta_5ghz;
  13784. +   uint32_t txpow_rate_20mhz[RT2860_SOFTC_TXPOW_RATE_COUNT];
  13785. +   uint32_t txpow_rate_40mhz_2ghz[RT2860_SOFTC_TXPOW_RATE_COUNT];
  13786. +   uint32_t txpow_rate_40mhz_5ghz[RT2860_SOFTC_TXPOW_RATE_COUNT];
  13787. +
  13788. +   int tx_agc_cntl_2ghz;
  13789. +   int tx_agc_cntl_5ghz;
  13790. +
  13791. +   uint8_t tssi_2ghz[RT2860_SOFTC_TSSI_COUNT];
  13792. +   uint8_t tssi_step_2ghz;
  13793. +   uint8_t tssi_5ghz[RT2860_SOFTC_TSSI_COUNT];
  13794. +   uint8_t tssi_step_5ghz;
  13795. +
  13796. +   struct
  13797. +   {
  13798. +       uint8_t val;
  13799. +       uint8_t reg;
  13800. +   } __packed bbp_eeprom[RT2860_SOFTC_BBP_EEPROM_COUNT], rf[10];
  13801. +
  13802. +   uint16_t powersave_level;
  13803. +
  13804. +   uint8_t staid_mask[RT2860_SOFTC_STAID_COUNT / NBBY];
  13805. +
  13806. +   uint32_t intr_enable_mask;
  13807. +   uint32_t intr_disable_mask;
  13808. +   uint32_t intr_pending_mask;
  13809. +
  13810. +   struct task rx_done_task;
  13811. +   int rx_process_limit;
  13812. +
  13813. +   struct task tx_done_task;
  13814. +
  13815. +   struct task fifo_sta_full_task;
  13816. +
  13817. +   struct task periodic_task;
  13818. +   struct callout periodic_ch;
  13819. +   unsigned long periodic_round;
  13820. +
  13821. +   struct taskqueue *taskqueue;
  13822. +
  13823. +   struct rt2860_softc_rx_ring rx_ring;
  13824. +
  13825. +   struct rt2860_softc_tx_ring tx_ring[RT2860_SOFTC_TX_RING_COUNT];
  13826. +   int tx_ring_mgtqid;
  13827. +
  13828. +   struct callout tx_watchdog_ch;
  13829. +   int tx_timer;
  13830. +
  13831. +   struct rt2860_softc_rx_radiotap_header rxtap;
  13832. +   struct rt2860_softc_tx_radiotap_header txtap;
  13833. +
  13834. +   /* statistic counters */
  13835. +
  13836. +   unsigned long interrupts;
  13837. +   unsigned long tx_coherent_interrupts;
  13838. +   unsigned long rx_coherent_interrupts;
  13839. +   unsigned long txrx_coherent_interrupts;
  13840. +   unsigned long fifo_sta_full_interrupts;
  13841. +   unsigned long rx_interrupts;
  13842. +   unsigned long rx_delay_interrupts;
  13843. +   unsigned long tx_interrupts[RT2860_SOFTC_TX_RING_COUNT];
  13844. +   unsigned long tx_delay_interrupts;
  13845. +   unsigned long pre_tbtt_interrupts;
  13846. +   unsigned long tbtt_interrupts;
  13847. +   unsigned long mcu_cmd_interrupts;
  13848. +   unsigned long auto_wakeup_interrupts;
  13849. +   unsigned long gp_timer_interrupts;
  13850. +
  13851. +   unsigned long tx_data_queue_full[RT2860_SOFTC_TX_RING_COUNT];
  13852. +
  13853. +   unsigned long tx_watchdog_timeouts;
  13854. +
  13855. +   unsigned long tx_defrag_packets;
  13856. +
  13857. +   unsigned long no_tx_desc_avail;
  13858. +
  13859. +   unsigned long rx_mbuf_alloc_errors;
  13860. +   unsigned long rx_mbuf_dmamap_errors;
  13861. +
  13862. +   unsigned long tx_queue_not_empty[2];
  13863. +
  13864. +   unsigned long tx_beacons;
  13865. +   unsigned long tx_noretryok;
  13866. +   unsigned long tx_retryok;
  13867. +   unsigned long tx_failed;
  13868. +   unsigned long tx_underflows;
  13869. +   unsigned long tx_zerolen;
  13870. +   unsigned long tx_nonagg;
  13871. +   unsigned long tx_agg;
  13872. +   unsigned long tx_ampdu;
  13873. +   unsigned long tx_mpdu_zero_density;
  13874. +   unsigned long tx_ampdu_sessions;
  13875. +
  13876. +   unsigned long rx_packets;
  13877. +   unsigned long rx_ampdu;
  13878. +   unsigned long rx_ampdu_retries;
  13879. +   unsigned long rx_mpdu_zero_density;
  13880. +   unsigned long rx_ampdu_sessions;
  13881. +   unsigned long rx_amsdu;
  13882. +   unsigned long rx_crc_errors;
  13883. +   unsigned long rx_phy_errors;
  13884. +   unsigned long rx_false_ccas;
  13885. +   unsigned long rx_plcp_errors;
  13886. +   unsigned long rx_dup_packets;
  13887. +   unsigned long rx_fifo_overflows;
  13888. +   unsigned long rx_cipher_no_errors;
  13889. +   unsigned long rx_cipher_icv_errors;
  13890. +   unsigned long rx_cipher_mic_errors;
  13891. +   unsigned long rx_cipher_invalid_key_errors;
  13892. +
  13893. +   int tx_stbc;
  13894. +
  13895. +   uint8_t rf24_20mhz;
  13896. +   uint8_t rf24_40mhz;
  13897. +   uint8_t patch_dac;
  13898. +   uint8_t txmixgain_2ghz;
  13899. +   uint8_t txmixgain_5ghz;
  13900. +
  13901. + #ifdef RT2860_DEBUG
  13902. +   int debug;
  13903. + #endif
  13904. + };
  13905. +
  13906. +
  13907. + int rt2860_attach(device_t dev,int ignore);
  13908. +
  13909. + int rt2860_detach(void *xsc);
  13910. +
  13911. + void rt2860_shutdown(void *xsc);
  13912. +
  13913. + void rt2860_suspend(void *xsc);
  13914. +
  13915. + void rt2860_resume(void *xsc);
  13916. +
  13917. + void rt2860_intr(void *arg);
  13918. +
  13919. +
  13920. + #endif /* #ifndef _RT2860_SOFTC_H_ */
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