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  1. Signed-off-by: Peter C. Wallace <pcw@mesanet.com>
  2. ---
  3. src/hal/drivers/mesa-hostmot2/hm2_pci.c | 130 +++++++++++++++++++++++++-----
  4. src/hal/drivers/mesa-hostmot2/hm2_pci.h | 17 +++-
  5. src/hal/drivers/mesa-hostmot2/hostmot2.c | 12 +---
  6. src/hal/drivers/mesa-hostmot2/pins.c | 80 ++++++++++++------
  7. 4 files changed, 175 insertions(+), 64 deletions(-)
  8.  
  9. diff --git a/src/hal/drivers/mesa-hostmot2/hm2_pci.c b/src/hal/drivers/mesa-hostmot2/hm2_pci.c
  10. index 1a4f046..9ea6de1 100644
  11. --- a/src/hal/drivers/mesa-hostmot2/hm2_pci.c
  12. +++ b/src/hal/drivers/mesa-hostmot2/hm2_pci.c
  13. @@ -33,7 +33,7 @@
  14.  
  15. MODULE_LICENSE("GPL");
  16. MODULE_AUTHOR("Sebastian Kuzminsky");
  17. -MODULE_DESCRIPTION("Driver for HostMot2 on the 5i2[023], 4i6[58], and 3x20 Anything I/O boards from Mesa Electronics");
  18. +MODULE_DESCRIPTION("Driver for HostMot2 on the 5i2[01235], 4i6[589], and 3x20 Anything I/O boards from Mesa Electronics");
  19. MODULE_SUPPORTED_DEVICE("Mesa-AnythingIO-5i20"); // FIXME
  20.  
  21.  
  22. @@ -50,10 +50,13 @@ static int comp_id;
  23. static hm2_pci_t hm2_pci_board[HM2_PCI_MAX_BOARDS];
  24. static int num_boards = 0;
  25. static int num_5i20 = 0;
  26. +static int num_5i21 = 0;
  27. static int num_5i22 = 0;
  28. static int num_5i23 = 0;
  29. +static int num_5i25 = 0;
  30. static int num_4i65 = 0;
  31. static int num_4i68 = 0;
  32. +static int num_4i69 = 0;
  33. static int num_3x20 = 0;
  34. static int failed_errno=0; // errno of last failed registration
  35.  
  36. @@ -62,81 +65,113 @@ static struct pci_device_id hm2_pci_tbl[] = {
  37.  
  38. // 5i20
  39. {
  40. - .vendor = 0x10b5,
  41. + .vendor = HM2_PCI_VENDORID_PLX,
  42. .device = HM2_PCI_DEV_PLX9030,
  43. - .subvendor = 0x10b5,
  44. + .subvendor = HM2_PCI_VENDORID_PLX,
  45. .subdevice = HM2_PCI_SSDEV_5I20,
  46. },
  47.  
  48. + // 5i21
  49. + {
  50. + .vendor = HM2_PCI_VENDORID_PLX,
  51. + .device = HM2_PCI_DEV_PLX9054,
  52. + .subvendor = HM2_PCI_VENDORID_PLX,
  53. + .subdevice = HM2_PCI_SSDEV_5I21,
  54. + },
  55. +
  56. // 4i65
  57. {
  58. - .vendor = 0x10b5,
  59. + .vendor = HM2_PCI_VENDORID_PLX,
  60. .device = HM2_PCI_DEV_PLX9030,
  61. - .subvendor = 0x10b5,
  62. + .subvendor = HM2_PCI_VENDORID_PLX,
  63. .subdevice = HM2_PCI_SSDEV_4I65,
  64. },
  65.  
  66. // 5i22-1.0M
  67. {
  68. - .vendor = 0x10b5,
  69. + .vendor = HM2_PCI_VENDORID_PLX,
  70. .device = HM2_PCI_DEV_PLX9054,
  71. - .subvendor = 0x10b5,
  72. + .subvendor = HM2_PCI_VENDORID_PLX,
  73. .subdevice = HM2_PCI_SSDEV_5I22_10,
  74. },
  75.  
  76. // 5i22-1.5M
  77. {
  78. - .vendor = 0x10b5,
  79. + .vendor = HM2_PCI_VENDORID_PLX,
  80. .device = HM2_PCI_DEV_PLX9054,
  81. - .subvendor = 0x10b5,
  82. + .subvendor = HM2_PCI_VENDORID_PLX,
  83. .subdevice = HM2_PCI_SSDEV_5I22_15,
  84. },
  85.  
  86. // 5i23
  87. {
  88. - .vendor = 0x10b5,
  89. + .vendor = HM2_PCI_VENDORID_PLX,
  90. .device = HM2_PCI_DEV_PLX9054,
  91. - .subvendor = 0x10b5,
  92. + .subvendor = HM2_PCI_VENDORID_PLX,
  93. .subdevice = HM2_PCI_SSDEV_5I23,
  94. },
  95.  
  96. + // 5i25
  97. + {
  98. + .vendor = HM2_PCI_VENDORID_MESA,
  99. + .device = HM2_PCI_DEV_MESA5I25,
  100. + .subvendor = HM2_PCI_VENDORID_MESA,
  101. + .subdevice = HM2_PCI_SSDEV_5I25,
  102. + },
  103. +
  104. // 4i68 (old SSID)
  105. {
  106. - .vendor = 0x10b5,
  107. + .vendor = HM2_PCI_VENDORID_PLX,
  108. .device = HM2_PCI_DEV_PLX9054,
  109. - .subvendor = 0x10b5,
  110. + .subvendor = HM2_PCI_VENDORID_PLX,
  111. .subdevice = HM2_PCI_SSDEV_4I68_OLD,
  112. },
  113.  
  114. // 4i68 (new SSID)
  115. {
  116. - .vendor = 0x10b5,
  117. + .vendor = HM2_PCI_VENDORID_PLX,
  118. .device = HM2_PCI_DEV_PLX9054,
  119. - .subvendor = 0x10b5,
  120. + .subvendor = HM2_PCI_VENDORID_PLX,
  121. .subdevice = HM2_PCI_SSDEV_4I68,
  122. },
  123.  
  124. + // 4i69-16
  125. + {
  126. + .vendor = HM2_PCI_VENDORID_PLX,
  127. + .device = HM2_PCI_DEV_PLX9054,
  128. + .subvendor = HM2_PCI_VENDORID_PLX,
  129. + .subdevice = HM2_PCI_SSDEV_4I69_16,
  130. + },
  131. +
  132. + // 4i69-25
  133. + {
  134. + .vendor = HM2_PCI_VENDORID_PLX,
  135. + .device = HM2_PCI_DEV_PLX9054,
  136. + .subvendor = HM2_PCI_VENDORID_PLX,
  137. + .subdevice = HM2_PCI_SSDEV_4I69_25,
  138. + },
  139. +
  140. // 3X20-1.0M
  141. {
  142. - .vendor = 0x10b5,
  143. + .vendor = HM2_PCI_VENDORID_PLX,
  144. .device = HM2_PCI_DEV_PLX9056,
  145. - .subvendor = 0x10b5,
  146. + .subvendor = HM2_PCI_VENDORID_PLX,
  147. .subdevice = HM2_PCI_SSDEV_3X20_10,
  148. },
  149.  
  150. // 3X20-1.5M
  151. {
  152. - .vendor = 0x10b5,
  153. + .vendor = HM2_PCI_VENDORID_PLX,
  154. .device = HM2_PCI_DEV_PLX9056,
  155. - .subvendor = 0x10b5,
  156. + .subvendor = HM2_PCI_VENDORID_PLX,
  157. .subdevice = HM2_PCI_SSDEV_3X20_15,
  158. },
  159.  
  160. // 3X20-2.0M
  161. {
  162. - .vendor = 0x10b5,
  163. + .vendor = HM2_PCI_VENDORID_PLX,
  164. .device = HM2_PCI_DEV_PLX9056,
  165. - .subvendor = 0x10b5,
  166. + .subvendor = HM2_PCI_VENDORID_PLX,
  167. .subdevice = HM2_PCI_SSDEV_3X20_20,
  168. },
  169.  
  170. @@ -387,6 +422,17 @@ static int hm2_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) {
  171. break;
  172. }
  173.  
  174. + case HM2_PCI_SSDEV_5I21: {
  175. + LL_PRINT("discovered 5i21 at %s\n", pci_name(dev));
  176. + rtapi_snprintf(board->llio.name, sizeof(board->llio.name), "hm2_5i21.%d", num_5i21);
  177. + num_5i21 ++;
  178. + board->llio.num_ioport_connectors = 2;
  179. + board->llio.ioport_connector_name[0] = "P1";
  180. + board->llio.ioport_connector_name[1] = "P1";
  181. + board->llio.fpga_part_number = "3s400pq208";
  182. + break;
  183. + }
  184. +
  185. case HM2_PCI_SSDEV_4I65: {
  186. LL_PRINT("discovered 4i65 at %s\n", pci_name(dev));
  187. rtapi_snprintf(board->llio.name, sizeof(board->llio.name), "hm2_4i65.%d", num_4i65);
  188. @@ -430,6 +476,17 @@ static int hm2_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) {
  189. break;
  190. }
  191.  
  192. + case HM2_PCI_SSDEV_5I25: {
  193. + LL_PRINT("discovered 5i25 at %s\n", pci_name(dev));
  194. + rtapi_snprintf(board->llio.name, sizeof(board->llio.name), "hm2_5i25.%d", num_5i25);
  195. + num_5i25 ++;
  196. + board->llio.num_ioport_connectors = 2;
  197. + board->llio.ioport_connector_name[0] = "P3";
  198. + board->llio.ioport_connector_name[1] = "P2";
  199. + board->llio.fpga_part_number = "6slx9pq144";
  200. + break;
  201. + }
  202. +
  203. case HM2_PCI_SSDEV_4I68:
  204. case HM2_PCI_SSDEV_4I68_OLD: {
  205. if (dev->subsystem_device == HM2_PCI_SSDEV_4I68_OLD) {
  206. @@ -447,6 +504,25 @@ static int hm2_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) {
  207. break;
  208. }
  209.  
  210. + case HM2_PCI_SSDEV_4I69_16:
  211. + case HM2_PCI_SSDEV_4I69_25: {
  212. + if (dev->subsystem_device == HM2_PCI_SSDEV_4I69_16) {
  213. + LL_PRINT("discovered 4I69-16 at %s\n", pci_name(dev));
  214. + board->llio.fpga_part_number = "6slx16fg256";
  215. +
  216. + } else {
  217. + LL_PRINT("discovered 4I69-25 at %s\n", pci_name(dev));
  218. + board->llio.fpga_part_number = "6slx25fg256";
  219. + }
  220. + rtapi_snprintf(board->llio.name, sizeof(board->llio.name), "hm2_4i69.%d", num_4i69);
  221. + num_4i69 ++;
  222. + board->llio.num_ioport_connectors = 3;
  223. + board->llio.ioport_connector_name[0] = "P1";
  224. + board->llio.ioport_connector_name[1] = "P3";
  225. + board->llio.ioport_connector_name[2] = "P4";
  226. + break;
  227. + }
  228. +
  229. case HM2_PCI_SSDEV_3X20_10:
  230. case HM2_PCI_SSDEV_3X20_15:
  231. case HM2_PCI_SSDEV_3X20_20: {
  232. @@ -524,6 +600,18 @@ static int hm2_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) {
  233. break;
  234. }
  235.  
  236. + case HM2_PCI_DEV_MESA5I25: {
  237. + // BAR 0 is 64K mem (32 bit)
  238. + board->len = pci_resource_len(dev, 0);
  239. + board->base = ioremap_nocache(pci_resource_start(dev,0), board->len);
  240. + if (board->base == NULL) {
  241. + THIS_ERR("could not map in FPGA address space\n");
  242. + r = -ENODEV;
  243. + goto fail0;
  244. + }
  245. + break;
  246. + }
  247. +
  248. default: {
  249. THIS_ERR("unknown PCI Device ID 0x%04x\n", dev->device);
  250. r = -ENODEV;
  251. diff --git a/src/hal/drivers/mesa-hostmot2/hm2_pci.h b/src/hal/drivers/mesa-hostmot2/hm2_pci.h
  252. index d25b5d3..38f7f73 100644
  253. --- a/src/hal/drivers/mesa-hostmot2/hm2_pci.h
  254. +++ b/src/hal/drivers/mesa-hostmot2/hm2_pci.h
  255. @@ -18,7 +18,7 @@
  256. //
  257.  
  258.  
  259. -#define HM2_PCI_VERSION "0.6"
  260. +#define HM2_PCI_VERSION "0.7"
  261.  
  262. #define HM2_LLIO_NAME "hm2_pci"
  263.  
  264. @@ -32,30 +32,37 @@
  265. // PCI Device IDs and SubSystem Device IDs
  266. //
  267.  
  268. +#define HM2_PCI_VENDORID_PLX (0x10B5)
  269. +#define HM2_PCI_VENDORID_MESA (0x2718)
  270. #define HM2_PCI_DEV_PLX9030 (0x9030)
  271. #define HM2_PCI_DEV_PLX9054 (0x9054)
  272. #define HM2_PCI_DEV_PLX9056 (0x9056)
  273. -
  274. +#define HM2_PCI_DEV_MESA5I25 (0x5125)
  275.  
  276. #define HM2_PCI_SSDEV_5I20 (0x3131)
  277. -
  278. #define HM2_PCI_SSDEV_4I65 (0x3132)
  279.  
  280. +#define HM2_PCI_SSDEV_5I21 (0x3312)
  281. +
  282. #define HM2_PCI_SSDEV_5I22_10 (0x3314)
  283. #define HM2_PCI_SSDEV_5I22_15 (0x3313)
  284.  
  285. #define HM2_PCI_SSDEV_5I23 (0x3315)
  286.  
  287. +#define HM2_PCI_SSDEV_5I25 (0x5125)
  288. +
  289. #define HM2_PCI_SSDEV_4I68 (0x3311)
  290. #define HM2_PCI_SSDEV_4I68_OLD (0x3133)
  291.  
  292. +#define HM2_PCI_SSDEV_4I69_16 (0x3472)
  293. +#define HM2_PCI_SSDEV_4I69_25 (0x3473)
  294. +
  295. #define HM2_PCI_SSDEV_3X20_10 (0x3427)
  296. #define HM2_PCI_SSDEV_3X20_15 (0x3428)
  297. #define HM2_PCI_SSDEV_3X20_20 (0x3429)
  298.  
  299.  
  300.  
  301. -
  302. //
  303. // the LAS?BRD registers are in the PLX 9030
  304. //
  305. @@ -94,7 +101,7 @@
  306.  
  307.  
  308. //
  309. -// PLX 9054 (5i22, 5i23, 4i68)
  310. +// PLX 9054 (5i22, 5i23, 4i68, 4i69)
  311. //
  312. // Note: also used for the PLX 9056 (3x20)
  313. //
  314. diff --git a/src/hal/drivers/mesa-hostmot2/hostmot2.c b/src/hal/drivers/mesa-hostmot2/hostmot2.c
  315. index 70f9b3e..09c2e8f 100644
  316. --- a/src/hal/drivers/mesa-hostmot2/hostmot2.c
  317. +++ b/src/hal/drivers/mesa-hostmot2/hostmot2.c
  318. @@ -320,14 +320,9 @@ static void hm2_print_idrom(hostmot2_t *hm2) {
  319.  
  320. HM2_PRINT(" FPGA Size: %u\n", hm2->idrom.fpga_size);
  321. HM2_PRINT(" FPGA Pins: %u\n", hm2->idrom.fpga_pins);
  322. -
  323. + HM2_PRINT(" Port Width: %u\n", hm2->idrom.port_width);
  324. HM2_PRINT(" IO Ports: %u\n", hm2->idrom.io_ports);
  325. HM2_PRINT(" IO Width: %u\n", hm2->idrom.io_width);
  326. - if (hm2->idrom.port_width == 24) {
  327. - HM2_PRINT(" Port Width: %u\n", hm2->idrom.port_width);
  328. - } else {
  329. - HM2_PRINT(" Port Width: %u ***** Expected 24! Continuing anyway! *****\n", hm2->idrom.port_width);
  330. - }
  331.  
  332. HM2_PRINT(
  333. " Clock Low: %d Hz (%d KHz, %d MHz)\n",
  334. @@ -398,11 +393,6 @@ static int hm2_read_idrom(hostmot2_t *hm2) {
  335. // verify the idrom we read
  336. //
  337.  
  338. - if (hm2->idrom.port_width != 24) {
  339. - HM2_ERR("invalid IDROM PortWidth %d, expected 24, aborting load\n", hm2->idrom.port_width);
  340. - hm2_print_idrom(hm2);
  341. - return -EINVAL;
  342. - }
  343.  
  344. if (hm2->idrom.io_width != (hm2->idrom.io_ports * hm2->idrom.port_width)) {
  345. HM2_ERR(
  346. diff --git a/src/hal/drivers/mesa-hostmot2/pins.c b/src/hal/drivers/mesa-hostmot2/pins.c
  347. index 4e512f7..7ca5264 100644
  348. --- a/src/hal/drivers/mesa-hostmot2/pins.c
  349. +++ b/src/hal/drivers/mesa-hostmot2/pins.c
  350. @@ -290,43 +290,69 @@ void hm2_set_pin_direction(hostmot2_t *hm2, int pin_number, int direction) {
  351.  
  352. void hm2_print_pin_usage(hostmot2_t *hm2) {
  353. int i;
  354. -
  355. + int port, port_pin, mio;
  356. +
  357. HM2_PRINT("%d I/O Pins used:\n", hm2->num_pins);
  358.  
  359. for (i = 0; i < hm2->num_pins; i ++) {
  360. - int port = i / hm2->idrom.port_width;
  361. - int port_pin = ((i % 24) * 2) + 1;
  362. -
  363. + port_pin = i + 1;
  364. + port = i / hm2->idrom.port_width;
  365. + switch (hm2->idrom.port_width) {
  366. + case 24: /* standard 50 pin 24 I/O cards, just the odd pins */
  367. + port_pin = ((i % hm2->idrom.port_width) * 2) + 1;
  368. + break;
  369. + case 17: /* 25 pin 17 I/O parallel port type cards funny DB25 order */
  370. + mio = i % hm2->idrom.port_width;
  371. + if (mio > 7){
  372. + port_pin = mio-3;
  373. + }
  374. + else {
  375. + if (mio & 1){
  376. + port_pin = (mio/2)+14;
  377. + }
  378. + else {
  379. + port_pin = (mio/2)+1;
  380. + }
  381. + }
  382. + break;
  383. + case 32: /* 5I21 punt on this for now */
  384. + port_pin = i+1;
  385. + break;
  386. + default:
  387. + HM2_ERR("hm2_print_pin_usage: invalid port width %d\n", hm2->idrom.port_width);
  388. + }
  389. +
  390. +
  391. if (hm2->pin[i].gtag == hm2->pin[i].sec_tag) {
  392. if(hm2->pin[i].sec_unit & 0x80)
  393. HM2_PRINT(
  394. - " IO Pin %03d (%s-%02d): %s (all), pin %s (%s)\n",
  395. - i,
  396. - hm2->llio->ioport_connector_name[port],
  397. - port_pin,
  398. - hm2_get_general_function_name(hm2->pin[i].gtag),
  399. - hm2_get_pin_secondary_name(&hm2->pin[i]),
  400. - ((hm2->pin[i].sec_pin & 0x80) ? "Output" : "Input")
  401. - );
  402. + " IO Pin %03d (%s-%02d): %s (all), pin %s (%s)\n",
  403. + i,
  404. + hm2->llio->ioport_connector_name[port],
  405. + port_pin,
  406. + hm2_get_general_function_name(hm2->pin[i].gtag),
  407. + hm2_get_pin_secondary_name(&hm2->pin[i]),
  408. + ((hm2->pin[i].sec_pin & 0x80) ? "Output" : "Input")
  409. + );
  410. else
  411. HM2_PRINT(
  412. - " IO Pin %03d (%s-%02d): %s #%d, pin %s (%s)\n",
  413. - i,
  414. - hm2->llio->ioport_connector_name[port],
  415. - port_pin,
  416. - hm2_get_general_function_name(hm2->pin[i].gtag),
  417. - hm2->pin[i].sec_unit,
  418. - hm2_get_pin_secondary_name(&hm2->pin[i]),
  419. - ((hm2->pin[i].sec_pin & 0x80) ? "Output" : "Input")
  420. - );
  421. + " IO Pin %03d (%s-%02d): %s #%d, pin %s (%s)\n",
  422. + i,
  423. + hm2->llio->ioport_connector_name[port],
  424. + port_pin,
  425. + hm2_get_general_function_name(hm2->pin[i].gtag),
  426. + hm2->pin[i].sec_unit,
  427. + hm2_get_pin_secondary_name(&hm2->pin[i]),
  428. + ((hm2->pin[i].sec_pin & 0x80) ? "Output" : "Input")
  429. + );
  430. } else {
  431. HM2_PRINT(
  432. - " IO Pin %03d (%s-%02d): %s\n",
  433. - i,
  434. - hm2->llio->ioport_connector_name[port],
  435. - port_pin,
  436. - hm2_get_general_function_name(hm2->pin[i].gtag)
  437. - );
  438. + " IO Pin %03d (%s-%02d): %s\n",
  439. + i,
  440. + hm2->llio->ioport_connector_name[port],
  441. + port_pin,
  442. + hm2_get_general_function_name(hm2->pin[i].gtag)
  443. + );
  444. }
  445. }
  446. }
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