shiftrows

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-- Company:
-- Engineer:
--
-- Create Date: 10/18/2016 10:34:49 AM
-- Design Name:
-- Module Name: invshift - Behavioral
-- Project Name:
-- Target Devices:
-- Tool Versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity invshift is
    Port ( clk : in STD_LOGIC;
           input : in STD_LOGIC_VECTOR (0 to 127);
           reset : in STD_LOGIC;
           output : out STD_LOGIC_VECTOR (0 downto 127));
end invshift;

architecture Behavioral of invshift is

begin
    process(clk)
    begin
        if(rising_edge(clk)) then
            if(reset = '1') then
                output <= (others => '0');
            else
            output(0 downto 7) <= std_logic_vector(input(0 downto 7));
            output(8 downto 15) <= input(104 downto 111);
            output(16 downto 23) <= input(80 downto 87);
            output(24 downto 31) <= input(56 downto 63);

            output(39 downto 32) <= input(32 downto 39);
            output(40 downto 47) <= input(8 downto 15);
            output(48 downto 55) <= input(112 downto 119);
            output(56 downto 63) <= input(88 downto 95);

            output(64 downto 71) <= input(64 downto 71);
            output(72 downto 79) <= input(40 downto 47);
            output(80 downto 87) <= input(16 downto 23);
            output(88 downto 95) <= input(120 downto 127);

            output(96 downto 103) <= input(96 downto 103);
            output(104 downto 111) <= input(72 downto 79);
            output(112 downto 119) <= input(48 downto 55);
            output(120 downto 127) <= input(24 downto 31);
            end if;
        end if;
    end process;
end Behavioral;