Pastebin launched a little side project called HostCabi.net, check it out ;-)Don't like ads? PRO users don't see any ads ;-)
Guest

ranma

By: a guest on May 15th, 2010  |  syntax: C  |  size: 27.04 KB  |  hits: 111  |  expires: Never
download  |  raw  |  embed  |  report abuse  |  print
Text below is selected. Please press Ctrl+C to copy to your clipboard. (⌘+C on Mac)
  1. /***************************************************************************
  2.  *             __________               __   ___.
  3.  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
  4.  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
  5.  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
  6.  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
  7.  *                     \/            \/     \/    \/            \/
  8.  * $Id: usb-drv-as3525.c 25996 2010-05-13 14:07:59Z ranma $
  9.  *
  10.  * Copyright © 2009 Rafaël Carré
  11.  *
  12.  * This program is free software; you can redistribute it and/or
  13.  * modify it under the terms of the GNU General Public License
  14.  * as published by the Free Software Foundation; either version 2
  15.  * of the License, or (at your option) any later version.
  16.  *
  17.  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18.  * KIND, either express or implied.
  19.  *
  20.  ****************************************************************************/
  21.  
  22. #include "system.h"
  23. #include "usb.h"
  24. #include "usb_drv.h"
  25. #include "as3525.h"
  26. #include "clock-target.h"
  27. #include "ascodec.h"
  28. #include "as3514.h"
  29. #include <stdbool.h>
  30. #include "panic.h"
  31. /*#define LOGF_ENABLE*/
  32. #define LOGF_ENABLE
  33. #include "logf.h"
  34. #include "usb_ch9.h"
  35. #include "usb_core.h"
  36. #include "string.h"
  37.  
  38.  
  39. /* 4 input endpoints */
  40. #define USB_IEP_CTRL(i)     *((volatile unsigned long*) (USB_BASE + 0x0000 + (i*0x20)))
  41. #define USB_IEP_STS(i)      *((volatile unsigned long*) (USB_BASE + 0x0004 + (i*0x20)))
  42. #define USB_IEP_TXFSIZE(i)  *((volatile unsigned long*) (USB_BASE + 0x0008 + (i*0x20)))
  43. #define USB_IEP_MPS(i)      *((volatile unsigned long*) (USB_BASE + 0x000C + (i*0x20)))
  44. #define USB_IEP_DESC_PTR(i) *((volatile unsigned long*) (USB_BASE + 0x0014 + (i*0x20)))
  45. #define USB_IEP_STS_MASK(i) *((volatile unsigned long*) (USB_BASE + 0x0018 + (i*0x20)))
  46.  
  47. /* 4 output endpoints */
  48. #define USB_OEP_CTRL(i)     *((volatile unsigned long*) (USB_BASE + 0x0200 + (i*0x20)))
  49. #define USB_OEP_STS(i)      *((volatile unsigned long*) (USB_BASE + 0x0204 + (i*0x20)))
  50. #define USB_OEP_RXFR(i)     *((volatile unsigned long*) (USB_BASE + 0x0208 + (i*0x20)))
  51. #define USB_OEP_MPS(i)      *((volatile unsigned long*) (USB_BASE + 0x020C + (i*0x20)))
  52. #define USB_OEP_SUP_PTR(i)  *((volatile unsigned long*) (USB_BASE + 0x0210 + (i*0x20)))
  53. #define USB_OEP_DESC_PTR(i) *((volatile unsigned long*) (USB_BASE + 0x0214 + (i*0x20)))
  54. #define USB_OEP_STS_MASK(i) *((volatile unsigned long*) (USB_BASE + 0x0218 + (i*0x20)))
  55.  
  56. #define USB_DEV_CFG             *((volatile unsigned long*) (USB_BASE + 0x0400))
  57. #define USB_DEV_CTRL            *((volatile unsigned long*) (USB_BASE + 0x0404))
  58. #define USB_DEV_STS             *((volatile unsigned long*) (USB_BASE + 0x0408))
  59. #define USB_DEV_INTR            *((volatile unsigned long*) (USB_BASE + 0x040C))
  60. #define USB_DEV_INTR_MASK       *((volatile unsigned long*) (USB_BASE + 0x0410))
  61. #define USB_DEV_EP_INTR         *((volatile unsigned long*) (USB_BASE + 0x0414))
  62. #define USB_DEV_EP_INTR_MASK    *((volatile unsigned long*) (USB_BASE + 0x0418))
  63.  
  64. #define USB_PHY_EP0_INFO        *((volatile unsigned long*) (USB_BASE + 0x0504))
  65. #define USB_PHY_EP1_INFO        *((volatile unsigned long*) (USB_BASE + 0x0508))
  66. #define USB_PHY_EP2_INFO        *((volatile unsigned long*) (USB_BASE + 0x050C))
  67. #define USB_PHY_EP3_INFO        *((volatile unsigned long*) (USB_BASE + 0x0510))
  68. #define USB_PHY_EP4_INFO        *((volatile unsigned long*) (USB_BASE + 0x0514))
  69. #define USB_PHY_EP5_INFO        *((volatile unsigned long*) (USB_BASE + 0x0518))
  70.  
  71. /* 4 channels */
  72. #define USB_HOST_CH_SPLT(i)     *((volatile unsigned long*) (USB_BASE + 0x1000 + (i*0x20)))
  73. #define USB_HOST_CH_STS(i)      *((volatile unsigned long*) (USB_BASE + 0x1004 + (i*0x20)))
  74. #define USB_HOST_CH_TXFSIZE(i)  *((volatile unsigned long*) (USB_BASE + 0x1008 + (i*0x20)))
  75. #define USB_HOST_CH_REQ(i)      *((volatile unsigned long*) (USB_BASE + 0x100C + (i*0x20)))
  76. #define USB_HOST_CH_PER_INFO(i) *((volatile unsigned long*) (USB_BASE + 0x1010 + (i*0x20)))
  77. #define USB_HOST_CH_DESC_PTR(i) *((volatile unsigned long*) (USB_BASE + 0x1014 + (i*0x20)))
  78. #define USB_HOST_CH_STS_MASK(i) *((volatile unsigned long*) (USB_BASE + 0x1018 + (i*0x20)))
  79.  
  80. #define USB_HOST_CFG            *((volatile unsigned long*) (USB_BASE + 0x1400))
  81. #define USB_HOST_CTRL           *((volatile unsigned long*) (USB_BASE + 0x1404))
  82. #define USB_HOST_INTR           *((volatile unsigned long*) (USB_BASE + 0x140C))
  83. #define USB_HOST_INTR_MASK      *((volatile unsigned long*) (USB_BASE + 0x1410))
  84. #define USB_HOST_CH_INTR        *((volatile unsigned long*) (USB_BASE + 0x1414))
  85. #define USB_HOST_CH_INTR_MASK   *((volatile unsigned long*) (USB_BASE + 0x1418))
  86. #define USB_HOST_FRAME_INT      *((volatile unsigned long*) (USB_BASE + 0x141C))
  87. #define USB_HOST_FRAME_REM      *((volatile unsigned long*) (USB_BASE + 0x1420))
  88. #define USB_HOST_FRAME_NUM      *((volatile unsigned long*) (USB_BASE + 0x1424))
  89.  
  90. #define USB_HOST_PORT0_CTRL_STS *((volatile unsigned long*) (USB_BASE + 0x1500))
  91.  
  92. #define USB_OTG_CSR             *((volatile unsigned long*) (USB_BASE + 0x2000))
  93. #define USB_I2C_CSR             *((volatile unsigned long*) (USB_BASE + 0x2004))
  94. #define USB_GPIO_CSR            *((volatile unsigned long*) (USB_BASE + 0x2008))
  95. #define USB_SNPSID_CSR          *((volatile unsigned long*) (USB_BASE + 0x200C))
  96. #define USB_USERID_CSR          *((volatile unsigned long*) (USB_BASE + 0x2010))
  97. #define USB_USER_CONF1          *((volatile unsigned long*) (USB_BASE + 0x2014))
  98. #define USB_USER_CONF2          *((volatile unsigned long*) (USB_BASE + 0x2018))
  99. #define USB_USER_CONF3          *((volatile unsigned long*) (USB_BASE + 0x201C))
  100. #define USB_USER_CONF4          *((volatile unsigned long*) (USB_BASE + 0x2020))
  101. #define USB_USER_CONF5          *((volatile unsigned long*) (USB_BASE + 0x2024))
  102.  
  103. /* write bits 31..16 */
  104. #define USB_GPIO_IDDIG_SEL        (1<<30)
  105. #define USB_GPIO_FS_DATA_EXT      (1<<29)
  106. #define USB_GPIO_FS_SE0_EXT       (1<<28)
  107. #define USB_GPIO_FS_XCVR_OWNER    (1<<27)
  108. #define USB_GPIO_TX_ENABLE_N      (1<<26)
  109. #define USB_GPIO_TX_BIT_STUFF_EN  (1<<25)
  110. #define USB_GPIO_BSESSVLD_EXT     (1<<24)
  111. #define USB_GPIO_ASESSVLD_EXT     (1<<23)
  112. #define USB_GPIO_VBUS_VLD_EXT     (1<<22)
  113. #define USB_GPIO_VBUS_VLD_EXT_SEL (1<<21)
  114. #define USB_GPIO_XO_ON            (1<<20)
  115. #define USB_GPIO_CLK_SEL11        (3<<18)
  116. #define USB_GPIO_CLK_SEL10        (2<<18)
  117. #define USB_GPIO_CLK_SEL01        (1<<18)
  118. #define USB_GPIO_CLK_SEL00        (0<<18)
  119. #define USB_GPIO_XO_EXT_CLK_ENBN  (1<<17)
  120. #define USB_GPIO_XO_REFCLK_ENB    (1<<16)
  121. /* readronly bits 15..0 */
  122. #define USB_GPIO_PHY_VBUSDRV      (1<< 1)
  123. #define USB_GPIO_HS_INTR          (1<< 0)
  124.  
  125. /* Device Control Register and bit fields */
  126. #define USB_DEV_CTRL_REMOTE_WAKEUP      0x00000001  // set remote wake-up signal
  127. #define USB_DEV_CTRL_RDE                0x00000004  // receive dma enable
  128. #define USB_DEV_CTRL_DESC_UPDATE        0x00000010  // descriptor update
  129. #define USB_DEV_CTRL_THRES_ENABLE       0x00000080  // threshold enable
  130. #define USB_DEV_CTRL_BURST_CONTROL      0x00000100  // burst control
  131. #define USB_DEV_CTRL_SOFT_DISCONN       0x00000400  // soft disconnect
  132. #define USB_DEV_CTRL_APCSR_DONE         0x00002000  // app Prog CSR Done
  133. #define USB_DEV_CTRL_MASK_BURST_LEN     0x000f0000  // mask for burst length
  134. #define USB_DEV_CTRL_MASK_THRESHOLD_LEN 0xff000000  // mask for threshold length
  135.  
  136. /* settings of burst length for maskBurstLen_c field */
  137. #define USB_DEV_CTRL_BLEN_1DWORD        0x00000000
  138. #define USB_DEV_CTRL_BLEN_2DWORDS       0x00010000
  139. #define USB_DEV_CTRL_BLEN_4DWORDS       0x00020000
  140. #define USB_DEV_CTRL_BLEN_8DWORDS       0x00030000
  141. #define USB_DEV_CTRL_BLEN_16DWORDS      0x00040000
  142. #define USB_DEV_CTRL_BLEN_32DWORDS      0x00050000
  143. #define USB_DEV_CTRL_BLEN_64DWORDS      0x00060000
  144. #define USB_DEV_CTRL_BLEN_128DWORDS     0x00070000
  145. #define USB_DEV_CTRL_BLEN_256DWORDS     0x00080000
  146. #define USB_DEV_CTRL_BLEN_512DWORDS     0x00090000
  147.  
  148. /* settings of threshold length for maskThresholdLen_c field */
  149. #define USB_DEV_CTRL_TLEN_1DWORD        0x00000000
  150. #define USB_DEV_CTRL_TLEN_HALFMAXSIZE   0x01000000
  151. #define USB_DEV_CTRL_TLEN_4THMAXSIZE    0x02000000
  152. #define USB_DEV_CTRL_TLEN_8THMAXSIZE    0x03000000
  153.  
  154.  
  155. #define USB_DEV_CFG_HS            0x00000000
  156. #define USB_DEV_CFG_FS            0x00000001 /* 30 or 60MHz */
  157. #define USB_DEV_CFG_LS            0x00000002
  158. #define USB_DEV_CFG_FS_48         0x00000003 /* 48MHz */
  159. #define USB_DEV_CFG_REMOTE_WAKEUP 0x00000004
  160. #define USB_DEV_CFG_SELF_POWERED  0x00000008
  161. #define USB_DEV_CFG_SYNC_FRAME    0x00000010
  162. #define USB_DEV_CFG_PI_16BIT      0x00000000
  163. #define USB_DEV_CFG_PI_8BIT       0x00000020
  164. #define USB_DEV_CFG_UNI_DIR       0x00000000
  165. #define USB_DEV_CFG_BI_DIR        0x00000040
  166. #define USB_DEV_CFG_STAT_ACK      0x00000000
  167. #define USB_DEV_CFG_STAT_STALL    0x00000080
  168.  
  169. /* EP Control Register Fields */
  170. #define USB_EP_CTRL_STALL       0x00000001
  171. #define USB_EP_CTRL_FLUSH       0x00000002     /* EP In data fifo Flush */
  172. #define USB_EP_CTRL_SNOOP_MODE  0x00000004     // snoop mode for out endpoint
  173. #define USB_EP_CTRL_PD          0x00000008     /* EP Poll Demand */
  174. #define USB_EP_CTRL_EPTYPE_MASK 0x00000030     // bit 5-4: endpoint types
  175. #define USB_EP_TYPE_CONTROL       0x00000000   // control endpoint
  176. #define USB_EP_TYPE_ISO           0x00000010   // isochronous endpoint
  177. #define USB_EP_TYPE_BULK          0x00000020   // bulk endpoint
  178. #define USB_EP_TYPE_INTERRUPT     0x00000030   // interrupt endpoint
  179. #define USB_EP_CTRL_NAK         0x00000040     /* EP NAK Status */
  180. #define USB_EP_CTRL_SNAK        0x00000080     /* EP Set NAK Bit */
  181. #define USB_EP_CTRL_CNAK        0x00000100     /* EP Clr NAK Bit */
  182. #define USB_EP_CTRL_ACT         0x00000400     /* EP Clr NAK Bit */
  183.  
  184. /*-------------------------*/
  185. /* DMA Related Definitions */
  186. /*-------------------------*/
  187.  
  188. /* Description of the status quadlets */
  189. #define USB_DMA_DESC_BUFF_STS      0x80000000    /* Buffer Status */
  190. #define USB_DMA_DESC_BS_HST_RDY    0x80000000    /* Host Ready */
  191. #define USB_DMA_DESC_BS_DMA_DONE   0x00000000    /* DMA Done */
  192. #define USB_DMA_DESC_ZERO_LEN      0x40000000    /* zero length packet */
  193. #define USB_DMA_DESC_EARY_INTR     0x20000000    /* early interrupt */
  194. #define USB_DMA_DESC_RXTX_STS      0x10000000
  195. #define USB_DMA_DESC_RTS_SUCC      0x00000000    /* Success */
  196. #define USB_DMA_DESC_RTS_BUFERR    0x10000000    /* Buffer Error */
  197. #define USB_DMA_DESC_LAST          0x08000000
  198. #define USB_DMA_DESC_MASK_FRAM_NUM 0x07ff0000    // bits 26-16: frame number for iso
  199. #define USB_DMA_DESC_RXTX_BYTES    0x0000FFFF
  200.  
  201. /* setup descriptor */
  202. #define SETUP_MASK_CONFIG_STAT     0x0fff0000
  203. #define SETUP_MASK_CONFIG_NUM      0x0f000000
  204. #define SETUP_MASK_IF_NUM          0x00f00000
  205. #define SETUP_MASK_ALT_SETNUM      0x000f0000
  206.  
  207.  
  208. struct usb_endpoint
  209. {
  210.     void *buf;
  211.     unsigned int len;
  212.     union
  213.     {
  214.         unsigned int sent;
  215.         unsigned int received;
  216.     };
  217.     bool wait;
  218.     bool busy;
  219. };
  220.  
  221. static struct usb_endpoint endpoints[USB_NUM_ENDPOINTS*2];
  222.  
  223. struct usb_dev_dma_desc {
  224.     volatile int   status;
  225.     volatile int   resv;
  226.     volatile void  *data_ptr;
  227.     volatile void  *next_desc;
  228. };
  229.  
  230. struct usb_dev_setup_buf {
  231.     volatile int   status;
  232.     volatile int   resv;
  233.     volatile int   data1;                      /* first 4 bytes of data */
  234.     volatile int   data2;                      /* last 4 bytes of data */
  235. };
  236.  
  237. static struct usb_dev_dma_desc desc[2];
  238. static struct usb_dev_dma_desc *uc_desc[2];
  239. static struct usb_dev_setup_buf setup_desc;
  240. static char rx_buf[512];
  241. static char tx_buf[512];
  242.  
  243. void usb_attach(void)
  244. {
  245.     usb_enable(true);
  246. }
  247.  
  248. static inline void usb_delay(int delay)
  249. {   //TUNEME : delay is in milliseconds
  250.     delay <<= 14;
  251.     while(delay--) ;
  252. }
  253.  
  254. static void usb_phy_on(void)
  255. {
  256.     /* PHY clock */
  257.     CGU_USB = 1<<5 /* enable */
  258.         | (CLK_DIV(AS3525_PLLB_FREQ, 48000000) / 2) << 2
  259.         | 2; /* source = PLLB */
  260.  
  261.     /* UVDD on */
  262.     ascodec_write(AS3517_USB_UTIL, ascodec_read(AS3517_USB_UTIL) | (1<<4));
  263.     usb_delay(100);
  264.  
  265.     /* reset */
  266.     CCU_SRC = CCU_SRC_USB_AHB_EN|CCU_SRC_USB_PHY_EN;
  267.     CCU_SRL = CCU_SRL_MAGIC_NUMBER;
  268.     usb_delay(1);
  269.     CCU_SRC = CCU_SRC_USB_AHB_EN;
  270.     usb_delay(1);
  271.     CCU_SRC = CCU_SRL = 0;
  272.  
  273.     USB_GPIO_CSR = USB_GPIO_TX_ENABLE_N
  274.                  | USB_GPIO_TX_BIT_STUFF_EN
  275.                  | USB_GPIO_XO_ON
  276.                  | USB_GPIO_CLK_SEL10; /* 0x06180000; */
  277. }
  278.  
  279. static void usb_phy_suspend(void)
  280. {
  281.     USB_GPIO_CSR |= USB_GPIO_ASESSVLD_EXT |
  282.                     USB_GPIO_BSESSVLD_EXT |
  283.                     USB_GPIO_VBUS_VLD_EXT;
  284.     usb_delay(3);
  285.     USB_GPIO_CSR |= USB_GPIO_VBUS_VLD_EXT_SEL;
  286.     usb_delay(10);
  287. }
  288.  
  289. static void usb_phy_resume(void)
  290. {
  291.     USB_GPIO_CSR &= ~(USB_GPIO_ASESSVLD_EXT |
  292.                       USB_GPIO_BSESSVLD_EXT |
  293.                       USB_GPIO_VBUS_VLD_EXT);
  294.     usb_delay(3);
  295.     USB_GPIO_CSR &= ~USB_GPIO_VBUS_VLD_EXT_SEL;
  296.     usb_delay(10);
  297. }
  298.  
  299. #if 0
  300. static void extmem_read_loop(void)
  301. {
  302.     int *extmem_start = (int*)0x30000000;
  303.     int *extmem_end   = (int*)0x301fffff;
  304.     int *ptr = extmem_start;
  305.  
  306.     disable_irq_save();
  307.     GPIOA_PIN(5) = 0;
  308.     GPIOA_PIN(7) = 0;
  309.     while (1) {
  310.         asm volatile ("ldr r0, [%0]     \n"
  311.                       "ldr r0, [%0, #4] \n"
  312.                       "ldr r0, [%0, #8] \n"
  313.                       "ldr r0, [%0, #12]" :: "r"(ptr));
  314.         ptr+=4;
  315.         if (ptr >= extmem_end)
  316.             ptr = extmem_start;
  317.     }
  318. }
  319.  
  320. static void intmem_read_loop(void)
  321. {
  322.     int *intmem_start = (int*)0x00000000;
  323.     int *intmem_end   = (int*)0x0005ffff;
  324.     int *ptr = intmem_start;
  325.  
  326.     disable_irq_save();
  327.     GPIOA_PIN(5) = 0;
  328.     GPIOA_PIN(7) = 0;
  329.     while (1) {
  330.         asm volatile ("ldr r0, [%0]     \n"
  331.                       "ldr r0, [%0, #4] \n"
  332.                       "ldr r0, [%0, #8] \n"
  333.                       "ldr r0, [%0, #12]" :: "r"(ptr));
  334.         ptr+=4;
  335.         if (ptr >= intmem_end)
  336.             ptr = intmem_start;
  337.     }
  338. }
  339. #endif
  340.  
  341. static void setup_desc_init(struct usb_dev_setup_buf *desc)
  342. {
  343.     struct usb_dev_setup_buf *uc_desc = UNCACHED_ADDR(desc);
  344.  
  345.     uc_desc->status = USB_DMA_DESC_BS_HST_RDY;
  346.     uc_desc->resv   = 0xffffffff;
  347.     uc_desc->data1  = 0xffffffff;
  348.     uc_desc->data2  = 0xffffffff;
  349. }
  350.  
  351. static void dma_desc_init(void)
  352. {
  353.     uc_desc[0] = UNCACHED_ADDR(&desc[0]);
  354.     uc_desc[1] = UNCACHED_ADDR(&desc[1]);
  355.  
  356.     uc_desc[0]->status    = USB_DMA_DESC_BS_DMA_DONE | USB_DMA_DESC_LAST | 0x40;
  357.     uc_desc[0]->resv      = 0xffffffff;
  358.     uc_desc[0]->data_ptr  = tx_buf;
  359.     uc_desc[0]->next_desc = &desc[0];
  360.     USB_IEP_DESC_PTR(0)   = (int)&desc[0];
  361.  
  362.     uc_desc[1]->status    = USB_DMA_DESC_BS_HST_RDY | USB_DMA_DESC_LAST | 0x40;
  363.     uc_desc[1]->resv      = 0xffffffff;
  364.     uc_desc[1]->data_ptr  = rx_buf;
  365.     uc_desc[1]->next_desc = &desc[1];
  366.     USB_OEP_DESC_PTR(0)   = (int)&desc[1];
  367.  
  368.     setup_desc_init(&setup_desc);
  369.     USB_OEP_SUP_PTR(0)    = (int)&setup_desc;
  370. }
  371.  
  372. void usb_drv_init(void)
  373. {
  374.     int i;
  375.     for(i = 0; i < USB_NUM_ENDPOINTS * 2; i++)
  376.         endpoints[i].busy = false;
  377.  
  378.     logf("usb_drv_init() !!!!\n");
  379.  
  380.     /* length regulator: normal operation */
  381.     ascodec_write(AS3514_CVDD_DCDC3, ascodec_read(AS3514_CVDD_DCDC3) | 1<<2);
  382.  
  383.     /* AHB part */
  384.     CGU_PERI |= CGU_USB_CLOCK_ENABLE;
  385.  
  386.     /* reset AHB */
  387.     CCU_SRC = CCU_SRC_USB_AHB_EN;
  388.     CCU_SRL = CCU_SRL_MAGIC_NUMBER;
  389.     usb_delay(1);
  390.     CCU_SRC = CCU_SRL = 0;
  391.  
  392.     USB_GPIO_CSR = USB_GPIO_TX_ENABLE_N
  393.                  | USB_GPIO_TX_BIT_STUFF_EN
  394.                  | USB_GPIO_XO_ON
  395.                  | USB_GPIO_CLK_SEL10; /* 0x06180000; */
  396.  
  397.     /* bug workaround according to linux patch */
  398.     USB_DEV_CFG = (USB_DEV_CFG & ~3) | 1; /* full speed */
  399.  
  400.     /* enable soft disconnect */
  401.     USB_DEV_CTRL |= USB_DEV_CTRL_SOFT_DISCONN;
  402.  
  403.     usb_phy_on();
  404.     usb_phy_suspend();
  405.     USB_DEV_CTRL |= USB_DEV_CTRL_SOFT_DISCONN;
  406.  
  407.     USB_IEP_CTRL(0) &= (3 << 4); /* control endpoint */
  408.     USB_IEP_DESC_PTR(0) = 0;
  409.  
  410.     USB_OEP_CTRL(0) &= (3 << 4); /* control endpoint */
  411.     USB_OEP_DESC_PTR(0) = 0;
  412.  
  413.     USB_DEV_INTR_MASK &= ~0x7f;   /* unmask all flags */
  414.     USB_DEV_INTR_MASK |= 0x20;   /* mask SOF */
  415.  
  416.     USB_DEV_CFG = USB_DEV_CFG_STAT_ACK     |
  417.                   USB_DEV_CFG_UNI_DIR      |
  418.                   USB_DEV_CFG_PI_16BIT     |
  419.                   USB_DEV_CFG_HS           |
  420.                   USB_DEV_CFG_SELF_POWERED |
  421.                   0x20200;
  422.  
  423.     USB_DEV_CTRL = USB_DEV_CTRL_BLEN_1DWORD  |
  424.                    USB_DEV_CTRL_DESC_UPDATE  |
  425.                    USB_DEV_CTRL_THRES_ENABLE |
  426.                    USB_DEV_CTRL_RDE          |
  427.                    0x04000000;
  428.  
  429.     USB_DEV_EP_INTR_MASK &= ~((1<<0) | (1<<16));    /* ep 0 */
  430.     USB_DEV_EP_INTR_MASK = 0; /* FIXME: test */
  431.  
  432.     dma_desc_init();
  433.     USB_IEP_MPS(0)      = 0x40;
  434.     USB_IEP_STS_MASK(0) = 0x0040; /* OF: 0x840 */
  435.     USB_IEP_TXFSIZE(0)  = 0x20;
  436.     USB_OEP_MPS(0)      = 0x08000040;
  437.     USB_OEP_STS_MASK(0) = 0x0000; /* OF: 0x1800 */
  438.     USB_OEP_RXFR(0)     = 0x00;
  439.  
  440.     USB_IEP_CTRL(0) |= USB_EP_CTRL_FLUSH|USB_EP_CTRL_SNAK; /* set NAK */
  441.     USB_OEP_CTRL(0) |= USB_EP_CTRL_FLUSH|USB_EP_CTRL_SNAK; /* set NAK */
  442.  
  443.     /* clear pending interrupts */
  444.     USB_DEV_EP_INTR = 0xffffffff;
  445.     USB_DEV_INTR    = 0xffffffff;
  446.  
  447.     VIC_INT_ENABLE = INTERRUPT_USB;
  448.  
  449.     usb_phy_resume();
  450.     USB_DEV_CTRL &= ~USB_DEV_CTRL_SOFT_DISCONN;
  451.  
  452.     USB_GPIO_CSR = USB_GPIO_TX_ENABLE_N
  453.                  | USB_GPIO_TX_BIT_STUFF_EN
  454.                  | USB_GPIO_XO_ON
  455.                  | USB_GPIO_HS_INTR
  456.                  | USB_GPIO_CLK_SEL10; /* 0x06180000; */
  457. }
  458.  
  459. void usb_drv_exit(void)
  460. {
  461.     USB_DEV_CTRL |= (1<<10); /* soft disconnect */
  462.     VIC_INT_EN_CLEAR = INTERRUPT_USB;
  463. #if 0
  464.     CGU_USB &= ~(1<<5);
  465.     CGU_PERI &= ~CGU_USB_CLOCK_ENABLE;
  466.     /* Disable UVDD generating LDO */
  467.     ascodec_write(AS3517_USB_UTIL, ascodec_read(AS3517_USB_UTIL) & ~(1<<4));
  468. #endif
  469.     logf("usb_drv_exit() !!!!\n");
  470. }
  471.  
  472. int usb_drv_port_speed(void)
  473. {
  474.     return (USB_DEV_CFG & 3) ? 0 : 1;
  475. }
  476.  
  477. int usb_drv_request_endpoint(int type, int dir)
  478. {
  479.     /* type 2, dir 128: bulk, in (to host) */
  480.     /* logf("%s(type=%d,dir=%d)\n",__func__,type,dir); */
  481.  
  482.     (void) type;
  483.     int i = dir == USB_DIR_IN ? 2 : 3; /* skip the control ep */
  484.  
  485.     for(; i < USB_NUM_ENDPOINTS * 2; i += 2)
  486.         if(!endpoints[i].busy)
  487.         {
  488.             endpoints[i].busy = true;
  489.             i >>= 1;
  490.             if (dir == USB_DIR_IN) {
  491.                 USB_DEV_EP_INTR_MASK &= ~(1<<i);
  492.                 USB_IEP_CTRL(i) = USB_EP_CTRL_FLUSH|USB_EP_CTRL_CNAK|USB_EP_CTRL_ACT|(type << 4);
  493.             } else {
  494.                 USB_DEV_EP_INTR_MASK &= ~(1<<(16+i));
  495.                 USB_OEP_CTRL(i) = USB_EP_CTRL_FLUSH|USB_EP_CTRL_CNAK|USB_EP_CTRL_ACT|(type << 4);
  496.             }
  497.             return i | dir;
  498.         }
  499.  
  500.     return -1;
  501. }
  502.  
  503. void usb_drv_release_endpoint(int ep)
  504. {
  505.     int i = (ep & 0x7f) * 2;
  506.     /* logf("%s(ep=%d,dir=%d)\n",__func__,ep&0x7f,ep&0x80); */
  507.     if (ep == 0) /* Don't mask control EP? */
  508.         return;
  509.     if(!(ep & USB_DIR_IN))
  510.         i++;
  511.     endpoints[i].busy = false;
  512.     if (ep & USB_DIR_IN) {
  513.         USB_DEV_EP_INTR_MASK |= (1<<ep);
  514.     } else {
  515.         USB_DEV_EP_INTR_MASK |= (1<<(16+ep));
  516.     }
  517. }
  518.  
  519. void usb_drv_cancel_all_transfers(void)
  520. {
  521. }
  522.  
  523. int usb_drv_recv(int ep, void *ptr, int len)
  524. {
  525.     logf("usb_drv_recv(%d,%x,%d)\n", ep, (int)ptr, len);
  526.     if (len == 0) {
  527.         if (ep != 0)
  528.             panicf("%s(%d,%d) zero length?", __func__, ep, len);
  529.         return 0;
  530.     }
  531.     if ((ep & 1) != 1)
  532.         panicf("%s(%d,%x,%d) not out ep?", __func__, ep,(int)ptr,len);
  533.     panicf("%s(%d,%x,%d)", __func__,ep,(int)ptr,len);
  534.  
  535.     (void)ep;(void)ptr;(void)len;
  536.     if(ep >= 2)
  537.         return -1;
  538.  
  539.     return -1;
  540. }
  541.  
  542. volatile int tx_done;
  543.  
  544. static char hexbuf[1025];
  545. static char hextab[16] = "0123456789abcdef";
  546.  
  547. char *make_hex(char *data, int len)
  548. {
  549.     int i;
  550.  
  551.     if (len > 512)
  552.         len = 512;
  553.  
  554.     for (i=0; i<len; i++) {
  555.         hexbuf[2*i  ] = hextab[(unsigned char)data[i] >> 4 ];
  556.         hexbuf[2*i+1] = hextab[(unsigned char)data[i] & 0xf];
  557.     }
  558.     hexbuf[2*i] = 0;
  559.  
  560.     return hexbuf;
  561. }
  562.  
  563. int usb_drv_send(int ep, void *ptr, int len)
  564. {
  565.     logf("usb_drv_send(%d,%x,%d)\n", ep, (int)ptr, len);
  566.     tx_done = 0;
  567.  
  568.     if ((ep & 1) != 0)
  569.         panicf("%s(%d,%x,%d) not in ep?", __func__, ep,(int)ptr,len);
  570.  
  571.     if (ep == 0) {
  572.         void *uc_buf = UNCACHED_ADDR((void*)tx_buf);
  573.         char *data = ptr;
  574.  
  575.         if (len>64)
  576.             panicf("%s(%d,%x,%d) len>64!", __func__, ep,(int)ptr,len);
  577.  
  578.         logf("sending: %s\n", make_hex(data, len));
  579.  
  580.         memcpy(uc_buf, ptr, len);
  581.  
  582.         uc_desc[0]->status    = USB_DMA_DESC_BS_HST_RDY |
  583.                                 USB_DMA_DESC_LAST |
  584.                                 len;
  585.         /* uc_desc[0]->status    = USB_DMA_DESC_BS_HST_RDY | USB_DMA_DESC_LAST | 64; */
  586.         uc_desc[0]->resv      = 0xffffffff;
  587.         uc_desc[0]->next_desc = &desc[0];
  588.         uc_desc[0]->data_ptr  = tx_buf;
  589.  
  590.         /*USB_IEP_TXFSIZE(0)    = len;*/
  591.         USB_IEP_CTRL(0) |= USB_EP_CTRL_FLUSH;
  592.         USB_IEP_DESC_PTR(0)   = (int)&desc[0];
  593.         USB_IEP_STS(0) = USB_IEP_STS(0); /* clear status */
  594.         USB_IEP_CTRL(0) |= USB_EP_CTRL_CNAK|USB_EP_CTRL_PD; /* signal poll demand */
  595.  
  596.         while (!tx_done);
  597.  
  598.         return 0;
  599.     }
  600.     if(ep >= 2)
  601.         panicf("%s(%d,%x,%d)", __func__,ep,(int)ptr,len);
  602.         return -1;
  603.  
  604.     return -1;
  605. }
  606.  
  607. int usb_drv_send_nonblocking(int ep, void *ptr, int len)
  608. {
  609.     logf("usb_drv_send_nonblocking(%d,%x,%d)\n", ep, (int)ptr, len);
  610.     /* TODO */
  611.     return usb_drv_send(ep, ptr, len);
  612. }
  613.  
  614. int irq_4 = 0;
  615. int irq_8 = 0;
  616. int irq_10 = 0;
  617. int irq_20 = 0;
  618. int irq_40 = 0;
  619.  
  620. /* interrupt service routine */
  621. void INT_USB(void)
  622. {
  623.     int ep = USB_DEV_EP_INTR & ~USB_DEV_EP_INTR_MASK; // = 0x10001 (in/out)
  624.     int intr = USB_DEV_INTR & ~USB_DEV_INTR_MASK;
  625.     struct usb_ctrlrequest *req = (void*)UNCACHED_ADDR(&setup_desc.data1);
  626.  
  627.     logf("INT_USB(ep=%x[r:%lx,m:%lx],intr=%x[r:%lx,m:%lx])\n",
  628.          ep, USB_DEV_EP_INTR, USB_DEV_EP_INTR_MASK,
  629.          intr, USB_DEV_INTR, USB_DEV_INTR_MASK);
  630.     GPIOA_PIN(5) ^= 0xff;
  631.  
  632.     if(ep)
  633.     {
  634.         USB_DEV_EP_INTR = ep;
  635.         if(ep & (1<<0)) // ctrl in
  636.         {
  637.             int ep_sts = USB_IEP_STS(0) & ~USB_IEP_STS_MASK(0);
  638.             ep &= ~(1<<0);
  639.             logf("ctrl in, status %lx\n", USB_IEP_STS(0));
  640.             USB_IEP_STS(0) = ep_sts; /* ack */
  641.             if (ep_sts & 0x40) {
  642.                 char *uc_buf = UNCACHED_ADDR((void*)tx_buf);
  643.                 ep_sts &= ~0x40;
  644.                 logf("IN, resending?\n");
  645.                 uc_buf[0] = 0x5a;
  646.                 uc_buf[1] = 0xa5;
  647.                 uc_desc[0]->status   |= USB_DMA_DESC_BS_HST_RDY;
  648.                 /* uc_desc[0]->status    = USB_DMA_DESC_BS_HST_RDY | USB_DMA_DESC_LAST | 64; */
  649.                 USB_IEP_CTRL(0) |= /*USB_EP_CTRL_SNAK|*/USB_EP_CTRL_PD;
  650.             }
  651.             if (ep_sts & 0x400) {
  652.                 ep_sts &= ~0x400;
  653.                 /*USB_IEP_CTRL(0) |= USB_EP_CTRL_SNAK|USB_EP_CTRL_FLUSH*/;
  654.                 USB_IEP_CTRL(0) |= USB_EP_CTRL_SNAK;
  655.                 logf("tx done\n");
  656.                 /* usb_core_transfer_complete(0, USB_DIR_IN, 0, 12); */
  657.                 tx_done = 1;
  658.             }
  659.             if (ep_sts) {
  660.                 panicf("ctrl in 0x%x %x",(int)USB_IEP_STS(0),ep);
  661.             }
  662.         }
  663.         if(ep & (1<<1)) // bulk in
  664.         {
  665.         }
  666.         if(ep & (1<<3)) // intr in
  667.         {
  668.         }
  669.         if(ep & (1<<16)) // ctrl out
  670.         {
  671.             int ep_sts = USB_OEP_STS(0) & ~USB_OEP_STS_MASK(0);
  672.             ep &= ~(1<<16);
  673.             logf("ctrl out, status %lx\n", USB_OEP_STS(0));
  674.                 /*
  675.             struct usb_dev_setup_buf *uc_desc = UNCACHED_ADDR(&setup_desc);
  676.             panicf("ctrl out 0x%x %x %x %x %x",(int)USB_OEP_STS(0),ep,
  677.                         uc_desc->status,
  678.                         uc_desc->data1,
  679.                         uc_desc->data2);
  680.                         */
  681.             USB_OEP_STS(0) = ep_sts; /* ACK */
  682.  
  683.             if (ep_sts & 0x10) {
  684.                 ep_sts &= ~0x10;
  685.                 logf("got out token, status=%08x\n", uc_desc[1]->status);
  686.                 uc_desc[1]->status = USB_DMA_DESC_BS_HST_RDY |
  687.                                      USB_DMA_DESC_LAST | 0x40;
  688.             }
  689.  
  690.             if (ep_sts & 0x20) {
  691.                 static struct usb_ctrlrequest req_copy;
  692.  
  693.                 ep_sts &= ~0x20;
  694.                 req_copy = *req;
  695.                 logf("got setup packet: type=%d req=%d val=%d ind=%d len=%d\n",
  696.                      req->bRequestType,
  697.                      req->bRequest,
  698.                      req->wValue,
  699.                      req->wIndex,
  700.                      req->wLength);
  701.                 usb_core_control_request(&req_copy);
  702.                 setup_desc_init(&setup_desc);
  703.             } else {
  704.                 panicf("in: %x %x %x", setup_desc.status,
  705.                         setup_desc.data1,
  706.                         setup_desc.data2);
  707.             }
  708.         }
  709.         if(ep & (1<<17)) // bulk out
  710.         {
  711.         }
  712.         if (ep)
  713.             panicf("USB : 0x%x", ep);
  714.     }
  715.  
  716.     if(intr)
  717.     {
  718.         USB_DEV_INTR = intr; /* ack interrupt */
  719.         if (intr & 0x4) {/* idle >3ms detected */
  720.             intr &= ~0x4;
  721.             irq_4++;
  722.             logf("usb idle\n");
  723.         }
  724.         if (intr & 0x8) {/* usb reset from host? */
  725.             intr &= ~0x8;
  726.             irq_8++;
  727.             logf("usb reset\n");
  728.         }
  729.         if (intr & 0x10) {/* suspend req from host? */
  730.             intr &= ~0x10;
  731.             irq_10++;
  732.             logf("usb suspend\n");
  733.         }
  734.         if (intr & 0x20) {/* sof received */
  735.             intr &= ~0x20;
  736.             irq_20++;
  737.             logf("sof\n");
  738.         }
  739.         if (intr & 0x40) {/* speed enumeration complete */
  740.             int spd = USB_DEV_STS & 0x00006000;  /* Enumerated Speed */
  741.  
  742.             intr &= ~0x40;
  743.             irq_40++;
  744.             logf("speed enum complete: ");
  745.             if (spd == 0x0000) logf("hs\n");
  746.             if (spd == 0x2000) logf("fs\n");
  747.             if (spd == 0x4000) logf("ls\n");
  748.  
  749.             USB_PHY_EP0_INFO = 0x00200000;
  750.             USB_DEV_CTRL |= USB_DEV_CTRL_APCSR_DONE;
  751.             USB_IEP_CTRL(0) |= USB_EP_CTRL_ACT;
  752.             USB_OEP_CTRL(0) |= USB_EP_CTRL_ACT;
  753.             USB_IEP_CTRL(0) |= USB_EP_CTRL_CNAK|USB_EP_CTRL_FLUSH; /* clear NAK */
  754.             USB_OEP_CTRL(0) |= USB_EP_CTRL_CNAK|USB_EP_CTRL_FLUSH; /* clear NAK */
  755.         }
  756.         if (intr)
  757.             panicf("usb devirq 0x%x", intr);
  758.     }
  759.     USB_DEV_CTRL |= USB_DEV_CTRL_RDE;
  760. }
  761.  
  762. /* (not essential? , not implemented in usb-tcc.c) */
  763. void usb_drv_set_test_mode(int mode)
  764. {
  765.     (void)mode;
  766. }
  767.  
  768. void usb_drv_set_address(int address)
  769. {
  770.     (void)address;
  771. }
  772.  
  773. void usb_drv_stall(int ep, bool stall, bool in)
  774. {
  775.     (void)ep;(void)stall;(void)in;
  776. }
  777.  
  778. bool usb_drv_stalled(int ep, bool in)
  779. {
  780.     (void)ep;(void)in;
  781.     return true;
  782. }