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iocoder

microcode.rtl

iocoder
Jan 24th, 2014
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  1.  
  2. fetch:
  3. [MAR0] <-- [PC0]
  4. [MAR1] <-- [PC1]
  5. [PC] <-- [PC] + 1
  6. [IR0] <-- [[MAR]]
  7.  
  8. If (Opcode = 00xx) Goto direct_branch
  9. If (Opcode = 01xx) Goto indirect_branch
  10. If (Opcode = 1000) Goto load_immediate
  11. If (Opcode = 1001) Goto load_memory_direct
  12. If (Opcode = 1010) Goto load_memory_indirect
  13. If (Opcode = 1011) Goto store_memory_direct
  14. If (Opcode = 1100) Goto store_memory_indirect
  15. If (Opcode = 1101) Goto alu
  16.  
  17. # Direct Branch:
  18. # ---------------
  19. direct_branch:
  20. [MAR0] <-- [PC0]
  21. [MAR1] <-- [PC1]
  22. [PC] <-- [PC] + 1
  23. [IR2] <-- [[MAR]]
  24. [MAR0] <-- [PC0]
  25. [MAR1] <-- [PC1]
  26. [PC] <-- [PC] + 1
  27. [IR3] <-- [[MAR]]
  28. If (EvalCond = 0) Goto fetch
  29. [PC0] <-- [IR2]
  30. [PC1] <-- [IR3]
  31. Goto fetch
  32.  
  33. # Indirect Branch:
  34. # -----------------
  35. indirect_branch:
  36. [MAR0] <-- [PC0]
  37. [MAR1] <-- [PC1]
  38. [PC] <-- [PC] + 1
  39. [IR1] <-- [[MAR]]
  40. If (EvalCond = 0) Goto fetch
  41. [PC0] <-- [REGB]
  42. [PC1] <-- [REGC]
  43. Goto fetch
  44.  
  45. # Load Immediate:
  46. # -----------------
  47. load_immediate:
  48. [MAR0] <-- [PC0]
  49. [MAR1] <-- [PC1]
  50. [PC] <-- [PC] + 1
  51. [REGA] <-- [[MAR]]
  52. Goto fetch
  53.  
  54. # Load from Memory (Direct):
  55. # ---------------------------
  56. load_memory_direct:
  57. [MAR0] <-- [PC0]
  58. [MAR1] <-- [PC1]
  59. [PC] <-- [PC] + 1
  60. [IR2] <-- [[MAR]]
  61. [MAR0] <-- [PC0]
  62. [MAR1] <-- [PC1]
  63. [PC] <-- [PC] + 1
  64. [IR3] <-- [[MAR]]
  65. [MAR0] <-- [IR2]
  66. [MAR1] <-- [IR3]
  67. [REGA] <-- [[MAR]]
  68. Goto fetch
  69.  
  70. # Load from Memory (Indirect):
  71. # -----------------------------
  72. load_memory_indirect:
  73. [MAR0] <-- [PC0]
  74. [MAR1] <-- [PC1]
  75. [PC] <-- [PC] + 1
  76. [IR1] <-- [[MAR]]
  77. [MAR0] <-- [REGB]
  78. [MAR1] <-- [REGC]
  79. [REGA] <-- [[MAR]]
  80. Goto fetch
  81.  
  82. # Store to Memory (Direct):
  83. # -----------------------------
  84. store_memory_direct:
  85. [MAR0] <-- [PC0]
  86. [MAR1] <-- [PC1]
  87. [PC] <-- [PC] + 1
  88. [IR2] <-- [[MAR]]
  89. [MAR0] <-- [PC0]
  90. [MAR1] <-- [PC1]
  91. [PC] <-- [PC] + 1
  92. [IR3] <-- [[MAR]]
  93. [MAR0] <-- [IR2]
  94. [MAR1] <-- [IR3]
  95. [[MAR]] <-- [REGA]
  96. Goto fetch
  97.  
  98. # Store to Memory (Indirect):
  99. # -----------------------------
  100. store_memory_indirect:
  101. [MAR0] <-- [PC0]
  102. [MAR1] <-- [PC1]
  103. [PC] <-- [PC] + 1
  104. [IR1] <-- [[MAR]]
  105. [MAR0] <-- [REGB]
  106. [MAR1] <-- [REGC]
  107. [[MAR]] <-- [REGA]
  108. Goto fetch
  109.  
  110. # ALU Operation:
  111. # ----------------
  112. alu:
  113. [MAR0] <-- [PC0]
  114. [MAR1] <-- [PC1]
  115. [PC] <-- [PC] + 1
  116. [IR1] <-- [[MAR]]
  117. [ALU0] <-- [REGB]
  118. [ALU1] <-- [REGC]
  119. [REGB] <-- [ALU2]
  120. Goto fetch
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