Sindre The Ruthless

---------------------------------------------------------------------------------
-- GForce.vhd
-- [email protected] 23 Feb 2012
-- Simple I2C and G-sensor reader
---------------------------------------------------------------------------------

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;


entity Gforce is
    -- Port ----------------------------------------------------------------
    -- Comes from other files or from the card
    port (
            CLOCK_50 : IN STD_LOGIC;
            KEY        : IN STD_LOGIC_VECTOR(1 DOWNTO 0); -- KEY0 (reset) and KEY1 (begin)
            LED         : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); -- LED0 to LED7


            -- Accelerometer and EEPROM
            G_SENSOR_CS_N : OUT STD_LOGIC;
            G_SENSOR_INT  : IN STD_LOGIC; -- 0 on default
            I2C_SCLK      : OUT STD_LOGIC;
            I2C_SDAT      : INOUT STD_LOGIC; -- 1 on default

                clk_st : OUT STD_LOGIC;
                data1  : OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
        );
end entity;

-- Architecture -------------------------------------------------------------
-- This file only
architecture synth of Gforce is

    -- Counter
   SIGNAL a             : STD_LOGIC_VECTOR(30 DOWNTO 0);
   SIGNAL b             : STD_LOGIC_VECTOR(30 DOWNTO 0);
   SIGNAL clk           : STD_LOGIC;
   SIGNAL clk_signaltap : STD_LOGIC;
   SIGNAL q             : STD_LOGIC;
   SIGNAL step          : STD_LOGIC_VECTOR(10 DOWNTO 0);
   SIGNAL sl_ad         : STD_LOGIC_VECTOR(6 DOWNTO 0) := "0011101";
   SIGNAL reg_ad        : STD_LOGIC_VECTOR(7 DOWNTO 0) := "00101101";
   SIGNAL sclk          : STD_LOGIC;
   SIGNAL sdat          : STD_LOGIC;

begin


      step <= "00000000000";
      q <= '0';




   PROCESS (CLOCK_50)
   BEGIN
      IF (CLOCK_50'EVENT AND CLOCK_50 = '1') THEN
         IF (a = "0000000000011110100001001000000") THEN -- Clock for Slave with sample 2a
            clk <= NOT(clk);
            a <= "0000000000000000000000000000001";
         ELSE
            a <= a + "0000000000000000000000000000001";
         END IF;

            -- Signaltap begin
         IF (b = "0000000000001111010000100100000") THEN -- Clock for Signaltap2
            clk_signaltap <= NOT(clk_signaltap);
            b <= "0000000000000000000000000000001";
         ELSE
            b <= b + "0000000000000000000000000000001";
         END IF;
      END IF;
   END PROCESS;


   -- Signaltap end
   PROCESS (CLOCK_50, KEY(0), KEY(1))
   BEGIN
      IF (CLOCK_50'EVENT AND CLOCK_50 = '1') THEN -- Trigger Condition

            IF KEY(0) = '0' AND  KEY(1) = '0' THEN
                q <= q;
            ELSE
                IF KEY(0) = '1' AND  KEY(1) = '0' THEN
                    q <= '1'; -- Set
                ELSE
                    IF KEY(0) = '0' AND  KEY(1) = '1' THEN
                        q <= '0'; -- Reset
                    END IF;
                END IF;
            END IF;
      END IF;
   END PROCESS;



   PROCESS (clk) BEGIN
      IF (clk'EVENT AND clk = '1') THEN
         IF (q = '1') THEN
            CASE step IS
               WHEN "00000000000" => -- 0
                        -- Initial
                  sclk <= '1';
                  sdat <= '1';
                  step <= "00000000001";
               WHEN "00000000001" => -- 1
                        -- 1.Start
                  sclk <= '1';
                  sdat <= '0';
                  step <= "00000000010";
               WHEN "00000000010" => -- 2
                  sclk <= '0';
                  sdat <= '0';
                  step <= "00000000011";
                    WHEN "00000000011" => -- 3
                        -- 2.Slave add
                  sclk <= '0';
                  sdat <= sl_ad(6);
                  step <= "00000000100";
               WHEN "00000000100" => -- 4
                  sclk <= '1';
                  sdat <= sl_ad(6);
                  step <= "00000000101";
               WHEN "00000000101" => -- 5
                  sclk <= '0';
                  sdat <= sl_ad(5);
                  step <= "00000000110";
                    WHEN "00000000110" => -- 6
                  sclk <= '1';
                  sdat <= sl_ad(5);
                  step <= "00000000111";
               WHEN "00000000111" => -- 7
                  sclk <= '0';
                  sdat <= sl_ad(4);
                  step <= "00000001000";
               WHEN "00000001000" => -- 8
                  sclk <= '1';
                  sdat <= sl_ad(4);
                  step <= "00000001001";
               WHEN "00000001001" => -- 9
                  sclk <= '0';
                  sdat <= sl_ad(3);
                  step <= "00000001010";
               WHEN "00000001010" => -- 10
                  sclk <= '1';
                  sdat <= sl_ad(3);
                  step <= "00000001011";
                    WHEN "00000001011" => -- 11
                  sclk <= '0';
                  sdat <= sl_ad(2);
                  step <= "00000001100";
               WHEN "00000001100" => -- 12
                  sclk <= '1';
                  sdat <= sl_ad(2);
                  step <= "00000001101";
               WHEN "00000001101" => -- 13
                  sclk <= '0';
                  sdat <= sl_ad(1);
                  step <= "00000001110";
               WHEN "00000001110" => -- 14
                  sclk <= '1';
                  sdat <= sl_ad(1);
                  step <= "00000001111";
               WHEN "00000001111" => -- 15
                  sclk <= '0';
                  sdat <= sl_ad(0);
                  step <= "00000010000";
               WHEN "00000010000" => -- 16
                  sclk <= '1';
                  sdat <= sl_ad(0);
                  step <= "00000010001";
                    WHEN "00000010001" => -- 17
                        -- 3.sdat = 0
                  sclk <= '0';
                  sdat <= '0';
                  step <= "00000010010";
               WHEN "00000010010" => -- 18
                  sclk <= '1';
                  sdat <= '0';
                  step <= "00000010011";
                    WHEN "00000010011" => -- 19
                        -- 4.Acknowledge
                  sclk <= '0';
                  sdat <= 'Z';
                  step <= "00000010100";
               WHEN "00000010100" => -- 20
                  sclk <= '1';
                  sdat <= 'Z';
                  IF (I2C_SDAT = '1') THEN
                     step <= "00000010100";
                  ELSE
                     step <= "00000010101";
                  END IF;
                    WHEN "00000010101" => -- 21
                        -- 5.Reg add
                  sclk <= '0';
                  sdat <= reg_ad(7);
                  step <= "00000010110";
               WHEN "00000010110" => -- 22
                  sclk <= '1';
                  sdat <= reg_ad(7);
                  step <= "00000010111";
               WHEN "00000010111" => -- 23
                  sclk <= '0';
                  sdat <= reg_ad(6);
                  step <= "00000011000";
               WHEN "00000011000" => -- 24
                  sclk <= '1';
                  sdat <= reg_ad(6);
                  step <= "00000011001";
               WHEN "00000011001" => -- 25
                  sclk <= '0';
                  sdat <= reg_ad(5);
                  step <= "00000011010";
               WHEN "00000011010" => -- 26
                  sclk <= '1';
                  sdat <= reg_ad(5);
                  step <= "00000011011";
                    WHEN "00000011011" => -- 27
                  sclk <= '0';
                  sdat <= reg_ad(4);
                  step <= "00000011100";
               WHEN "00000011100" => -- 28
                  sclk <= '1';
                  sdat <= reg_ad(4);
                  step <= "00000011101";
               WHEN "00000011101" => -- 29
                  sclk <= '0';
                  sdat <= reg_ad(3);
                  step <= "00000011110";
               WHEN "00000011110" => -- 30
                  sclk <= '1';
                  sdat <= reg_ad(3);
                  step <= "00000011111";
                    WHEN "00000011111" => -- 31
                  sclk <= '0';
                  sdat <= reg_ad(2);
                  step <= "00000100000";
               WHEN "00000100000" => -- 32
                  sclk <= '1';
                  sdat <= reg_ad(2);
                  step <= "00000100001";
               WHEN "00000100001" => -- 33
                  sclk <= '0';
                  sdat <= reg_ad(1);
                  step <= "00000100010";
               WHEN "00000100010" => -- 34
                  sclk <= '1';
                  sdat <= reg_ad(1);
                  step <= "00000100011";
               WHEN "00000100011" => -- 35
                  sclk <= '0';
                  sdat <= reg_ad(0);
                  step <= "00000100100";
               WHEN "00000100100" => -- 36
                  sclk <= '1';
                  sdat <= reg_ad(0);
                  step <= "00000100101";
                    WHEN "00000100101" => -- 37
                        -- 6.Acknowledge
                  sclk <= '0';
                  sdat <= 'Z';
                  step <= "00000100110";
               WHEN "00000100110" => -- 38
                  sclk <= '1';
                  sdat <= 'Z';
                  IF (I2C_SDAT = '1') THEN
                     step <= "00000100110";
                  ELSE
                     step <= "00000100111";
                  END IF;
                    WHEN "00000100111" => -- 39
                        -- 7.Start
                  sclk <= '0';
                  sdat <= '0';
                  step <= "00000101000";
               WHEN "00000101000" => -- 40
                  sclk <= '1';
                  sdat <= '1';
                  step <= "00000101001";
               WHEN "00000101001" => -- 41
                  sclk <= '1';
                  sdat <= '0';
                  step <= "00000101010";
               WHEN "00000101010" => -- 42
                  sclk <= '0';
                  sdat <= '0';
                  step <= "00000101101"; -- jum to step = 45

                    WHEN "00000101101" => -- 45
                        -- 8.Slave Add
                  sclk <= '0';
                  sdat <= sl_ad(6);
                  step <= "00000101110";
               WHEN "00000101110" => -- 46
                  sclk <= '1';
                  sdat <= sl_ad(6);
                  step <= "00000101111";
               WHEN "00000101111" => -- 47
                  sclk <= '0';
                  sdat <= sl_ad(5);
                  step <= "00000110000";
               WHEN "00000110000" => -- 48
                  sclk <= '1';
                  sdat <= sl_ad(5);
                  step <= "00000110001";
               WHEN "00000110001" => -- 49
                  sclk <= '0';
                  sdat <= sl_ad(4);
                  step <= "00000110010";
               WHEN "00000110010" => -- 50
                  sclk <= '1';
                  sdat <= sl_ad(4);
                  step <= "00000110011";
               WHEN "00000110011" => -- 51
                  sclk <= '0';
                  sdat <= sl_ad(3);
                  step <= "00000110100";
               WHEN "00000110100" => -- 52
                  sclk <= '1';
                  sdat <= sl_ad(3);
                  step <= "00000110101";
               WHEN "00000110101" => -- 53
                  sclk <= '0';
                  sdat <= sl_ad(2);
                  step <= "00000110110";
               WHEN "00000110110" => --54
                  sclk <= '1';
                  sdat <= sl_ad(2);
                  step <= "00000110111";
                    WHEN "00000110111" => -- 55
                  sclk <= '0';
                  sdat <= sl_ad(1);
                  step <= "00000111000";
               WHEN "00000111000" => -- 56
                  sclk <= '1';
                  sdat <= sl_ad(1);
                  step <= "00000111001";
               WHEN "00000111001" => -- 57
                  sclk <= '0';
                  sdat <= sl_ad(0);
                  step <= "00000111010";
               WHEN "00000111010" => -- 58
                  sclk <= '1';
                  sdat <= sl_ad(0);
                  step <= "00000111011";
                    WHEN "00000111011" => -- 59
                        -- 9.sdat = 1
                  sclk <= '0';
                  sdat <= '1';
                  step <= "00000111100";
               WHEN "00000111100" => -- 60
                  sclk <= '1';
                  sdat <= '1';
                  step <= "00000111101";


               WHEN "00000111101" => -- 61
                        -- 10.Acknowledge
                  sclk <= '0';
                  sdat <= 'Z';
                  step <= "00000111110";
               WHEN "00000111110" => -- 62
                  sclk <= '1';
                  sdat <= 'Z';
                  IF (I2C_SDAT = '1') THEN
                     step <= "00000111110";
                  ELSE
                     step <= "00000111111";
                  END IF;

                    WHEN "00000111111" => -- 63
                        -- 11.Databyte#1
                  sclk <= '0';
                  sdat <= 'Z';
                  step <= "00001000000";
               WHEN "00001000000" => -- 64
                  sclk <= '1';
                  sdat <= 'Z';
                  -- data1(7) <= I2C_sdat; -- SOMETHING WRONG HERE CANT RESOLVE MULTIPLE CONSTANT DRIVERS FRO NET "q" (line 54)
                  step <= "00001000001";
                     WHEN "00001000001" => -- 65
                  sclk <= '0';
                  sdat <= 'Z';
                  step <= "00001000010";
               WHEN "00001000010" => -- 66
                  sclk <= '1';
                  sdat <= 'Z';
                  --data1(6) <= I2C_sdat; -- SOMETHING WRONG HERE
                  step <= "00001000011";
               WHEN "00001000011" => -- 67
                  sclk <= '0';
                  sdat <= 'Z';
                  step <= "00001000100";
               WHEN "00001000100" => -- 68
                  sclk <= '1';
                  sdat <= 'Z';
                  --data1(5) <= I2C_sdat; -- SOMETHING WRONG HERE
                  step <= "00001000101";
               WHEN "00001000101" => -- 69
                  sclk <= '0';
                  sdat <= 'Z';
                  step <= "00001000110";
                    WHEN "00001000110" => -- 70
                  sclk <= '1';
                  sdat <= 'Z';
                  --data1(4) <= I2C_sdat;-- SOMETHING WRONG HERE
                  step <= "00001000111";
               WHEN "00001000111" => -- 71
                  sclk <= '0';
                  sdat <= 'Z';
                  step <= "00001001000";
               WHEN "00001001000" => -- 72
                  sclk <= '1';
                  sdat <= 'Z';
                  --data1(3) <= I2C_sdat;-- SOMETHING WRONG HERE
                  step <= "00001001001";
               WHEN "00001001001" => -- 73
                  sclk <= '0';
                  sdat <= 'Z';
                  step <= "00001001010";
               WHEN "00001001010" => -- 74
                  sclk <= '1';
                  sdat <= 'Z';
                  --data1(2) <= I2C_sdat;-- SOMETHING WRONG HERE
                  step <= "00001001011";
                    WHEN "00001001011" => -- 75
                  sclk <= '0';
                  sdat <= 'Z';
                  step <= "00001001100";
               WHEN "00001001100" => -- 76
                  sclk <= '1';
                  sdat <= 'Z';
                  --data1(1) <= I2C_sdat;- SOMETHING WRONG HERE
                  step <= "00001001101";
               WHEN "00001001101" => -- 77
                  sclk <= '0';
                  sdat <= 'Z';
                  step <= "00001001110";
               WHEN "00001001110" => -- 78
                  sclk <= '1';
                  sdat <= 'Z';
                  --data1(0) <= I2C_sdat;- SOMETHING WRONG HERE
                  step <= "00001001111";

                    WHEN "00001001111" => -- 79
                        -- 12.Acknowledge
                  sclk <= '0';
                  sdat <= 'Z';
                  step <= "00001010000";
               WHEN "00001010000" => -- 80
                  sclk <= '1';
                  sdat <= 'Z';
                  IF (I2C_sdat = '1') THEN
                     step <= "00001010000";
                  ELSE
                     step <= "00001010001";
                  END IF;
               WHEN "00001010001" => -- 81
                        -- 13.Stop
                  sclk <= '1';
                  sdat <= '0';
                  step <= "00001010010";
               WHEN "00001010010" => -- 82
                  sclk <= '1';
                  sdat <= '1';
                  step <= "00001010011";
               WHEN "00001010011" => -- 83
                  sclk <= '1';
                  sdat <= '1';
                    WHEN OTHERS =>
            END CASE;
         END IF;
      END IF;
   END PROCESS;

    --I2C_SCLK <= sclk;
   --I2C_SDAT <= sdat;
   --clk_st <= clk_signaltap;

end synth;