#include <avr/io.h>
#include <util/delay.h>
#include <avr/interrupt.h>
#include <stdlib.h>

#ifndef F_CPU
#warning "F_CPU war noch nicht definiert, wird nun nachgeholt mit 8000000"
#define F_CPU 8000000UL
#endif

#define BAUD 9600UL

//Berechnungen
#define UBRR_VAL ((F_CPU+BAUD*8)/(BAUD*16)-1)   // clever runden
#define BAUD_REAL (F_CPU/(16*(UBRR_VAL+1)))     // Reale Baudrate
#define BAUD_ERROR ((BAUD_REAL*1000)/BAUD) // Fehler in Promille, 1000 = kein Fehler.

#if ((BAUD_ERROR<990) || (BAUD_ERROR>1010))
#error Systematischer Fehler der Baudrate grösser 1% und damit zu hoch!
#endif


#define DD_MOSI 5
#define DD_MISO 6
#define DD_SCK 7
#define DDR_SPI DDRB

#define REG_SYNCVALUE1    0x2F

void init_UART(void)
{
    UBRRH = UBRR_VAL >> 8;
    UBRRL = UBRR_VAL & 0xFF;

    UCSRB |= (1<<TXEN);                           // UART TX einschalten
    UCSRC = (1<<URSEL)|(1 << UCSZ1)|(1 << UCSZ0); // Asynchron 8N1
}

int uart_putc(unsigned char c)
{
    while (!(UCSRA & (1<<UDRE)))
    {
    }

    UDR = c;
    return 0;
}

void uart_puts (char *s)
{
    while (*s)
    {
        uart_putc(*s);
        s++;
    }
}

void uart_puts2 ( unsigned char s[] )
{
    int i = 0;
    while ( s[i] != 0x00 )
    {
        uart_putc(s[i]);
        i++;
    }
}

void SPI_MasterInit(void)
{

    DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(0<<DD_MISO);
    SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(0<<DORD)|(0<<CPOL)|(0<<CPHA);

}



uint8_t spi_transfer(uint8_t val)
{

    SPDR = val;

    while(!(SPSR & (1<<SPIF)));

    return SPDR;
}


int main()
{
    uint8_t wr = 0x55;
    char s[8];

    init_UART();
    uart_puts("-----Begin------\r\n\r\n");

    SPI_MasterInit();

    DDRD |= (1<<PD7);
    PORTD |= (1<<PD7); // SS



    while(1)
    {
        PORTD &= ~(1<<PD7);
        spi_transfer(REG_SYNCVALUE1 | 0x80);
        spi_transfer(wr);
        PORTD |= (1<<PD7);

        PORTD &= ~(1<<PD7);
        spi_transfer(REG_SYNCVALUE1 & 0x7F);
        uint8_t resu = spi_transfer(0);
        PORTD |= (1<<PD7);

        uart_puts( itoa(s,resu, 10) );

        _delay_ms(5000);
    }
    return 0;
}