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olimex_stm32_h103_maple_ide.patch

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  1. diff -Nur maple-ide-v0.0.12/hardware/leaflabs/boards.txt maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/boards.txt
  2. --- maple-ide-v0.0.12/hardware/leaflabs/boards.txt  2011-09-13 12:52:36.000000000 +0200
  3. +++ maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/boards.txt    2013-02-06 10:12:24.268843386 +0100
  4. @@ -197,3 +197,27 @@
  5.  maple_nativeRAM.build.density=STM32_HIGH_DENSITY
  6.  maple_nativeRAM.build.error_led_port=GPIOC
  7.  maple_nativeRAM.build.error_led_pin=15
  8. +
  9. +##############################################################
  10. +olimex_stm32_h103.name=OLIMEX STM32-H103 to JTAG
  11. +
  12. +olimex_stm32_h103.upload.file_type=bin
  13. +olimex_stm32_h103.upload.maximum_size=128000
  14. +olimex_stm32_h103.upload.ram.maximum_size=20000
  15. +olimex_stm32_h103.upload.flash.maximum_size=128000
  16. +olimex_stm32_h103.upload.usbID=1EAF:0003
  17. +olimex_stm32_h103.upload.altID=0
  18. +olimex_stm32_h103.upload.uploader=dfu-util
  19. +olimex_stm32_h103.upload.auto_reset=true
  20. +
  21. +olimex_stm32_h103.build.board=olimex_stm32_h103
  22. +olimex_stm32_h103.build.mcu=STM32F103RB
  23. +olimex_stm32_h103.build.family=cortex-m3
  24. +olimex_stm32_h103.build.f_cpu=72000000L
  25. +olimex_stm32_h103.build.core=maple
  26. +olimex_stm32_h103.build.vect=VECT_TAB_FLASH
  27. +olimex_stm32_h103.build.linker=olimex_stm32_h103/jtag.ld
  28. +olimex_stm32_h103.build.using=armcompiler
  29. +olimex_stm32_h103.build.density=STM32_MEDIUM_DENSITY
  30. +olimex_stm32_h103.build.error_led_port=GPIOC
  31. +olimex_stm32_h103.build.error_led_pin=12
  32. diff -Nur maple-ide-v0.0.12/hardware/leaflabs/cores/maple/boards.h maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/cores/maple/boards.h
  33. --- maple-ide-v0.0.12/hardware/leaflabs/cores/maple/boards.h    2011-09-13 12:52:36.000000000 +0200
  34. +++ maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/cores/maple/boards.h  2013-02-06 09:47:33.672320050 +0100
  35. @@ -127,6 +127,8 @@
  36.  #include "maple_native.h"
  37.  #elif defined(BOARD_maple_mini)
  38.  #include "maple_mini.h"
  39. +#elif defined(BOARD_olimex_stm32_h103)
  40. +#include "olimex_stm32_h103.h"
  41.  #elif defined(BOARD_maple_RET6)
  42.  /*
  43.   * **NOT** MAPLE REV6.  This the **Maple RET6 EDITION**, which is a
  44. diff -Nur maple-ide-v0.0.12/hardware/leaflabs/cores/maple/olimex_stm32_h103/flash.ld maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/cores/maple/olimex_stm32_h103/flash.ld
  45. --- maple-ide-v0.0.12/hardware/leaflabs/cores/maple/olimex_stm32_h103/flash.ld  1970-01-01 01:00:00.000000000 +0100
  46. +++ maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/cores/maple/olimex_stm32_h103/flash.ld    2013-02-06 09:50:54.135862436 +0100
  47. @@ -0,0 +1,29 @@
  48. +/*
  49. + * Maple (STM32F103RBT6, medium density) linker script for Flash builds.
  50. + */
  51. +
  52. +/*
  53. + * Define memory spaces.
  54. + */
  55. +MEMORY
  56. +{
  57. +  ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K
  58. +  rom (rx)  : ORIGIN = 0x08005000, LENGTH = 108K
  59. +}
  60. +
  61. +/*
  62. + * Use medium density device vector table
  63. + */
  64. +GROUP(libcs3_stm32_med_density.a)
  65. +
  66. +REGION_ALIAS("REGION_TEXT", rom);
  67. +REGION_ALIAS("REGION_DATA", ram);
  68. +REGION_ALIAS("REGION_BSS", ram);
  69. +REGION_ALIAS("REGION_RODATA", rom);
  70. +
  71. +/*
  72. + * Define the rest of the sections
  73. + */
  74. +_FLASH_BUILD = 1;
  75. +
  76. +INCLUDE common.inc
  77. diff -Nur maple-ide-v0.0.12/hardware/leaflabs/cores/maple/olimex_stm32_h103/jtag.ld maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/cores/maple/olimex_stm32_h103/jtag.ld
  78. --- maple-ide-v0.0.12/hardware/leaflabs/cores/maple/olimex_stm32_h103/jtag.ld   1970-01-01 01:00:00.000000000 +0100
  79. +++ maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/cores/maple/olimex_stm32_h103/jtag.ld 2013-02-06 09:50:54.135862436 +0100
  80. @@ -0,0 +1,29 @@
  81. +/*
  82. + * Maple (STM32F103RBT6, medium density) linker script for JTAG (bare
  83. + * metal, no bootloader) builds.
  84. + */
  85. +
  86. +/*
  87. + * Define memory spaces.
  88. + */
  89. +MEMORY
  90. +{
  91. +  ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
  92. +  rom (rx)  : ORIGIN = 0x08000000, LENGTH = 128K
  93. +}
  94. +
  95. +/*
  96. + * Use medium density device vector table
  97. + */
  98. +GROUP(libcs3_stm32_med_density.a)
  99. +
  100. +REGION_ALIAS("REGION_TEXT", rom);
  101. +REGION_ALIAS("REGION_DATA", ram);
  102. +REGION_ALIAS("REGION_BSS", ram);
  103. +REGION_ALIAS("REGION_RODATA", rom);
  104. +
  105. +/*
  106. + * Define the rest of the sections
  107. + */
  108. +_FLASH_BUILD = 1;
  109. +INCLUDE common.inc
  110. diff -Nur maple-ide-v0.0.12/hardware/leaflabs/cores/maple/olimex_stm32_h103/ram.ld maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/cores/maple/olimex_stm32_h103/ram.ld
  111. --- maple-ide-v0.0.12/hardware/leaflabs/cores/maple/olimex_stm32_h103/ram.ld    1970-01-01 01:00:00.000000000 +0100
  112. +++ maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/cores/maple/olimex_stm32_h103/ram.ld  2013-02-06 09:50:54.135862436 +0100
  113. @@ -0,0 +1,27 @@
  114. +/*
  115. + * Maple (STM32F103RBT6, medium density) linker script for RAM builds.
  116. + */
  117. +
  118. +/*
  119. + * Define memory spaces.
  120. + */
  121. +MEMORY
  122. +{
  123. +  ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K
  124. +  rom (rx)  : ORIGIN = 0x08005000, LENGTH = 0K
  125. +}
  126. +
  127. +/*
  128. + * Use medium density device vector table
  129. + */
  130. +GROUP(libcs3_stm32_med_density.a)
  131. +
  132. +REGION_ALIAS("REGION_TEXT", ram);
  133. +REGION_ALIAS("REGION_DATA", ram);
  134. +REGION_ALIAS("REGION_BSS", ram);
  135. +REGION_ALIAS("REGION_RODATA", ram);
  136. +
  137. +/*
  138. + * Define the rest of the sections
  139. + */
  140. +INCLUDE common.inc
  141. diff -Nur maple-ide-v0.0.12/hardware/leaflabs/cores/maple/olimex_stm32_h103.cpp maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/cores/maple/olimex_stm32_h103.cpp
  142. --- maple-ide-v0.0.12/hardware/leaflabs/cores/maple/olimex_stm32_h103.cpp   1970-01-01 01:00:00.000000000 +0100
  143. +++ maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/cores/maple/olimex_stm32_h103.cpp 2013-02-06 10:07:14.140405415 +0100
  144. @@ -0,0 +1,123 @@
  145. +/******************************************************************************
  146. + * The MIT License
  147. + *
  148. + * Copyright (c) 2011 LeafLabs, LLC.
  149. + * Copyright (c) 2011 David Kiliani.
  150. + *
  151. + * Permission is hereby granted, free of charge, to any person
  152. + * obtaining a copy of this software and associated documentation
  153. + * files (the "Software"), to deal in the Software without
  154. + * restriction, including without limitation the rights to use, copy,
  155. + * modify, merge, publish, distribute, sublicense, and/or sell copies
  156. + * of the Software, and to permit persons to whom the Software is
  157. + * furnished to do so, subject to the following conditions:
  158. + *
  159. + * The above copyright notice and this permission notice shall be
  160. + * included in all copies or substantial portions of the Software.
  161. + *
  162. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  163. + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  164. + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  165. + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  166. + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  167. + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  168. + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  169. + * SOFTWARE.
  170. + *****************************************************************************/
  171. +
  172. +/**
  173. + * @file   wirish/boards/olimex_stm32_h103/board.cpp
  174. + * @author David Kiliani <[email protected]>
  175. + * @brief  Olimex STM32_H103 board file.
  176. + */
  177. +
  178. +#ifdef BOARD_olimex_stm32_h103
  179. +
  180. +#include <olimex_stm32_h103.h>
  181. +
  182. +#include <gpio.h>
  183. +#include <timer.h>
  184. +
  185. +#include <wirish_types.h>
  186. +
  187. +void boardInit(void) {
  188. +}
  189. +
  190. +extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = {
  191. +
  192. +    /* Header EXT1 */
  193. +
  194. +    {GPIOA, TIMER1, NULL, 11, 4, ADCx}, /* D0/EXT1_1/PA11 (USBDM) */
  195. +    {GPIOA, TIMER1, NULL,  8, 1, ADCx}, /* D1/EXT1_2/PA8 */
  196. +    {GPIOA,   NULL, NULL, 12, 0, ADCx}, /* D2/EXT1_3/PA12 (USBDP) */
  197. +    {GPIOA, TIMER1, NULL,  9, 2, ADCx}, /* D3/EXT1_4/PA9 */
  198. +
  199. +    {GPIOA, TIMER1, NULL, 10, 3, ADCx}, /* D4/EXT1_7/PA10 */
  200. +    {GPIOC,   NULL, NULL, 10, 0, ADCx}, /* D5/EXT1_8/PC10 */
  201. +    {GPIOC,   NULL, NULL, 11, 0, ADCx}, /* D6/EXT1_9/PC11 (USBpull) */
  202. +    {GPIOC,   NULL, NULL, 12, 0, ADCx}, /* D7/EXT1_10/PC12 (LED) */
  203. +    {GPIOD,   NULL, NULL,  2, 0, ADCx}, /* D8/EXT1_11/PD2 */
  204. +    {GPIOB,   NULL, NULL,  5, 0, ADCx}, /* D9/EXT1_12/PB5 */
  205. +    {GPIOB, TIMER4, NULL,  6, 1, ADCx}, /* D10/EXT1_13/PB6 */
  206. +    {GPIOA, TIMER3, ADC1,  6, 1,    6}, /* D11/EXT1_14/PA6 */
  207. +    {GPIOB, TIMER4, NULL,  7, 2, ADCx}, /* D12/EXT1_15/PB7 */
  208. +    {GPIOB, TIMER4, NULL,  8, 3, ADCx}, /* D13/EXT1_16/PB8 */
  209. +    {GPIOB, TIMER4, NULL,  9, 4, ADCx}, /* D14/EXT1_17/PB9 */
  210. +    {GPIOA,   NULL, ADC1,  5, 0,    5}, /* D15/EXT1_18/PA5 */
  211. +    {GPIOC,   NULL, ADC1,  0, 0,   10}, /* D16/EXT1_19/PC0 */
  212. +    {GPIOC,   NULL, ADC1,  1, 0,   11}, /* D17/EXT1_20/PC1 */
  213. +    {GPIOB, TIMER3, ADC1,  0, 3,    8}, /* D18/EXT1_21/PB0 */
  214. +    {GPIOA, TIMER3, ADC1,  7, 2,    7}, /* D19/EXT1_22/PA7 */
  215. +
  216. +    {GPIOC,   NULL, NULL, 13, 0, ADCx}, /* D20/EXT1_24/PC13 */
  217. +
  218. +    {GPIOB, TIMER3, ADC1,  1, 4,    9}, /* D21/EXT1_26/PB1 */
  219. +
  220. +    /* Header EXT2 */
  221. +
  222. +    {GPIOC,   NULL, ADC1,  2, 0,   12}, /* D22/EXT2_2/PC2 */
  223. +
  224. +    {GPIOA, TIMER2, ADC1,  0, 1,    0}, /* D23/EXT2_4/PA0 (BUT) */
  225. +
  226. +    {GPIOA, TIMER2, ADC1,  2, 3,    2}, /* D24/EXT2_7/PA2 */
  227. +    {GPIOA, TIMER2, ADC1,  1, 2,    1}, /* D25/EXT2_8/PA1 */
  228. +    {GPIOC,   NULL, ADC1,  3, 0,   13}, /* D26/EXT2_9/PC3 */
  229. +    {GPIOA, TIMER2, ADC1,  3, 4,    3}, /* D27/EXT2_10/PA3 */
  230. +    {GPIOA,   NULL, ADC1,  4, 0,    4}, /* D28/EXT2_11/PA4 */
  231. +    {GPIOC,   NULL, ADC1,  4, 0,   14}, /* D29/EXT2_12/PC4 (USB-P) */
  232. +    {GPIOC,   NULL, ADC1,  5, 0,   15}, /* D30/EXT2_13/PC5 */
  233. +    {GPIOB,   NULL, NULL, 10, 0, ADCx}, /* D31/EXT2_14/PB10 */
  234. +    {GPIOB,   NULL, NULL, 11, 0, ADCx}, /* D32/EXT2_15/PB11 */
  235. +    {GPIOB,   NULL, NULL, 13, 0, ADCx}, /* D33/EXT2_16/PB13 */
  236. +    {GPIOB,   NULL, NULL, 12, 0, ADCx}, /* D34/EXT2_17/PB12 */
  237. +    {GPIOB,   NULL, NULL, 14, 0, ADCx}, /* D35/EXT2_18/PB14 */
  238. +    {GPIOB,   NULL, NULL, 15, 0, ADCx}, /* D36/EXT2_19/PB15 */
  239. +    {GPIOC,   NULL, NULL,  6, 0, ADCx}, /* D37/EXT2_20/PC6 */
  240. +    {GPIOC,   NULL, NULL,  7, 0, ADCx}, /* D38/EXT2_21/PC7 */
  241. +    {GPIOC,   NULL, NULL,  8, 0, ADCx}, /* D39/EXT2_22/PC8 */
  242. +
  243. +    {GPIOC,   NULL, NULL,  9, 0, ADCx}, /* D40/EXT2_24/PC9 */
  244. +
  245. +    /* JTAG header */
  246. +
  247. +    {GPIOA,   NULL, NULL, 13, 0, ADCx}, /* D41/JTAG7/PA13 */
  248. +    {GPIOA,   NULL, NULL, 14, 0, ADCx}, /* D42/JTAG9/PA14 */
  249. +    {GPIOA,   NULL, NULL, 15, 0, ADCx}, /* D43/JTAG5/PA15 */
  250. +    {GPIOB,   NULL, NULL,  3, 0, ADCx}, /* D44/JTAG13/PB3  */
  251. +    {GPIOB,   NULL, NULL,  4, 0, ADCx}, /* D45/JTAG3/PB4  */
  252. +};
  253. +
  254. +extern const uint8 boardPWMPins[] __FLASH__ = {
  255. +    0, 1, 3, 4, 10, 11, 12, 13, 14, 18, 19, 21, 23, 24, 25, 27
  256. +};
  257. +
  258. +extern const uint8 boardADCPins[] __FLASH__ = {
  259. +    11, 15, 16, 17, 18, 19, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30
  260. +};
  261. +
  262. +extern const uint8 boardUsedPins[] __FLASH__ = {
  263. +    BOARD_LED_PIN, BOARD_BUTTON_PIN, BOARD_JTMS_SWDIO_PIN,
  264. +    BOARD_JTCK_SWCLK_PIN, BOARD_JTDI_PIN, BOARD_JTDO_PIN, BOARD_NJTRST_PIN
  265. +};
  266. +
  267. +#endif
  268. diff -Nur maple-ide-v0.0.12/hardware/leaflabs/cores/maple/olimex_stm32_h103.h maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/cores/maple/olimex_stm32_h103.h
  269. --- maple-ide-v0.0.12/hardware/leaflabs/cores/maple/olimex_stm32_h103.h 1970-01-01 01:00:00.000000000 +0100
  270. +++ maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/cores/maple/olimex_stm32_h103.h   2013-02-06 10:07:07.693839998 +0100
  271. @@ -0,0 +1,99 @@
  272. +/******************************************************************************
  273. + * The MIT License
  274. + *
  275. + * Copyright (c) 2011 LeafLabs, LLC.
  276. + * Copyright (c) 2011 David Kiliani.
  277. + *
  278. + * Permission is hereby granted, free of charge, to any person
  279. + * obtaining a copy of this software and associated documentation
  280. + * files (the "Software"), to deal in the Software without
  281. + * restriction, including without limitation the rights to use, copy,
  282. + * modify, merge, publish, distribute, sublicense, and/or sell copies
  283. + * of the Software, and to permit persons to whom the Software is
  284. + * furnished to do so, subject to the following conditions:
  285. + *
  286. + * The above copyright notice and this permission notice shall be
  287. + * included in all copies or substantial portions of the Software.
  288. + *
  289. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  290. + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  291. + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  292. + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  293. + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  294. + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  295. + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  296. + * SOFTWARE.
  297. + *****************************************************************************/
  298. +
  299. +/**
  300. + * @file   wirish/boards/olimex_stm32_h103/include/board/board.h
  301. + * @author David Kiliani <[email protected]>
  302. + * @brief  Olimex STM32_H103 board header.
  303. + */
  304. +
  305. +#ifndef _BOARD_OLIMEX_STM32_H103_H_
  306. +#define _BOARD_OLIMEX_STM32_H103_H_
  307. +
  308. +#define CYCLES_PER_MICROSECOND  72
  309. +#define SYSTICK_RELOAD_VAL      71999 /* takes a cycle to reload */
  310. +
  311. +#define BOARD_BUTTON_PIN        23
  312. +#define BOARD_LED_PIN           7
  313. +
  314. +/* Number of USARTs/UARTs whose pins are broken out to headers */
  315. +#define BOARD_NR_USARTS         3
  316. +
  317. +/* Default USART pin numbers (not considering AFIO remap) */
  318. +#define BOARD_USART1_TX_PIN     3
  319. +#define BOARD_USART1_RX_PIN     4
  320. +#define BOARD_USART2_TX_PIN     24
  321. +#define BOARD_USART2_RX_PIN     27
  322. +#define BOARD_USART3_TX_PIN     31
  323. +#define BOARD_USART3_RX_PIN     32
  324. +
  325. +/* Number of SPI ports */
  326. +#define BOARD_NR_SPI            2
  327. +
  328. +/* Default SPI pin numbers (not considering AFIO remap) */
  329. +#define BOARD_SPI1_NSS_PIN      28
  330. +#define BOARD_SPI1_MOSI_PIN     19
  331. +#define BOARD_SPI1_MISO_PIN     11
  332. +#define BOARD_SPI1_SCK_PIN      15
  333. +#define BOARD_SPI2_NSS_PIN      34
  334. +#define BOARD_SPI2_MOSI_PIN     36
  335. +#define BOARD_SPI2_MISO_PIN     35
  336. +#define BOARD_SPI2_SCK_PIN      33
  337. +
  338. +/* Total number of GPIO pins that are broken out to headers and
  339. + * intended for general use. */
  340. +#define BOARD_NR_GPIO_PINS      46
  341. +
  342. +/* Number of pins capable of PWM output */
  343. +#define BOARD_NR_PWM_PINS       16
  344. +
  345. +/* Number of pins capable of ADC conversion */
  346. +#define BOARD_NR_ADC_PINS       16
  347. +
  348. +/* Number of pins already connected to external hardware.  For Maple,
  349. + * these are just BOARD_LED_PIN and BOARD_BUTTON_PIN. */
  350. +#define BOARD_NR_USED_PINS       7
  351. +
  352. +/* Debug port pins */
  353. +#define BOARD_JTMS_SWDIO_PIN    41
  354. +#define BOARD_JTCK_SWCLK_PIN    42
  355. +#define BOARD_JTDI_PIN          43
  356. +#define BOARD_JTDO_PIN          44
  357. +#define BOARD_NJTRST_PIN        45
  358. +
  359. +/* USB configuration */
  360. +//#define BOARD_USB_DISC_DEV      GPIOC
  361. +//#define BOARD_USB_DISC_BIT      11
  362. +
  363. +enum {
  364. +    PA11, PA8, PA12, PA9, PA10, PC10, PC11, PC12, PD2, PB5, PB6, PA6, PB7, PB8,
  365. +    PB9, PA5, PC0, PC1, PB0, PA7, PC13, PB1, PC2, PA0, PA2, PA1, PC3, PA3, PA4,
  366. +    PC4, PC5, PB10, PB11, PB13, PB12, PB14, PB15, PC6, PC7, PC8, PC9, PA13,
  367. +    PA14, PA15, PB3, PB4
  368. +};
  369. +
  370. +#endif
  371. diff -Nur maple-ide-v0.0.12/hardware/leaflabs/cores/maple/usb_config.h maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/cores/maple/usb_config.h
  372. --- maple-ide-v0.0.12/hardware/leaflabs/cores/maple/usb_config.h    2011-09-13 12:52:36.000000000 +0200
  373. +++ maple-ide-v0.0.12_olimex_stm32_h103/hardware/leaflabs/cores/maple/usb_config.h  2013-02-06 20:20:39.164428114 +0100
  374. @@ -41,6 +41,12 @@
  375.      #define USB_DISC_DEV         GPIOB
  376.      #define USB_DISC_PIN         9
  377.  
  378. +#elif defined(BOARD_olimex_stm32_h103)
  379. +
  380. +    #define VCOM_ID_PRODUCT      0x0004
  381. +    #define USB_DISC_DEV         GPIOC
  382. +    #define USB_DISC_PIN         11
  383. +
  384.  #elif defined(BOARD_maple_native)
  385.  
  386.      #define VCOM_ID_PRODUCT      0x0004
  387. Binärdateien maple-ide-v0.0.12/lib/librxtxSerial.so and maple-ide-v0.0.12_olimex_stm32_h103/lib/librxtxSerial.so sind verschieden.
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