LFSR 128-bit algorithm v2.0 (MMX required)

; =========================================================================
; LFSR 128-bit algorithm (MMX required)
; by Andrey Breeze
; Implemented in x86 assembly using MASM32
; Bus taps: 128,126,101,99
; =========================================================================
; A linear feedback shift register (LFSR) is a shift register
; whose input bit is a linear function of its previous state.
; =========================================================================
  .586
  .MMX
  .MODEL flat,stdcall
   option casemap :none
; =========================================================================

; includes
; -------------------------------------------------------------------------
  include \masm32\macros\macros.asm
  include \masm32\include\masm32.inc
  include \masm32\include\kernel32.inc

; libraries
; -------------------------------------------------------------------------
  includelib \masm32\lib\masm32.lib
  includelib \masm32\lib\kernel32.lib
  includelib \masm32\lib\msvcrt.lib

; =========================================================================

  inRSH   = 0
  inRSL   = 1
  inRMH   = 2
  inRML   = 3
  inRTmpH = 4
  inRTmpL = 5
  inRTmp  = 6

  .data
    SH_ dq 0FFFFFFFFFFFFFFFFh ; Sequence[127-64]
    SL_ dq 0FFFFFFFFFFFFFFFFh ;         [63-0]
    MH_ dq 00000000000000000h ; Mask[127-64] taps: 128,126,101,99
    ML_ dq 00000000028000005h ;     [63-0]
    RR_ dd 0001FFFE0h         ; Amount of rounds

  .code
  start:

; =========================================================================

  call main
  inkey
  exit

; =========================================================================

  main proc
    cls

    ; Initialize MMX registers
    movq mm(inRSH),SH_
    movq mm(inRSL),SL_
    movq mm(inRMH),MH_
    movq mm(inRML),ML_

    mov ecx, RR_
  l1:
    ; Apply LFSR mask
    movq mm(inRTmpH),mm(inRSH)
    pand mm(inRTmpH),mm(inRMH)
    movq mm(inRTmpL),mm(inRSL)
    pand mm(inRTmpL),mm(inRML)

    ; Calculate new bit
    pxor mm(inRTmpH),mm(inRTmpL)
    movd ebx, mm(inRTmpH)
    psrlq mm(inRTmpH),020h
    movd eax, mm(inRTmpH)
    xor ebx,eax
    mov ax,bx
    sar ebx,16
    xor ax,bx
    xor al,ah
    lahf
    not eax
    sar eax,0Ah
    and eax,01h

    ; Append new bit
    psrlq mm(inRSL),01h
    movq mm(inRTmp),mm(inRSH)
    psllq mm(inRTmp),03Fh
    por mm(inRSL),mm(inRTmp)
    psrlq mm(inRSH),01h
    movd mm(inRTmp), eax
    psllq mm(inRTmp),03Fh
    por mm(inRSH),mm(inRTmp)

  loop l1

    ; Show binary
    print "LFSR Register state:",0Dh,0Ah

    movq mm(inRTmp),mm(inRSH);
    psrlq mm(inRTmp),020h
    movd edx,mm(inRTmp)
    call ShowBinary
    movq mm(inRTmp),mm(inRSH);
    movd edx,mm(inRTmp)
    call ShowBinary

    movq mm(inRTmp),mm(inRSL);
    psrlq mm(inRTmp),020h
    movd edx,mm(inRTmp)
    call ShowBinary
    movq mm(inRTmp),mm(inRSL);
    movd edx,mm(inRTmp)
    call ShowBinary

    ret
  main endp

; -------------------------------------------------------------------------
; inс: edx
  ShowBinary proc
    mov ecx,020h
    mov ebx,edx
    mov esi,04h
    xor eax,eax
    push eax
  l1:
    xor edx,edx
    inc edx
    and edx,ebx
    ror ebx,01h
    add edx,030h
    or al,dl
    dec esi
    test esi,esi
    jz l3
    sal eax,08h
    loop l1
  l3:
    push eax
    xor eax,eax
    mov esi,04h
    loop l1
  l4:
    mov eax,esp
    print eax,0Dh,0Ah
    mov ecx,09h
  l2:
    pop edx
    loop l2
    ret
  ShowBinary endp

; =========================================================================

end start