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Mar 23rd, 2024
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  1. &dsi1 {
  2. status = "okay";
  3. //rockchip,lane-rate = <550>;
  4. #address-cells = <1>;
  5. #size-cells = <0>;
  6.  
  7. dsi1_panel: panel@0 {
  8. status = "okay";
  9. compatible = "simple-panel-dsi";
  10. reg = <0>;
  11. backlight = <&dsi1_backlight>;
  12.  
  13. vdd-supply = <&lcd_3v3>;
  14. power-supply = <&lcd_3v3>;
  15. //vccio-supply = <&vcc_1v8_s0>;
  16. reset-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
  17. pinctrl-names = "default";
  18. pinctrl-0 = <&dsi1_lcd_rst_gpio>;
  19. rotation = <270>;
  20. //te-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
  21.  
  22. reset-delay-ms = <120>;
  23. enable-delay-ms = <120>;
  24. init-delay-ms = <120>;
  25. stbyb-delay-ms = <120>;
  26. prepare-delay-ms = <120>;
  27. unprepare-delay-ms = <120>;
  28. disable-delay-ms = <120>;
  29.  
  30. dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST)>;
  31. dsi,format = <MIPI_DSI_FMT_RGB888>;
  32. dsi,lanes = <4>;
  33. width-mm = <68>;
  34. height-mm = <121>;
  35.  
  36. panel-init-sequence = [
  37. 39 00 04 FF 98 81 03
  38. 15 00 02 01 00
  39. 15 00 02 02 00
  40. 15 00 02 03 72
  41. 15 00 02 04 00
  42. 15 00 02 05 00
  43. 15 00 02 06 09
  44. 15 00 02 07 00
  45. 15 00 02 08 00
  46. 15 00 02 09 01
  47. 15 00 02 0a 00
  48. 15 00 02 0b 00
  49. 15 00 02 0c 01
  50. 15 00 02 0d 00
  51. 15 00 02 0e 00
  52. 15 00 02 0f 00
  53. 15 00 02 10 00
  54. 15 00 02 11 00
  55. 15 00 02 12 00
  56. 15 00 02 13 00
  57. 15 00 02 14 00
  58. 15 00 02 15 00
  59. 15 00 02 16 00
  60. 15 00 02 17 00
  61. 15 00 02 18 00
  62. 15 00 02 19 00
  63. 15 00 02 1a 00
  64. 15 00 02 1b 00
  65. 15 00 02 1c 00
  66. 15 00 02 1d 00
  67. 15 00 02 1e 40
  68. 15 00 02 1f 80
  69. 15 00 02 20 05
  70. 15 00 02 21 02
  71. 15 00 02 22 00
  72. 15 00 02 23 00
  73. 15 00 02 24 00
  74. 15 00 02 25 00
  75. 15 00 02 26 00
  76. 15 00 02 27 00
  77. 15 00 02 28 33
  78. 15 00 02 29 02
  79. 15 00 02 2a 00
  80. 15 00 02 2b 00
  81. 15 00 02 2c 00
  82. 15 00 02 2d 00
  83. 15 00 02 2e 00
  84. 15 00 02 2f 00
  85. 15 00 02 30 00
  86. 15 00 02 31 00
  87. 15 00 02 32 00
  88. 15 00 02 33 00
  89. 15 00 02 34 04
  90. 15 00 02 35 00
  91. 15 00 02 36 00
  92. 15 00 02 37 00
  93. 15 00 02 38 3C
  94. 15 00 02 39 00
  95. 15 00 02 3a 40
  96. 15 00 02 3b 40
  97. 15 00 02 3c 00
  98. 15 00 02 3d 00
  99. 15 00 02 3e 00
  100. 15 00 02 3f 00
  101. 15 00 02 40 00
  102. 15 00 02 41 00
  103. 15 00 02 42 00
  104. 15 00 02 43 00
  105. 15 00 02 44 00
  106. 15 00 02 50 01
  107. 15 00 02 51 23
  108. 15 00 02 52 45
  109. 15 00 02 53 67
  110. 15 00 02 54 89
  111. 15 00 02 55 ab
  112. 15 00 02 56 01
  113. 15 00 02 57 23
  114. 15 00 02 58 45
  115. 15 00 02 59 67
  116. 15 00 02 5a 89
  117. 15 00 02 5b ab
  118. 15 00 02 5c cd
  119. 15 00 02 5d ef
  120. 15 00 02 5e 11
  121. 15 00 02 5f 01
  122. 15 00 02 60 00
  123. 15 00 02 61 15
  124. 15 00 02 62 14
  125. 15 00 02 63 0E
  126. 15 00 02 64 0F
  127. 15 00 02 65 0C
  128. 15 00 02 66 0D
  129. 15 00 02 67 06
  130. 15 00 02 68 02
  131. 15 00 02 69 02
  132. 15 00 02 6a 02
  133. 15 00 02 6b 02
  134. 15 00 02 6c 02
  135. 15 00 02 6d 02
  136. 15 00 02 6e 07
  137. 15 00 02 6f 02
  138. 15 00 02 70 02
  139. 15 00 02 71 02
  140. 15 00 02 72 02
  141. 15 00 02 73 02
  142. 15 00 02 74 02
  143. 15 00 02 75 01
  144. 15 00 02 76 00
  145. 15 00 02 77 14
  146. 15 00 02 78 15
  147. 15 00 02 79 0E
  148. 15 00 02 7a 0F
  149. 15 00 02 7b 0C
  150. 15 00 02 7c 0D
  151. 15 00 02 7d 06
  152. 15 00 02 7e 02
  153. 15 00 02 7f 07
  154. 15 00 02 80 02
  155. 15 00 02 81 02
  156. 15 00 02 82 02
  157. 15 00 02 83 02
  158. 15 00 02 84 07
  159. 15 00 02 85 02
  160. 15 00 02 86 02
  161. 15 00 02 87 02
  162. 15 00 02 88 02
  163. 15 00 02 89 02
  164. 15 00 02 8A 02
  165. 39 00 04 FF 98 81 04
  166. 15 00 02 6C 15
  167. 15 00 02 6E 2A
  168. 15 00 02 6F 33
  169. 15 00 02 3A 94
  170. 15 00 02 8D 1A
  171. 15 00 02 87 BA
  172. 15 00 02 26 76
  173. 15 00 02 B2 D1
  174. 15 00 02 B5 06
  175. 39 00 04 FF 98 81 01
  176. 15 00 02 22 0A
  177. 15 00 02 31 00
  178. 15 00 02 53 98
  179. 15 00 02 55 98
  180. 15 00 02 50 AE
  181. 15 00 02 51 AE
  182. 15 00 02 60 28
  183. 15 00 02 A0 0F
  184. 15 00 02 A1 1B
  185. 15 00 02 A2 28
  186. 15 00 02 A3 12
  187. 15 00 02 A4 15
  188. 15 00 02 A5 28
  189. 15 00 02 A6 1B
  190. 15 00 02 A7 1E
  191. 15 00 02 A8 79
  192. 15 00 02 A9 1B
  193. 15 00 02 AA 27
  194. 15 00 02 AB 69
  195. 15 00 02 AC 19
  196. 15 00 02 AD 18
  197. 15 00 02 AE 4C
  198. 15 00 02 AF 21
  199. 15 00 02 B0 28
  200. 15 00 02 B1 52
  201. 15 00 02 B2 65
  202. 15 00 02 B3 3F
  203. 15 00 02 C0 04
  204. 15 00 02 C1 1B
  205. 15 00 02 C2 27
  206. 15 00 02 C3 13
  207. 15 00 02 C4 15
  208. 15 00 02 C5 28
  209. 15 00 02 C6 1C
  210. 15 00 02 C7 1E
  211. 15 00 02 C8 79
  212. 15 00 02 C9 1A
  213. 15 00 02 CA 27
  214. 15 00 02 CB 69
  215. 15 00 02 CC 1A
  216. 15 00 02 CD 18
  217. 15 00 02 CE 4C
  218. 15 00 02 CF 21
  219. 15 00 02 D0 27
  220. 15 00 02 D1 52
  221. 15 00 02 D2 65
  222. 15 00 02 D3 3F
  223. 39 00 04 FF 98 81 00
  224. 15 00 02 35 00
  225. 15 00 02 3A 70
  226. 05 78 01 11
  227. 05 14 01 29
  228. ];
  229.  
  230. panel-exit-sequence = [
  231. 05 00 01 28
  232. 05 00 01 10
  233. ];
  234.  
  235. disp_timings0: display-timings {
  236. native-mode = <&dsi1_timing0>;
  237. dsi1_timing0: timing0 {
  238. clock-frequency = <59603000>;
  239. hactive = <720>;
  240. vactive = <1280>;
  241. hfront-porch = <20>;
  242. hsync-len = <6>;
  243. hback-porch = <10>;
  244. vfront-porch = <20>;
  245. vsync-len = <4>;
  246. vback-porch = <10>;
  247. hsync-active = <0>;
  248. vsync-active = <0>;
  249. de-active = <0>;
  250. pixelclk-active = <0>;
  251. };
  252. };
  253.  
  254. ports {
  255. #address-cells = <1>;
  256. #size-cells = <0>;
  257.  
  258. port@0 {
  259. reg = <0>;
  260. panel_in_dsi1: endpoint {
  261. remote-endpoint = <&dsi1_out_panel>;
  262. };
  263. };
  264. };
  265. };
  266.  
  267. ports {
  268. #address-cells = <1>;
  269. #size-cells = <0>;
  270.  
  271. port@1 {
  272. reg = <1>;
  273. dsi1_out_panel: endpoint {
  274. remote-endpoint = <&panel_in_dsi1>;
  275. };
  276. };
  277. };
  278.  
  279. };
  280.  
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