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Banana M2 dts

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Feb 6th, 2015
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  1. /dts-v1/;
  2.  
  3. / {
  4. #address-cells = <0x1>;
  5. #size-cells = <0x1>;
  6. interrupt-parent = <0x1>;
  7. model = "Sinovoip A31 Banana M2";
  8. compatible = "sinovoip,a31-banana", "allwinner,sun6i-a31";
  9.  
  10. chosen {
  11. #address-cells = <0x1>;
  12. #size-cells = <0x1>;
  13. ranges;
  14. bootargs = "earlyprintk console=ttyS0,115200";
  15.  
  16. framebuffer@0 {
  17. compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
  18. allwinner,pipeline = "de_be0-lcd0-hdmi";
  19. clocks = <0x2 0x0>;
  20. status = "disabled";
  21. };
  22. };
  23.  
  24. aliases {
  25. serial0 = "/soc@01c00000/serial@01c28000";
  26. serial1 = "/soc@01c00000/serial@01c28400";
  27. serial2 = "/soc@01c00000/serial@01c28800";
  28. serial3 = "/soc@01c00000/serial@01c28c00";
  29. serial4 = "/soc@01c00000/serial@01c29000";
  30. serial5 = "/soc@01c00000/serial@01c29400";
  31. ethernet0 = "/soc@01c00000/ethernet@01c30000";
  32. };
  33.  
  34. memory {
  35. device_type = "memory";
  36. reg = <0x40000000 0x80000000>;
  37. };
  38.  
  39. cpus {
  40. enable-method = "allwinner,sun6i-a31";
  41. #address-cells = <0x1>;
  42. #size-cells = <0x0>;
  43.  
  44. cpu@0 {
  45. compatible = "arm,cortex-a7";
  46. device_type = "cpu";
  47. reg = <0x0>;
  48. };
  49.  
  50. cpu@1 {
  51. compatible = "arm,cortex-a7";
  52. device_type = "cpu";
  53. reg = <0x1>;
  54. };
  55.  
  56. cpu@2 {
  57. compatible = "arm,cortex-a7";
  58. device_type = "cpu";
  59. reg = <0x2>;
  60. };
  61.  
  62. cpu@3 {
  63. compatible = "arm,cortex-a7";
  64. device_type = "cpu";
  65. reg = <0x3>;
  66. };
  67. };
  68.  
  69. pmu {
  70. compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu";
  71. interrupts = <0x0 0x78 0x4 0x0 0x79 0x4 0x0 0x7a 0x4 0x0 0x7b 0x4>;
  72. };
  73.  
  74. clocks {
  75. #address-cells = <0x1>;
  76. #size-cells = <0x1>;
  77. ranges;
  78.  
  79. osc24M {
  80. #clock-cells = <0x0>;
  81. compatible = "fixed-clock";
  82. clock-frequency = <0x16e3600>;
  83. linux,phandle = <0x3>;
  84. phandle = <0x3>;
  85. };
  86.  
  87. clk@0 {
  88. #clock-cells = <0x0>;
  89. compatible = "fixed-clock";
  90. clock-frequency = <0x8000>;
  91. clock-output-names = "osc32k";
  92. linux,phandle = <0x4>;
  93. phandle = <0x4>;
  94. };
  95.  
  96. clk@01c20000 {
  97. #clock-cells = <0x0>;
  98. compatible = "allwinner,sun6i-a31-pll1-clk";
  99. reg = <0x1c20000 0x4>;
  100. clocks = <0x3>;
  101. clock-output-names = "pll1";
  102. linux,phandle = <0x5>;
  103. phandle = <0x5>;
  104. };
  105.  
  106. clk@01c20028 {
  107. #clock-cells = <0x1>;
  108. compatible = "allwinner,sun6i-a31-pll6-clk";
  109. reg = <0x1c20028 0x4>;
  110. clocks = <0x3>;
  111. clock-output-names = "pll6", "pll6x2";
  112. linux,phandle = <0x2>;
  113. phandle = <0x2>;
  114. };
  115.  
  116. cpu@01c20050 {
  117. #clock-cells = <0x0>;
  118. compatible = "allwinner,sun4i-a10-cpu-clk";
  119. reg = <0x1c20050 0x4>;
  120. clocks = <0x4 0x3 0x5 0x5>;
  121. clock-output-names = "cpu";
  122. linux,phandle = <0x6>;
  123. phandle = <0x6>;
  124. };
  125.  
  126. axi@01c20050 {
  127. #clock-cells = <0x0>;
  128. compatible = "allwinner,sun4i-a10-axi-clk";
  129. reg = <0x1c20050 0x4>;
  130. clocks = <0x6>;
  131. clock-output-names = "axi";
  132. linux,phandle = <0x7>;
  133. phandle = <0x7>;
  134. };
  135.  
  136. ahb1_mux@01c20054 {
  137. #clock-cells = <0x0>;
  138. compatible = "allwinner,sun6i-a31-ahb1-mux-clk";
  139. reg = <0x1c20054 0x4>;
  140. clocks = <0x4 0x3 0x7 0x2 0x0>;
  141. clock-output-names = "ahb1_mux";
  142. linux,phandle = <0x8>;
  143. phandle = <0x8>;
  144. };
  145.  
  146. ahb1@01c20054 {
  147. #clock-cells = <0x0>;
  148. compatible = "allwinner,sun4i-a10-ahb-clk";
  149. reg = <0x1c20054 0x4>;
  150. clocks = <0x8>;
  151. clock-output-names = "ahb1";
  152. linux,phandle = <0x9>;
  153. phandle = <0x9>;
  154. };
  155.  
  156. clk@01c20060 {
  157. #clock-cells = <0x1>;
  158. compatible = "allwinner,sun6i-a31-ahb1-gates-clk";
  159. reg = <0x1c20060 0x8>;
  160. clocks = <0x9>;
  161. clock-output-names = "ahb1_mipidsi", "ahb1_ss", "ahb1_dma", "ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2", "ahb1_mmc3", "ahb1_nand1", "ahb1_nand0", "ahb1_sdram", "ahb1_gmac", "ahb1_ts", "ahb1_hstimer", "ahb1_spi0", "ahb1_spi1", "ahb1_spi2", "ahb1_spi3", "ahb1_otg", "ahb1_ehci0", "ahb1_ehci1", "ahb1_ohci0", "ahb1_ohci1", "ahb1_ohci2", "ahb1_ve", "ahb1_lcd0", "ahb1_lcd1", "ahb1_csi", "ahb1_hdmi", "ahb1_de0", "ahb1_de1", "ahb1_fe0", "ahb1_fe1", "ahb1_mp", "ahb1_gpu", "ahb1_deu0", "ahb1_deu1", "ahb1_drc0", "ahb1_drc1";
  162. linux,phandle = <0xe>;
  163. phandle = <0xe>;
  164. };
  165.  
  166. apb1@01c20054 {
  167. #clock-cells = <0x0>;
  168. compatible = "allwinner,sun4i-a10-apb0-clk";
  169. reg = <0x1c20054 0x4>;
  170. clocks = <0x9>;
  171. clock-output-names = "apb1";
  172. linux,phandle = <0xa>;
  173. phandle = <0xa>;
  174. };
  175.  
  176. clk@01c20068 {
  177. #clock-cells = <0x1>;
  178. compatible = "allwinner,sun6i-a31-apb1-gates-clk";
  179. reg = <0x1c20068 0x4>;
  180. clocks = <0xa>;
  181. clock-output-names = "apb1_codec", "apb1_digital_mic", "apb1_pio", "apb1_daudio0", "apb1_daudio1";
  182. linux,phandle = <0x1b>;
  183. phandle = <0x1b>;
  184. };
  185.  
  186. clk@01c20058 {
  187. #clock-cells = <0x0>;
  188. compatible = "allwinner,sun4i-a10-apb1-clk";
  189. reg = <0x1c20058 0x4>;
  190. clocks = <0x4 0x3 0x2 0x0 0x2 0x0>;
  191. clock-output-names = "apb2";
  192. linux,phandle = <0xb>;
  193. phandle = <0xb>;
  194. };
  195.  
  196. clk@01c2006c {
  197. #clock-cells = <0x1>;
  198. compatible = "allwinner,sun6i-a31-apb2-gates-clk";
  199. reg = <0x1c2006c 0x4>;
  200. clocks = <0xb>;
  201. clock-output-names = "apb2_i2c0", "apb2_i2c1", "apb2_i2c2", "apb2_i2c3", "apb2_uart0", "apb2_uart1", "apb2_uart2", "apb2_uart3", "apb2_uart4", "apb2_uart5";
  202. linux,phandle = <0x1c>;
  203. phandle = <0x1c>;
  204. };
  205.  
  206. clk@01c20088 {
  207. #clock-cells = <0x0>;
  208. compatible = "allwinner,sun4i-a10-mod0-clk";
  209. reg = <0x1c20088 0x4>;
  210. clocks = <0x3 0x2 0x0>;
  211. clock-output-names = "mmc0";
  212. linux,phandle = <0x10>;
  213. phandle = <0x10>;
  214. };
  215.  
  216. clk@01c2008c {
  217. #clock-cells = <0x0>;
  218. compatible = "allwinner,sun4i-a10-mod0-clk";
  219. reg = <0x1c2008c 0x4>;
  220. clocks = <0x3 0x2 0x0>;
  221. clock-output-names = "mmc1";
  222. linux,phandle = <0x15>;
  223. phandle = <0x15>;
  224. };
  225.  
  226. clk@01c20090 {
  227. #clock-cells = <0x0>;
  228. compatible = "allwinner,sun4i-a10-mod0-clk";
  229. reg = <0x1c20090 0x4>;
  230. clocks = <0x3 0x2 0x0>;
  231. clock-output-names = "mmc2";
  232. linux,phandle = <0x16>;
  233. phandle = <0x16>;
  234. };
  235.  
  236. clk@01c20094 {
  237. #clock-cells = <0x0>;
  238. compatible = "allwinner,sun4i-a10-mod0-clk";
  239. reg = <0x1c20094 0x4>;
  240. clocks = <0x3 0x2 0x0>;
  241. clock-output-names = "mmc3";
  242. linux,phandle = <0x17>;
  243. phandle = <0x17>;
  244. };
  245.  
  246. clk@01c200a0 {
  247. #clock-cells = <0x0>;
  248. compatible = "allwinner,sun4i-a10-mod0-clk";
  249. reg = <0x1c200a0 0x4>;
  250. clocks = <0x3 0x2 0x0>;
  251. clock-output-names = "spi0";
  252. linux,phandle = <0x26>;
  253. phandle = <0x26>;
  254. };
  255.  
  256. clk@01c200a4 {
  257. #clock-cells = <0x0>;
  258. compatible = "allwinner,sun4i-a10-mod0-clk";
  259. reg = <0x1c200a4 0x4>;
  260. clocks = <0x3 0x2 0x0>;
  261. clock-output-names = "spi1";
  262. linux,phandle = <0x27>;
  263. phandle = <0x27>;
  264. };
  265.  
  266. clk@01c200a8 {
  267. #clock-cells = <0x0>;
  268. compatible = "allwinner,sun4i-a10-mod0-clk";
  269. reg = <0x1c200a8 0x4>;
  270. clocks = <0x3 0x2 0x0>;
  271. clock-output-names = "spi2";
  272. linux,phandle = <0x28>;
  273. phandle = <0x28>;
  274. };
  275.  
  276. clk@01c200ac {
  277. #clock-cells = <0x0>;
  278. compatible = "allwinner,sun4i-a10-mod0-clk";
  279. reg = <0x1c200ac 0x4>;
  280. clocks = <0x3 0x2 0x0>;
  281. clock-output-names = "spi3";
  282. linux,phandle = <0x29>;
  283. phandle = <0x29>;
  284. };
  285.  
  286. clk@01c200cc {
  287. #clock-cells = <0x1>;
  288. #reset-cells = <0x1>;
  289. compatible = "allwinner,sun6i-a31-usb-clk";
  290. reg = <0x1c200cc 0x4>;
  291. clocks = <0x3>;
  292. clock-output-names = "usb_phy0", "usb_phy1", "usb_phy2", "usb_ohci0", "usb_ohci1", "usb_ohci2";
  293. linux,phandle = <0x18>;
  294. phandle = <0x18>;
  295. };
  296.  
  297. clk@1 {
  298. #clock-cells = <0x0>;
  299. compatible = "fixed-clock";
  300. clock-frequency = <0x17d7840>;
  301. clock-output-names = "mii_phy_tx";
  302. linux,phandle = <0xc>;
  303. phandle = <0xc>;
  304. };
  305.  
  306. clk@2 {
  307. #clock-cells = <0x0>;
  308. compatible = "fixed-clock";
  309. clock-frequency = <0x7735940>;
  310. clock-output-names = "gmac_int_tx";
  311. linux,phandle = <0xd>;
  312. phandle = <0xd>;
  313. };
  314.  
  315. clk@01c200d0 {
  316. #clock-cells = <0x0>;
  317. compatible = "allwinner,sun7i-a20-gmac-clk";
  318. reg = <0x1c200d0 0x4>;
  319. clocks = <0xc 0xd>;
  320. clock-output-names = "gmac_tx";
  321. linux,phandle = <0x23>;
  322. phandle = <0x23>;
  323. };
  324. };
  325.  
  326. soc@01c00000 {
  327. compatible = "simple-bus";
  328. #address-cells = <0x1>;
  329. #size-cells = <0x1>;
  330. ranges;
  331.  
  332. dma-controller@01c02000 {
  333. compatible = "allwinner,sun6i-a31-dma";
  334. reg = <0x1c02000 0x1000>;
  335. interrupts = <0x0 0x32 0x4>;
  336. clocks = <0xe 0x6>;
  337. resets = <0xf 0x6>;
  338. #dma-cells = <0x1>;
  339. assigned-clocks = <0x8>;
  340. assigned-clock-parents = <0x2 0x0>;
  341. linux,phandle = <0x1e>;
  342. phandle = <0x1e>;
  343. };
  344.  
  345. mmc@01c0f000 {
  346. compatible = "allwinner,sun5i-a13-mmc";
  347. reg = <0x1c0f000 0x1000>;
  348. clocks = <0xe 0x8 0x10>;
  349. clock-names = "ahb", "mmc";
  350. resets = <0xf 0x8>;
  351. reset-names = "ahb";
  352. interrupts = <0x0 0x3c 0x4>;
  353. status = "okay";
  354. pinctrl-names = "default";
  355. pinctrl-0 = <0x11 0x12>;
  356. vmmc-supply = <0x13>;
  357. bus-width = <0x4>;
  358. cd-gpios = <0x14 0x0 0x8 0x0>;
  359. cd-inverted;
  360. };
  361.  
  362. mmc@01c10000 {
  363. compatible = "allwinner,sun5i-a13-mmc";
  364. reg = <0x1c10000 0x1000>;
  365. clocks = <0xe 0x9 0x15>;
  366. clock-names = "ahb", "mmc";
  367. resets = <0xf 0x9>;
  368. reset-names = "ahb";
  369. interrupts = <0x0 0x3d 0x4>;
  370. status = "disabled";
  371. };
  372.  
  373. mmc@01c11000 {
  374. compatible = "allwinner,sun5i-a13-mmc";
  375. reg = <0x1c11000 0x1000>;
  376. clocks = <0xe 0xa 0x16>;
  377. clock-names = "ahb", "mmc";
  378. resets = <0xf 0xa>;
  379. reset-names = "ahb";
  380. interrupts = <0x0 0x3e 0x4>;
  381. status = "disabled";
  382. };
  383.  
  384. mmc@01c12000 {
  385. compatible = "allwinner,sun5i-a13-mmc";
  386. reg = <0x1c12000 0x1000>;
  387. clocks = <0xe 0xb 0x17>;
  388. clock-names = "ahb", "mmc";
  389. resets = <0xf 0xb>;
  390. reset-names = "ahb";
  391. interrupts = <0x0 0x3f 0x4>;
  392. status = "disabled";
  393. };
  394.  
  395. phy@01c19400 {
  396. compatible = "allwinner,sun6i-a31-usb-phy";
  397. reg = <0x1c19400 0x10 0x1c1a800 0x4 0x1c1b800 0x4>;
  398. reg-names = "phy_ctrl", "pmu1", "pmu2";
  399. clocks = <0x18 0x8 0x18 0x9 0x18 0xa>;
  400. clock-names = "usb0_phy", "usb1_phy", "usb2_phy";
  401. resets = <0x18 0x0 0x18 0x1 0x18 0x2>;
  402. reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
  403. status = "okay";
  404. #phy-cells = <0x1>;
  405. usb1_vbus-supply = <0x19>;
  406. linux,phandle = <0x1a>;
  407. phandle = <0x1a>;
  408. };
  409.  
  410. usb@01c1a000 {
  411. compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
  412. reg = <0x1c1a000 0x100>;
  413. interrupts = <0x0 0x48 0x4>;
  414. clocks = <0xe 0x1a>;
  415. resets = <0xf 0x1a>;
  416. phys = <0x1a 0x1>;
  417. phy-names = "usb";
  418. status = "okay";
  419. };
  420.  
  421. usb@01c1a400 {
  422. compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
  423. reg = <0x1c1a400 0x100>;
  424. interrupts = <0x0 0x49 0x4>;
  425. clocks = <0xe 0x1d 0x18 0x10>;
  426. resets = <0xf 0x1d>;
  427. phys = <0x1a 0x1>;
  428. phy-names = "usb";
  429. status = "okay";
  430. };
  431.  
  432. usb@01c1b000 {
  433. compatible = "allwinner,sun6i-a31-ehci", "generic-ehci";
  434. reg = <0x1c1b000 0x100>;
  435. interrupts = <0x0 0x4a 0x4>;
  436. clocks = <0xe 0x1b>;
  437. resets = <0xf 0x1b>;
  438. phys = <0x1a 0x2>;
  439. phy-names = "usb";
  440. status = "disabled";
  441. };
  442.  
  443. usb@01c1b400 {
  444. compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
  445. reg = <0x1c1b400 0x100>;
  446. interrupts = <0x0 0x4b 0x4>;
  447. clocks = <0xe 0x1e 0x18 0x11>;
  448. resets = <0xf 0x1e>;
  449. phys = <0x1a 0x2>;
  450. phy-names = "usb";
  451. status = "disabled";
  452. };
  453.  
  454. usb@01c1c400 {
  455. compatible = "allwinner,sun6i-a31-ohci", "generic-ohci";
  456. reg = <0x1c1c400 0x100>;
  457. interrupts = <0x0 0x4d 0x4>;
  458. clocks = <0xe 0x1f 0x18 0x12>;
  459. resets = <0xf 0x1f>;
  460. status = "disabled";
  461. };
  462.  
  463. pinctrl@01c20800 {
  464. compatible = "allwinner,sun6i-a31-pinctrl";
  465. reg = <0x1c20800 0x400>;
  466. interrupts = <0x0 0xb 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4>;
  467. clocks = <0x1b 0x5>;
  468. gpio-controller;
  469. interrupt-controller;
  470. #interrupt-cells = <0x2>;
  471. #size-cells = <0x0>;
  472. #gpio-cells = <0x3>;
  473. linux,phandle = <0x14>;
  474. phandle = <0x14>;
  475.  
  476. uart0@0 {
  477. allwinner,pins = "PH20", "PH21";
  478. allwinner,function = "uart0";
  479. allwinner,drive = <0x0>;
  480. allwinner,pull = <0x0>;
  481. linux,phandle = <0x1f>;
  482. phandle = <0x1f>;
  483. };
  484.  
  485. i2c0@0 {
  486. allwinner,pins = "PH14", "PH15";
  487. allwinner,function = "i2c0";
  488. allwinner,drive = <0x0>;
  489. allwinner,pull = <0x0>;
  490. linux,phandle = <0x20>;
  491. phandle = <0x20>;
  492. };
  493.  
  494. i2c1@0 {
  495. allwinner,pins = "PH16", "PH17";
  496. allwinner,function = "i2c1";
  497. allwinner,drive = <0x0>;
  498. allwinner,pull = <0x0>;
  499. linux,phandle = <0x21>;
  500. phandle = <0x21>;
  501. };
  502.  
  503. i2c2@0 {
  504. allwinner,pins = "PH18", "PH19";
  505. allwinner,function = "i2c2";
  506. allwinner,drive = <0x0>;
  507. allwinner,pull = <0x0>;
  508. linux,phandle = <0x22>;
  509. phandle = <0x22>;
  510. };
  511.  
  512. mmc0@0 {
  513. allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
  514. allwinner,function = "mmc0";
  515. allwinner,drive = <0x2>;
  516. allwinner,pull = <0x1>;
  517. linux,phandle = <0x11>;
  518. phandle = <0x11>;
  519. };
  520.  
  521. gmac_mii@0 {
  522. allwinner,pins = "PA0", "PA1", "PA2", "PA3", "PA8", "PA9", "PA11", "PA12", "PA13", "PA14", "PA19", "PA20", "PA21", "PA22", "PA23", "PA24", "PA26", "PA27";
  523. allwinner,function = "gmac";
  524. allwinner,drive = <0x0>;
  525. allwinner,pull = <0x0>;
  526. };
  527.  
  528. gmac_gmii@0 {
  529. allwinner,pins = "PA0", "PA1", "PA2", "PA3", "PA4", "PA5", "PA6", "PA7", "PA8", "PA9", "PA10", "PA11", "PA12", "PA13", "PA14", "PA15", "PA16", "PA17", "PA18", "PA19", "PA20", "PA21", "PA22", "PA23", "PA24", "PA25", "PA26", "PA27";
  530. allwinner,function = "gmac";
  531. allwinner,drive = <0x2>;
  532. allwinner,pull = <0x0>;
  533. };
  534.  
  535. gmac_rgmii@0 {
  536. allwinner,pins = "PA0", "PA1", "PA2", "PA3", "PA9", "PA10", "PA11", "PA12", "PA13", "PA14", "PA19", "PA20", "PA25", "PA26", "PA27";
  537. allwinner,function = "gmac";
  538. allwinner,drive = <0x3>;
  539. allwinner,pull = <0x0>;
  540. linux,phandle = <0x24>;
  541. phandle = <0x24>;
  542. };
  543.  
  544. ahci_pwr_pin@0 {
  545. allwinner,pins = "PB8";
  546. allwinner,function = "gpio_out";
  547. allwinner,drive = <0x0>;
  548. allwinner,pull = <0x0>;
  549. linux,phandle = <0x2f>;
  550. phandle = <0x2f>;
  551. };
  552.  
  553. usb0_vbus_pin@0 {
  554. allwinner,pins = "PB9";
  555. allwinner,function = "gpio_out";
  556. allwinner,drive = <0x0>;
  557. allwinner,pull = <0x0>;
  558. linux,phandle = <0x30>;
  559. phandle = <0x30>;
  560. };
  561.  
  562. usb1_vbus_pin@0 {
  563. allwinner,pins = "PH24";
  564. allwinner,function = "gpio_out";
  565. allwinner,drive = <0x0>;
  566. allwinner,pull = <0x0>;
  567. linux,phandle = <0x31>;
  568. phandle = <0x31>;
  569. };
  570.  
  571. usb2_vbus_pin@0 {
  572. allwinner,pins = "PH3";
  573. allwinner,function = "gpio_out";
  574. allwinner,drive = <0x0>;
  575. allwinner,pull = <0x0>;
  576. linux,phandle = <0x32>;
  577. phandle = <0x32>;
  578. };
  579.  
  580. mmc0_cd_pin@0 {
  581. allwinner,pins = "PA8";
  582. allwinner,function = "gpio_in";
  583. allwinner,drive = <0x0>;
  584. allwinner,pull = <0x1>;
  585. linux,phandle = <0x12>;
  586. phandle = <0x12>;
  587. };
  588. };
  589.  
  590. reset@01c202c0 {
  591. #reset-cells = <0x1>;
  592. compatible = "allwinner,sun6i-a31-ahb1-reset";
  593. reg = <0x1c202c0 0xc>;
  594. linux,phandle = <0xf>;
  595. phandle = <0xf>;
  596. };
  597.  
  598. reset@01c202d0 {
  599. #reset-cells = <0x1>;
  600. compatible = "allwinner,sun6i-a31-clock-reset";
  601. reg = <0x1c202d0 0x4>;
  602. };
  603.  
  604. reset@01c202d8 {
  605. #reset-cells = <0x1>;
  606. compatible = "allwinner,sun6i-a31-clock-reset";
  607. reg = <0x1c202d8 0x4>;
  608. linux,phandle = <0x1d>;
  609. phandle = <0x1d>;
  610. };
  611.  
  612. timer@01c20c00 {
  613. compatible = "allwinner,sun4i-a10-timer";
  614. reg = <0x1c20c00 0xa0>;
  615. interrupts = <0x0 0x12 0x4 0x0 0x13 0x4 0x0 0x14 0x4 0x0 0x15 0x4 0x0 0x16 0x4>;
  616. clocks = <0x3>;
  617. };
  618.  
  619. watchdog@01c20ca0 {
  620. compatible = "allwinner,sun6i-a31-wdt";
  621. reg = <0x1c20ca0 0x20>;
  622. };
  623.  
  624. serial@01c28000 {
  625. compatible = "snps,dw-apb-uart";
  626. reg = <0x1c28000 0x400>;
  627. interrupts = <0x0 0x0 0x4>;
  628. reg-shift = <0x2>;
  629. reg-io-width = <0x4>;
  630. clocks = <0x1c 0x10>;
  631. resets = <0x1d 0x10>;
  632. dmas = <0x1e 0x6 0x1e 0x6>;
  633. dma-names = "rx", "tx";
  634. status = "okay";
  635. pinctrl-names = "default";
  636. pinctrl-0 = <0x1f>;
  637. };
  638.  
  639. serial@01c28400 {
  640. compatible = "snps,dw-apb-uart";
  641. reg = <0x1c28400 0x400>;
  642. interrupts = <0x0 0x1 0x4>;
  643. reg-shift = <0x2>;
  644. reg-io-width = <0x4>;
  645. clocks = <0x1c 0x11>;
  646. resets = <0x1d 0x11>;
  647. dmas = <0x1e 0x7 0x1e 0x7>;
  648. dma-names = "rx", "tx";
  649. status = "disabled";
  650. };
  651.  
  652. serial@01c28800 {
  653. compatible = "snps,dw-apb-uart";
  654. reg = <0x1c28800 0x400>;
  655. interrupts = <0x0 0x2 0x4>;
  656. reg-shift = <0x2>;
  657. reg-io-width = <0x4>;
  658. clocks = <0x1c 0x12>;
  659. resets = <0x1d 0x12>;
  660. dmas = <0x1e 0x8 0x1e 0x8>;
  661. dma-names = "rx", "tx";
  662. status = "disabled";
  663. };
  664.  
  665. serial@01c28c00 {
  666. compatible = "snps,dw-apb-uart";
  667. reg = <0x1c28c00 0x400>;
  668. interrupts = <0x0 0x3 0x4>;
  669. reg-shift = <0x2>;
  670. reg-io-width = <0x4>;
  671. clocks = <0x1c 0x13>;
  672. resets = <0x1d 0x13>;
  673. dmas = <0x1e 0x9 0x1e 0x9>;
  674. dma-names = "rx", "tx";
  675. status = "disabled";
  676. };
  677.  
  678. serial@01c29000 {
  679. compatible = "snps,dw-apb-uart";
  680. reg = <0x1c29000 0x400>;
  681. interrupts = <0x0 0x4 0x4>;
  682. reg-shift = <0x2>;
  683. reg-io-width = <0x4>;
  684. clocks = <0x1c 0x14>;
  685. resets = <0x1d 0x14>;
  686. dmas = <0x1e 0xa 0x1e 0xa>;
  687. dma-names = "rx", "tx";
  688. status = "disabled";
  689. };
  690.  
  691. serial@01c29400 {
  692. compatible = "snps,dw-apb-uart";
  693. reg = <0x1c29400 0x400>;
  694. interrupts = <0x0 0x5 0x4>;
  695. reg-shift = <0x2>;
  696. reg-io-width = <0x4>;
  697. clocks = <0x1c 0x15>;
  698. resets = <0x1d 0x15>;
  699. dmas = <0x1e 0x16 0x1e 0x16>;
  700. dma-names = "rx", "tx";
  701. status = "disabled";
  702. };
  703.  
  704. i2c@01c2ac00 {
  705. compatible = "allwinner,sun6i-a31-i2c";
  706. reg = <0x1c2ac00 0x400>;
  707. interrupts = <0x0 0x6 0x4>;
  708. clocks = <0x1c 0x0>;
  709. resets = <0x1d 0x0>;
  710. status = "failed";
  711. #address-cells = <0x1>;
  712. #size-cells = <0x0>;
  713. pinctrl-names = "default";
  714. pinctrl-0 = <0x20>;
  715. };
  716.  
  717. i2c@01c2b000 {
  718. compatible = "allwinner,sun6i-a31-i2c";
  719. reg = <0x1c2b000 0x400>;
  720. interrupts = <0x0 0x7 0x4>;
  721. clocks = <0x1c 0x1>;
  722. resets = <0x1d 0x1>;
  723. status = "okay";
  724. #address-cells = <0x1>;
  725. #size-cells = <0x0>;
  726. pinctrl-names = "default";
  727. pinctrl-0 = <0x21>;
  728. };
  729.  
  730. i2c@01c2b400 {
  731. compatible = "allwinner,sun6i-a31-i2c";
  732. reg = <0x1c2b400 0x400>;
  733. interrupts = <0x0 0x8 0x4>;
  734. clocks = <0x1c 0x2>;
  735. resets = <0x1d 0x2>;
  736. status = "okay";
  737. #address-cells = <0x1>;
  738. #size-cells = <0x0>;
  739. pinctrl-names = "default";
  740. pinctrl-0 = <0x22>;
  741.  
  742. rtc@51 {
  743. compatible = "nxp,pcf8563";
  744. reg = <0x51>;
  745. };
  746. };
  747.  
  748. i2c@01c2b800 {
  749. compatible = "allwinner,sun6i-a31-i2c";
  750. reg = <0x1c2b800 0x400>;
  751. interrupts = <0x0 0x9 0x4>;
  752. clocks = <0x1c 0x3>;
  753. resets = <0x1d 0x3>;
  754. status = "disabled";
  755. #address-cells = <0x1>;
  756. #size-cells = <0x0>;
  757. };
  758.  
  759. ethernet@01c30000 {
  760. compatible = "allwinner,sun7i-a20-gmac";
  761. reg = <0x1c30000 0x1054>;
  762. interrupts = <0x0 0x52 0x4>;
  763. interrupt-names = "macirq";
  764. clocks = <0xe 0x11 0x23>;
  765. clock-names = "stmmaceth", "allwinner_gmac_tx";
  766. resets = <0xf 0x11>;
  767. reset-names = "stmmaceth";
  768. snps,pbl = <0x2>;
  769. snps,fixed-burst;
  770. snps,force_sf_dma_mode;
  771. status = "okay";
  772. #address-cells = <0x1>;
  773. #size-cells = <0x0>;
  774. pinctrl-names = "default";
  775. pinctrl-0 = <0x24>;
  776. phy = <0x25>;
  777. phy-mode = "rgmii";
  778.  
  779. ethernet-phy@1 {
  780. reg = <0x1>;
  781. linux,phandle = <0x25>;
  782. phandle = <0x25>;
  783. };
  784. };
  785.  
  786. timer@01c60000 {
  787. compatible = "allwinner,sun6i-a31-hstimer", "allwinner,sun7i-a20-hstimer";
  788. reg = <0x1c60000 0x1000>;
  789. interrupts = <0x0 0x33 0x4 0x0 0x34 0x4 0x0 0x35 0x4 0x0 0x36 0x4>;
  790. clocks = <0xe 0x13>;
  791. resets = <0xf 0x13>;
  792. };
  793.  
  794. spi@01c68000 {
  795. compatible = "allwinner,sun6i-a31-spi";
  796. reg = <0x1c68000 0x1000>;
  797. interrupts = <0x0 0x41 0x4>;
  798. clocks = <0xe 0x14 0x26>;
  799. clock-names = "ahb", "mod";
  800. dmas = <0x1e 0x17 0x1e 0x17>;
  801. dma-names = "rx", "tx";
  802. resets = <0xf 0x14>;
  803. status = "disabled";
  804. };
  805.  
  806. spi@01c69000 {
  807. compatible = "allwinner,sun6i-a31-spi";
  808. reg = <0x1c69000 0x1000>;
  809. interrupts = <0x0 0x42 0x4>;
  810. clocks = <0xe 0x15 0x27>;
  811. clock-names = "ahb", "mod";
  812. dmas = <0x1e 0x18 0x1e 0x18>;
  813. dma-names = "rx", "tx";
  814. resets = <0xf 0x15>;
  815. status = "disabled";
  816. };
  817.  
  818. spi@01c6a000 {
  819. compatible = "allwinner,sun6i-a31-spi";
  820. reg = <0x1c6a000 0x1000>;
  821. interrupts = <0x0 0x43 0x4>;
  822. clocks = <0xe 0x16 0x28>;
  823. clock-names = "ahb", "mod";
  824. dmas = <0x1e 0x19 0x1e 0x19>;
  825. dma-names = "rx", "tx";
  826. resets = <0xf 0x16>;
  827. status = "disabled";
  828. };
  829.  
  830. spi@01c6b000 {
  831. compatible = "allwinner,sun6i-a31-spi";
  832. reg = <0x1c6b000 0x1000>;
  833. interrupts = <0x0 0x44 0x4>;
  834. clocks = <0xe 0x17 0x29>;
  835. clock-names = "ahb", "mod";
  836. dmas = <0x1e 0x1a 0x1e 0x1a>;
  837. dma-names = "rx", "tx";
  838. resets = <0xf 0x17>;
  839. status = "disabled";
  840. };
  841.  
  842. interrupt-controller@01c81000 {
  843. compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
  844. reg = <0x1c81000 0x1000 0x1c82000 0x1000 0x1c84000 0x2000 0x1c86000 0x2000>;
  845. interrupt-controller;
  846. #interrupt-cells = <0x3>;
  847. interrupts = <0x1 0x9 0xf04>;
  848. linux,phandle = <0x1>;
  849. phandle = <0x1>;
  850. };
  851.  
  852. rtc@01f00000 {
  853. compatible = "allwinner,sun6i-a31-rtc";
  854. reg = <0x1f00000 0x54>;
  855. interrupts = <0x0 0x28 0x4 0x0 0x29 0x4>;
  856. };
  857.  
  858. interrupt-controller@01f00c0c {
  859. compatible = "allwinner,sun6i-a31-sc-nmi";
  860. interrupt-controller;
  861. #interrupt-cells = <0x2>;
  862. reg = <0x1f00c0c 0x38>;
  863. interrupts = <0x0 0x20 0x4>;
  864. };
  865.  
  866. prcm@01f01400 {
  867. compatible = "allwinner,sun6i-a31-prcm";
  868. reg = <0x1f01400 0x200>;
  869.  
  870. ar100_clk {
  871. compatible = "allwinner,sun6i-a31-ar100-clk";
  872. #clock-cells = <0x0>;
  873. clocks = <0x4 0x3 0x2 0x0 0x2 0x0>;
  874. clock-output-names = "ar100";
  875. linux,phandle = <0x2a>;
  876. phandle = <0x2a>;
  877. };
  878.  
  879. ahb0_clk {
  880. compatible = "fixed-factor-clock";
  881. #clock-cells = <0x0>;
  882. clock-div = <0x1>;
  883. clock-mult = <0x1>;
  884. clocks = <0x2a>;
  885. clock-output-names = "ahb0";
  886. linux,phandle = <0x2b>;
  887. phandle = <0x2b>;
  888. };
  889.  
  890. apb0_clk {
  891. compatible = "allwinner,sun6i-a31-apb0-clk";
  892. #clock-cells = <0x0>;
  893. clocks = <0x2b>;
  894. clock-output-names = "apb0";
  895. linux,phandle = <0x2c>;
  896. phandle = <0x2c>;
  897. };
  898.  
  899. apb0_gates_clk {
  900. compatible = "allwinner,sun6i-a31-apb0-gates-clk";
  901. #clock-cells = <0x1>;
  902. clocks = <0x2c>;
  903. clock-output-names = "apb0_pio", "apb0_ir", "apb0_timer", "apb0_p2wi", "apb0_uart", "apb0_1wire", "apb0_i2c";
  904. linux,phandle = <0x2d>;
  905. phandle = <0x2d>;
  906. };
  907.  
  908. apb0_rst {
  909. compatible = "allwinner,sun6i-a31-clock-reset";
  910. #reset-cells = <0x1>;
  911. linux,phandle = <0x2e>;
  912. phandle = <0x2e>;
  913. };
  914. };
  915.  
  916. cpucfg@01f01c00 {
  917. compatible = "allwinner,sun6i-a31-cpuconfig";
  918. reg = <0x1f01c00 0x300>;
  919. };
  920.  
  921. pinctrl@01f02c00 {
  922. compatible = "allwinner,sun6i-a31-r-pinctrl";
  923. reg = <0x1f02c00 0x400>;
  924. interrupts = <0x0 0x2d 0x4 0x0 0x2e 0x4>;
  925. clocks = <0x2d 0x0>;
  926. resets = <0x2e 0x0>;
  927. gpio-controller;
  928. interrupt-controller;
  929. #interrupt-cells = <0x2>;
  930. #size-cells = <0x0>;
  931. #gpio-cells = <0x3>;
  932. };
  933. };
  934.  
  935. ahci-5v {
  936. compatible = "regulator-fixed";
  937. pinctrl-names = "default";
  938. pinctrl-0 = <0x2f>;
  939. regulator-name = "ahci-5v";
  940. regulator-min-microvolt = <0x4c4b40>;
  941. regulator-max-microvolt = <0x4c4b40>;
  942. regulator-boot-on;
  943. enable-active-high;
  944. gpio = <0x14 0x1 0x8 0x0>;
  945. status = "disabled";
  946. };
  947.  
  948. usb0-vbus {
  949. compatible = "regulator-fixed";
  950. pinctrl-names = "default";
  951. pinctrl-0 = <0x30>;
  952. regulator-name = "usb0-vbus";
  953. regulator-min-microvolt = <0x4c4b40>;
  954. regulator-max-microvolt = <0x4c4b40>;
  955. enable-active-high;
  956. gpio = <0x14 0x1 0x9 0x0>;
  957. status = "disabled";
  958. };
  959.  
  960. usb1-vbus {
  961. compatible = "regulator-fixed";
  962. pinctrl-names = "default";
  963. pinctrl-0 = <0x31>;
  964. regulator-name = "usb1-vbus";
  965. regulator-min-microvolt = <0x4c4b40>;
  966. regulator-max-microvolt = <0x4c4b40>;
  967. enable-active-high;
  968. gpio = <0x14 0x7 0x18 0x0>;
  969. status = "okay";
  970. linux,phandle = <0x19>;
  971. phandle = <0x19>;
  972. };
  973.  
  974. usb2-vbus {
  975. compatible = "regulator-fixed";
  976. pinctrl-names = "default";
  977. pinctrl-0 = <0x32>;
  978. regulator-name = "usb2-vbus";
  979. regulator-min-microvolt = <0x4c4b40>;
  980. regulator-max-microvolt = <0x4c4b40>;
  981. enable-active-high;
  982. gpio = <0x14 0x7 0x3 0x0>;
  983. status = "disabled";
  984. };
  985.  
  986. vcc3v0 {
  987. compatible = "regulator-fixed";
  988. regulator-name = "vcc3v0";
  989. regulator-min-microvolt = <0x2dc6c0>;
  990. regulator-max-microvolt = <0x2dc6c0>;
  991. linux,phandle = <0x13>;
  992. phandle = <0x13>;
  993. };
  994.  
  995. vcc3v3 {
  996. compatible = "regulator-fixed";
  997. regulator-name = "vcc3v3";
  998. regulator-min-microvolt = <0x325aa0>;
  999. regulator-max-microvolt = <0x325aa0>;
  1000. };
  1001.  
  1002. vcc5v0 {
  1003. compatible = "regulator-fixed";
  1004. regulator-name = "vcc5v0";
  1005. regulator-min-microvolt = <0x4c4b40>;
  1006. regulator-max-microvolt = <0x4c4b40>;
  1007. };
  1008. };
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