process (clk,reset)
        begin
            if (reset = '1') then
            S <= "000";
            end if;

            if (clk'event and clk='1') then
                S <= Nst;
            end if;

    end process;

Ano(1) <= not S(2);
Ano(0) <= not(Ano(1));

sseg(2) <= Ano(1);
sseg(3) <= Ano(1);
sseg(4) <= Ano(1);

sseg(0) <= '0';

sseg(1) <= Ano(0);
sseg(5) <= Ano(0);
sseg(6) <= Ano(0);



    Nst <= std_logic_vector(unsigned(S)+1) when cw = '1' else
   std_logic_vector(unsigned(S)-1);

    an <= "0111" when S = "000" or S = "111" else
        "1011" when S = "001" or S = "110" else
        "1101" when S = "010" or S = "101" else
        "1110";