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  1. ######
  2. #
  3. # Top level dts file
  4. # Standard Linux distribution include files are not in listed here
  5. #
  6. ######
  7.  
  8. /*
  9. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. /dts-v1/;
  16.  
  17. #include "am33xx.dtsi"
  18. #include "am335x-bone-common.dtsi"
  19. #include "am335x-bone-common-pinmux.dtsi"
  20.  
  21. / {
  22. model = "TI AM335x BeagleBone Black";
  23. compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
  24. };
  25.  
  26. &ldo3_reg {
  27. regulator-min-microvolt = <1800000>;
  28. regulator-max-microvolt = <1800000>;
  29. regulator-always-on;
  30. };
  31.  
  32. &ocp {
  33. /* clkout2 */
  34. P9_41_pinmux {
  35. status = "disabled";
  36. };
  37. /* mmc1 */
  38. P9_92_pinmux {
  39. status = "disabled";
  40. };
  41. };
  42.  
  43. &mmc1 {
  44. vmmc-supply = <&vmmcsd_fixed>;
  45. };
  46.  
  47. &am33xx_pinmux {
  48. pinctrl-names = "default";
  49. pinctrl-0 = <&clkout2_pin>;
  50. };
  51.  
  52. #include "am335x-boneblack-emmc.dtsi"
  53. /* #include "am335x-boneblack-nxp-hdmi-audio.dtsi" */
  54. #include "am335x-bone-i2c2-cape-eeprom.dtsi"
  55. #include "am335x-bone-sakura-cube.dtsi"
  56. #include "am335x-bone-ttyO2.dtsi"
  57.  
  58. ######
  59. #
  60. # am335x-bone-sakura-cube.dtsi
  61. #
  62. ######
  63.  
  64. /*
  65. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  66. *
  67. * This program is free software; you can redistribute it and/or modify
  68. * it under the terms of the GNU General Public License version 2 as
  69. * published by the Free Software Foundation.
  70. */
  71.  
  72. /* Backlight */
  73. #include "am335x-bone-bl-gpio1-18.dtsi"
  74.  
  75. /* Touchscreen */
  76. #include "am335x-bone-ti-tscadc-4-wire.dtsi"
  77.  
  78. /* Panel */
  79. /* #include "am335x-bone-panel-320x240.dtsi" */
  80. /* #include "am335x-bone-panel-480x272.dtsi" */
  81. #include "am335x-bone-panel-640x480-bgrx_16bpp.dtsi"
  82. /* #include "am335x-bone-panel-800x480.dtsi" */
  83. /* #include "am335x-bone-panel-1024x600-24bit.dtsi" */
  84.  
  85. #include "am335x-boneblack-sakura-gpio.dtsi"
  86.  
  87. ######
  88. #
  89. # am335x-bone-panel-640x480-bgrx_16bpp.dtsi
  90. #
  91. ######
  92.  
  93. /*
  94. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  95. *
  96. * This program is free software; you can redistribute it and/or modify
  97. * it under the terms of the GNU General Public License version 2 as
  98. * published by the Free Software Foundation.
  99. */
  100.  
  101. &ocp {
  102. /* hdmi */
  103. P8_27_pinmux {
  104. status = "disabled";
  105. };
  106. P8_28_pinmux {
  107. status = "disabled";
  108. };
  109. P8_29_pinmux {
  110. status = "disabled";
  111. };
  112. P8_30_pinmux {
  113. status = "disabled";
  114. };
  115. P8_31_pinmux {
  116. status = "disabled";
  117. };
  118. P8_32_pinmux {
  119. status = "disabled";
  120. };
  121. P8_33_pinmux {
  122. status = "disabled";
  123. };
  124. P8_34_pinmux {
  125. status = "disabled";
  126. };
  127. P8_35_pinmux {
  128. status = "disabled";
  129. };
  130. P8_36_pinmux {
  131. status = "disabled";
  132. };
  133. P8_37_pinmux {
  134. status = "disabled";
  135. };
  136. P8_38_pinmux {
  137. status = "disabled";
  138. };
  139. P8_39_pinmux {
  140. status = "disabled";
  141. };
  142. P8_40_pinmux {
  143. status = "disabled";
  144. };
  145. P8_41_pinmux {
  146. status = "disabled";
  147. };
  148. P8_42_pinmux {
  149. status = "disabled";
  150. };
  151. P8_43_pinmux {
  152. status = "disabled";
  153. };
  154. P8_44_pinmux {
  155. status = "disabled";
  156. };
  157. P8_45_pinmux {
  158. status = "disabled";
  159. };
  160. P8_46_pinmux {
  161. status = "disabled";
  162. };
  163. };
  164.  
  165. &lcdc {
  166. bgrx_16bpp = <1>;
  167. status = "okay";
  168. };
  169.  
  170. / {
  171. panel {
  172. status = "okay";
  173. compatible = "ti,tilcdc,panel";
  174. pinctrl-names = "default";
  175. pinctrl-0 = <&bbcape_lcd_pins>;
  176. panel-info {
  177. ac-bias = <255>;
  178. ac-bias-intrpt = <0>;
  179. dma-burst-sz = <16>;
  180. bpp = <16>;
  181. fdd = <0x80>;
  182. sync-edge = <0>;
  183. sync-ctrl = <1>;
  184. raster-order = <0>;
  185. fifo-th = <0>;
  186. };
  187. display-timings {
  188. native-mode = <&timing0>;
  189. timing0: 640x480 {
  190. clock-frequency = <25200000>;
  191. hactive = <640>;
  192. vactive = <480>;
  193. hfront-porch = <16>;
  194. hback-porch = <48>;
  195. hsync-len = <96>;
  196. vback-porch = <33>;
  197. vfront-porch = <10>;
  198. vsync-len = <2>;
  199. hsync-active = <0>;
  200. vsync-active = <0>;
  201. de-active = <0>;
  202. pixelclk-active = <0>;
  203. };
  204. };
  205. };
  206. };
  207.  
  208. ######
  209. #
  210. # am335x-boneblack-sakura-gpio.dtsi
  211. #
  212. ######
  213.  
  214. &ocp {
  215. P8_7_pinmux { /* GPIO 2 2 Pressure Sensor power enable */
  216. status = "disabled";
  217. };
  218. P8_8_pinmux { /* GPIO 2 3 Spare Out 1 */
  219. status = "disabled";
  220. };
  221. P8_10_pinmux { /* GPIO 2 4 Spare Out 2 */
  222. status = "disabled";
  223. };
  224. P8_11_pinmux { /* GPIO 1 13 Data 18 */
  225. status = "disabled";
  226. };
  227. P8_12_pinmux { /* GPIO 1 12 Data 19 */
  228. status = "disabled";
  229. };
  230. P8_13_pinmux { /* GPIO 0 13 Data 22 */
  231. status = "disabled";
  232. };
  233. P8_14_pinmux { /* GPIO 0 26 Data 21 */
  234. status = "disabled";
  235. };
  236. P8_15_pinmux { /* GPIO 1 15 Data 16 */
  237. status = "disabled";
  238. };
  239. P8_16_pinmux { /* GPIO 1 14 Data 17 */
  240. status = "disabled";
  241. };
  242. P8_17_pinmux { /* GPIO 0 27 Data 20 */
  243. status = "disabled";
  244. };
  245. P8_18_pinmux { /* GPIO 2 1 Spare Out 3 */
  246. status = "disabled";
  247. };
  248. P8_19_pinmux { /* GPIO 0 22 Data 23 */
  249. status = "disabled";
  250. };
  251.  
  252. P9_11_pinmux { /* GPIO 0 30 UDC */
  253. status = "disabled";
  254. };
  255. P9_12_pinmux { /* GPIO 1 28 POT Sel */
  256. status = "disabled";
  257. };
  258. P9_15_pinmux { /* GPIO 1 16 KeyBoard En* */
  259. status = "disabled";
  260. };
  261. P9_16_pinmux { /* GPIO 1 19 LRC */
  262. status = "disabled";
  263. };
  264. P9_23_pinmux { /* GPIO 1 17 Led Write strobe */
  265. status = "disabled";
  266. };
  267.  
  268. P8_07_pinmux {
  269. compatible = "bone-pinmux-helper";
  270. status = "okay";
  271.  
  272. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_high", "gpio_low";
  273. pinctrl-0 = <&P8_07_default_pin>;
  274. pinctrl-1 = <&P8_07_gpio_pin>;
  275. pinctrl-2 = <&P8_07_gpio_pu_pin>;
  276. pinctrl-3 = <&P8_07_gpio_pd_pin>;
  277. pinctrl-4 = <&P8_07_gpio_high_pin>;
  278. pinctrl-5 = <&P8_07_gpio_low_pin>;
  279. };
  280.  
  281. P8_08_pinmux {
  282. compatible = "bone-pinmux-helper";
  283. status = "okay";
  284. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_high", "gpio_low";
  285. pinctrl-0 = <&P8_08_default_pin>;
  286. pinctrl-1 = <&P8_08_gpio_pin>;
  287. pinctrl-2 = <&P8_08_gpio_pu_pin>;
  288. pinctrl-3 = <&P8_08_gpio_pd_pin>;
  289. pinctrl-4 = <&P8_08_gpio_high_pin>;
  290. pinctrl-5 = <&P8_08_gpio_low_pin>;
  291. };
  292.  
  293. P8_10_pinmux {
  294. compatible = "bone-pinmux-helper";
  295. status = "okay";
  296. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_high", "gpio_low";
  297. pinctrl-0 = <&P8_10_default_pin>;
  298. pinctrl-1 = <&P8_10_gpio_pin>;
  299. pinctrl-2 = <&P8_10_gpio_pu_pin>;
  300. pinctrl-3 = <&P8_10_gpio_pd_pin>;
  301. pinctrl-4 = <&P8_10_gpio_high_pin>;
  302. pinctrl-5 = <&P8_10_gpio_low_pin>;
  303. };
  304.  
  305. P8_11_pinmux {
  306. compatible = "bone-pinmux-helper";
  307. status = "okay";
  308. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
  309. pinctrl-0 = <&P8_11_default_pin>;
  310. pinctrl-1 = <&P8_11_gpio_pin>;
  311. pinctrl-2 = <&P8_11_gpio_pu_pin>;
  312. pinctrl-3 = <&P8_11_gpio_pd_pin>;
  313. };
  314.  
  315. P8_12_pinmux {
  316. compatible = "bone-pinmux-helper";
  317. status = "okay";
  318. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
  319. pinctrl-0 = <&P8_12_default_pin>;
  320. pinctrl-1 = <&P8_12_gpio_pin>;
  321. pinctrl-2 = <&P8_12_gpio_pu_pin>;
  322. pinctrl-3 = <&P8_12_gpio_pd_pin>;
  323. };
  324.  
  325. P8_13_pinmux {
  326. compatible = "bone-pinmux-helper";
  327. status = "okay";
  328. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
  329. pinctrl-0 = <&P8_13_default_pin>;
  330. pinctrl-1 = <&P8_13_gpio_pin>;
  331. pinctrl-2 = <&P8_13_gpio_pu_pin>;
  332. pinctrl-3 = <&P8_13_gpio_pd_pin>;
  333. };
  334.  
  335. P8_14_pinmux {
  336. compatible = "bone-pinmux-helper";
  337. status = "okay";
  338. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
  339. pinctrl-0 = <&P8_14_default_pin>;
  340. pinctrl-1 = <&P8_14_gpio_pin>;
  341. pinctrl-2 = <&P8_14_gpio_pu_pin>;
  342. pinctrl-3 = <&P8_14_gpio_pd_pin>;
  343. };
  344.  
  345. P8_15_pinmux {
  346. compatible = "bone-pinmux-helper";
  347. status = "okay";
  348. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
  349. pinctrl-0 = <&P8_15_default_pin>;
  350. pinctrl-1 = <&P8_15_gpio_pin>;
  351. pinctrl-2 = <&P8_15_gpio_pu_pin>;
  352. pinctrl-3 = <&P8_15_gpio_pd_pin>;
  353. };
  354.  
  355. P8_16_pinmux {
  356. compatible = "bone-pinmux-helper";
  357. status = "okay";
  358. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
  359. pinctrl-0 = <&P8_16_default_pin>;
  360. pinctrl-1 = <&P8_16_gpio_pin>;
  361. pinctrl-2 = <&P8_16_gpio_pu_pin>;
  362. pinctrl-3 = <&P8_16_gpio_pd_pin>;
  363. };
  364.  
  365. P8_17_pinmux {
  366. compatible = "bone-pinmux-helper";
  367. status = "okay";
  368. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
  369. pinctrl-0 = <&P8_17_default_pin>;
  370. pinctrl-1 = <&P8_17_gpio_pin>;
  371. pinctrl-2 = <&P8_17_gpio_pu_pin>;
  372. pinctrl-3 = <&P8_17_gpio_pd_pin>;
  373. };
  374.  
  375. P8_18_pinmux {
  376. compatible = "bone-pinmux-helper";
  377. status = "okay";
  378. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
  379. pinctrl-0 = <&P8_18_default_pin>;
  380. pinctrl-1 = <&P8_18_gpio_pin>;
  381. pinctrl-2 = <&P8_18_gpio_pu_pin>;
  382. pinctrl-3 = <&P8_18_gpio_pd_pin>;
  383. };
  384.  
  385. P8_19_pinmux {
  386. compatible = "bone-pinmux-helper";
  387. status = "okay";
  388. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
  389. pinctrl-0 = <&P8_19_default_pin>;
  390. pinctrl-1 = <&P8_19_gpio_pin>;
  391. pinctrl-2 = <&P8_19_gpio_pu_pin>;
  392. pinctrl-3 = <&P8_19_gpio_pd_pin>;
  393. };
  394.  
  395. /* P9_11_pinmux {
  396. compatible = "bone-pinmux-helper";
  397. status = "okay";
  398. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_high", "gpio_low";
  399. pinctrl-0 = <&P9_11_default_pin>;
  400. pinctrl-1 = <&P9_11_gpio_pin>;
  401. pinctrl-2 = <&P9_11_gpio_pu_pin>;
  402. pinctrl-3 = <&P9_11_gpio_pd_pin>;
  403. pinctrl-4 = <&P9_11_gpio_high_pin>;
  404. pinctrl-5 = <&P9_11_gpio_low_pin>;
  405. };
  406. */
  407. P9_12_pinmux {
  408. compatible = "bone-pinmux-helper";
  409. status = "okay";
  410. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_high", "gpio_low";
  411. pinctrl-0 = <&P9_12_default_pin>;
  412. pinctrl-1 = <&P9_12_gpio_pin>;
  413. pinctrl-2 = <&P9_12_gpio_pu_pin>;
  414. pinctrl-3 = <&P9_12_gpio_pd_pin>;
  415. pinctrl-4 = <&P9_12_gpio_high_pin>;
  416. pinctrl-5 = <&P9_12_gpio_low_pin>;
  417. };
  418.  
  419. P9_15_pinmux {
  420. compatible = "bone-pinmux-helper";
  421. status = "okay";
  422. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_high", "gpio_low";
  423. pinctrl-0 = <&P9_15_default_pin>;
  424. pinctrl-1 = <&P9_15_gpio_pin>;
  425. pinctrl-2 = <&P9_15_gpio_pu_pin>;
  426. pinctrl-3 = <&P9_15_gpio_pd_pin>;
  427. pinctrl-4 = <&P9_15_gpio_high_pin>;
  428. pinctrl-5 = <&P9_15_gpio_low_pin>;
  429. };
  430.  
  431. /* P9_16_pinmux {
  432. compatible = "bone-pinmux-helper";
  433. status = "okay";
  434. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_high", "gpio_low";
  435. pinctrl-0 = <&P9_16_default_pin>;
  436. pinctrl-1 = <&P9_16_gpio_pin>;
  437. pinctrl-2 = <&P9_16_gpio_pu_pin>;
  438. pinctrl-3 = <&P9_16_gpio_pd_pin>;
  439. pinctrl-4 = <&P9_16_gpio_high_pin>;
  440. pinctrl-5 = <&P9_16_gpio_low_pin>;
  441. };
  442. */
  443. P9_23_pinmux {
  444. compatible = "bone-pinmux-helper";
  445. status = "okay";
  446. pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_high", "gpio_low";
  447. pinctrl-0 = <&P9_23_default_pin>;
  448. pinctrl-1 = <&P9_23_gpio_pin>;
  449. pinctrl-2 = <&P9_23_gpio_pu_pin>;
  450. pinctrl-3 = <&P9_23_gpio_pd_pin>;
  451. pinctrl-4 = <&P9_23_gpio_high_pin>;
  452. pinctrl-5 = <&P9_23_gpio_low_pin>;
  453. };
  454.  
  455. cape-universal {
  456. compatible = "gpio-of-helper";
  457. status = "okay";
  458. pinctrl-names = "default";
  459. pinctrl-0 = <>;
  460.  
  461. P8_07 {
  462. gpio-name = "P8_07";
  463. gpio = <&gpio2 2 0>;
  464. output;
  465. dir-changeable;
  466. };
  467. P8_08 {
  468. gpio-name = "P8_08";
  469. gpio = <&gpio2 3 0>;
  470. input;
  471. dir-changeable;
  472. };
  473. P8_10 {
  474. gpio-name = "P8_10";
  475. gpio = <&gpio2 4 0>;
  476. input;
  477. dir-changeable;
  478. };
  479. P8_11 {
  480. gpio-name = "P8_11";
  481. gpio = <&gpio1 13 0>;
  482. input;
  483. dir-changeable;
  484. };
  485. P8_12 {
  486. gpio-name = "P8_12";
  487. gpio = <&gpio1 12 0>;
  488. input;
  489. dir-changeable;
  490. };
  491. P8_13 {
  492. gpio-name = "P8_13";
  493. gpio = <&gpio0 23 0>;
  494. input;
  495. dir-changeable;
  496. };
  497. P8_14 {
  498. gpio-name = "P8_14";
  499. gpio = <&gpio0 26 0>;
  500. input;
  501. dir-changeable;
  502. };
  503. P8_15 {
  504. gpio-name = "P8_15";
  505. gpio = <&gpio1 15 0>;
  506. input;
  507. dir-changeable;
  508. };
  509. P8_16 {
  510. gpio-name = "P8_16";
  511. gpio = <&gpio1 14 0>;
  512. input;
  513. dir-changeable;
  514. };
  515. P8_17 {
  516. gpio-name = "P8_17";
  517. gpio = <&gpio0 27 0>;
  518. input;
  519. dir-changeable;
  520. };
  521. P8_18 {
  522. gpio-name = "P8_18";
  523. gpio = <&gpio2 1 0>;
  524. input;
  525. dir-changeable;
  526. };
  527. P8_19 {
  528. gpio-name = "P8_19";
  529. gpio = <&gpio0 22 0>;
  530. input;
  531. dir-changeable;
  532. };
  533.  
  534.  
  535. /* P9_11 {
  536. gpio-name = "P9_11";
  537. gpio = <&gpio0 30 0>;
  538. output;
  539. dir-changeable;
  540. }; */
  541. P9_12 {
  542. gpio-name = "P9_12";
  543. gpio = <&gpio1 28 0>;
  544. output;
  545. dir-changeable;
  546. };
  547. P9_15 {
  548. gpio-name = "P9_15";
  549. gpio = <&gpio1 16 0>;
  550. output;
  551. dir-changeable;
  552. };
  553. /* P9_16 {
  554. gpio-name = "P9_16";
  555. gpio = <&gpio1 19 0>;
  556. output;
  557. dir-changeable;
  558. }; */
  559. P9_23 {
  560. gpio-name = "P9_23";
  561. gpio = <&gpio1 17 0>;
  562. output;
  563. dir-changeable;
  564. };
  565. };
  566. };
  567.  
  568. &am33xx_pinmux {
  569. gpio_pins_out: pinmux_gpio_out_pins {
  570. pinctrl-single,pins = <
  571. 0x090 (PIN_OUTPUT | MUX_MODE7) /* P8_07, gpio2_2 Pressure Sensor power enable */
  572. 0x070 (PIN_OUTPUT | MUX_MODE7) /* P9_11, gpio0_30 UDC */
  573. 0x078 (PIN_OUTPUT | MUX_MODE7) /* P9_12, gpio1_28 POT Sel */
  574. 0x040 (PIN_OUTPUT | MUX_MODE7) /* P9_15, gpio1_16 KeyBoard En* */
  575. 0x04c (PIN_OUTPUT | MUX_MODE7) /* P9_16, gpio1_19 LRC */
  576. 0x044 (PIN_OUTPUT | MUX_MODE7) /* P9_23, gpio1_17 Led Write strobe */
  577. >;
  578. };
  579.  
  580. gpio_pins_in: pinmux_gpio_in_pins {
  581. pinctrl-single,pins = <
  582. 0x094 (PIN_INPUT | MUX_MODE7) /* P8_08, gpio2_3 Spare Out 1 */
  583. 0x098 (PIN_INPUT | MUX_MODE7) /* P8_10, gpio2_4 Spare Out 2 */
  584. 0x034 (PIN_INPUT | MUX_MODE7) /* P8_11, gpio1_13 Data 18 */
  585. 0x030 (PIN_INPUT | MUX_MODE7) /* P8_12, gpio1_12 Data 19 */
  586. 0x024 (PIN_INPUT | MUX_MODE7) /* P8_13, gpio0_13 Data 22 */
  587. 0x028 (PIN_INPUT | MUX_MODE7) /* P8_14, gpio0_26 Data 21 */
  588. 0x03c (PIN_INPUT | MUX_MODE7) /* P8_15, gpio1_15 Data 16 */
  589. 0x038 (PIN_INPUT | MUX_MODE7) /* P8_16, gpio1_14 Data 17 */
  590. 0x02c (PIN_INPUT | MUX_MODE7) /* P8_17, gpio0_27 Data 20 */
  591. 0x08c (PIN_INPUT | MUX_MODE7) /* P8_18, gpio2_1 Spare Out 3 */
  592. 0x020 (PIN_INPUT | MUX_MODE7) /* P8_19, gpio0_22 Data 23 */
  593. >;
  594. };
  595.  
  596. /* P8_07 (ZCZ ball R7 ) */ /* GPIO 2 2 Pressure Sensor power enable */
  597. P8_07_default_pin: pinmux_P8_07_default_pin {
  598. pinctrl-single,pins = <0x090 0x0F>;
  599. gpio-p8_07_high { default-state = "on"; }; }; /* Mode 7, output, high */
  600. P8_07_gpio_pin: pinmux_P8_07_gpio_pin {
  601. pinctrl-single,pins = <0x090 0x2F>; }; /* Mode 7, RxActive */
  602. P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin {
  603. pinctrl-single,pins = <0x090 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  604. P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin {
  605. pinctrl-single,pins = <0x090 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  606. P8_07_gpio_high_pin: pinmux_P8_07_gpio_high_pin {
  607. pinctrl-single,pins = <0x090 0x0F>;
  608. gpio-p8_07_high { default-state = "on"; }; }; /* Mode 7, output, high */
  609. P8_07_gpio_low_pin: pinmux_P8_07_gpio_low_pin {
  610. pinctrl-single,pins = <0x090 0x0F>;
  611. gpio-p8_07_low { default-state = "off"; }; }; /* Mode 7, output, low */
  612.  
  613. /* P8_08 (ZCZ ball T7 ) */ /* GPIO 2 3 Spare Out 1 */
  614. P8_08_default_pin: pinmux_P8_08_default_pin {
  615. pinctrl-single,pins = <0x094 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  616. P8_08_gpio_pin: pinmux_P8_08_gpio_pin {
  617. pinctrl-single,pins = <0x094 0x2F>; }; /* Mode 7, RxActive */
  618. P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin {
  619. pinctrl-single,pins = <0x094 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  620. P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin {
  621. pinctrl-single,pins = <0x094 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  622. P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin {
  623. pinctrl-single,pins = <0x094 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  624. P8_08_gpio_high_pin: pinmux_P8_08_gpio_high_pin {
  625. pinctrl-single,pins = <0x094 0x0F>;
  626. gpio-p8_08_high { default-state = "on"; }; }; /* Mode 7, output, high */
  627. P8_08_gpio_low_pin: pinmux_P8_08_gpio_low_pin {
  628. pinctrl-single,pins = <0x094 0x0F>;
  629. gpio-p8_08_low { default-state = "off"; }; }; /* Mode 7, output, low */
  630.  
  631. /* P8_10 (ZCZ ball U6 ) */ /* GPIO 2 4 Spare Out 2 */
  632. P8_10_default_pin: pinmux_P8_10_default_pin {
  633. pinctrl-single,pins = <0x098 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  634. P8_10_gpio_pin: pinmux_P8_10_gpio_pin {
  635. pinctrl-single,pins = <0x098 0x2F>; }; /* Mode 7, RxActive */
  636. P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin {
  637. pinctrl-single,pins = <0x098 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  638. P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin {
  639. pinctrl-single,pins = <0x098 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  640. P8_10_gpio_high_pin: pinmux_P8_10_gpio_high_pin {
  641. pinctrl-single,pins = <0x098 0x0F>;
  642. gpio-p8_10_high { default-state = "on"; }; }; /* Mode 7, output, high */
  643. P8_10_gpio_low_pin: pinmux_P8_10_gpio_low_pin {
  644. pinctrl-single,pins = <0x098 0x0F>;
  645. gpio-p8_10_low { default-state = "off"; }; }; /* Mode 7, output, low */
  646.  
  647. /* P8_11 (ZCZ ball R12) */ /* GPIO 1 13 Data 18 */
  648. P8_11_default_pin: pinmux_P8_11_default_pin {
  649. pinctrl-single,pins = <0x034 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  650. P8_11_gpio_pin: pinmux_P8_11_gpio_pin {
  651. pinctrl-single,pins = <0x034 0x2F>; }; /* Mode 7, RxActive */
  652. P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin {
  653. pinctrl-single,pins = <0x034 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  654. P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin {
  655. pinctrl-single,pins = <0x034 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  656.  
  657. /* P8_12 (ZCZ ball T12) */ /* GPIO 1 12 Data 19 */
  658. P8_12_default_pin: pinmux_P8_12_default_pin {
  659. pinctrl-single,pins = <0x030 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  660. P8_12_gpio_pin: pinmux_P8_12_gpio_pin {
  661. pinctrl-single,pins = <0x030 0x2F>; }; /* Mode 7, RxActive */
  662. P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin {
  663. pinctrl-single,pins = <0x030 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  664. P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin {
  665. pinctrl-single,pins = <0x030 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  666.  
  667. /* P8_13 (ZCZ ball T10) */ /* GPIO 0 13 Data 22 */
  668. P8_13_default_pin: pinmux_P8_13_default_pin {
  669. pinctrl-single,pins = <0x024 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  670. P8_13_gpio_pin: pinmux_P8_13_gpio_pin {
  671. pinctrl-single,pins = <0x024 0x2F>; }; /* Mode 7, RxActive */
  672. P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin {
  673. pinctrl-single,pins = <0x024 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  674. P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin {
  675. pinctrl-single,pins = <0x024 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  676.  
  677. /* P8_14 (ZCZ ball T11) */ /* GPIO 0 26 Data 21 */
  678. P8_14_default_pin: pinmux_P8_14_default_pin {
  679. pinctrl-single,pins = <0x028 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  680. P8_14_gpio_pin: pinmux_P8_14_gpio_pin {
  681. pinctrl-single,pins = <0x028 0x2F>; }; /* Mode 7, RxActive */
  682. P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin {
  683. pinctrl-single,pins = <0x028 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  684. P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin {
  685. pinctrl-single,pins = <0x028 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  686.  
  687. /* P8_15 (ZCZ ball U13) */ /* GPIO 1 15 Data 16 */
  688. P8_15_default_pin: pinmux_P8_15_default_pin {
  689. pinctrl-single,pins = <0x03c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  690. P8_15_gpio_pin: pinmux_P8_15_gpio_pin {
  691. pinctrl-single,pins = <0x03c 0x2F>; }; /* Mode 7, RxActive */
  692. P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin {
  693. pinctrl-single,pins = <0x03c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  694. P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin {
  695. pinctrl-single,pins = <0x03c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  696.  
  697. /* P8_16 (ZCZ ball V13) */ /* GPIO 1 14 Data 17 */
  698. P8_16_default_pin: pinmux_P8_16_default_pin {
  699. pinctrl-single,pins = <0x038 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  700. P8_16_gpio_pin: pinmux_P8_16_gpio_pin {
  701. pinctrl-single,pins = <0x038 0x2F>; }; /* Mode 7, RxActive */
  702. P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin {
  703. pinctrl-single,pins = <0x038 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  704. P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin {
  705. pinctrl-single,pins = <0x038 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  706.  
  707. /* P8_17 (ZCZ ball U12) */ /* GPIO 0 27 Data 20 */
  708. P8_17_default_pin: pinmux_P8_17_default_pin {
  709. pinctrl-single,pins = <0x02c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  710. P8_17_gpio_pin: pinmux_P8_17_gpio_pin {
  711. pinctrl-single,pins = <0x02c 0x2F>; }; /* Mode 7, RxActive */
  712. P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin {
  713. pinctrl-single,pins = <0x02c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  714. P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin {
  715. pinctrl-single,pins = <0x02c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  716.  
  717. /* P8_18 (ZCZ ball V12) */ /* GPIO 2 1 Spare Out 3 */
  718. P8_18_default_pin: pinmux_P8_18_default_pin {
  719. pinctrl-single,pins = <0x08c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  720. P8_18_gpio_pin: pinmux_P8_18_gpio_pin {
  721. pinctrl-single,pins = <0x08c 0x2F>; }; /* Mode 7, RxActive */
  722. P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin {
  723. pinctrl-single,pins = <0x08c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  724. P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin {
  725. pinctrl-single,pins = <0x08c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  726.  
  727. /* P8_19 (ZCZ ball U10) */ /* GPIO 0 22 Data 23 */
  728. P8_19_default_pin: pinmux_P8_19_default_pin {
  729. pinctrl-single,pins = <0x020 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  730. P8_19_gpio_pin: pinmux_P8_19_gpio_pin {
  731. pinctrl-single,pins = <0x020 0x2F>; }; /* Mode 7, RxActive */
  732. P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin {
  733. pinctrl-single,pins = <0x020 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  734. P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin {
  735. pinctrl-single,pins = <0x020 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  736.  
  737. /* P9_11 (ZCZ ball T17) */ /* GPIO 0 30 UDC */
  738. P9_11_default_pin: pinmux_P9_11_default_pin {
  739. pinctrl-single,pins = <0x070 0x0F>;
  740. gpio-p9_11_low { default-state = "off"; }; }; /* Mode 7, output, low */
  741. P9_11_gpio_pin: pinmux_P9_11_gpio_pin {
  742. pinctrl-single,pins = <0x070 0x2F>; }; /* Mode 7, RxActive */
  743. P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin {
  744. pinctrl-single,pins = <0x070 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  745. P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin {
  746. pinctrl-single,pins = <0x070 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  747. P9_11_gpio_high_pin: pinmux_P9_11_gpio_high_pin {
  748. pinctrl-single,pins = <0x070 0x0F>;
  749. gpio-p9_11_high { default-state = "on"; }; }; /* Mode 7, output, high */
  750. P9_11_gpio_low_pin: pinmux_P9_11_gpio_low_pin {
  751. pinctrl-single,pins = <0x070 0x0F>;
  752. gpio-p9_11_low { default-state = "off"; }; }; /* Mode 7, output, low */
  753.  
  754. /* P9_12 (ZCZ ball U18) */ /* GPIO 1 28 POT Sel */
  755. P9_12_default_pin: pinmux_P9_12_default_pin {
  756. pinctrl-single,pins = <0x078 0x0F>;
  757. gpio-p9_12_low { default-state = "off"; }; }; /* Mode 7, output, low */
  758. P9_12_gpio_pin: pinmux_P9_12_gpio_pin {
  759. pinctrl-single,pins = <0x078 0x2F>; }; /* Mode 7, RxActive */
  760. P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin {
  761. pinctrl-single,pins = <0x078 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  762. P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin {
  763. pinctrl-single,pins = <0x078 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  764. P9_12_gpio_high_pin: pinmux_P9_12_gpio_high_pin {
  765. pinctrl-single,pins = <0x078 0x0F>;
  766. gpio-p9_12_high { default-state = "on"; }; }; /* Mode 7, output, high */
  767. P9_12_gpio_low_pin: pinmux_P9_12_gpio_low_pin {
  768. pinctrl-single,pins = <0x078 0x0F>;
  769. gpio-p9_12_low { default-state = "off"; }; }; /* Mode 7, output, low */
  770.  
  771. /* P9_15 (ZCZ ball R13) */ /* GPIO 1 16 KeyBoard En* */
  772. P9_15_default_pin: pinmux_P9_15_default_pin {
  773. pinctrl-single,pins = <0x040 0x0F>;
  774. gpio-p9_15_low { default-state = "off"; }; }; /* Mode 7, output, low */
  775. P9_15_gpio_pin: pinmux_P9_15_gpio_pin {
  776. pinctrl-single,pins = <0x040 0x2F>; }; /* Mode 7, RxActive */
  777. P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin {
  778. pinctrl-single,pins = <0x040 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  779. P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin {
  780. pinctrl-single,pins = <0x040 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  781. P9_15_gpio_high_pin: pinmux_P9_15_gpio_high_pin {
  782. pinctrl-single,pins = <0x040 0x0F>;
  783. gpio-p9_15_high { default-state = "on"; }; }; /* Mode 7, output, high */
  784. P9_15_gpio_low_pin: pinmux_P9_15_gpio_low_pin {
  785. pinctrl-single,pins = <0x040 0x0F>;
  786. gpio-p9_15_low { default-state = "off"; }; }; /* Mode 7, output, low */
  787.  
  788. /* P9_16 (ZCZ ball T14) */ /* GPIO 1 19 LRC */
  789. P9_16_default_pin: pinmux_P9_16_default_pin {
  790. pinctrl-single,pins = <0x04c 0x0F>;
  791. gpio-p9_16_high { default-state = "on"; }; }; /* Mode 7, output, high */
  792. P9_16_gpio_pin: pinmux_P9_16_gpio_pin {
  793. pinctrl-single,pins = <0x04c 0x2F>; }; /* Mode 7, RxActive */
  794. P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin {
  795. pinctrl-single,pins = <0x04c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  796. P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin {
  797. pinctrl-single,pins = <0x04c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  798. P9_16_gpio_high_pin: pinmux_P9_16_gpio_high_pin {
  799. pinctrl-single,pins = <0x04c 0x0F>;
  800. gpio-p9_16_high { default-state = "on"; }; }; /* Mode 7, output, high */
  801. P9_16_gpio_low_pin: pinmux_P9_16_gpio_low_pin {
  802. pinctrl-single,pins = <0x04c 0x0F>;
  803. gpio-p9_16_low { default-state = "off"; }; }; /* Mode 7, output, low */
  804.  
  805. /* P9_23 (ZCZ ball V14) */ /* GPIO 1 17 Led Write strobe */
  806. P9_23_default_pin: pinmux_P9_23_default_pin {
  807. pinctrl-single,pins = <0x044 0x0F>;
  808. gpio-p9_23_def_low { default-state = "off"; }; }; /* Mode 7, output, low */
  809. P9_23_gpio_pin: pinmux_P9_23_gpio_pin {
  810. pinctrl-single,pins = <0x044 0x2F>; }; /* Mode 7, RxActive */
  811. P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin {
  812. pinctrl-single,pins = <0x044 0x37>; }; /* Mode 7, Pull-Up, RxActive */
  813. P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin {
  814. pinctrl-single,pins = <0x044 0x27>; }; /* Mode 7, Pull-Down, RxActive */
  815. P9_23_gpio_high_pin: pinmux_P9_23_gpio_high_pin {
  816. pinctrl-single,pins = <0x044 0x0F>;
  817. gpio-p9_23_high { default-state = "on"; }; }; /* Mode 7, output, high */
  818. P9_23_gpio_low_pin: pinmux_P9_23_gpio_low_pin {
  819. pinctrl-single,pins = <0x044 0x0F>;
  820. gpio-p9_23_low { default-state = "off"; }; }; /* Mode 7, output, low */
  821.  
  822. };
  823.  
  824. / {
  825. cube-gpio {
  826. compatible = "gpio-leds";
  827. pinctrl-names = "default";
  828.  
  829. pinctrl-0 = <&gpio_pins_out>;
  830.  
  831. psen_pwren {
  832. label = "cube:psen:pwren";
  833. gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
  834. default-state = "on";
  835. };
  836.  
  837. /* lcd_udc {
  838. label = "cube:udc";
  839. gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
  840. default-state = "off";
  841. };
  842. */
  843. /* lcd_lrc {
  844. label = "cube:lrc";
  845. gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
  846. default-state = "off";
  847. };
  848. */
  849. psen_potsel {
  850. label = "cube:psen:potsel";
  851. gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
  852. default-state = "on";
  853. };
  854.  
  855. kbd_en {
  856. label = "cube:kbd:en";
  857. gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
  858. default-state = "on";
  859. };
  860.  
  861. led_wr {
  862. label = "cube:led:wr";
  863. gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
  864. default-state = "on";
  865. };
  866. };
  867.  
  868. };
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