msp430_freq_divider

#include <msp430.h>
#include <legacymsp430.h>

// dividers from which one is selected with the dip switch input
const unsigned char dividers[4] = { 12, 13, 14, 15 };

volatile unsigned char hi_cycles; // number of input cycles to leave output high
volatile unsigned char lo_cycles; // number of input cycles to leave output low
volatile unsigned char count;     // current count of input cycles
volatile unsigned char dir;       // flag indicating whether the next transition
                                  //  will be low-to-high or high-to-low

int main(void)
{
    unsigned char idx = 0;

    WDTCTL = WDTPW + WDTHOLD; // disable the watchdog

    hi_cycles = dividers[1] / 2;
    lo_cycles = dividers[1] - hi_cycles;
    count = 0;
    dir = 0;

    P1DIR |= BIT7;           // pulsed output

    P1OUT &= ~(BIT4 + BIT5);
    P1REN |=  (BIT4 + BIT5); // enable internal pull-down for switch input

    P1OUT &= ~BIT7; // init P1.7 to the low state

    P1IES &= ~BIT3; // set interrupt to low-to-hi transition for P1.3
    P1IFG &= ~BIT3; // clear the interrupt flag
    P1IE  |=  BIT3; // enable the interrupt

    __enable_interrupt();

    while(1)
    {
        idx = ((P1IN & BIT5) >> 4) | ((P1IN & BIT4) >> 4);
        hi_cycles = dividers[idx] >> 1;
        lo_cycles = dividers[idx] - hi_cycles;
    }
}

#pragma vector=PORT1_VECTOR
__interrupt void Port_1(void)
{
    if (dir == 0)
    {
        if (++count >= hi_cycles)
        {
            P1OUT &= ~BIT7;
            dir = 1;
            count = 0;
        }
    }
    else
    {
        if (++count >= lo_cycles)
        {
            P1OUT |= BIT7;
            dir = 0;
            count = 0;
        }
    }

    P1IFG &= ~BIT3;
}