mux41

def and

port in ain1
port in ain2
port out aout
net a1

inst and1 nand ain1 ain2 a1
inst and2 nand a1 a1 aout

enddef
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def or

port in oin1
port in oin2
port out oout
net o1
net o2

inst or1 nand oin1 oin1 o1
inst or2 nand oin2 oin2 o2
inst or3 nand o1 o2 oout

enddef
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def not

port in nin
port out nout

inst n1 nand nin nin nout

enddef
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DEF mux41

port in i0
port in i1
port in i2
port in i3
port in s<1:0>
port out z
net m00
net m01
net m02
net m03
net m04
net m05
net m06
net m07
net m08
net m09
net ms1
net ms2
net ms3
net ms4

inst mx01 not s<1> m00
inst mx02 not s<0> m01
inst mx03 and m00 m01 ms1
inst mx04 not s<1> m02
inst mx05 and m02 s<0> ms2
inst mx06 not s<0> m03
inst mx07 and m03 s<1> ms3
inst mx08 and s<1> s<0> ms4
inst mx09 and ms1 i0 m04
inst mx10 and ms2 i1 m05
inst mx11 and ms3 i2 m05
inst mx12 and ms4 i3 m06
inst mx13 or m04 m05 m07
inst mx14 or m05 m06 m08
inst mx15 or m07 m08 z

enddef
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DEF TOP

  NET I0
  NET I1
  NET I2
  NET I3
  NET S<1:0>
  NET Z
  INST MUX41 MUX41 I0 I1 I2 I3 S<1:0> Z
  INST TEST MUX41_TEST I0 I1 I2 I3 S<1:0> Z
  INST OUTS1 IO_OUT S<1>
  INST OUTS0 IO_OUT S<0>
  INST OUTI0 IO_OUT I0
  INST OUTI1 IO_OUT I1
  INST OUTI2 IO_OUT I2
  INST OUTI3 IO_OUT I3
  INST OUTZ IO_OUT Z

ENDDEF