UART_RX_8N1.v

module UART_Receiver_8N1_v1 (
    input wire clk_in,
    input wire rx_in,
    input wire reset_in,
    output wire [7:0] data,
    output wire data_ready
);

parameter clkFreq = 49152000;
parameter baudRate = 115200;
localparam BCONST = clkFreq/baudRate;
localparam baudDividerWidth = $clog2(BCONST+1);

// SHIFT REGISTER
wire shift_in;
wire shift_enable;
wire shift_clk;
reg [7:0] shift_reg;

always @(posedge shift_clk)
begin
    if (shift_enable)
        shift_reg <= {shift_in, shift_reg[7:1]};
end

// BITS COUNTER
wire bits_count_clk;
wire bits_count_enable;
wire bits_count_sclr;
wire bits_count_cout;
reg [3:0] bits_count;

always @(posedge bits_count_clk)
begin
    if (bits_count_sclr)
        bits_count <= 4'd0;
    else if (bits_count_enable)
    begin
        if (bits_count==4'd9)
            bits_count <= 4'd0;
        else
            bits_count <= bits_count + 1'd1;
    end
end
assign bits_count_cout = (bits_count==4'd9);

// BAUD COUNTER
wire baud_count_clk;
wire baud_count_sload;
wire baud_count_cout;
wire [baudDividerWidth-1:0] baud_count_data;
reg [baudDividerWidth-1:0] baud_count;

always @(posedge baud_count_clk)
begin
    if (baud_count_sload)
        baud_count <= baud_count_data;
    else if (baud_count==BCONST)
        baud_count <= 0;
    else
        baud_count <= baud_count + 1'd1;
end
assign baud_count_cout = (baud_count==BCONST);

// SRFF
wire SRFF_s;
wire SRFF_r;
wire SRFF_clk;
reg SRFF_q;
always @(posedge SRFF_clk)
begin
    if (SRFF_s)
        SRFF_q = 1'b1;
    if (SRFF_r)
        SRFF_q = 1'b0;
end

// RX SYNCRONIZER
wire rx_sync_in;
wire rx_sync_clk;
reg [1:0] rx_sync;
always @(posedge rx_sync_clk)
begin
    rx_sync <= {rx_sync[0],rx_sync_in};
end

// CONNECTION & LOGIC
// rx syn
assign rx_sync_clk = clk_in;
assign rx_sync_in = rx_in;
// shift reg
assign shift_in = rx_sync[0];
assign shift_clk = clk_in;
assign shift_enable = baud_count_cout;
// srff
assign SRFF_clk = clk_in;
assign SRFF_s = rx_sync[1] & ~rx_sync[0];
assign SRFF_r = baud_count_cout & bits_count_cout;
// baud counter
assign baud_count_clk = clk_in;
assign baud_count_data = BCONST/2;
assign baud_count_sload = SRFF_s & ~SRFF_q;
// bits counter
assign bits_count_clk = clk_in;
assign bits_count_sclr = baud_count_sload;
assign bits_count_enable = baud_count_cout;
// module
assign data_ready = SRFF_r & SRFF_q;
assign data = shift_reg;

endmodule