/*
 * Copyright 2011 Freescale Semiconductor, Inc.
 * Copyright 2011 Linaro Ltd.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/dts-v1/;
#include "imx6dl.dtsi"

/ {
	model = "i.MX6S  Hola-PC";
	compatible = "sk,imx6dl-hola", "fsl,imx6dl";

	aliases {
		mxcfb0 = &mxcfb1;
	};

	memory {
		reg = <0x10000000 0x20000000>;
	};

	regulators {
		compatible = "simple-bus";

		reg_2p5v: 2p5v {
			compatible = "regulator-fixed";
			regulator-name = "2P5V";
			regulator-min-microvolt = <2500000>;
			regulator-max-microvolt = <2500000>;
			regulator-always-on;
		};

		reg_3p3v: 3p3v {
			compatible = "regulator-fixed";
			regulator-name = "3P3V";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};

		reg_usb_h1_vbus: usb_h1_vbus {
			compatible = "regulator-fixed";
			regulator-name = "usb_h1_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio7 7 0>;
			enable-active-high;
		};
	};

	mxcfb1: fb@0 {
		compatible = "fsl,mxc_sdc_fb";
		disp_dev = "hdmi";
		interface_pix_fmt = "RGB24";
		mode_str = "1280x720M@60";
		default_bpp = <32>;
		int_clk = <0>;
		late_init = <0>;
		status = "okay";
	};

	sound-hdmi {
		compatible = "fsl,imx6q-audio-hdmi",
			     "fsl,imx-audio-hdmi";
		model = "imx-audio-hdmi";
		hdmi-controller = <&hdmi_audio>;
	};

	v4l2_cap_0 {
		compatible = "fsl,imx6q-v4l2-capture";
		ipu_id = <0>;
		csi_id = <0>;
		mclk_source = <0>;
		status = "okay";
	};

	v4l2_out {
		compatible = "fsl,mxc_v4l2_output";
		status = "okay";
	};
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet_hola>;
	phy-mode = "rmii";
	phy-reset-gpios = <&gpio1 23 0>;
	status = "okay";
};

&hdmi_audio {
	status = "okay";
};

&hdmi_cec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hdmi_cec_2>;
	status = "okay";
};

&hdmi_core {
	ipu_id = <0>;
	disp_id = <1>;
	status = "okay";
};

&hdmi_video {
	fsl,phy_reg_vlev = <0x0294>;
	fsl,phy_reg_cksymtx = <0x800d>;
	status = "okay";
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2_2>;
	clock-frequency = <100000>;
	status = "okay";

	hdmi: edid@50 {
		compatible = "fsl,imx6-hdmi-i2c";
		reg = <0x50>;
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	hog {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				/* USB Host power */
				MX6QDL_PAD_SD3_DAT3__GPIO7_IO07     0x80000000
				/* SD1 CD */
				MX6QDL_PAD_SD4_DAT1__GPIO2_IO09     0x80000000
				MX6QDL_PAD_KEY_COL1__SD1_VSELECT    0x17059
				/* PHY Reset */
				MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x80000000
			>;
		};
	};

	usdhc1 {
		pinctrl_usdhc1_hola: usdhc1grp-hola {
			fsl,pins = <
				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059
				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x17059
				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
			>;
		};

		pinctrl_usdhc1_hola_100mhz: usdhc1grp-hola-100mhz {
			fsl,pins = <
				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x170B9
				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x170B9
				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170B9
				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170B9
				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170B9
				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170B9
			>;
		};

		pinctrl_usdhc1_hola_200mhz: usdhc1grp-hola-200mhz {
			fsl,pins = <
				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x170F9
				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x170F9
				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170F9
				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170F9
				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170F9
				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170F9
			>;
		};
	};

	fec {
		pinctrl_enet_hola: enet-hola {
			fsl,pins = <
				MX6QDL_PAD_GPIO_16__ENET_REF_CLK    0x4001b0a8
				MX6QDL_PAD_ENET_MDIO__ENET_MDIO     0x1b0b0
				MX6QDL_PAD_ENET_MDC__ENET_MDC       0x1b0b0
				MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN  0x1b0b0
				MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER   0x1b0b0
				MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN   0x1b0b0
				MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
				MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
				MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
				MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
			>;
		};
	};
};

&usbh1 {
	vbus-supply = <&reg_usb_h1_vbus>;
	status = "okay";
};

&usbotg {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbotg_1>;
	disable-over-current;
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc1_hola>;
	pinctrl-1 = <&pinctrl_usdhc1_hola_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc1_hola_200mhz>;
	cd-gpios = <&gpio2 9 0>;
	vmmc-supply = <&reg_3p3v>;
	status = "okay";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1_1>;
	status = "okay";
};