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  1. /*
  2.  *
  3.  * This program is free software; you can redistribute it and/or modify
  4.  * it under the terms of the GNU General Public License as published by
  5.  * the Free Software Foundation; either version 2 of the License, or
  6.  * (at your option) any later version.
  7.  *
  8.  * This program is distributed in the hope that it will be useful,
  9.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11.  * GNU General Public License for more details.
  12.  *
  13.  * You should have received a copy of the GNU General Public License
  14.  * along with this program; if not, write to the Free Software
  15.  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  16.  * MA 02110-1301, USA.
  17.  *
  18.  *
  19.  */
  20. #include <inttypes.h>
  21. #include <avr/io.h>
  22. #include <avr/interrupt.h>
  23. #include <util/delay.h>
  24. #include <avr/pgmspace.h>
  25. #include <stddef.h>
  26. #include "xmega_a4u.h"
  27.  
  28. #define buff_size   8
  29.  
  30. #define enable_dac_out() { DACB.CTRLA |= DAC_CH0EN_bm | DAC_CH1EN_bm | DAC_ENABLE_bm; }
  31. #define disable_dac_out() { DACB.CTRLA &= ~(DAC_CH0EN_bm | DAC_CH1EN_bm | DAC_ENABLE_bm); }
  32. #define setup_inttr_hl() { PMIC.CTRL |= PMIC_HILVLEN_bm; }
  33.  
  34.  
  35. uint8_t read_calibration_byte( uint8_t index )
  36. {
  37. uint8_t result;
  38.  
  39. /* Load the NVM Command register to read the calibration row. */
  40. NVM_CMD = NVM_CMD_READ_CALIB_ROW_gc;
  41. result = pgm_read_byte(index);
  42.  
  43. /* Clean up NVM Command register. */
  44. NVM_CMD = NVM_CMD_NO_OPERATION_gc;
  45.  
  46. return( result );
  47. }
  48.  
  49. inline void dac_byte(uint8_t CH0L, uint8_t CH0H, uint8_t CH1L, uint8_t CH1H)
  50. {
  51.   DACB.CH0DATAL = CH0L;
  52.   DACB.CH0DATAH = (0x0F & CH0H);
  53.  
  54.   DACB.CH1DATAL = CH1L;
  55.   DACB.CH1DATAH = (0x0F & CH1H);
  56. }
  57.  
  58. inline void dac_word(uint16_t CH0_data, uint16_t CH1_data)
  59. {
  60.   DACB.CH0DATA = (0x0FFF & CH0_data);
  61.   DACB.CH1DATA = (0x0FFF & CH1_data);
  62. }
  63.  
  64.  
  65. inline void init_dac(void)
  66. {
  67.   DACB.CTRLB = DAC_CHSEL_DUAL_gc;
  68.   DACB.CTRLC = DAC_REFSEL_INT1V_gc;
  69.   DACB.CH1DATA = 0x000;  
  70.   DACB.CH0DATA = 0x000;
  71. }
  72.  
  73. //global variables
  74. static volatile uint8_t twi_recv_buffer[buff_size], twi_send_buffer[buff_size];
  75. static volatile uint8_t recv_bf_cnt, send_bf_cnt, num_bytes, count_isr;
  76.  
  77. inline void setup_twi_slave(void)
  78. {
  79.   TWIC.CTRL             =   TWI_SDAHOLD_50NS_gc             ;
  80.   TWIC.SLAVE.ADDR           =   0x25                        ;
  81.   TWIC.SLAVE.CTRLA          |=  TWI_SLAVE_PIEN_bm | TWI_SLAVE_DIEN_bm | TWI_SLAVE_APIEN_bm | TWI_SLAVE_ENABLE_bm | TWI_SLAVE_INTLVL_HI_gc;
  82. }
  83.  
  84. inline void slave_process_master_read(void){
  85.   twi_send_buffer[0]            =   0x00                        ;
  86.   twi_send_buffer[1]            =   0x00                        ;
  87.   twi_send_buffer[2]            =   0x00                        ;
  88.   twi_send_buffer[3]            =   0x00                        ;
  89.   twi_send_buffer[4]            =   0x00                        ;
  90. }
  91.  
  92.  
  93. inline void slave_process_master_write(void){
  94.  
  95.   dac_byte(twi_recv_buffer[2], twi_recv_buffer[1], twi_recv_buffer[4], twi_recv_buffer[3]);
  96.  
  97. }
  98.  
  99. inline void twi_slave_isr_handler(void){
  100.  
  101. // HANDLE ADDRESS MATCH  
  102.   if(TWIC.SLAVE.STATUS & TWI_SLAVE_APIF_bm){
  103.     if(TWIC.SLAVE.STATUS & TWI_SLAVE_AP_bm){
  104.       TWIC.SLAVE.CTRLB          =   TWI_SLAVE_CMD_RESPONSE_gc           ;
  105.       recv_bf_cnt           =   0x00                        ;
  106.       send_bf_cnt           =   0x00                        ;
  107.     }else{
  108.       TWIC.SLAVE.CTRLB          =   TWI_SLAVE_CMD_COMPTRANS_gc          ;
  109.       slave_process_master_write()                              ;
  110.       recv_bf_cnt           =   0x00                        ;
  111.       send_bf_cnt           =   0x00                        ;
  112.     }
  113.   }else{
  114.  
  115. //HANDE DATA MATCH
  116.   if(TWIC.SLAVE.STATUS & TWI_SLAVE_DIF_bm){  
  117.      //MASTER READ
  118.     if(TWIC.SLAVE.STATUS & TWI_SLAVE_DIR_bm){
  119.       if((send_bf_cnt > 0) && (TWIC.SLAVE.STATUS & TWI_SLAVE_RXACK_bm)) {
  120.     send_bf_cnt         =   0x00                        ;
  121.     TWIC.SLAVE.CTRLB        =   TWI_SLAVE_ACKACT_bm | TWI_SLAVE_CMD_COMPTRANS_gc;
  122.       }else{
  123.     if(send_bf_cnt < buff_size){
  124.       uint8_t data          =   twi_send_buffer[send_bf_cnt]            ;
  125.       TWIC.SLAVE.DATA       =   data                        ;
  126.       send_bf_cnt++                                     ;
  127.       /* Send data, wait for data interrupt. */
  128.       if(send_bf_cnt == buff_size){
  129.         /* End transaction, reset buffer index */
  130.         send_bf_cnt         =   0x00                        ;
  131.         TWIC.SLAVE.CTRLB        =   TWI_SLAVE_CMD_COMPTRANS_gc          ;
  132.       }else{
  133.          TWIC.SLAVE.CTRLB       =   TWI_SLAVE_CMD_RESPONSE_gc           ;
  134.       }
  135.     }else{
  136.       /* End transaction, reset buffer index */
  137.       TWIC.SLAVE.CTRLB      =   TWI_SLAVE_ACKACT_bm | TWI_SLAVE_CMD_COMPTRANS_gc;
  138.       send_bf_cnt           =   0x00                        ;
  139.     }  
  140.       }      
  141.     //MASTER WRITE  
  142.     }else{
  143.       if(recv_bf_cnt < buff_size){
  144.     twi_recv_buffer[recv_bf_cnt]    =   TWIC.SLAVE.DATA                 ;
  145.     recv_bf_cnt++                                       ;
  146.     if(recv_bf_cnt == buff_size){
  147.       /* End transaction, reset buffer index */
  148.       TWIC.SLAVE.CTRLB      =   TWI_SLAVE_CMD_COMPTRANS_gc          ;
  149.       send_bf_cnt           =   0x00                        ;
  150.       slave_process_master_write()                              ;
  151.      
  152.     }else{
  153.       TWIC.SLAVE.CTRLB      =   TWI_SLAVE_CMD_RESPONSE_gc           ;
  154.     }
  155.       }else{
  156.     /* End transaction, reset buffer index */
  157.     TWIC.SLAVE.CTRLB        =   TWI_SLAVE_ACKACT_bm | TWI_SLAVE_CMD_COMPTRANS_gc;
  158.     recv_bf_cnt         =   0x00                        ;
  159.     slave_process_master_write()                                ;
  160.    
  161.       }
  162.      
  163.     }
  164.     }
  165.   }
  166. }
  167.  
  168.  
  169.  
  170. ISR(TWIC_TWIS_vect) {
  171.   twi_slave_isr_handler();
  172. }
  173.  
  174.  
  175. ISR(ADCA_CH0_vect) {
  176.  
  177.     uint16_t temp = (0x00ff & ADCA.CH0RESL);
  178.     temp |= (ADCA.CH0RESH << 8);
  179.  
  180.     twi_send_buffer[0] = (0xff & temp);
  181.  
  182.     twi_send_buffer[1] = (temp >> 8) ;
  183.  
  184. }
  185.  
  186. inline void setup_adc(void){
  187.  
  188.   ADCA.CTRLA = ADC_ENABLE_bm;
  189.   ADCA.CTRLB = ADC_FREERUN_bm/* | ADC_CONMODE_bm*/;
  190.   ADCA.PRESCALER = ADC_PRESCALER2_bm;
  191.   ADCA.CH0.INTCTRL = ADC_CH_INTMODE_COMPLETE_gc | ADC_CH_INTLVL1_bm | ADC_CH_INTLVL0_bm;
  192.   PORTA.DIRCLR = PIN0_bm;
  193.  
  194.   ADCA.CH0.CTRL = ADC_CH_INPUTMODE_SINGLEENDED_gc;
  195.   ADCA.CH0.MUXCTRL = ADC_CH_MUXPOS_PIN0_gc/* | ADC_CH_MUXNEG_GND_MODE3_gc*/;//PB1
  196.   ADCA.REFCTRL = ADC_REFSEL_INT1V_gc; //VCC 1V; bandgap is enabled because the DAC uses it; otherwise enable it separately
  197.  
  198.  
  199. }
  200. int main(void)
  201. {
  202.   setup_clk_32M_int();
  203.  
  204.  
  205.   init_dac();
  206.   enable_dac_out();
  207.  
  208.   uint16_t data0=0x0000;
  209.   uint16_t data1=0x0000;
  210.  
  211.   slave_process_master_read();
  212.   dac_word(data0, data1);
  213.   setup_twi_slave();
  214.   setup_adc();
  215.   setup_inttr_hl();
  216.   sei();
  217.  
  218.   ADCA.CH0.CTRL |= 0b10000000; // start conversion
  219.  
  220.   while(1){
  221.  
  222.   }
  223.  
  224.   return 0;
  225. }
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