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msp430blink_debug_problem

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Apr 16th, 2013
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  1. _reset_vector__:
  2. 00002100: mov.b &0x0120,r5
  3. 00002104: bis #23048, r5 ;#0x5a08
  4. 00002108: mov r5, &0x1100
  5. __init_stack:
  6. 0000210c: mov #8448, r1 ;#0x2100
  7. 00002118: mov &0x1100,&0x0120
  8. 0000211e: decd r15
  9. 00002120: mov 8868(r15),4352(r15);0x22a4(r15), 0x1100(r15)
  10. 00002126: jnz $-14 ;abs 0x2118
  11. __do_clear_bss:
  12. 00002128: mov #0, r15 ;#0x0000
  13. 00002138: mov.b #0, 4352(r15);r3 As==00, 0x1100(r15)
  14. 0000213c: jnz $-12 ;abs 0x2130
  15. main:
  16. 0000213e: mov r1, r4
  17. 00002140: incd r4
  18. 00002142: add #-104, r1 ;#0xff98
  19. 0000214c: add r10, 0x0120 ;PC rel. 0x02270
  20. 82 defaultClock();
  21. 00002150: call #0x2266
  22. 83 onXT2Clock();
  23. 00002154: call #0x2200
  24. 84 initIO();
  25. 00002158: call #0x2286
  26. 86 P3DIR = P2DIR_INIT; //Init port direction register of port2
  27. 0000215c: mov.b #-1, &0x001a ;r3 As==11
  28. 88 for (i = 0;i<100;i++){
  29. 00002160: mov #0, -106(r4);r3 As==00, 0xff96(r4)
  30. 00002164: jmp $+50 ;abs 0x2196
  31. 89 if(i&1)
  32. 00002166: mov -106(r4),r15 ;0xff96(r4)
  33. 0000216a: and #1, r15 ;r3 As==01
  34. 0000216c: mov.b r15, r15
  35. 0000216e: tst.b r15
  36. 00002170: jz $+18 ;abs 0x2182
  37. 90 buf[i] = 0;
  38. 00002172: mov r4, r15
  39. 00002174: add #-102, r15 ;#0xff9a
  40. 00002178: add -106(r4),r15 ;0xff96(r4)
  41. 0000217c: mov.b #0, 0(r15) ;r3 As==00, 0x0000(r15)
  42. 00002180: jmp $+18 ;abs 0x2192
  43. 92 buf[i] = 3;
  44. 00002182: mov r4, r15
  45. 00002184: add #-102, r15 ;#0xff9a
  46. 00002188: add -106(r4),r15 ;0xff96(r4)
  47. 0000218c: mov.b #3, 0(r15) ;#0x0003, 0x0000(r15)
  48. 88 for (i = 0;i<100;i++){
  49. 00002192: inc -106(r4) ;0xff96(r4)
  50. 00002196: cmp #100, -106(r4);#0x0064, 0xff96(r4)
  51. 0000219c: jl $-54 ;abs 0x2166
  52. 97 for (i=0; i<8; i++, o++) {
  53. 0000219e: mov #0, -106(r4);r3 As==00, 0xff96(r4)
  54. 000021a2: jmp $+34 ;abs 0x21c4
  55. 98 P3OUT = buf[i];
  56. 000021a4: mov r4, r15
  57. 000021a6: add #-102, r15 ;#0xff9a
  58. 000021aa: add -106(r4),r15 ;0xff96(r4)
  59. 000021ae: mov.b @r15, r15
  60. 000021b0: mov.b r15, &0x0019
  61. 99 delay(0x4fff);
  62. 000021b4: mov #20479, r15 ;#0x4fff
  63. 000021b8: call #0x21d6
  64. 97 for (i=0; i<8; i++, o++) {
  65. 000021bc: inc -106(r4) ;0xff96(r4)
  66. 000021c0: inc -104(r4) ;0xff98(r4)
  67. 000021c4: cmp #8, -106(r4);r2 As==11, 0xff96(r4)
  68. 000021c8: jl $-36 ;abs 0x21a4
  69. 101 }
  70. 000021ca: jmp $-44 ;abs 0x219e
  71. _endless_loop__:
  72. 000021cc: bis #240, r2 ;#0x00f0
  73. 000021d0: jmp $-4 ;abs 0x21cc
  74. __isr_9:
  75. 000021d2: br #0x22a2
  76. 11 void delay(unsigned int d) {
  77. delay:
  78. 000021d6: push r4
  79. 000021d8: mov r1, r4
  80. 000021da: incd r4
  81. 000021dc: sub #4, r1 ;r2 As==10
  82. 000021de: mov r15, -4(r4) ;0xfffc(r4)
  83. 13 for (i = 0; i<d; i++) {
  84. 000021e2: mov #0, -6(r4) ;r3 As==00, 0xfffa(r4)
  85. 000021e6: jmp $+10 ;abs 0x21f0
  86. 14 nop();
  87. 000021e8: nop
  88. 15 nop();
  89. 000021ea: nop
  90. 13 for (i = 0; i<d; i++) {
  91. 000021ec: inc -6(r4) ;0xfffa(r4)
  92. 000021f0: mov -6(r4), r15 ;0xfffa(r4)
  93. 000021f4: cmp -4(r4), r15 ;0xfffc(r4)
  94. 000021f8: jnc $-16 ;abs 0x21e8
  95. 17 }
  96. 000021fa: add #4, r1 ;r2 As==10
  97. 000021fc: pop r4
  98. 000021fe: ret
  99. 26 {
  100. onXT2Clock:
  101. 00002200: push r4
  102. 00002202: mov r1, r4
  103. 00002204: incd r4
  104. 29 BCSCTL3 = LFXT1S_2; // set LFXT1 to VLOCLK
  105. 00002206: mov.b #32, &0x0053 ;#0x0020
  106. 30 BCSCTL2 = SELM_0 + DIVM_0 + DIVS_0;
  107. 0000220c: mov.b #0, &0x0058 ;r3 As==00
  108. 31 BCSCTL1 = DIVA_0 + 0x07/*+ RSEL_7*/; // XT2 On
  109. 00002210: mov.b #7, &0x0057 ;#0x0007
  110. 32 BCSCTL3 |= XT2S_2; // 3 - 16-MHz crystal or resonator
  111. 00002216: mov.b &0x0053,r15
  112. 0000221a: bis.b #-128, r15 ;#0xff80
  113. 0000221e: mov.b r15, &0x0053
  114. 36 IFG1&=~OFIFG;
  115. 00002222: mov.b &0x0002,r15
  116. 00002226: and.b #-3, r15 ;#0xfffd
  117. 0000222a: mov.b r15, &0x0002
  118. 37 delay(5000);
  119. 0000222e: mov #5000, r15 ;#0x1388
  120. 00002232: call #0x21d6
  121. 40 while(IFG1 & OFIFG); //wait, while OFIFG is set
  122. 00002236: mov.b &0x0002,r15
  123. 0000223a: mov.b r15, r15
  124. 0000223c: and #2, r15 ;r3 As==10
  125. 0000223e: tst r15
  126. 00002240: jnz $-30 ;abs 0x2222
  127. 41 delay(1024/7); // mind. 1024 Clock-Zyklen abwarten
  128. 00002242: mov #146, r15 ;#0x0092
  129. 00002246: call #0x21d6
  130. 42 IFG1&=~OFIFG;
  131. 0000224a: mov.b &0x0002,r15
  132. 0000224e: and.b #-3, r15 ;#0xfffd
  133. 00002252: mov.b r15, &0x0002
  134. 45 BCSCTL2|= SELM_2 + DIVM_0 + SELS + DIVS_0;
  135. 00002256: mov.b &0x0058,r15
  136. 0000225a: bis.b #-120, r15 ;#0xff88
  137. 0000225e: mov.b r15, &0x0058
  138. 46 }
  139. 00002262: pop r4
  140. 00002264: ret
  141. 54 {
  142. defaultClock:
  143. 00002266: push r4
  144. 00002268: mov r1, r4
  145. 0000226a: incd r4
  146. 55 DCOCTL = 0x60;/*DCO_3* + MOD_0;*/
  147. 0000226c: mov.b #96, &0x0056 ;#0x0060
  148. 56 BCSCTL1 = XT2OFF + DIVA_0 + 0x07/*+ RSEL_7*/;
  149. 00002272: mov.b #-121, &0x0057 ;#0xff87
  150. 57 BCSCTL2 = SELM_0 + DIVM_0 + DIVS_0;
  151. 00002278: mov.b #0, &0x0058 ;r3 As==00
  152. 58 BCSCTL3 = LFXT1S_2;
  153. 0000227c: mov.b #32, &0x0053 ;#0x0020
  154. 59 }
  155. 00002282: pop r4
  156. 00002284: ret
  157. 62 {
  158. initIO:
  159. 00002286: push r4
  160. 00002288: mov r1, r4
  161. 0000228a: incd r4
  162. 64 P3DIR = 0x5F; //P3 out, P3.5/P3.7 in
  163. 0000228c: mov.b #95, &0x001a ;#0x005f
  164. 65 P3SEL = 0x00; //P3 keine Functions
  165. 00002292: mov.b #0, &0x001b ;r3 As==00
  166. 67 P3OUT = 0x00; //P3 off
  167. 00002296: mov.b #0, &0x0019 ;r3 As==00
  168. 68 P3REN = 0x00; //P3 kein Pu/Pd Resistor
  169. 0000229a: mov.b #0, &0x0010 ;r3 As==00
  170. 70 }
  171. 0000229e: pop r4
  172. 000022a0: ret
  173. _unexpected_:
  174. 000022a2: reti
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