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  1. halcmd: show param
  2. Parameters:
  3. Owner Type Dir Value Name
  4. 7 u32 RO 0x00000009 hm2_5i25.0.7i77.0.0.nvbaudrate
  5. 7 u32 RO 0x12000002 hm2_5i25.0.7i77.0.0.nvunitnumber
  6. 7 u32 RO 0x00000032 hm2_5i25.0.7i77.0.0.nvwatchdogtimeout
  7. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-00-invert
  8. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-01-invert
  9. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-02-invert
  10. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-03-invert
  11. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-04-invert
  12. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-05-invert
  13. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-06-invert
  14. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-07-invert
  15. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-08-invert
  16. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-09-invert
  17. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-10-invert
  18. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-11-invert
  19. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-12-invert
  20. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-13-invert
  21. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-14-invert
  22. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.output-15-invert
  23. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.spindir-invert
  24. 7 bit RW FALSE hm2_5i25.0.7i77.0.0.spinena-invert
  25. 7 float RW 100 hm2_5i25.0.7i77.0.0.spinout-maxlim
  26. 7 float RW 0 hm2_5i25.0.7i77.0.0.spinout-minlim
  27. 7 float RW 100 hm2_5i25.0.7i77.0.0.spinout-scalemax
  28. 7 u32 RO 0x00000006 hm2_5i25.0.7i77.0.0.swrevision
  29. 7 bit RW FALSE hm2_5i25.0.7i77.0.1.analogena-invert
  30. 7 float RW 10 hm2_5i25.0.7i77.0.1.analogout0-maxlim
  31. 7 float RW -10 hm2_5i25.0.7i77.0.1.analogout0-minlim
  32. 7 float RW 10 hm2_5i25.0.7i77.0.1.analogout0-scalemax
  33. 7 float RW 10 hm2_5i25.0.7i77.0.1.analogout1-maxlim
  34. 7 float RW -10 hm2_5i25.0.7i77.0.1.analogout1-minlim
  35. 7 float RW 10 hm2_5i25.0.7i77.0.1.analogout1-scalemax
  36. 7 float RW 10 hm2_5i25.0.7i77.0.1.analogout2-maxlim
  37. 7 float RW -10 hm2_5i25.0.7i77.0.1.analogout2-minlim
  38. 7 float RW 10 hm2_5i25.0.7i77.0.1.analogout2-scalemax
  39. 7 float RW 10 hm2_5i25.0.7i77.0.1.analogout3-maxlim
  40. 7 float RW -10 hm2_5i25.0.7i77.0.1.analogout3-minlim
  41. 7 float RW 10 hm2_5i25.0.7i77.0.1.analogout3-scalemax
  42. 7 float RW 10 hm2_5i25.0.7i77.0.1.analogout4-maxlim
  43. 7 float RW -10 hm2_5i25.0.7i77.0.1.analogout4-minlim
  44. 7 float RW 10 hm2_5i25.0.7i77.0.1.analogout4-scalemax
  45. 7 float RW 10 hm2_5i25.0.7i77.0.1.analogout5-maxlim
  46. 7 float RW -10 hm2_5i25.0.7i77.0.1.analogout5-minlim
  47. 7 float RW 10 hm2_5i25.0.7i77.0.1.analogout5-scalemax
  48. 7 u32 RO 0x00000009 hm2_5i25.0.7i77.0.1.nvbaudrate
  49. 7 u32 RO 0x11000002 hm2_5i25.0.7i77.0.1.nvunitnumber
  50. 7 u32 RO 0x00000032 hm2_5i25.0.7i77.0.1.nvwatchdogtimeout
  51. 7 bit RW FALSE hm2_5i25.0.7i77.0.1.spinena-invert
  52. 7 u32 RO 0x00000006 hm2_5i25.0.7i77.0.1.swrevision
  53. 7 bit RW FALSE hm2_5i25.0.encoder.00.counter-mode
  54. 7 bit RW TRUE hm2_5i25.0.encoder.00.filter
  55. 7 bit RW FALSE hm2_5i25.0.encoder.00.index-invert
  56. 7 bit RW FALSE hm2_5i25.0.encoder.00.index-mask
  57. 7 bit RW FALSE hm2_5i25.0.encoder.00.index-mask-invert
  58. 7 float RW 1 hm2_5i25.0.encoder.00.scale
  59. 7 float RW 0.5 hm2_5i25.0.encoder.00.vel-timeout
  60. 7 bit RW FALSE hm2_5i25.0.encoder.01.counter-mode
  61. 7 bit RW TRUE hm2_5i25.0.encoder.01.filter
  62. 7 bit RW FALSE hm2_5i25.0.encoder.01.index-invert
  63. 7 bit RW FALSE hm2_5i25.0.encoder.01.index-mask
  64. 7 bit RW FALSE hm2_5i25.0.encoder.01.index-mask-invert
  65. 7 float RW 1 hm2_5i25.0.encoder.01.scale
  66. 7 float RW 0.5 hm2_5i25.0.encoder.01.vel-timeout
  67. 7 bit RW FALSE hm2_5i25.0.encoder.02.counter-mode
  68. 7 bit RW TRUE hm2_5i25.0.encoder.02.filter
  69. 7 bit RW FALSE hm2_5i25.0.encoder.02.index-invert
  70. 7 bit RW FALSE hm2_5i25.0.encoder.02.index-mask
  71. 7 bit RW FALSE hm2_5i25.0.encoder.02.index-mask-invert
  72. 7 float RW 1 hm2_5i25.0.encoder.02.scale
  73. 7 float RW 0.5 hm2_5i25.0.encoder.02.vel-timeout
  74. 7 bit RW FALSE hm2_5i25.0.encoder.03.counter-mode
  75. 7 bit RW TRUE hm2_5i25.0.encoder.03.filter
  76. 7 bit RW FALSE hm2_5i25.0.encoder.03.index-invert
  77. 7 bit RW FALSE hm2_5i25.0.encoder.03.index-mask
  78. 7 bit RW FALSE hm2_5i25.0.encoder.03.index-mask-invert
  79. 7 float RW 1 hm2_5i25.0.encoder.03.scale
  80. 7 float RW 0.5 hm2_5i25.0.encoder.03.vel-timeout
  81. 7 bit RW FALSE hm2_5i25.0.encoder.04.counter-mode
  82. 7 bit RW TRUE hm2_5i25.0.encoder.04.filter
  83. 7 bit RW FALSE hm2_5i25.0.encoder.04.index-invert
  84. 7 bit RW FALSE hm2_5i25.0.encoder.04.index-mask
  85. 7 bit RW FALSE hm2_5i25.0.encoder.04.index-mask-invert
  86. 7 float RW 1 hm2_5i25.0.encoder.04.scale
  87. 7 float RW 0.5 hm2_5i25.0.encoder.04.vel-timeout
  88. 7 bit RW FALSE hm2_5i25.0.encoder.05.counter-mode
  89. 7 bit RW TRUE hm2_5i25.0.encoder.05.filter
  90. 7 bit RW FALSE hm2_5i25.0.encoder.05.index-invert
  91. 7 bit RW FALSE hm2_5i25.0.encoder.05.index-mask
  92. 7 bit RW FALSE hm2_5i25.0.encoder.05.index-mask-invert
  93. 7 float RW 1 hm2_5i25.0.encoder.05.scale
  94. 7 float RW 0.5 hm2_5i25.0.encoder.05.vel-timeout
  95. 7 bit RW FALSE hm2_5i25.0.gpio.000.invert_output
  96. 7 bit RW FALSE hm2_5i25.0.gpio.000.is_opendrain
  97. 7 bit RW FALSE hm2_5i25.0.gpio.000.is_output
  98. 7 bit RW FALSE hm2_5i25.0.gpio.001.invert_output
  99. 7 bit RW FALSE hm2_5i25.0.gpio.001.is_opendrain
  100. 7 bit RW FALSE hm2_5i25.0.gpio.001.is_output
  101. 7 bit RW FALSE hm2_5i25.0.gpio.002.invert_output
  102. 7 bit RW FALSE hm2_5i25.0.gpio.002.is_opendrain
  103. 7 bit RW FALSE hm2_5i25.0.gpio.002.is_output
  104. 7 bit RW FALSE hm2_5i25.0.gpio.003.invert_output
  105. 7 bit RW FALSE hm2_5i25.0.gpio.003.is_opendrain
  106. 7 bit RW FALSE hm2_5i25.0.gpio.005.invert_output
  107. 7 bit RW FALSE hm2_5i25.0.gpio.005.is_opendrain
  108. 7 bit RW FALSE hm2_5i25.0.gpio.007.invert_output
  109. 7 bit RW FALSE hm2_5i25.0.gpio.007.is_opendrain
  110. 7 bit RW FALSE hm2_5i25.0.gpio.017.invert_output
  111. 7 bit RW FALSE hm2_5i25.0.gpio.017.is_opendrain
  112. 7 bit RW FALSE hm2_5i25.0.gpio.018.invert_output
  113. 7 bit RW FALSE hm2_5i25.0.gpio.018.is_opendrain
  114. 7 bit RW FALSE hm2_5i25.0.gpio.019.invert_output
  115. 7 bit RW FALSE hm2_5i25.0.gpio.019.is_opendrain
  116. 7 bit RW FALSE hm2_5i25.0.gpio.019.is_output
  117. 7 bit RW FALSE hm2_5i25.0.gpio.020.invert_output
  118. 7 bit RW FALSE hm2_5i25.0.gpio.020.is_opendrain
  119. 7 bit RW FALSE hm2_5i25.0.gpio.020.is_output
  120. 7 bit RW FALSE hm2_5i25.0.gpio.021.invert_output
  121. 7 bit RW FALSE hm2_5i25.0.gpio.021.is_opendrain
  122. 7 bit RW FALSE hm2_5i25.0.gpio.021.is_output
  123. 7 bit RW FALSE hm2_5i25.0.gpio.022.invert_output
  124. 7 bit RW FALSE hm2_5i25.0.gpio.022.is_opendrain
  125. 7 bit RW FALSE hm2_5i25.0.gpio.022.is_output
  126. 7 bit RW FALSE hm2_5i25.0.gpio.023.invert_output
  127. 7 bit RW FALSE hm2_5i25.0.gpio.023.is_opendrain
  128. 7 bit RW FALSE hm2_5i25.0.gpio.023.is_output
  129. 7 bit RW FALSE hm2_5i25.0.gpio.024.invert_output
  130. 7 bit RW FALSE hm2_5i25.0.gpio.024.is_opendrain
  131. 7 bit RW FALSE hm2_5i25.0.gpio.024.is_output
  132. 7 bit RW FALSE hm2_5i25.0.gpio.025.invert_output
  133. 7 bit RW FALSE hm2_5i25.0.gpio.025.is_opendrain
  134. 7 bit RW FALSE hm2_5i25.0.gpio.025.is_output
  135. 7 bit RW FALSE hm2_5i25.0.gpio.026.invert_output
  136. 7 bit RW FALSE hm2_5i25.0.gpio.026.is_opendrain
  137. 7 bit RW FALSE hm2_5i25.0.gpio.026.is_output
  138. 7 bit RW FALSE hm2_5i25.0.gpio.027.invert_output
  139. 7 bit RW FALSE hm2_5i25.0.gpio.027.is_opendrain
  140. 7 bit RW FALSE hm2_5i25.0.gpio.027.is_output
  141. 7 bit RW FALSE hm2_5i25.0.gpio.028.invert_output
  142. 7 bit RW FALSE hm2_5i25.0.gpio.028.is_opendrain
  143. 7 bit RW FALSE hm2_5i25.0.gpio.028.is_output
  144. 7 bit RW FALSE hm2_5i25.0.gpio.029.invert_output
  145. 7 bit RW FALSE hm2_5i25.0.gpio.029.is_opendrain
  146. 7 bit RW FALSE hm2_5i25.0.gpio.029.is_output
  147. 7 bit RW FALSE hm2_5i25.0.gpio.030.invert_output
  148. 7 bit RW FALSE hm2_5i25.0.gpio.030.is_opendrain
  149. 7 bit RW FALSE hm2_5i25.0.gpio.030.is_output
  150. 7 bit RW FALSE hm2_5i25.0.gpio.031.invert_output
  151. 7 bit RW FALSE hm2_5i25.0.gpio.031.is_opendrain
  152. 7 bit RW FALSE hm2_5i25.0.gpio.031.is_output
  153. 7 bit RW FALSE hm2_5i25.0.gpio.032.invert_output
  154. 7 bit RW FALSE hm2_5i25.0.gpio.032.is_opendrain
  155. 7 bit RW FALSE hm2_5i25.0.gpio.032.is_output
  156. 7 bit RW FALSE hm2_5i25.0.gpio.033.invert_output
  157. 7 bit RW FALSE hm2_5i25.0.gpio.033.is_opendrain
  158. 7 bit RW FALSE hm2_5i25.0.gpio.033.is_output
  159. 7 bit RW FALSE hm2_5i25.0.io_error
  160. 7 s32 RO 0 hm2_5i25.0.pet_watchdog.time
  161. 7 s32 RW 0 hm2_5i25.0.pet_watchdog.tmax
  162. 7 s32 RO 0 hm2_5i25.0.read.time
  163. 7 s32 RW 0 hm2_5i25.0.read.tmax
  164. 7 s32 RO 0 hm2_5i25.0.read_gpio.time
  165. 7 s32 RW 0 hm2_5i25.0.read_gpio.tmax
  166. 7 u32 RW 0x00000001 hm2_5i25.0.sserial.port-0.fault-dec
  167. 7 u32 RW 0x0000000A hm2_5i25.0.sserial.port-0.fault-inc
  168. 7 u32 RW 0x000000C8 hm2_5i25.0.sserial.port-0.fault-lim
  169. 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.dirhold
  170. 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.dirsetup
  171. 7 float RW 1 hm2_5i25.0.stepgen.00.maxaccel
  172. 7 float RW 0 hm2_5i25.0.stepgen.00.maxvel
  173. 7 float RW 1 hm2_5i25.0.stepgen.00.position-scale
  174. 7 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.step_type
  175. 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.steplen
  176. 7 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.stepspace
  177. 7 u32 RW 0x004C4B40 hm2_5i25.0.watchdog.timeout_ns
  178. 7 s32 RO 0 hm2_5i25.0.write.time
  179. 7 s32 RW 0 hm2_5i25.0.write.tmax
  180. 7 s32 RO 0 hm2_5i25.0.write_gpio.time
  181. 7 s32 RW 0 hm2_5i25.0.write_gpio.tmax
  182. 5 s32 RO 0 motion-command-handler.time
  183. 5 s32 RW 0 motion-command-handler.tmax
  184. 5 s32 RO 0 motion-controller.time
  185. 5 s32 RW 0 motion-controller.tmax
  186. 5 bit RO FALSE motion.debug-bit-0
  187. 5 bit RO FALSE motion.debug-bit-1
  188. 5 float RO 0 motion.debug-float-0
  189. 5 float RO 0 motion.debug-float-1
  190. 5 float RO 0 motion.debug-float-2
  191. 5 float RO 0 motion.debug-float-3
  192. 5 s32 RO 0 motion.debug-s32-0
  193. 5 s32 RO 0 motion.debug-s32-1
  194. 5 u32 RO 0x00000000 motion.servo.last-period
  195. 5 float RO 0 motion.servo.last-period-ns
  196. 5 u32 RW 0x00000000 motion.servo.overruns
  197. 5 float RO 0 tc.0.acc
  198. 5 float RO 0 tc.0.pos
  199. 5 float RO 0 tc.0.vel
  200. 5 float RO 0 tc.1.acc
  201. 5 float RO 0 tc.1.pos
  202. 5 float RO 0 tc.1.vel
  203. 5 float RO 0 tc.2.acc
  204. 5 float RO 0 tc.2.pos
  205. 5 float RO 0 tc.2.vel
  206. 5 float RO 0 tc.3.acc
  207. 5 float RO 0 tc.3.pos
  208. 5 float RO 0 tc.3.vel
  209. 5 u32 RO 0x00000000 traj.active_tc
  210. 5 float RO 0 traj.pos_out
  211. 5 float RO 0 traj.vel_out
  212.  
  213. halcmd:
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