adc-dma

tDMAControlTable ui8ControlTable[64];
uint32_t DMAdata[4];


int main(void) {
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
    GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_1);
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);

    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_3);
    GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_2);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
    SysCtlPeripheralReset(SYSCTL_PERIPH_ADC0);

    ADCSequenceDisable(ADC0_BASE, 2);

    ADCSequenceConfigure(ADC0_BASE, 2, ADC_TRIGGER_PWM1, 0x00);
    HWREG(0x4003801C) |= 0x1000;

    ADCSequenceStepConfigure(ADC0_BASE, 2, 0, ADC_CTL_CH0);

    ADCSequenceStepConfigure(ADC0_BASE, 2, 1, ADC_CTL_CH1);

    ADCSequenceStepConfigure(ADC0_BASE, 2, 2, ADC_CTL_CH0);

    ADCSequenceStepConfigure(ADC0_BASE, 2, 3, ADC_CTL_CH1|ADC_CTL_IE);

    ADCSequenceEnable(ADC0_BASE, 2);
    ADCIntEnable(ADC0_BASE, 2);
    IntEnable(INT_ADC0SS2);
    IntPrioritySet(INT_ADC0SS2, 0x00);

SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA);

    uDMAEnable();
    uDMAControlBaseSet(ui8ControlTable);
    uDMAChannelAttributeDisable(UDMA_CHANNEL_ADC2, UDMA_ATTR_USEBURST | UDMA_ATTR_ALTSELECT |(UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK));
    uDMAChannelControlSet(UDMA_PRI_SELECT|UDMA_CHANNEL_ADC2, UDMA_SIZE_32|UDMA_SRC_INC_NONE|UDMA_DST_INC_32|UDMA_ARB_4);
    uDMAChannelTransferSet(UDMA_PRI_SELECT|UDMA_CHANNEL_ADC2, UDMA_MODE_BASIC, (void *)(ADC0_BASE + ADC_O_SSFIFO2), DMAdata, 4);
    uDMAChannelEnable(UDMA_CHANNEL_ADC1);
while(1)
    {

    }
return 0;
}

void PWM1IntHandler(void)
{
    PWMGenIntClear(PWM1_BASE, PWM_GEN_1, PWM_INT_CNT_LOAD|PWM_TR_CNT_LOAD);
    IntPendClear(INT_PWM1_1);
}

void ADC0SS2IntHandler(void)
{
    ADCIntClear(ADC0_BASE, 2);
    GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1, GPIOPinRead(GPIO_PORTF_BASE, GPIO_PIN_1)^0x02);
    uDMAChannelEnable(UDMA_CHANNEL_ADC2);
    IntPendClear(INT_ADC0SS2);
    GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1, GPIOPinRead(GPIO_PORTF_BASE, GPIO_PIN_1)^0x02);
}