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  1. /*
  2. * Copyright (C) 2013 CircuitCo
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /dts-v1/;
  9. /plugin/;
  10.  
  11. / {
  12. compatible = "ti,beaglebone", "ti,beaglebone-black";
  13.  
  14. /* identification */
  15. part-number = "BB-BONE-TESTER";
  16. version = "00A0";
  17.  
  18. fragment@0 {
  19. target = <&am33xx_pinmux>;
  20. __overlay__ {
  21. /* default state has all gpios released and mode set to uart1 */
  22. bone_tester_default_gpio_pins: pinmux_bone_tester_default_gpio_pins {
  23. pinctrl-single,pins = <
  24. /* the uart pins */
  25. 0x184 0x20 /* 24 UART1_TXD uart1_txd OUTPUT */
  26. 0x180 0x20 /* 26 UART1_RXD uart1_rxd INPUT */
  27. >;
  28. };
  29. bone_tester_input_gpio_pins: pinmux_bone_tester_input_gpio_pins {
  30. pinctrl-single,pins = <
  31. /* P8 connector on the bone */
  32. /* P3 - P46 pins, B_A3-B_A46, INPUT | PULLDIS | MODE7 */
  33. 0x018 0x2f /* 3 GPIO1_6 gpmc_ad6.gpio1[6] */
  34. 0x01C 0x2f /* 4 GPIO1_7 gpmc_ad7.gpio1[7] */
  35. 0x008 0x2f /* 5 GPIO1_2 gpmc_ad2.gpio1[2] */
  36. 0x00C 0x2f /* 6 GPIO1_3 gpmc_ad3.gpio1[3] */
  37. 0x090 0x2f /* 7 TIMER4 gpmc_advn_ale.gpio2[2] */
  38. 0x094 0x2f /* 8 TIMER7 gpmc_oen_ren.gpio2[3] */
  39. 0x09C 0x2f /* 9 TIMER5 gpmc_ben0_cle.gpio2[5] */
  40. 0x098 0x2f /* 10 TIMER6 gpmc_wen.gpio2[4] */
  41. 0x034 0x2f /* 11 GPIO1_13 gpmc_ad13.gpio1[13] */
  42. 0x030 0x2f /* 12 GPIO1_12 gpmc_ad12.gpio1[12] */
  43. 0x024 0x2f /* 13 EHRPWM2B gpmc_ad9 .gpio0[23] */
  44. 0x028 0x2f /* 14 GPIO0_26 gpmc_ad10.gpio0[26] */
  45. 0x03C 0x2f /* 15 GPIO1_15 gpmc_ad15.gpio1[15] */
  46. 0x038 0x2f /* 16 GPIO1_14 gpmc_ad14.gpio1[14] */
  47. 0x02C 0x2f /* 17 GPIO0_27 gpmc_ad11.gpio0[27] */
  48. 0x08C 0x2f /* 18 GPIO2_1 gpmc_clk .gpio2[1] */
  49. 0x020 0x2f /* 19 EHRPWM2A gpmc_ad8 .gpio0[22] */
  50. 0x084 0x2f /* 20 GPIO1_31 gpmc_csn2.gpio1[31] */
  51. 0x080 0x2f /* 21 GPIO1_30 gpmc_csn1.gpio1[30] */
  52. 0x014 0x2f /* 22 GPIO1_5 gpmc_ad5 .gpio1[5] */
  53. 0x010 0x2f /* 23 GPIO1_4 gpmc_ad4 .gpio1[4] */
  54. 0x004 0x2f /* 24 GPIO1_1 gpmc_ad1 .gpio1[1] */
  55. 0x000 0x2f /* 25 GPIO1_0 gpmc_ad0 .gpio1[0] */
  56. 0x07C 0x2f /* 26 GPIO1_29 gpmc_csn0.gpio1[29] */
  57. // 0x0E0 0x2f /* 27 GPIO2_22 lcd_vsync.gpio2[22] */
  58. // 0x0E8 0x2f /* 28 GPIO2_24 lcd_pclk .gpio2[24] */
  59. // 0x0E4 0x2f /* 29 GPIO2_23 lcd_hsync.gpio2[23] */
  60. // 0x0EC 0x2f /* 30 GPIO2_25 lcd_ac_bias_en.gpio2[25] */
  61. // 0x0D8 0x2f /* 31 UART5_CTSN lcd_data14.gpio0[10] */
  62. // 0x0DC 0x2f /* 32 UART5_RTSN lcd_data15.gpio0[11] */
  63. // 0x0D4 0x2f /* 33 UART4_RTSN lcd_data13.gpio0[9] */
  64. // 0x0CC 0x2f /* 34 UART3_RTSN lcd_data11.gpio2[17] */
  65. // 0x0D0 0x2f /* 35 UART4_CTSN lcd_data12.gpio0[8] */
  66. // 0x0C8 0x2f /* 36 UART3_CTSN lcd_data10.gpio2[16] */
  67. // 0x0C0 0x2f /* 37 UART5_TXD lcd_data8.gpio2[14] */
  68. // 0x0C4 0x2f /* 38 UART5_RXD lcd_data9.gpio2[15] */
  69. // 0x0B8 0x2f /* 39 GPIO2_12 lcd_data6.gpio2[12] */
  70. // 0x0BC 0x2f /* 40 GPIO2_13 lcd_data7.gpio2[13] */
  71. // 0x0B0 0x2f /* 41 GPIO2_10 lcd_data4.gpio2[10] */
  72. // 0x0B4 0x2f /* 42 GPIO2_11 lcd_data5.gpio2[11] */
  73. // 0x0A8 0x2f /* 43 GPIO2_8 lcd_data2.gpio2[8] */
  74. // 0x0AC 0x2f /* 44 GPIO2_9 lcd_data3.gpio2[9] */
  75. // 0x0A0 0x2f /* 45 GPIO2_6 lcd_data0.gpio2[6] */
  76. // 0x0A4 0x2f /* 46 GPIO2_7 lcd_data1.gpio2[7] */
  77.  
  78. /* P9 connector on the bone */
  79. /* B_B0-B_B19, INPUT | PULLDIS | MODE7 */
  80. 0x070 0x2f /* 11 UART4_RXD gpmc_wait0.gpio0[30] */
  81. 0x078 0x2f /* 12 GPIO1_28 gpmc_be1n.gpio1[28] */
  82. 0x074 0x2f /* 13 UART4_TXD gpmc_wpn.gpio0[31] */
  83. 0x048 0x2f /* 14 EHRPWM1A gpmc_a2.gpio1[18] */
  84. 0x040 0x2f /* 15 GPIO1_16 gpmc_a0.gpio1[16] */
  85. 0x04C 0x2f /* 16 EHRPWM1B gpmc_a3.gpio1[19] */
  86.  
  87. /* err, those two are used for I2C2 on the beaglebone */
  88. /* you should boot with I2C2 disabled on the tester */
  89. // 0x17C 0x2f /* 19 I2C2_SCL uart1_rtsn.gpio0[13] */
  90. // 0x178 0x2f /* 20 I2C2_SDA uart1_ctsn.gpio0[12] */
  91.  
  92. 0x154 0x2f /* 21 UART2_TXD spi0_d0.gpio0[3] */
  93. 0x150 0x2f /* 22 UART2_RXD spi0_sclk.gpio0[2] */
  94. 0x044 0x2f /* 23 GPIO1_17 gpmc_a1.gpio1[17] */
  95. 0x1AC 0x2f /* 25 GPIO3_21 mcasp0_ahclkx.gpio3[21]*/
  96. 0x1A4 0x2f /* 27 GPIO3_19 mcasp0_fsr.gpio3[19] */
  97. 0x19C 0x2f /* 28 SPI1_CS0 mcasp0_ahclkr.gpio3[17]*/
  98. 0x198 0x2f /* 30 SPI1_D1 mcasp0_axr0.gpio3[16] */
  99. 0x190 0x2f /* 31 SPI1_SCLK mcasp0_aclkx.gpio3[14] */
  100. 0x1B4 0x2f /* 41 CLKOUT2 xdma_event_intr1.gpio0[20]*/
  101. 0x164 0x2f /* 42 GPIO0_7 eCAP0_in_PWM0_out.gpio0[7]*/
  102.  
  103. /* the UART pins */
  104. // 0x184 0x2f /* 24 UART1_TXD uart1_txd.gpio0[15] */
  105. // 0x180 0x2f /* 26 UART1_RXD uart1_rxd.gpio0[14] */
  106. >;
  107. };
  108.  
  109. bone_tester_output_gpio_pins: pinmux_bone_tester_output_gpio_pins {
  110. pinctrl-single,pins = <
  111. /* P8 connector on the bone */
  112. /* P3 - P46 pins, B_A3-B_A46, OUTPUT | MODE7 */
  113. 0x018 0x07 /* 3 GPIO1_6 gpmc_ad6.gpio1[6] */
  114. 0x01C 0x07 /* 4 GPIO1_7 gpmc_ad7.gpio1[7] */
  115. 0x008 0x07 /* 5 GPIO1_2 gpmc_ad2.gpio1[2] */
  116. 0x00C 0x07 /* 6 GPIO1_3 gpmc_ad3.gpio1[3] */
  117. 0x090 0x07 /* 7 TIMER4 gpmc_advn_ale.gpio2[2] */
  118. 0x094 0x07 /* 8 TIMER7 gpmc_oen_ren.gpio2[3] */
  119. 0x09C 0x07 /* 9 TIMER5 gpmc_ben0_cle.gpio2[5] */
  120. 0x098 0x07 /* 10 TIMER6 gpmc_wen.gpio2[4] */
  121. 0x034 0x07 /* 11 GPIO1_13 gpmc_ad13.gpio1[13] */
  122. 0x030 0x07 /* 12 GPIO1_12 gpmc_ad12.gpio1[12] */
  123. 0x024 0x07 /* 13 EHRPWM2B gpmc_ad9 .gpio0[23] */
  124. 0x028 0x07 /* 14 GPIO0_26 gpmc_ad10.gpio0[26] */
  125. 0x03C 0x07 /* 15 GPIO1_15 gpmc_ad15.gpio1[15] */
  126. 0x038 0x07 /* 16 GPIO1_14 gpmc_ad14.gpio1[14] */
  127. 0x02C 0x07 /* 17 GPIO0_27 gpmc_ad11.gpio0[27] */
  128. 0x08C 0x07 /* 18 GPIO2_1 gpmc_clk .gpio2[1] */
  129. 0x020 0x07 /* 19 EHRPWM2A gpmc_ad8 .gpio0[22] */
  130. 0x084 0x07 /* 20 GPIO1_31 gpmc_csn2.gpio1[31] */
  131. 0x080 0x07 /* 21 GPIO1_30 gpmc_csn1.gpio1[30] */
  132. 0x014 0x07 /* 22 GPIO1_5 gpmc_ad5 .gpio1[5] */
  133. 0x010 0x07 /* 23 GPIO1_4 gpmc_ad4 .gpio1[4] */
  134. 0x004 0x07 /* 24 GPIO1_1 gpmc_ad1 .gpio1[1] */
  135. 0x000 0x07 /* 25 GPIO1_0 gpmc_ad0 .gpio1[0] */
  136. 0x07C 0x07 /* 26 GPIO1_29 gpmc_csn0.gpio1[29] */
  137. // 0x0E0 0x07 /* 27 GPIO2_22 lcd_vsync.gpio2[22] */
  138. // 0x0E8 0x07 /* 28 GPIO2_24 lcd_pclk .gpio2[24] */
  139. // 0x0E4 0x07 /* 29 GPIO2_23 lcd_hsync.gpio2[23] */
  140. // 0x0EC 0x07 /* 30 GPIO2_25 lcd_ac_bias_en.gpio2[25] */
  141. // 0x0D8 0x07 /* 31 UART5_CTSN lcd_data14.gpio0[10] */
  142. // 0x0DC 0x07 /* 32 UART5_RTSN lcd_data15.gpio0[11] */
  143. // 0x0D4 0x07 /* 33 UART4_RTSN lcd_data13.gpio0[9] */
  144. // 0x0CC 0x07 /* 34 UART3_RTSN lcd_data11.gpio2[17] */
  145. // 0x0D0 0x07 /* 35 UART4_CTSN lcd_data12.gpio0[8] */
  146. // 0x0C8 0x07 /* 36 UART3_CTSN lcd_data10.gpio2[16] */
  147. // 0x0C0 0x07 /* 37 UART5_TXD lcd_data8.gpio2[14] */
  148. // 0x0C4 0x07 /* 38 UART5_RXD lcd_data9.gpio2[15] */
  149. // 0x0B8 0x07 /* 39 GPIO2_12 lcd_data6.gpio2[12] */
  150. // 0x0BC 0x07 /* 40 GPIO2_13 lcd_data7.gpio2[13] */
  151. // 0x0B0 0x07 /* 41 GPIO2_10 lcd_data4.gpio2[10] */
  152. // 0x0B4 0x07 /* 42 GPIO2_11 lcd_data5.gpio2[11] */
  153. // 0x0A8 0x07 /* 43 GPIO2_8 lcd_data2.gpio2[8] */
  154. // 0x0AC 0x07 /* 44 GPIO2_9 lcd_data3.gpio2[9] */
  155. // 0x0A0 0x07 /* 45 GPIO2_6 lcd_data0.gpio2[6] */
  156. // 0x0A4 0x07 /* 46 GPIO2_7 lcd_data1.gpio2[7] */
  157.  
  158. /* P9 connector on the bone */
  159. /* B_B0-B_B19, INPUT | PULLDIS | MODE7 */
  160. 0x070 0x07 /* 11 UART4_RXD gpmc_wait0.gpio0[30] */
  161. 0x078 0x07 /* 12 GPIO1_28 gpmc_be1n.gpio1[28] */
  162. 0x074 0x07 /* 13 UART4_TXD gpmc_wpn.gpio0[31] */
  163. 0x048 0x07 /* 14 EHRPWM1A gpmc_a2.gpio1[18] */
  164. 0x040 0x07 /* 15 GPIO1_16 gpmc_a0.gpio1[16] */
  165. 0x04C 0x07 /* 16 EHRPWM1B gpmc_a3.gpio1[19] */
  166.  
  167. /* err, those two are used for I2C2 on the beaglebone */
  168. /* you should boot with I2C2 disabled on the tester */
  169. // 0x17C 0x07 /* 19 I2C2_SCL uart1_rtsn.gpio0[13] */
  170. // 0x178 0x07 /* 20 I2C2_SDA uart1_ctsn.gpio0[12] */
  171.  
  172. 0x154 0x07 /* 21 UART2_TXD spi0_d0.gpio0[3] */
  173. 0x150 0x07 /* 22 UART2_RXD spi0_sclk.gpio0[2] */
  174. 0x044 0x07 /* 23 GPIO1_17 gpmc_a1.gpio1[17] */
  175. 0x1AC 0x07 /* 25 GPIO3_21 mcasp0_ahclkx.gpio3[21]*/
  176. 0x1A4 0x07 /* 27 GPIO3_19 mcasp0_fsr.gpio3[19] */
  177. 0x19C 0x07 /* 28 SPI1_CS0 mcasp0_ahclkr.gpio3[17]*/
  178. 0x198 0x07 /* 30 SPI1_D1 mcasp0_axr0.gpio3[16] */
  179. 0x190 0x07 /* 31 SPI1_SCLK mcasp0_aclkx.gpio3[14] */
  180. 0x1B4 0x07 /* 41 CLKOUT2 xdma_event_intr1.gpio0[20]*/
  181. 0x164 0x07 /* 42 GPIO0_7 eCAP0_in_PWM0_out.gpio0[7]*/
  182.  
  183. /* the uart pins */
  184. // 0x184 0x07 /* 24 UART1_TXD uart1_txd.gpio0[15] */
  185. // 0x180 0x07 /* 26 UART1_RXD uart1_rxd.gpio0[14] */
  186. >;
  187. };
  188.  
  189. bone_tester_i2c1_pins: pinmux_bone_tester_i2c1_pins {
  190. pinctrl-single,pins = <
  191. 0x158 0x72 /* spi0_d1.i2c1_sda, SLEWCTRL_SLOW | INPUT_PULLUP | MODE2 */
  192. 0x15c 0x72 /* spi0_cs0.i2c1_scl, SLEWCTRL_SLOW | INPUT_PULLUP | MODE2 */
  193. >;
  194. };
  195.  
  196. bone_tester_jhd629_pins: pinmux_bone_tester_jhd629_pins {
  197. pinctrl-single,pins = <
  198. 0x194 0x37 /* mcasp0_fsx.gpio3_15, OMAP_MUX_MODE7 | INPUT_PULLUP */
  199. >;
  200. };
  201.  
  202. bone_default_drvvbus_pins: pinmux_bone_default_drvvbus_pins {
  203. pinctrl-single,pins = <
  204. 0x234 0x20 /* USB1_DRVVBUS musb */
  205. >;
  206. };
  207. bone_gpio_drvvbus_pins: pinmux_bone_gpio_drvvbus_pins {
  208. pinctrl-single,pins = <
  209. 0x234 0x07 /* USB1_DRVVBUS.gpio3_13 OUTPUT */
  210. >;
  211. };
  212. };
  213. };
  214.  
  215. fragment@1 {
  216. target = <&i2c1>;
  217. __overlay__ {
  218. #address-cells = <1>;
  219. #size-cells = <0>;
  220. pinctrl-names = "default";
  221. pinctrl-0 = <&bone_tester_i2c1_pins>;
  222. status = "okay";
  223. clock-frequency = <100000>;
  224. };
  225. };
  226.  
  227. fragment@2 {
  228. target = <&i2c1>;
  229. __overlay__ {
  230. /* needed to avoid gripping by DTC */
  231. #address-cells = <1>;
  232. #size-cells = <0>;
  233.  
  234. /* pca9457 */
  235. pca9457_mux {
  236. compatible = "nxp,pca9547";
  237. status = "okay";
  238.  
  239. #address-cells = <1>;
  240. #size-cells = <0>;
  241. reg = <0x70>;
  242.  
  243. bus@0 { /* LCD/KEY */
  244. compatible = "nxp,pca954x-bus";
  245. status = "okay";
  246. nxp,pca95x-class = <0x0>;
  247. reg = <0x0>;
  248. nxp,deselect-on-exit;
  249. #address-cells = <1>;
  250. #size-cells = <0>;
  251.  
  252. jhd629@31 {
  253. compatible = "jhd,jhd629";
  254. status = "okay";
  255. reg = <0x31>;
  256.  
  257. pinctrl-names = "default";
  258. pinctrl-0 = <&bone_tester_jhd629_pins>;
  259.  
  260. rows = <4>;
  261. columns = <20>;
  262. keymap = "123A456B789C*0#D";
  263. poll-period = <250>; /* poll every 250ms */
  264. // gpios = <&gpio4 15 0>; /* keypad interrupt */
  265. };
  266. };
  267.  
  268. bus@1 { /* LATCH */
  269. compatible = "nxp,pca954x-bus";
  270. status = "okay";
  271. nxp,pca95x-class = <0x0>;
  272. reg = <0x1>;
  273. nxp,deselect-on-exit;
  274. #address-cells = <1>;
  275. #size-cells = <0>;
  276.  
  277. tester_latch: latch@38 {
  278. /*
  279. * TESTING_LED
  280. * FAILED_LED
  281. * ATTN_LED
  282. * RDY_LED
  283. * DC_RELAY
  284. * PWRBUT_RELAY
  285. * RESET_RELAY
  286. */
  287. compatible = "nxp,pcf8574";
  288. status = "okay";
  289. reg = <0x38>;
  290. gpio-controller;
  291. #gpio-cells = <2>;
  292.  
  293. };
  294. };
  295.  
  296. bus@2 { /* SOLENOIDS */
  297. compatible = "nxp,pca954x-bus";
  298. status = "okay";
  299. nxp,pca95x-class = <0x0>;
  300. reg = <0x2>;
  301. nxp,deselect-on-exit;
  302. #address-cells = <1>;
  303. #size-cells = <0>;
  304.  
  305. grove@f {
  306. compatible = "grove";
  307. status = "okay";
  308. reg = <0x0f>;
  309. };
  310. };
  311.  
  312. bus@3 { /* RTC */
  313. compatible = "nxp,pca954x-bus";
  314. status = "okay";
  315. nxp,pca95x-class = <0x0>;
  316. reg = <0x3>;
  317. nxp,deselect-on-exit;
  318. #address-cells = <1>;
  319. #size-cells = <0>;
  320.  
  321. rtc@68 {
  322. compatible = "dallas,ds1307";
  323. status = "okay";
  324. reg = <0x68>;
  325. };
  326. };
  327.  
  328. bus@4 { /* INA219 */
  329. compatible = "nxp,pca954x-bus";
  330. status = "okay";
  331. nxp,pca95x-class = <0x0>;
  332. reg = <0x4>;
  333. nxp,deselect-on-exit;
  334. #address-cells = <1>;
  335. #size-cells = <0>;
  336.  
  337. ina@40 {
  338. compatible = "ti,ina219";
  339. status = "okay";
  340. reg = <0x40>;
  341. };
  342. };
  343.  
  344. bus@5 { /* BUFFERS */
  345. compatible = "nxp,pca954x-bus";
  346. status = "okay";
  347. nxp,pca95x-class = <0x0>;
  348. reg = <0x5>;
  349. nxp,deselect-on-exit;
  350. #address-cells = <1>;
  351. #size-cells = <0>;
  352.  
  353. tester_buffers: latch@39 {
  354. /*
  355. * TxD_BUFFER
  356. * RxD_BUFFER
  357. * OE_BUFFER
  358. * DIR_BUFFER
  359. * CTRL_EEPROM_WP
  360. */
  361. compatible = "nxp,pcf8574";
  362. status = "okay";
  363. reg = <0x39>;
  364. gpio-controller;
  365. #gpio-cells = <2>;
  366. };
  367. };
  368. };
  369. };
  370. };
  371.  
  372. fragment@3 {
  373. target = <&ocp>;
  374. __overlay__ {
  375.  
  376. gpio-leds-tester {
  377. compatible = "gpio-leds";
  378.  
  379. /* note we don't use tester:<color>:<function> */
  380. led0 {
  381. label = "TESTING_LED";
  382. gpios = <&tester_latch 0 0>;
  383. linux,default-trigger = "none";
  384. default-state = "off";
  385. };
  386.  
  387. led1 {
  388. label = "FAILED_LED";
  389. gpios = <&tester_latch 1 0>;
  390. linux,default-trigger = "none";
  391. default-state = "off";
  392. };
  393.  
  394. led2 {
  395. label = "PASS_LED";
  396. gpios = <&tester_latch 2 0>;
  397. linux,default-trigger = "none";
  398. default-state = "off";
  399. };
  400.  
  401. led3 {
  402. label = "ATTN_LED";
  403. gpios = <&tester_latch 3 0>;
  404. linux,default-trigger = "none";
  405. default-state = "off";
  406. };
  407.  
  408. led4 {
  409. label = "RDY_LED";
  410. gpios = <&tester_latch 4 0>;
  411. linux,default-trigger = "none";
  412. default-state = "off";
  413. };
  414. };
  415. };
  416.  
  417. };
  418.  
  419. fragment@4 {
  420. target = <&ocp>;
  421. __overlay__ {
  422.  
  423. tester_pinmux_helper {
  424. compatible = "bone-pinmux-helper";
  425. status = "okay";
  426.  
  427. pinctrl-names = "default", "input", "output";
  428. pinctrl-0 = <&bone_tester_default_gpio_pins>;
  429. pinctrl-1 = <&bone_tester_input_gpio_pins>;
  430. pinctrl-2 = <&bone_tester_output_gpio_pins>;
  431. };
  432.  
  433. drvvbus_pinmux_helper {
  434. compatible = "bone-pinmux-helper";
  435. status = "okay";
  436.  
  437. pinctrl-names = "default", "gpio";
  438. pinctrl-0 = <&bone_default_drvvbus_pins>;
  439. pinctrl-1 = <&bone_gpio_drvvbus_pins>;
  440. };
  441. };
  442.  
  443. };
  444.  
  445. fragment@5 {
  446. target = <&uart2>; /* really uart1 */
  447. __overlay__ {
  448. /* please note that the pinconfig is done by the pinmux helper */
  449. status = "okay";
  450. };
  451. };
  452.  
  453. fragment@6 {
  454. target = <&ocp>;
  455. __overlay__ {
  456. #address-cells = <1>;
  457. #size-cells = <1>;
  458.  
  459. tscadc {
  460. compatible = "ti,ti-tscadc";
  461. reg = <0x44e0d000 0x1000>;
  462.  
  463. interrupt-parent = <&intc>;
  464. interrupts = <16>;
  465. ti,hwmods = "adc_tsc";
  466. status = "okay";
  467.  
  468. adc {
  469. ti,adc-channels = <8>;
  470. };
  471. };
  472.  
  473. tester_iio_helper {
  474. compatible = "bone-iio-helper";
  475. vsense-name = "AIN0", "AIN1", "AIN2", "AIN3", "AIN4", "AIN5", "AIN6", "AIN7";
  476. vsense-scale = <100 100 100 100 100 100 100 100>;
  477. // vsense-scale = <200 200 296 296 296 296 100 100>;
  478. /* 3.3V 3.3V 5V 5V 5V 5V 1.8V */
  479. status = "okay";
  480. };
  481. };
  482. };
  483. };
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