module seg7_display(m,n);
input [3:0] m;
output reg [6:0] n;

parameter blank = 7'b 1111111;
parameter zero = 7'b 1000000;
parameter one = 7'b 1111001;
parameter two = 7'b 0100100;
parameter three = 7'b 0110000;
parameter four = 7'b 0011001;
parameter five = 7'b 0010010;
parameter six = 7'b 0000010;
parameter seven = 7'b 1111000;
parameter eight = 7'b 0000000;
parameter nine = 7'b 0010000;

always @ (m) begin
	case (m)
		0: n <= zero;
		1: n <= one;
		2: n <= two;
		3: n <= three;
		4: n <= four;
		5: n <= five;
		6: n <= six;
		7: n <= seven;
		8: n <= eight;
		9: n <= nine;
		default: n <= blank;
	endcase
end

endmodule

module test (CLOCK_50, HEX0, HEX1, HEX2, HEX3);
input CLOCK_50;
output reg [6:0] HEX0, HEX1, HEX2, HEX3;

reg [31:0] count;
reg [40:0] i;
wire [6:0] indeks[9:0];

seg7_display(0,indeks[0]);
seg7_display(1,indeks[1]);
seg7_display(2,indeks[2]);
seg7_display(3,indeks[3]);
seg7_display(4,indeks[4]);
seg7_display(5,indeks[5]);
seg7_display(6,indeks[6]);
seg7_display(7,indeks[7]);
seg7_display(8,indeks[8]);
seg7_display(9,indeks[9]);


always @ (posedge CLOCK_50) begin
	if (count == 500000)
		begin
		HEX0 = indeks[i%10];
		HEX1 = indeks[(i/10)%10];
		HEX2 = indeks[(i/100)%10];
		HEX3 = indeks[(i/1000)%10];
		i = i+1;
		end;
	count = (count +1) % 500001;
end


endmodule

------------------------------------------------------------------------
module test (CLOCK_50, KEY, LEDG, HEX0);
  input [1:0] KEY;
  input CLOCK_50;
  output [3:0] LEDG;
  output [0:6] HEX0;
  reg [31:0] count;
  reg [0:3] Q = 4'b0001;

always @ (posedge CLOCK_50) begin
	if (count == 50000000)
		begin
		 Q <= {Q[3]^Q[2], Q[0:2]};
		end;
	count = (count +1) % 50000001;
end

  assign LEDG = Q;

endmodule