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  1. #include <avr32/io.h>
  2. #include "boot.h"
  3. #include "parts.h"
  4.  
  5. #if UC3C
  6. //  These defines are missing from or wrong in the toolchain header file ip_xxx.h or part.h
  7. #ifndef AVR32_WDT_KEY_VALUE
  8. #define AVR32_WDT_KEY_VALUE                            0x00000055
  9. #endif
  10. #define AVR32_SR_M_SUP                                 0x00000001
  11. #define AVR32_SR_M_SIZE                                         3
  12. #define AVR32_SR_M_OFFSET                                      22
  13. #define AVR32_SRAM_ADDRESS                             0x00000000
  14. #endif
  15.  
  16. //! @{
  17. //! \verbatim
  18.  
  19.  
  20.   // Performs efficiently a bitwise logical Exclusive-OR between the specified
  21.   // register and an immediate value of up to 32 bits. The result is stored in
  22.   // the destination register.
  23.   .macro  eor.w   rd, imm
  24.     .if \imm & 0x0000FFFF
  25.       eorl    \rd, LO(\imm)
  26.     .endif
  27.     .if \imm & 0xFFFF0000
  28.       eorh    \rd, HI(\imm)
  29.     .endif
  30.   .endm
  31.  
  32.   // Moves efficiently an immediate value of up to 32 bits into a register.
  33.   .macro  mov.w   rd, imm
  34.     .if ((-(1 << (21 - 1))) <= \imm) && (\imm <= ((1 << (21 - 1)) - 1))
  35.       mov     \rd, \imm
  36. #if __AVR32_UC__ >= 2
  37.     .elseif !(\imm & 0x0000FFFF)
  38.       movh    \rd, HI(\imm)
  39. #endif
  40.     .else
  41.       mov     \rd, LO(\imm)
  42.       orh     \rd, HI(\imm)
  43.     .endif
  44.   .endm
  45.  
  46.   // Performs efficiently a bitwise logical OR between the specified register
  47.   // and an immediate value of up to 32 bits. The result is stored in the
  48.   // destination register.
  49.   .macro  or.w    rd, imm
  50.     .if \imm & 0x0000FFFF
  51.       orl     \rd, LO(\imm)
  52.     .endif
  53.     .if \imm & 0xFFFF0000
  54.       orh     \rd, HI(\imm)
  55.     .endif
  56.   .endm
  57.  
  58.  
  59.   .section  .reset, "ax", @progbits
  60.  
  61.  
  62.   .balign 2
  63.  
  64.   // Reset vector: This must be linked @ 0x80000000.
  65.   .global _start
  66.   .type _start, @function
  67. _start:
  68.   // Check if valid userpage
  69.   mov.w   r0, BOOT_CFG_ADDRESS
  70.   ld.w    r1, r0[0]  
  71.   mov.w   r0, BOOT_CFG_BOOT_KEY1_VALUE
  72.   cp      r0, r1
  73.   brne    start_loader
  74.   // Check if app available
  75.   mov.w   r0, BOOT_CFG_ADDRESS
  76.   ld.w    r1, r0[0xC]  
  77.   lsr     r1, 16                    
  78.   cp.w    r1, BOOT_CFG_BOOT_KEY2_VALUE
  79.   brne    start_loader  
  80.   // Check if there is a boot task to do
  81.   mov.w   r0, BOOT_CFG_ADDRESS
  82.   ld.w    r1, r0[8]  
  83.   cp.w    r1, 0
  84.   breq    start_program
  85.   rcall   start_loader
  86.  
  87.   // Start of the ISP process
  88. start_loader:
  89.   rcall   disable_wdt                       // Disable the WDT
  90.  
  91.   // Set initial stack pointer.
  92.   mov     sp, _estack
  93.  
  94.   // Disable the exception processing.
  95.   ssrf    AVR32_SR_EM_OFFSET
  96.  
  97.   // Set up EVBA so interrupts can be enabled.
  98.   mov     r0, _evba
  99.   mtsr    AVR32_EVBA, r0
  100.  
  101.   // Load initialized data having a global lifetime from the data LMA.
  102.   mov     r0, _data
  103.   mov     r1, _edata
  104.   sub     r2, pc, $ - _data_lma
  105.   rcall   load_idata
  106.  
  107.   // Clear uninitialized data having a global lifetime in the blank static storage section.
  108.   mov     r0, __bss_start
  109.   mov     r1, _end
  110.   mov.w   r2, 0
  111.   mov.w   r3, 0
  112.   rjmp    clear_udata
  113. clear_udata_loop:
  114.   st.d    r0++, r2
  115. clear_udata:
  116.   cp.w    r0, r1
  117.   brlo    clear_udata_loop
  118.  
  119.   // Load constant data and code from the const LMA.
  120.   mov     r0, _const
  121.   mov     r1, _econst
  122.   sub     r2, pc, $ - _const_lma
  123.   rcall   load_idata
  124.  
  125.   // Call the ISP main function, which must not return.
  126.   call    main
  127.  
  128. start_program:
  129.   lddpc   pc, program_start_address
  130.  
  131. disable_wdt:
  132.   mov.w   r9, AVR32_WDT_ADDRESS
  133.   mov.w   r2, AVR32_WDT_KEY_VALUE << AVR32_WDT_CTRL_KEY_OFFSET
  134.   st.w    r9[AVR32_WDT_CTRL], r2
  135.   eor.w   r2, AVR32_WDT_CTRL_KEY_MASK
  136.   st.w    r9[AVR32_WDT_CTRL], r2
  137.   mov     pc, lr
  138.  
  139. load_idata_loop:
  140.   ld.d    r4, r2++
  141.   st.d    r0++, r4
  142. load_idata:
  143.   cp.w    r0, r1
  144.   brle    load_idata_loop
  145.   mov     pc, lr
  146.  
  147.   // Common CRC8 function
  148. crc8:
  149.   clz     r5, r4
  150.   rsub    r5, r5, 32 - 9
  151.   lsl     r5, r3, r5
  152.   eor     r4, r5
  153. test_crc8_end:
  154.   cp.w    r4, 0xFF
  155.   brhi    crc8
  156.   cp.w    r4, 0
  157.   retal   r4
  158.  
  159. _reset_vector: 
  160.     mov    R0, 0x8000
  161.     lsl    R0, 16
  162.     mov    pc, R0
  163.  
  164. // Constant data area.
  165.  
  166.   .balign 4
  167.  
  168. program_start_address:
  169.   .word USER_APP_START_ADDRESS
  170.  
  171.  
  172.   .section  .evba, "ax", @progbits
  173.  
  174.  
  175.   .balign 2
  176.  
  177.   // Export symbol.
  178. .global _evba
  179. .type _evba, @function
  180. _evba:
  181.  
  182.     .org  0x000
  183.     // Unrecoverable Exception.
  184. _handle_Unrecoverable_Exception:
  185.     call _reset_vector
  186.     //rjmp $
  187.  
  188.     .org  0x004
  189.     // TLB Multiple Hit.
  190. _handle_TLB_Multiple_Hit:
  191.     rjmp $
  192.  
  193.     .org  0x008
  194.     // Bus Error Data Fetch.
  195. _handle_Bus_Error_Data_Fetch:
  196.     rjmp $
  197.  
  198.     .org  0x00C
  199.     // Bus Error Instruction Fetch.
  200. _handle_Bus_Error_Instruction_Fetch:
  201.     rjmp $
  202.  
  203.     .org  0x010
  204.     // NMI.
  205. _handle_NMI:
  206.     rjmp $
  207.  
  208.     .org  0x014
  209.     // Instruction Address.
  210. _handle_Instruction_Address:
  211.     rjmp $
  212.  
  213.     .org  0x018
  214.     // ITLB Protection.
  215. _handle_ITLB_Protection:
  216.     rjmp $
  217.  
  218.     .org  0x01C
  219.     // Breakpoint.
  220. _handle_Breakpoint:
  221.     rjmp $
  222.  
  223.     .org  0x020
  224.     // Illegal Opcode.
  225. _handle_Illegal_Opcode:
  226.     rjmp $
  227.  
  228.     .org  0x024
  229.     // Unimplemented Instruction.
  230. _handle_Unimplemented_Instruction:
  231.     rjmp $
  232.  
  233.     .org  0x028
  234.     // Privilege Violation.
  235. _handle_Privilege_Violation:
  236.     rjmp $
  237.  
  238.     .org  0x02C
  239.     // Floating-Point: UNUSED IN AVR32UC and AVR32AP.
  240. _handle_Floating_Point:
  241.     rjmp $
  242.  
  243.     .org  0x030
  244.     // Coprocessor Absent: UNUSED IN AVR32UC.
  245. _handle_Coprocessor_Absent:
  246.     rjmp $
  247.  
  248.     .org  0x034
  249.     // Data Address (Read).
  250. _handle_Data_Address_Read:
  251.     rjmp $
  252.  
  253.     .org  0x038
  254.     // Data Address (Write).
  255. _handle_Data_Address_Write:
  256.     rjmp $
  257.  
  258.     .org  0x03C
  259.     // DTLB Protection (Read).
  260. _handle_DTLB_Protection_Read:
  261.     rjmp $
  262.  
  263.     .org  0x040
  264.     // DTLB Protection (Write).
  265. _handle_DTLB_Protection_Write:
  266.     rjmp $
  267.  
  268.     .org  0x044
  269.     // DTLB Modified: UNUSED IN AVR32UC.
  270. _handle_DTLB_Modified:
  271.     rjmp $
  272.  
  273.     .org  0x050
  274.     // ITLB Miss.
  275. _handle_ITLB_Miss:
  276.     rjmp $
  277.  
  278.     .org  0x060
  279.     // DTLB Miss (Read).
  280. _handle_DTLB_Miss_Read:
  281.     rjmp $
  282.  
  283.     .org  0x070
  284.     // DTLB Miss (Write).
  285. _handle_DTLB_Miss_Write:
  286.     rjmp $
  287.  
  288.     .org  0x100
  289.     // Supervisor Call.
  290. _handle_Supervisor_Call:
  291.     rjmp $
  292.  
  293. /*
  294.  * Interrupt support.
  295.  * The interrupt controller must provide the offset address relative to EVBA.
  296.  * Important note:
  297.  * All interrupts call a C function named _get_interrupt_handler.
  298.  * This function will read group and interrupt line number to then return in
  299.  *R12 a pointer to a user-provided interrupt handler.
  300.  */
  301.  
  302. .balign 4
  303.  
  304. .irp    priority, 0, 1, 2, 3
  305. .global _int\priority
  306. .type   _int\priority, @function
  307. _int\priority:
  308. #if __AVR32_UC__
  309.     /*
  310.      * R8-R12, LR, PC and SR are automatically pushed onto the system stack
  311.      * by the CPU upon interrupt entry. No other register is saved by
  312.      * hardware.
  313.      */
  314. #elif __AVR32_AP__
  315.     /*
  316.      * PC and SR are automatically saved in respectively RAR_INTx and
  317.      * RSR_INTx by the CPU upon interrupt entry. No other register is saved
  318.      * by hardware.
  319.      */
  320.     pushm   r8-r12, lr
  321. #endif
  322.     // Pass the int_level parameter to the _get_interrupt_handler function.
  323.     mov     r12, \priority
  324.     call    _get_interrupt_handler
  325.     // Get the pointer to the interrupt handler returned by the function.
  326.     cp.w    r12, 0
  327. #if __AVR32_UC__
  328.     /*
  329.      * If this was not a spurious interrupt (R12 != NULL), jump to the
  330.      * handler.
  331.      */
  332.     movne   pc, r12
  333. #elif __AVR32_AP__
  334.     // If this was a spurious interrupt (R12 == NULL), branch.
  335.     breq    spint\priority
  336.     /*
  337.      * Push the pointer to the interrupt handler onto the system stack since
  338.      * no register may be altered.
  339.      */
  340.     st.w    --sp, r12
  341.     popm    r8-r12, lr, pc  // Restore registers and jump to the handler.
  342. spint\priority:
  343.     popm    r8-r12, lr
  344. #endif
  345.     /*
  346.      * If this was a spurious interrupt (R12 == NULL), return from event
  347.      * handler.
  348.      */
  349.     rete
  350. .endr
  351.  
  352. //! \endverbatim
  353. //! @}
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