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a guest Mar 26th, 2020 64 Never
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  1. # Clock constraints
  2. create_clock -name " clk " -period 20 .000ns [ get_ports { clk }]
  3.  
  4. # Automatically constrain PLL and other generated clocks
  5. derive_pll_clocks -create_base_clocks
  6.  
  7. # Automatically calculate clock uncertainty to jitter and other effects.
  8. derive_clock_uncertainty
  9.  
  10. set_false_path - from [ get_clocks { pll_inst | altpll_component | auto_generated | pll1 |
  11. clk [0]}] -to [ get_clocks { pll_inst | altpll_component | auto_generated | pll1 | clk
  12. [1]}];
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