Advertisement
Not a member of Pastebin yet?
Sign Up,
it unlocks many cool features!
- // BeagleBone AI spi test
- //
- // Include this into your .dts (after dra7.dtsi).
- //
- // Note that letting the kernel setup pinmux (based on devicetree) may glitch the I/Os.
- //
- // If you're not going to do your pinmux setup in u-boot, at the very least disable the
- // default pinmux performed by u-boot (intended for the am572x uEVM). See:
- // https://github.com/dutchanddutch/u-boot/tree/patch/ti2017.01/x15-pinmux
- //
- // This test requires external loopback connections:
- // BBX15
- // mcspi pru
- // P17.04 --> P17.03
- // P17.07 --> P17.06
- // P17.33 --> P17.34
- // P17.36 <-- P17.37
- //
- // BBAI
- // mcspi pru
- // P9.31 --> P8.41
- // P9.29 --> P8.31, 8.04
- // P9.42 --> P8.42
- // P9.30 <-- P8.34, 8.23
- //
- // Then run spi-test.py in the pru-examples directory.
- #include "dra7-uio-pruss.dtsi"
- &mcspi3 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&mcspi3_pins>;
- spidev@1 {
- reg = <1>;
- compatible = "spidev";
- spi-max-frequency = <24000000>;
- spi-cpol; spi-cpha;
- };
- };
- &dra7_pmx_core {
- mcspi3_pins: mcspi3 {
- pinctrl-single,pins = <
- // mcspi3 ioset 6
- DRA7XX_CORE_IOPAD( 0x3400 + 4 * 185, PIN_OUTPUT_PULLUP | MUX_MODE3 ) // P9.42 cs1
- DRA7XX_CORE_IOPAD( 0x3400 + 4 * 181, PIN_INPUT_PULLUP | MUX_MODE3 ) // P9.31 clk
- DRA7XX_CORE_IOPAD( 0x3400 + 4 * 182, PIN_OUTPUT_PULLUP | MUX_MODE3 ) // P9.29 d1 (mosi)
- DRA7XX_CORE_IOPAD( 0x3400 + 4 * 183, PIN_INPUT_PULLUP | MUX_MODE3 ) // P9.30 d0 (miso)
- >;
- };
- };
- // NOTE: for these pins, the desired iodelay configuration is manual with all-zero iodelay values,
- // which is why I'm using MODE_SELECT but don't have an explicit iodelay block. Omitting explicit
- // iodelay configuration isn't laziness, I'm a bit concerned to do so in DT due to erratum i933.
- &pruss2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pruss2_pins>;
- };
- &dra7_pmx_core {
- pruss2_pins: pruss2 {
- pinctrl-single,pins = <
- // pruss2 core 0 ioset 2
- DRA7XX_CORE_IOPAD( 0x3400 + 4 * 123, PIN_INPUT_PULLUP | MUX_MODE12 | MODE_SELECT ) // P8.41 in 1 (sclk)
- DRA7XX_CORE_IOPAD( 0x3400 + 4 * 124, PIN_INPUT_PULLUP | MUX_MODE12 | MODE_SELECT ) // P8.42 in 2 (cs)
- DRA7XX_CORE_IOPAD( 0x3400 + 4 * 130, PIN_OUTPUT | MUX_MODE13 | MODE_SELECT ) // P8.34 out 8 (miso)
- DRA7XX_CORE_IOPAD( 0x3400 + 4 * 133, PIN_INPUT_PULLUP | MUX_MODE12 | MODE_SELECT ) // P8.31 in 11 (mosi)
- >;
- };
- };
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement