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- #include "SPI_Flash.h"
- void CS_Sel(CS_Signal s)
- {
- IOSET0 = (1 << 10); /* SD: High to Deselect */
- IOSET0 = (1 << 12); /* Flash: High to Deselect */
- IOCLR1 = (1 << 29); /* MP3: Low to Deselect */
- switch(s)
- {
- case sel_SD: IOCLR0 = (1 << 10); break; /* Active Low = LOW to sel */
- case sel_Flash: IOCLR0 = (1 << 12); break; /* Active Low = LOW to sel */
- case sel_MP3: IOSET1 = (1 << 29); break; /* Active High = HIGH to sel */
- case sel_Nothing:
- default:
- break;
- }
- }
- void CS_Init()
- {
- IODIR0 |= (1 << 10); // SD: P0.10
- IODIR0 |= (1 << 12); // Flash: P0.12
- IODIR1 |= (1 << 29); // MP3: P1.29
- CS_Sel(sel_Nothing);
- CS_Sel(sel_SD); delay_ms(1000);
- CS_Sel(sel_Flash); delay_ms(1000);
- CS_Sel(sel_MP3); delay_ms(1000);
- CS_Sel(sel_Nothing);
- ssp_SPI_Init();
- }
- void ssp_SPI_Init()
- {
- //Set up pin selection struct for the SPI, MISO, and MOSI pins
- /*pinSelect myPin1;
- myPin1.data = 0;
- myPin1.pins.p1 = 2;
- myPin1.pins.p2 = 2;
- myPin1.pins.p3 = 2;*/
- //PINSEL1 |= myPin1.data; //Set P0.17 to SCK, P0.18 to MISO, P0.19 to MOSI
- PINSEL1 |= (2 << 2);
- PINSEL1 |= (2 << 4);
- PINSEL1 |= (2 << 6);
- SSPCR0 = (7 << 0); //Set 8 bit frame, SPI format, don't change clock polarity/phase, SCR value
- SSPCR1 = (1 << 1); //Enable SSP Controller
- SSPCPSR = 4; // CPSDVSR = 4 because we want 12 MHz = 48Mhz/CPSDVSR
- }
- char SPI_Exch(char sendMe)
- {
- //rprintf("Hang here.\n");
- SSPDR = sendMe; //or |=?
- while (((SSPSR & (1 << 4))))
- {
- //rprintf("Hang here.\n");
- //Stay on target...!
- }
- return SSPDR;
- }
- void globalWriteEnable(void)
- {
- SPI_busy();
- CS_Sel(sel_Flash);
- SPI_Exch(0x06); //Set WEL (write enable latch) to 1;
- CS_Sel(sel_Nothing);
- delay_ms(50);
- CS_Sel(sel_Flash);
- SPI_Exch(0x01); //Writing to Status Register
- SPI_Exch(0x80); //Set Status Register to Unprotected
- CS_Sel(sel_Nothing);
- SPI_busy();
- }
- void writeEnable(void)
- {
- SPI_busy();
- CS_Sel(sel_Flash);
- SPI_Exch(0x06);
- CS_Sel(sel_Nothing);
- SPI_busy();
- }
- void SPI_Block_Erase(int page)
- {
- writeEnable();
- SPI_busy();
- rprintf("Erasing page %i.\n", page);
- bytes address;
- address.data = page*256;
- CS_Sel(sel_Flash);
- SPI_Exch(0x20);
- /*SPI_Exch(address.bs.b0);
- SPI_Exch(address.bs.b1);
- SPI_Exch(address.bs.b2);*/
- SPI_Exch(0x00);
- SPI_Exch(0x00);
- SPI_Exch(0x00);
- CS_Sel(sel_Nothing);
- SPI_busy();
- }
- void SPI_busy(void)
- {
- //rprintf("Hang here...\n");
- char status = 0xFF;
- CS_Sel(sel_Flash);
- SPI_Exch(0x05); //Read Status Register
- do
- {
- //rprintf("Hang here...\n");
- status = SPI_Exch(0x00); //Dummy data to read
- } while ((status & (1 << 0)));
- CS_Sel(sel_Nothing);
- }
- void SPI_write(int page, char data[], int length)
- {
- writeEnable();
- rprintf("Writing...%d, %s, %d\n", page, data, length);
- SPI_busy();
- int i = 0;
- if(length > 256)
- {
- rprintf("------------------Your data is too long for a page.-------------------------\n");
- return;
- }
- bytes address;
- address.data = page*256;
- CS_Sel(sel_Flash);
- SPI_Exch(0x02);
- /*SPI_Exch(address.bs.b0);
- SPI_Exch(address.bs.b1);
- SPI_Exch(address.bs.b2);*/
- SPI_Exch(0x00);
- SPI_Exch(0x00);
- SPI_Exch(0x00);
- for (i = 0; i < length; i++)
- {
- SPI_Exch(data[i]);
- rprintf("%c, %d, %d\n", data[i], i, length);
- }
- CS_Sel(sel_Nothing);
- SPI_busy();
- }
- void SPI_read(int address, int length, char *ret)
- {
- SPI_busy();
- int i = 0;
- bytes add;
- add.data = address*256;
- CS_Sel(sel_Flash);
- SPI_Exch(0x0B);
- /*SPI_Exch(add.bs.b0);
- SPI_Exch(add.bs.b1);
- SPI_Exch(add.bs.b2);*/
- SPI_Exch(0x00);
- SPI_Exch(0x00);
- SPI_Exch(0x00);
- SPI_Exch(0x00);
- for (i = 0; i < length; i++)
- {
- //rprintf(SPI_Exch(0x00));
- ret[i] = SPI_Exch(0x00);
- rprintf("%c, %d, %d\n", ret[i], i, length);
- }
- CS_Sel(sel_Nothing);
- SPI_busy();
- }
- void delay_ms(unsigned long count)
- {
- volatile unsigned long c = count * 4000;
- // Each loop iteration should be:
- // 2 LOADS, 1 STORE, 1 CMP, 1 SUB, and 1 BRANCH
- // Around 16 instructions?
- while (--c)
- ;
- }
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