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GNUBS'D MIPSel DD-WRT 4.14.88-SE [CRISPIN] bootlog (w/ PAM)

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  1. bootlog of the latest DD-WRT 4.14.88-rc1 for MIPSEL routers (currently running on an MT7621AT+MT7615x2 [DIR882]).
  2.  
  3. special edition because it uses The Crispy One John Crispin aka blogic's (i am sure he hates the moniker, but as he is aware: nicks aren't always chosen ;)) mediatek ethernet driver (now with hardware nat), just to have everything up and running.
  4.  
  5. the ethernet driver is now about good as RAETH, but Countrymen Crispin and Burton have pulled multiple-magnitudes of their weight for many years, so this will have to do as a "proof of concept". ideally, with RAETH, we shave a few more megabytes with respect to working memory.
  6.  
  7. as you can see, all of the "new" stuff is being used for 4.14, including the OF-friendly SPI driver. this sucker is what you wanna use!
  8.  
  9. ===================================================================
  10.                 MT7621   stage1 code 10:33:55 (ASIC)
  11.                 CPU=500000000 HZ BUS=166666666 HZ
  12. ==================================================================
  13. Change MPLL source from XTAL to CR...
  14. do MEMPLL setting..
  15. MEMPLL Config : 0x11100000
  16. 3PLL mode + External loopback
  17. === XTAL-40Mhz === DDR-1200Mhz ===
  18. PLL2 FB_DL: 0x9, 1/0 = 553/471 25000000
  19. PLL3 FB_DL: 0xa, 1/0 = 696/328 29000000
  20. PLL4 FB_DL: 0xc, 1/0 = 526/498 31000000
  21. do DDR setting..[01F40000]
  22. Apply DDR3 Setting...(use customer AC)
  23.           0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
  24.       --------------------------------------------------------------------------------
  25. 0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  26. 0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  27. 0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  28. 0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  29. 0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  30. 0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  31. 0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  32. 0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  33. 0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  34. 0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  35. 000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  36. 000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  37. 000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  38. 000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    1    1
  39. 000E:|    0    0    0    0    0    0    0    0    1    1    1    1    1    1    1    1
  40. 000F:|    0    0    0    1    1    1    1    1    1    1    1    1    1    0    0    0
  41. 0010:|    1    1    1    1    1    1    1    1    0    0    0    0    0    0    0    0
  42. 0011:|    1    1    1    0    0    0    0    0    0    0    0    0    0    0    0    0
  43. 0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  44. 0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  45. 0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  46. 0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  47. 0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  48. 0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  49. 0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  50. 0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  51. 001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  52. 001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  53. 001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  54. 001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  55. 001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  56. 001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
  57. rank 0 coarse = 15
  58. rank 0 fine = 64
  59. B:|    0    0    0    0    0    0    0    0    1    1    1    0    0    0    0    0
  60. opt_dle value:9
  61. DRAMC_R0DELDLY[018]=00001F1F
  62. ==================================================================
  63.                 RX      DQS perbit delay software calibration
  64. ==================================================================
  65. 1.0-15 bit dq delay value
  66. ==================================================================
  67. bit|     0  1  2  3  4  5  6  7  8  9
  68. --------------------------------------
  69. 0 |    8 5 7 9 6 5 8 6 7 7
  70. 10 |    8 9 9 11 9 10
  71. --------------------------------------
  72.  
  73. ==================================================================
  74. 2.dqs window
  75. x=pass dqs delay value (min~max)center
  76. y=0-7bit DQ of every group
  77. input delay:DQS0 =31 DQS1 = 31
  78. ==================================================================
  79. bit     DQS0     bit      DQS1
  80. 0  (1~58)29  8  (1~60)30
  81. 1  (0~56)28  9  (1~58)29
  82. 2  (1~55)28  10  (0~58)29
  83. 3  (1~61)31  11  (1~58)29
  84. 4  (1~58)29  12  (1~62)31
  85. 5  (1~59)30  13  (1~58)29
  86. 6  (1~57)29  14  (1~60)30
  87. 7  (1~60)30  15  (1~61)31
  88. ==================================================================
  89. 3.dq delay value last
  90. ==================================================================
  91. bit|    0  1  2  3  4  5  6  7  8   9
  92. --------------------------------------
  93. 0 |    10 8 10 9 8 6 10 7 8 9
  94. 10 |    10 11 9 13 10 10
  95. ==================================================================
  96. ==================================================================
  97.      TX  perbyte calibration
  98. ==================================================================
  99. DQS loop = 15, cmp_err_1 = ffff0000
  100. dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1
  101. dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2
  102. DQ loop=15, cmp_err_1 = ffff0082
  103. dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=1
  104. DQ loop=14, cmp_err_1 = ffff0000
  105. dqs_perbyte_dly.last_dqdly_pass[0]=14,  finish count=2
  106. byte:0, (DQS,DQ)=(8,8)
  107. byte:1, (DQS,DQ)=(8,8)
  108. 20,data:88
  109. [EMI] DRAMC calibration passed
  110.  
  111. ===================================================================
  112.                 MT7621   stage1 code done
  113.                 CPU=500000000 HZ BUS=166666666 HZ
  114. ===================================================================
  115.  
  116.  
  117. U-Boot 1.1.3 (May 25 2017 - 11:37:13)
  118.  
  119. Board: Ralink APSoC DRAM:  128 MB
  120. relocate_code Pointer at: 87fb4000
  121.  
  122. Config XHCI 40M PLL
  123. flash manufacture id: c2, device id 20 18
  124. find flash: MX25L12805D
  125. ============================================
  126. Ralink UBoot Version: 5.0.0.0
  127. --------------------------------------------
  128. ASIC MT7621A DualCore (MAC to MT7530 Mode)
  129. DRAM_CONF_FROM: Auto-Detection
  130. DRAM_TYPE: DDR3
  131. DRAM bus: 16 bit
  132. Xtal Mode=3 OCP Ratio=1/3
  133. Flash component: SPI Flash
  134. Date:May 25 2017  Time:11:37:13
  135. ============================================
  136. icache: sets:256, ways:4, linesz:32 ,total:32768
  137. dcache: sets:256, ways:4, linesz:32 ,total:32768
  138.  
  139.  ##### The CPU freq = 880 MHZ ####
  140.  estimate memory size =128 Mbytes
  141. #Reset_MT7530
  142. set LAN/WAN LLLLW
  143.  
  144. Please choose the operation:
  145.    1: Load system code to SDRAM via TFTP.
  146.    2: Load system code then write to Flash via TFTP.
  147.    3: Boot system code via Flash (default).
  148.    4: Entr boot command line interface.
  149.    6: System Enter UBoot to Update Img or Bin.
  150.    7: Load Boot Loader code then write to Flash via Serial.
  151.    9: Load Boot Loader code then write to Flash via TFTP.
  152. default: 3
  153.  0
  154.    
  155. 3: System Boot system code via Flash.
  156. ## Booting image at bc060000 ...
  157.    Image Name:  
  158.    Image Type:   MIPS Linux Kernel Image (lzma compressed)
  159.    Data Size:    3525574 Bytes =  3.4 MB
  160.    Load Address: 80001000
  161.    Entry Point:  806a8b1c
  162.    Verifying Checksum ... OK
  163.    Uncompressing Kernel Image ... OK
  164. No initrd
  165. ## Transferring control to Linux (at address 806a8b1c) ...
  166. ## Giving linux memsize in MB, 128
  167.  
  168. Starting kernel ...
  169.  
  170. Linux version 4.14.88-rc1 (Gagan@GagansMacPro) (gcc version 8.2.0 (GCC)) #2457 SMP PREEMPT Wed Dec 12 14:18:46 MST 2018
  171. SoC Type: MediaTek MT7621 ver:1 eco:3
  172. bootconsole [early0] enabled
  173. CPU0 revision is: 0001992f (MIPS 1004Kc)
  174. MIPS: machine is D-Link DIR-882 rev. A1
  175. Determined physical RAM map:
  176.  memory: 08000000 @ 00000000 (usable)
  177. VPE topology {2,2} total 4
  178. Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
  179. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
  180. MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
  181. Zone ranges:
  182.   DMA      [mem 0x0000000000000000-0x0000000000ffffff]
  183.   Normal   [mem 0x0000000001000000-0x0000000007ffffff]
  184.   HighMem  empty
  185. Movable zone start for each node
  186. Early memory node ranges
  187.   node   0: [mem 0x0000000000000000-0x0000000007ffffff]
  188. Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
  189. percpu: Embedded 15 pages/cpu @8110e000 s31728 r8192 d21520 u61440
  190. Built 1 zonelists, mobility grouping on.  Total pages: 32512
  191. Kernel command line: console=ttyS0,57600n8 rootfstype=squashfs root=/dev/mtdblock5
  192. log_buf_len individual max cpu contribution: 4096 bytes
  193. log_buf_len total cpu_extra contributions: 12288 bytes
  194. log_buf_len min size: 16384 bytes
  195. log_buf_len: 32768 bytes
  196. early log buf free: 14184(86%)
  197. PID hash table entries: 512 (order: -1, 2048 bytes)
  198. Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
  199. Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
  200. Writing ErrCtl register=0006b40d
  201. Readback ErrCtl register=0006b40d
  202. Memory: 119188K/131072K available (6848K kernel code, 969K rwdata, 1408K rodata, 296K init, 865K bss, 11884K reserved, 0K cma-reserved, 0K highmem)
  203. SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
  204. Preemptible hierarchical RCU implementation.
  205.         Tasks RCU enabled.
  206. NR_IRQS: 256
  207. CPU Clock: 880MHz
  208. clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
  209. clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns
  210. sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns
  211. Calibrating delay loop... 583.68 BogoMIPS (lpj=1167360)
  212. pid_max: default: 4096 minimum: 301
  213. Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
  214. Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
  215. Hierarchical SRCU implementation.
  216. smp: Bringing up secondary CPUs ...
  217. Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
  218. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
  219. MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
  220. CPU1 revision is: 0001992f (MIPS 1004Kc)
  221. Synchronize counters for CPU 1: done.
  222. Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
  223. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
  224. MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
  225. CPU2 revision is: 0001992f (MIPS 1004Kc)
  226. Synchronize counters for CPU 2: done.
  227. Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
  228. Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
  229. MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
  230. CPU3 revision is: 0001992f (MIPS 1004Kc)
  231. Synchronize counters for CPU 3: done.
  232. smp: Brought up 1 node, 4 CPUs
  233. devtmpfs: initialized
  234. random: get_random_u32 called from bucket_table_alloc+0x2b8/0x36c with crng_init=0
  235. clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
  236. futex hash table entries: 16 (order: -3, 512 bytes)
  237. pinctrl core: initialized pinctrl subsystem
  238. NET: Registered protocol family 16
  239. pull PCIe RST: RALINK_RSTCTRL = 4000000
  240. release PCIe RST: RALINK_RSTCTRL = 7000000
  241. ***** Xtal 40MHz *****
  242. release PCIe RST: RALINK_RSTCTRL = 7000000
  243. Port 0 N_FTS = 1b102800
  244. Port 1 N_FTS = 1b102800
  245. Port 2 N_FTS = 1b102800
  246. PCIE2 no card, disable it(RST&CLK)
  247.  -> 21007f2
  248. PCIE0 enabled
  249. PCIE1 enabled
  250. PCI host bridge /pcie@1e140000 ranges:
  251.  MEM 0x0000000060000000..0x000000006fffffff
  252.   IO 0x000000001e160000..0x000000001e16ffff
  253. PCI coherence region base: 0x87c3dce0, mask/settings: 0x60000000
  254. mt7621_gpio 1e000600.gpio: registering 32 gpios
  255. mt7621_gpio 1e000600.gpio: registering 32 gpios
  256. mt7621_gpio 1e000600.gpio: registering 32 gpios
  257. vgaarb: loaded
  258. SCSI subsystem initialized
  259. USB led has gpio 14
  260. USB led has gpio 13
  261. usbcore: registered new interface driver usbfs
  262. usbcore: registered new interface driver hub
  263. usbcore: registered new device driver usb
  264. i2c-mt7621 1e000900.i2c: clock 100KHz, re-start not support
  265. PCI host bridge to bus 0000:00
  266. pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
  267. pci_bus 0000:00: root bus resource [io  0xffffffff]
  268. pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
  269. pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
  270. pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
  271. pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
  272. pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
  273. pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
  274. pci 0000:00:01.0: BAR 0: no space for [mem size 0x80000000]
  275. pci 0000:00:01.0: BAR 0: failed to assign [mem size 0x80000000]
  276. pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
  277. pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff]
  278. pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
  279. pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff]
  280. pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
  281. pci 0000:00:00.0: PCI bridge to [bus 01]
  282. pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
  283. pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit]
  284. pci 0000:00:01.0: PCI bridge to [bus 02]
  285. pci 0000:00:01.0:   bridge window [mem 0x60100000-0x601fffff]
  286. clocksource: Switched to clocksource GIC
  287. NET: Registered protocol family 2
  288. TCP established hash table entries: 1024 (order: 0, 4096 bytes)
  289. TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
  290. TCP: Hash tables configured (established 1024 bind 1024)
  291. UDP hash table entries: 128 (order: 0, 4096 bytes)
  292. UDP-Lite hash table entries: 128 (order: 0, 4096 bytes)
  293. NET: Registered protocol family 1
  294. 4 CPUs re-calibrate udelay(lpj = 1167360)
  295. workingset: timestamp_bits=30 max_order=15 bucket_order=0
  296. squashfs: version 4.0 (2009/01/31) Phillip Lougher
  297. io scheduler noop registered (default)
  298. io scheduler deadline registered
  299. io scheduler mq-deadline registered
  300. io scheduler kyber registered
  301. mtk_hsdma 1e007000.hsdma: Using 3 as missing dma-requests property
  302. mtk_hsdma 1e007000.hsdma: MediaTek HSDMA driver registered
  303. random: fast init done
  304. serial8250_init
  305. Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
  306. console [ttyS0] disabled
  307. 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 18, base_baud = 3125000) is a 16550A
  308. console [ttyS0] enabled
  309. console [ttyS0] enabled
  310. bootconsole [early0] disabled
  311. bootconsole [early0] disabled
  312. Ralink gpio driver initialized:power_gpio[8]
  313. cacheinfo: Unable to detect cache hierarchy for CPU 0
  314. physmap platform flash device: 01000000 at 1c000000
  315. virtual memory bc000000
  316. physmap-flash physmap-flash.0: map_probe failed
  317. spi-mt7621 1e000b00.spi: sys_freq: 220000000
  318. m25p80 spi0.0: mx25l12805d (16384 Kbytes)
  319. 5 fixed-partitions partitions found on MTD device spi0.0
  320. Creating 5 MTD partitions on "spi0.0":
  321. 0x000000000000-0x000000030000 : "u-boot"
  322. 0x000000030000-0x000000040000 : "Config"
  323. 0x000000040000-0x000000050000 : "Factory"
  324. 0x000000050000-0x000000060000 : "Config2"
  325. 0x000000060000-0x000001000000 : "sysv"
  326. scan from offset 60000
  327.  
  328. found squashfs at 3BD000
  329. Creating 1 MTD partitions on "spi0.0":
  330. 0x0000003bd000-0x000000ff0000 : "rootfs"
  331. mtd mtd5: Error -2 creating of_node link
  332. mtd: device 5 (rootfs) set to be root filesystem
  333. libphy: Fixed MDIO Bus: probed
  334. tun: Universal TUN/TAP device driver, 1.6
  335. netif_napi_add() called with weight 128 on device eth%d
  336. mtk_soc_eth 1e100000.ethernet: generated random MAC address 1e:42:5d:5d:f2:39
  337. libphy: mdio: probed
  338. mtk_soc_eth 1e100000.ethernet: loaded mt7530 driver
  339. mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
  340. PPP generic driver version 2.4.2
  341. PPP BSD Compression module registered
  342. PPP Deflate Compression module registered
  343. PPP MPPE Compression module registered
  344. NET: Registered protocol family 24
  345. register mt_drv
  346. bus=0x1, slot = 0x0, irq=0x0
  347. PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
  348.  
  349.  
  350. === pAd = c0101000, size = 3401824 ===
  351.  
  352. <-- RTMPAllocAdapterBlock, Status=0
  353. pAd->PciHif.CSRBaseAddress =0xc0000000, csr_addr=0xc0000000!
  354. RTMPInitPCIeDevice():device_id=0x7615
  355. DriverOwn()::Try to Clear FW Own...
  356. DriverOwn()::Success to clear FW Own
  357. mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
  358. mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
  359. RtmpChipOpsHook(492): Not support for HIF_MT yet! MACVersion=0x0
  360. mt7615_init()-->
  361. RtmpOSFileOpen(): Error 2 opening /etc/wlan/MT7615_2G_cal_MT.bin
  362. Use 1st iPAiLNA default bin.
  363. Use 0st /etc/wlan/MT7615_2G_cal_MT.bin default bin.
  364. <--mt7615_init()
  365. ChipOpsMCUHook
  366. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  367. cut_through_token_list_init(): 8769d788,8769d788
  368. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  369. cut_through_token_list_init(): 8769d798,8769d798
  370. <-- RTMPAllocTxRxRingMemory, Status=0
  371. bus=0x2, slot = 0x1, irq=0x0
  372. PCI: Enabling device 0000:00:01.0 (0004 -> 0006)
  373.  
  374.  
  375. === pAd = c0581000, size = 3401824 ===
  376.  
  377. <-- RTMPAllocAdapterBlock, Status=0
  378. pAd->PciHif.CSRBaseAddress =0xc0480000, csr_addr=0xc0480000!
  379. RTMPInitPCIeDevice():device_id=0x7615
  380. DriverOwn()::Try to Clear FW Own...
  381. DriverOwn()::Success to clear FW Own
  382. mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
  383. mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
  384. RtmpChipOpsHook(492): Not support for HIF_MT yet! MACVersion=0x0
  385. mt7615_init()-->
  386. RtmpOSFileOpen(): Error 2 opening /etc/wlan/MT7615_5G_cal_MT.bin
  387. Use 2nd iPAiLNA default bin.
  388. Use 1st /etc/wlan/MT7615_5G_cal_MT.bin default bin.
  389. <--mt7615_init()
  390. ChipOpsMCUHook
  391. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  392. cut_through_token_list_init(): 87d46308,87d46308
  393. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  394. cut_through_token_list_init(): 87d46318,87d46318
  395. <-- RTMPAllocTxRxRingMemory, Status=0
  396. rdm_major = 255
  397. xhci-mtk 1e1c0000.xhci: xHCI Host Controller
  398. xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 1
  399. xhci-mtk 1e1c0000.xhci: hcc params 0x01401198 hci version 0x96 quirks 0x0000000000210010
  400. xhci-mtk 1e1c0000.xhci: irq 20, io mem 0x1e1c0000
  401. hub 1-0:1.0: USB hub found
  402. hub 1-0:1.0: 2 ports detected
  403. xhci-mtk 1e1c0000.xhci: xHCI Host Controller
  404. xhci-mtk 1e1c0000.xhci: new USB bus registered, assigned bus number 2
  405. xhci-mtk 1e1c0000.xhci: Host supports USB 3.0  SuperSpeed
  406. usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
  407. hub 2-0:1.0: USB hub found
  408. hub 2-0:1.0: 1 port detected
  409. usbcore: registered new interface driver usb-storage
  410. rtc-pcf8563 0-0051: rtc core: registered rtc-pcf8563 as rtc0
  411. i2c /dev entries driver
  412. Ralink APSoC Hardware Watchdog Timer
  413. Enable MTK AesEngine Module (verson=00000401)
  414. reg_int_mask = 0,          INT_MASK = 0
  415. phy_tx_ring0 = 0x00c00000, tx_ring0 = 0xa0c00000
  416. phy_rx_ring0 = 0x00c01000, rx_ring0 = 0xa0c01000
  417. TX_CTX_IDX0 = 0,           TX_DTX_IDX0 = 0
  418. RX_CRX_IDX0 = 0,           RX_DRX_IDX0 = 800080
  419. set burstmode = 00,        AES_GLO_CFG = 0
  420. Registering MediaTek AES-cbc engine to kernel
  421. Registering MediaTek AES engine to kernel
  422. usbcore: registered new interface driver usbhid
  423. usbhid: USB HID core driver
  424. u32 classifier
  425.     Performance counters on
  426.     Actions configured
  427. Netfilter messages via NETLINK v0.30.
  428. nf_conntrack version 0.5.0 (2048 buckets, 8192 max)
  429. ctnetlink v0.93: registering with nfnetlink.
  430. ipip: IPv4 and MPLS over IPv4 tunneling driver
  431. ip_tables: (C) 2000-2006 Netfilter Core Team
  432. ipt_CLUSTERIP: ClusterIP Version 0.8 loaded successfully
  433. NET: Registered protocol family 17
  434. Bridge firewalling registered
  435. NET4: DECnet for Linux: V.2.5.68s (C) 1995-2003 Linux DECnet Project Team
  436. DECnet: Routing cache hash table of 512 buckets, 4Kbytes
  437. NET: Registered protocol family 12
  438. 8021q: 802.1Q VLAN Support v1.8
  439. Key type dns_resolver registered
  440. nvram driver (major 251) installed
  441. rtc-pcf8563 0-0051: hctosys: unable to read the hardware clock
  442. VFS: Mounted root (squashfs filesystem) readonly on device 31:5.
  443. devtmpfs: mounted
  444. Freeing unused kernel memory: 296K
  445. This architecture does not have kernel memory protection.
  446. mtk_soc_eth 1e100000.ethernet eth0: port 3 link up
  447. usb 2-1: new SuperSpeed USB device number 2 using xhci-mtk
  448. usb-storage 2-1:1.0: USB Mass Storage device detected
  449. scsi host0: usb-storage 2-1:1.0
  450. scsi 0:0:0:0: Direct-Access     SanDisk  Extreme          0001 PQ: 0 ANSI: 6
  451. sd 0:0:0:0: [sda] 122552320 512-byte logical blocks: (62.7 GB/58.4 GiB)
  452. start service
  453. ssd 0:0:0:0: [sda] Write Protect is off
  454. tarting Architecsd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
  455. ture code for rt2880
  456.  sda: sda1 sda2 sda3
  457. sd 0:0:0:0: [sda] Attached SCSI removable disk
  458. start MSTP Daemon
  459. done
  460. Started WatchDog Timer.
  461. configure mac address to xx:xx:xx:xx:xx:af
  462. mtk_soc_eth 1e100000.ethernet: PPE started
  463. Set name-type for VLAN subsystem. Should be visible in /proc/net/vlan/config
  464. Added VLAN with VID == 1 to IF -:eth0:-
  465. WARNING:  VLAN 1 does not work with many switches,
  466. consider another number if you have problems.
  467. Added VLAN with VID == 2 to IF -:eth0:-
  468. [USB] checking...
  469. random: crng init done
  470. umount: /mnt: no mount point specified.
  471. Unknown server error
  472. ifconfig: `--help' gives usage information.
  473. device br0 entered promiscuous mode
  474. br0: port 1(vlan1) entered blocking state
  475. br0: port 1(vlan1) entered disabled state
  476. device vlan1 entered promiscuous mode
  477. device eth0 entered promiscuous mode
  478. DriverOwn()::Return since already in Driver Own...
  479. APWdsInitialize():WdsEntry[0]
  480. APWdsInitialize():WdsEntry[1]
  481. APWdsInitialize():WdsEntry[2]
  482. APWdsInitialize():WdsEntry[3]
  483. APWdsInitialize():WdsEntry[4]
  484. APWdsInitialize():WdsEntry[5]
  485. APWdsInitialize():WdsEntry[6]
  486. APWdsInitialize():WdsEntry[7]
  487. APWdsInitialize():WdsEntry[8]
  488. APWdsInitialize():WdsEntry[9]
  489. RtmpOSFileOpen(): Error 2 opening /tmp/RT2860.dat
  490. Open file "/tmp/RT2860.dat" failed!
  491. RTMPReadParametersHook failed, Status[=0x00000001]
  492. <---HwCtrlThread
  493. !!! mt_wifi_init  fail !!!
  494. DriverOwn()::Return since already in Driver Own...
  495. APWdsInitialize():WdsEntry[0]
  496. APWdsInitialize():WdsEntry[1]
  497. APWdsInitialize():WdsEntry[2]
  498. APWdsInitialize():WdsEntry[3]
  499. APWdsInitialize():WdsEntry[4]
  500. APWdsInitialize():WdsEntry[5]
  501. APWdsInitialize():WdsEntry[6]
  502. APWdsInitialize():WdsEntry[7]
  503. APWdsInitialize():WdsEntry[8]
  504. APWdsInitialize():WdsEntry[9]
  505. RtmpOSFileOpen(): Error 2 opening /tmp/RT2860_pci.dat
  506. Open file "/tmp/RT2860_pci.dat" failed!
  507. RTMPReadParametersHook failed, Status[=0x00000001]
  508. <---HwCtrlThread
  509. !!! mt_wifi_init  fail !!!
  510. br0: port 1(vlan1) entered blocking state
  511. br0: port 1(vlan1) entered forwarding state
  512. device br0 left promiscuous mode
  513. device br0 entered promiscuous mode
  514. device br0 left promiscuous mode
  515. ra1: ERROR while getting interface flags: No such device
  516. ra2: ERROR while getting interface flags: No such device
  517. ra3: ERROR while getting interface flags: No such device
  518. ra4: ERROR while getting interface flags: No such device
  519. ra5: ERROR while getting interface flags: No such device
  520. ra6: ERROR while getting interface flags: No such device
  521. ra7: ERROR while getting interface flags: No such device
  522. wds0: ERROR while getting interface flags: No such device
  523. wds1: ERROR while getting interface flags: No such device
  524. wds2: ERROR while getting interface flags: No such device
  525. wds3: ERROR while getting interface flags: No such device
  526. wds4: ERROR while getting interface flags: No such device
  527. wds5: ERROR while getting interface flags: No such device
  528. wds6: ERROR while getting interface flags: No such device
  529. wds7: ERROR while getting interface flags: No such device
  530. wds8: ERROR while getting interface flags: No such device
  531. wds9: ERROR while getting interface flags: No such device
  532. apcli0: ERROR while getting interface flags: No such device
  533. Interface doesn't accept private ioctl...
  534. set (8BE2): Network is down
  535. rai1: ERROR while getting interface flags: No such device
  536. rai2: ERROR while getting interface flags: No such device
  537. rai3: ERROR while getting interface flags: No such device
  538. rai4: ERROR while getting interface flags: No such device
  539. rai5: ERROR while getting interface flags: No such device
  540. rai6: ERROR while getting interface flags: No such device
  541. rai7: ERROR while getting interface flags: No such device
  542. wdsi0: ERROR while getting interface flags: No such device
  543. wdsi1: ERROR while getting interface flags: No such device
  544. wdsi2: ERROR while getting interface flags: No such device
  545. wdsi3: ERROR while getting interface flags: No such device
  546. wdsi4: ERROR while getting interface flags: No such device
  547. wdsi5: ERROR while getting interface flags: No such device
  548. wdsi6: ERROR while getting interface flags: No such device
  549. wdsi7: ERROR while getting interface flags: No such device
  550. wdsi8: ERROR while getting interface flags: No such device
  551. wdsi9: ERROR while getting interface flags: No such device
  552. apclii0: ERROR while getting interface flags: No such device
  553. Interface doesn't accept private ioctl...
  554. set (8BE2): Network is down
  555. DriverOwn()::Return since already in Driver Own...
  556. APWdsInitialize():WdsEntry[0]
  557. APWdsInitialize():WdsEntry[1]
  558. APWdsInitialize():WdsEntry[2]
  559. APWdsInitialize():WdsEntry[3]
  560. APWdsInitialize():WdsEntry[4]
  561. APWdsInitialize():WdsEntry[5]
  562. APWdsInitialize():WdsEntry[6]
  563. APWdsInitialize():WdsEntry[7]
  564. APWdsInitialize():WdsEntry[8]
  565. APWdsInitialize():WdsEntry[9]
  566. E2pAccessMode=2
  567. SSID[0]=AGT1337-2.4G, EdcaIdx=0
  568. cfg_mode=9
  569. cfg_mode=9
  570. wmode_band_equal(): Band Equal!
  571. [TxPower] BAND0: 100
  572. APEdca0
  573. APEdca1
  574. APEdca2
  575. APEdca3
  576. rtmp_read_wds_from_file(): WDS Profile
  577. APWdsInitialize():WdsEntry[0]
  578. APWdsInitialize():WdsEntry[1]
  579. APWdsInitialize():WdsEntry[2]
  580. APWdsInitialize():WdsEntry[3]
  581. APWdsInitialize():WdsEntry[4]
  582. APWdsInitialize():WdsEntry[5]
  583. APWdsInitialize():WdsEntry[6]
  584. APWdsInitialize():WdsEntry[7]
  585. APWdsInitialize():WdsEntry[8]
  586. APWdsInitialize():WdsEntry[9]
  587. WDS-Enable mode=0
  588. HT: WDEV[0] Ext Channel = ABOVE
  589. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  590. Top Init Done!
  591. Use alloc_skb
  592. RX[0] DESC a7038000 size = 16384
  593. RX[1] DESC a7036000 size = 8192
  594. Hif Init Done!
  595. ctl->txq = c043a7a4
  596. ctl->rxq = c043a7b0
  597. ctl->ackq = c043a7bc
  598. ctl->kickq = c043a7c8
  599. ctl->tx_doneq = c043a7d4
  600. ctl->rx_doneq = c043a7e0
  601. mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
  602. mt7615_fw_prepare(2687): MT7615_E3, USE E3 patch and ram code binary image
  603. AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102)
  604. AndesRestartCheck: Current TOP_MISC2(0x1)
  605. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  606. 2
  607. 0
  608. 1
  609. 7
  610. 0
  611. 8
  612. 0
  613. 9
  614. 1
  615. 9
  616. 2
  617. 7
  618. 1
  619. 8
  620. a
  621.  
  622.  
  623. platform =
  624. A
  625. L
  626. P
  627. S
  628.  
  629. hw/sw version =
  630. 8a
  631. 10
  632. 8a
  633. 10
  634.  
  635. patch version =
  636. 00
  637. 00
  638. 00
  639. 10
  640.  
  641. Patch SEM Status=2
  642. MtCmdPatchSemGet:(ret = 0)
  643.  
  644. Patch is not ready && get semaphore success, SemStatus(2)
  645. EventGenericEventHandler: CMD Success
  646. MtCmdAddressLenReq:(ret = 0)
  647. MtCmdPatchFinishReq
  648. EventGenericEventHandler: CMD Success
  649. Send checksum req..
  650. Patch SEM Status=3
  651. MtCmdPatchSemGet:(ret = 0)
  652.  
  653. Release patch semaphore, SemStatus(3)
  654. AndesMTEraseRomPatch
  655. WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
  656. AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248)
  657. Build Date:
  658. _
  659. 2
  660. 0
  661. 1
  662. 7
  663. 0
  664. 8
  665. 1
  666. 9
  667. 0
  668. 3
  669. 4
  670. 6
  671.  
  672. Build Date:
  673. _
  674. 2
  675. 0
  676. 1
  677. 7
  678. 0
  679. 8
  680. 1
  681. 9
  682. 0
  683. 3
  684. 4
  685. 6
  686.  
  687. AndesRestartCheck: Current TOP_MISC2(0x1)
  688. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  689. EventGenericEventHandler: CMD Success
  690. MtCmdAddressLenReq:(ret = 0)
  691. EventGenericEventHandler: CMD Success
  692. MtCmdAddressLenReq:(ret = 0)
  693. MtCmdFwStartReq: override = 1, address = 540672
  694. EventGenericEventHandler: CMD Success
  695. Build Date:
  696. _
  697. 2
  698. 0
  699. 1
  700. 7
  701. 0
  702. 9
  703. 1
  704. 2
  705. 1
  706. 7
  707. 4
  708. 0
  709.  
  710. EventGenericEventHandler: CMD Success
  711. MtCmdAddressLenReq:(ret = 0)
  712. MtCmdFwStartReq: override = 4, address = 0
  713. EventGenericEventHandler: CMD Success
  714. WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
  715. MCU Init Done!
  716. efuse_probe: efuse = 10000212
  717. RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
  718. RtmpEepromGetDefault::e2p_dafault=1
  719. RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
  720. NVM is FLASH mode. dev_idx [0] FLASH OFFSET [0x0]
  721. NICReadEEPROMParameters: EEPROM 0x52 b313
  722. NICReadEEPROMParameters: EEPROM 0x52 b313
  723. Country Region from e2p = 101
  724. mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
  725. mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
  726. mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
  727. rtmp_read_txpwr_from_eeprom(233): Don't Support this now!
  728. RTMPReadTxPwrPerRate(1381): Don't Support this now!
  729. RcRadioInit(): DbdcMode=0, ConcurrentBand=1
  730. RcRadioInit(): pRadioCtrl=876f0454,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
  731. MtCmdSetDbdcCtrl:(ret = 0)
  732. Band Rf: 1, Phy Mode: 2
  733. AntCfgInit(2766): Not support for HIF_MT yet!
  734. MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
  735. MtSingleSkuLoadParam: SINGLE SKU TABLE FILE /etc/Wireless/RT2860AP/7615_SingleSKU_24G.dat!!!
  736. RtmpOSFileOpen(): Error 2 opening /etc/Wireless/RT2860AP/7615_SingleSKU_24G.dat
  737. --> Error opening /etc/Wireless/RT2860AP/7615_SingleSKU_24G.dat
  738. MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
  739. MtBfBackOffLoadTable: BF SKU TABLE FILE /etc/Wireless/RT2860AP/7615_BF_SKU_24G.dat!!!
  740. RtmpOSFileOpen(): Error 2 opening /etc/Wireless/RT2860AP/7615_BF_SKU_24G.dat
  741. EEPROM Init Done!
  742. mt_mac_init()-->
  743. mt_mac_pse_init(2750): Don't Support this now!
  744. mt7615_init_mac_cr()-->
  745. mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
  746. mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
  747. MtAsicSetMacMaxLen(1300): Not finish Yet!
  748. <--mt_mac_init()
  749. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  750. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  751. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  752. MAC Init Done!
  753. MT7615BBPInit():BBP Initialization.....
  754.         Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2
  755.         Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0
  756. MT7615BBPInit() todo
  757. PHY Init Done!
  758. tx_pwr_comp_init():NotSupportYet!
  759. MtCmdSetMacTxRx:(ret = 0)
  760. CountryCode(2.4G/5G)=5/7, RFIC=25, PHY mode(2.4G/5G)=14/14, support 14 channels
  761. WifiSysOpen(), wdev idx = 0
  762. wdev_attr_update(): wdevId0 = xx:xx:xx:xx:xx:b0
  763. MtCmdSetDbdcCtrl:(ret = 0)
  764. ApAutoChannelAtBootUp----------------->
  765. ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 1
  766. MtCmdSetMacTxRx:(ret = 0)
  767. mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200]
  768. MtCmdGetRXDCOCCalResult:(ret = 0)
  769. mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20]
  770. MtCmdGetTXDPDCalResult:(ret = 0)
  771. MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0
  772. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  773. mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200]
  774. MtCmdGetRXDCOCCalResult:(ret = 0)
  775. mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20]
  776. MtCmdGetTXDPDCalResult:(ret = 0)
  777. MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0
  778. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  779. mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200]
  780. MtCmdGetRXDCOCCalResult:(ret = 0)
  781. :MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
  782. mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20]
  783. MtCmdGetTXDPDCalResult:(ret = 0)
  784. MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0
  785. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  786. mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300]
  787. MtCmdGetRXDCOCCalResult:(ret = 0)
  788. mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20]
  789. MtCmdGetTXDPDCalResult:(ret = 0)
  790. MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0
  791. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  792. mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300]
  793. MtCmdGetRXDCOCCalResult:(ret = 0)
  794. mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  795. MtCmdGetTXDPDCalResult:(ret = 0)
  796. MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0
  797. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  798. mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300]
  799. MtCmdGetRXDCOCCalResult:(ret = 0)
  800. mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  801. MtCmdGetTXDPDCalResult:(ret = 0)
  802. MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0
  803. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  804. mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400]
  805. MtCmdGetRXDCOCCalResult:(ret = 0)
  806. mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  807. MtCmdGetTXDPDCalResult:(ret = 0)
  808. MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0
  809. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  810. mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400]
  811. MtCmdGetRXDCOCCalResult:(ret = 0)
  812. mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  813. MtCmdGetTXDPDCalResult:(ret = 0)
  814. MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0
  815. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  816. mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400]
  817. MtCmdGetRXDCOCCalResult:(ret = 0)
  818. mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  819. MtCmdGetTXDPDCalResult:(ret = 0)
  820. MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0
  821. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  822. mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500]
  823. MtCmdGetRXDCOCCalResult:(ret = 0)
  824. mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  825. MtCmdGetTXDPDCalResult:(ret = 0)
  826. MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0
  827. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  828. mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500]
  829. MtCmdGetRXDCOCCalResult:(ret = 0)
  830. mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  831. MtCmdGetTXDPDCalResult:(ret = 0)
  832. MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0
  833. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  834. mt7615_apply_dcoc() : reload Central CH [12] BW [0] from cetral freq [2467]  offset [2500]
  835. MtCmdGetRXDCOCCalResult:(ret = 0)
  836. mt7615_apply_dpd() : reload Central CH [12] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  837. MtCmdGetTXDPDCalResult:(ret = 0)
  838. MtCmdChannelSwitch: control_chl = 12,control_ch2=0, central_chl = 12 DBDCIdx= 0, Band= 0
  839. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  840. mt7615_apply_dcoc() : reload Central CH [13] BW [0] from cetral freq [2467]  offset [2500]
  841. MtCmdGetRXDCOCCalResult:(ret = 0)
  842. mt7615_apply_dpd() : reload Central CH [13] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  843. MtCmdGetTXDPDCalResult:(ret = 0)
  844. MtCmdChannelSwitch: control_chl = 13,control_ch2=0, central_chl = 13 DBDCIdx= 0, Band= 0
  845. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  846. ====================================================================
  847. Channel   1 : Busy Time =  33460, Skip Channel = FALSE, BwCap = TRUE
  848. Channel   2 : Busy Time =  15522, Skip Channel = FALSE, BwCap = TRUE
  849. Channel   3 : Busy Time =  13001, Skip Channel = FALSE, BwCap = TRUE
  850. Channel   4 : Busy Time =   7715, Skip Channel = FALSE, BwCap = TRUE
  851. Channel   5 : Busy Time =  10708, Skip Channel = FALSE, BwCap = TRUE
  852. Channel   6 : Busy Time =  43512, Skip Channel = FALSE, BwCap = TRUE
  853. Channel   7 : Busy Time =  16154, Skip Channel = FALSE, BwCap = TRUE
  854. Channel   8 : Busy Time =  15773, Skip Channel = FALSE, BwCap = TRUE
  855. Channel   9 : Busy Time =  15831, Skip Channel = FALSE, BwCap = TRUE
  856. Channel  10 : Busy Time =  12882, Skip Channel = FALSE, BwCap = TRUE
  857. Channel  11 : Busy Time =  32796, Skip Channel = FALSE, BwCap = TRUE
  858. Channel  12 : Busy Time =  58544, Skip Channel = FALSE, BwCap = TRUE
  859. Channel  13 : Busy Time =  43000, Skip Channel = FALSE, BwCap = TRUE
  860. ====================================================================
  861. Rule 3 Channel Busy time value : Select Primary Channel 4
  862. Rule 3 Channel Busy time value : Min Channel Busy = 7715
  863. Rule 3 Channel Busy time value : BW = 20
  864.  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 14,Channel = 4  
  865. ApAutoChannelAtBootUp<-----------------
  866. Current Channel is 1. DfsZeroWaitSupport=0
  867. MtAsicSetChBusyStat(840): Not support for HIF_MT yet!
  868. [PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
  869. [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
  870. HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:14,Channel=1
  871. wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
  872.  LinkToOmacIdx = 0, LinkToWdevType = 1
  873. bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 0,                 CmdBssInfoBmcRate.u2McTransmit = 0
  874.  [RadarStateCheck]Set into RD_NORMAL_MODE  
  875. MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 0, BandIdx: 0
  876. MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 0, BandIdx: 0
  877. MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 0, BandIdx: 0
  878. mt7615_bbp_adjust():rf_bw=1, ext_ch=1, PrimCh=1, HT-CentCh=3, VHT-CentCh=0
  879. mt7615_apply_dcoc() : reload Central CH [3] BW [1] from cetral freq [2417]  offset [2200]
  880. MtCmdGetRXDCOCCalResult:(ret = 0)
  881. mt7615_apply_dpd() : reload Central CH [3] BW [1] from cetral freq [2422] i[44] offset [4b20]
  882. MtCmdGetTXDPDCalResult:(ret = 0)
  883. MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0
  884. BW = 1,TXStream = 4, RXStream = 4, scan(0)
  885. ap_phy_rrm_init_byRf(): AP Set CentralFreq at 3(Prim=1, HT-CentCh=3, VHT-CentCh=0, BBP_BW=1)
  886. LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
  887. MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
  888. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  889. MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
  890. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=1, LED_CMD=2!
  891. AndesLedEnhanceOP: Success!
  892. ap_ftkd> Initialize FT KDP Module...
  893. Main bssid = xx:xx:xx:xx:xx:b0
  894. AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn
  895. MtCmdSetMacTxRx:(ret = 0)
  896. fdb_enable()
  897. MCS Set = ff ff ff ff 01
  898. <==== mt_wifi_init, Status=0
  899. MtCmdEDCCACtrl: BandIdx: 0, EDCCACtrl: 1
  900. MtCmdEDCCACtrl: BandIdx: 1, EDCCACtrl: 1
  901. WDS_Init():
  902. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  903.   MacTabMatchWCID = 0
  904. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  905.   MacTabMatchWCID = 0
  906. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  907.   MacTabMatchWCID = 0
  908. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  909.   MacTabMatchWCID = 0
  910. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  911.   MacTabMatchWCID = 0
  912. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  913.   MacTabMatchWCID = 0
  914. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  915.   MacTabMatchWCID = 0
  916. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  917.   MacTabMatchWCID = 0
  918. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  919.   MacTabMatchWCID = 0
  920. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  921.   MacTabMatchWCID = 0
  922. Total allocated 10 WDS interfaces!
  923. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  924. red_is_enabled: set CR4/N9 RED Enable to 1.
  925. cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
  926. WifiSysClose(), wdev idx = 0
  927. ExtEventBeaconLostHandler::FW LOG, Beacon lost (xx:xx:xx:xx:xx:b0), Reason 0x10
  928.   Beacon lost - AP disabled!!!
  929. WifiSysGetBssInfoState(): BssInfoIdx 0 not found!!!
  930. WifiSysUpdateBssInfoState(): BssInfoIdx 0 not found!!!
  931. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  932. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=0, LED_CMD=0!
  933. AndesLedEnhanceOP: Success!
  934. ap_ftkd> Release FT KDP Module...
  935. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  936. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=0, LED_CMD=0!
  937. AndesLedEnhanceOP: Success!
  938. WifiSysClose(), wdev idx = 0
  939. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=4, LED_CMD=1!
  940. AndesLedEnhanceOP: Success!
  941. AndesRestartCheck: Current TOP_MISC2(0x7)
  942. CmdReStartDLRsp: Status Success!, Status(0)
  943. AndesRestartCheck:  TOP_MISC2(1)
  944. EventExtEventHandler: Unknown Ext Event(6f)
  945. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=2, LED_CMD=1!
  946. AndesLedEnhanceOP: Success!
  947. RT28xxPciAsicRadioOff(): Not support for HIF_MT yet!
  948. RTMPDrvClose call RT28xxPciAsicRadioOff fail !!
  949. tx_kickout_fail_count = 0
  950. tx_timeout_fail_count = 0
  951. rx_receive_fail_count = 0
  952. alloc_cmd_msg = 1309
  953. free_cmd_msg = 1309
  954. cut_through_token_list_destroy(): 8769d788,8769d788
  955. cut_through_token_list_destroy(): 8769d798,8769d798
  956. FwOwn()::Set Fw Own
  957. RTMP_AllTimerListRelease: Size=0
  958. FwOwn()::Return since already in Fw Own...
  959. <---HwCtrlThread
  960. DriverOwn()::Try to Clear FW Own...
  961. DriverOwn()::Success to clear FW Own
  962. APWdsInitialize():WdsEntry[0]
  963. APWdsInitialize():WdsEntry[1]
  964. APWdsInitialize():WdsEntry[2]
  965. APWdsInitialize():WdsEntry[3]
  966. APWdsInitialize():WdsEntry[4]
  967. APWdsInitialize():WdsEntry[5]
  968. APWdsInitialize():WdsEntry[6]
  969. APWdsInitialize():WdsEntry[7]
  970. APWdsInitialize():WdsEntry[8]
  971. APWdsInitialize():WdsEntry[9]
  972. E2pAccessMode=2
  973. SSID[0]=AGT1337-2.4G, EdcaIdx=0
  974. cfg_mode=9
  975. cfg_mode=9
  976. wmode_band_equal(): Band Equal!
  977. [TxPower] BAND0: 100
  978. APEdca0
  979. APEdca1
  980. APEdca2
  981. APEdca3
  982. rtmp_read_wds_from_file(): WDS Profile
  983. APWdsInitialize():WdsEntry[0]
  984. APWdsInitialize():WdsEntry[1]
  985. APWdsInitialize():WdsEntry[2]
  986. APWdsInitialize():WdsEntry[3]
  987. APWdsInitialize():WdsEntry[4]
  988. APWdsInitialize():WdsEntry[5]
  989. APWdsInitialize():WdsEntry[6]
  990. APWdsInitialize():WdsEntry[7]
  991. APWdsInitialize():WdsEntry[8]
  992. APWdsInitialize():WdsEntry[9]
  993. WDS-Enable mode=0
  994. HT: WDEV[0] Ext Channel = ABOVE
  995. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  996. Top Init Done!
  997. Use alloc_skb
  998. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  999. cut_through_token_list_init(): 87033d88,87033d88
  1000. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  1001. cut_through_token_list_init(): 87033d98,87033d98
  1002. RX[0] DESC a7038000 size = 16384
  1003. RX[1] DESC a7036000 size = 8192
  1004. Hif Init Done!
  1005. ctl->txq = c043a7a4
  1006. ctl->rxq = c043a7b0
  1007. ctl->ackq = c043a7bc
  1008. ctl->kickq = c043a7c8
  1009. ctl->tx_doneq = c043a7d4
  1010. ctl->rx_doneq = c043a7e0
  1011. mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
  1012. mt7615_fw_prepare(2687): MT7615_E3, USE E3 patch and ram code binary image
  1013. AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102)
  1014. AndesRestartCheck: Current TOP_MISC2(0x1)
  1015. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  1016. 2
  1017. 0
  1018. 1
  1019. 7
  1020. 0
  1021. 8
  1022. 0
  1023. 9
  1024. 1
  1025. 9
  1026. 2
  1027. 7
  1028. 1
  1029. 8
  1030. a
  1031.  
  1032.  
  1033. platform =
  1034. A
  1035. L
  1036. P
  1037. S
  1038.  
  1039. hw/sw version =
  1040. 8a
  1041. 10
  1042. 8a
  1043. 10
  1044.  
  1045. patch version =
  1046. 00
  1047. 00
  1048. 00
  1049. 10
  1050.  
  1051. Patch SEM Status=1
  1052. MtCmdPatchSemGet:(ret = 0)
  1053.  
  1054. Patch is ready, continue to ILM/DLM DL, SemStatus(1)
  1055. Patch SEM Status=3
  1056. MtCmdPatchSemGet:(ret = 0)
  1057.  
  1058. Release patch semaphore, SemStatus(3)
  1059. AndesMTEraseRomPatch
  1060. WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
  1061. AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248)
  1062. Build Date:
  1063. _
  1064. 2
  1065. 0
  1066. 1
  1067. 7
  1068. 0
  1069. 8
  1070. 1
  1071. 9
  1072. 0
  1073. 3
  1074. 4
  1075. 6
  1076.  
  1077. Build Date:
  1078. _
  1079. 2
  1080. 0
  1081. 1
  1082. 7
  1083. 0
  1084. 8
  1085. 1
  1086. 9
  1087. 0
  1088. 3
  1089. 4
  1090. 6
  1091.  
  1092. AndesRestartCheck: Current TOP_MISC2(0x1)
  1093. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  1094. EventGenericEventHandler: CMD Success
  1095. MtCmdAddressLenReq:(ret = 0)
  1096. EventGenericEventHandler: CMD Success
  1097. MtCmdAddressLenReq:(ret = 0)
  1098. MtCmdFwStartReq: override = 1, address = 540672
  1099. EventGenericEventHandler: CMD Success
  1100. Build Date:
  1101. _
  1102. 2
  1103. 0
  1104. 1
  1105. 7
  1106. 0
  1107. 9
  1108. 1
  1109. 2
  1110. 1
  1111. 7
  1112. 4
  1113. 0
  1114.  
  1115. EventGenericEventHandler: CMD Success
  1116. MtCmdAddressLenReq:(ret = 0)
  1117. MtCmdFwStartReq: override = 4, address = 0
  1118. EventGenericEventHandler: CMD Success
  1119. WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
  1120. MCU Init Done!
  1121. efuse_probe: efuse = 10000212
  1122. RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
  1123. RtmpEepromGetDefault::e2p_dafault=1
  1124. RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
  1125. NVM is FLASH mode. dev_idx [0] FLASH OFFSET [0x0]
  1126. NICReadEEPROMParameters: EEPROM 0x52 b313
  1127. NICReadEEPROMParameters: EEPROM 0x52 b313
  1128. Country Region from e2p = 101
  1129. mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
  1130. mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
  1131. mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
  1132. rtmp_read_txpwr_from_eeprom(233): Don't Support this now!
  1133. RTMPReadTxPwrPerRate(1381): Don't Support this now!
  1134. RcRadioInit(): DbdcMode=0, ConcurrentBand=1
  1135. RcRadioInit(): pRadioCtrl=876f0454,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
  1136. MtCmdSetDbdcCtrl:(ret = 0)
  1137. Band Rf: 1, Phy Mode: 2
  1138. AntCfgInit(2766): Not support for HIF_MT yet!
  1139. MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
  1140. MtSingleSkuLoadParam: SINGLE SKU TABLE FILE /etc/Wireless/RT2860AP/7615_SingleSKU_24G.dat!!!
  1141. RtmpOSFileOpen(): Error 2 opening /etc/Wireless/RT2860AP/7615_SingleSKU_24G.dat
  1142. --> Error opening /etc/Wireless/RT2860AP/7615_SingleSKU_24G.dat
  1143. MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
  1144. MtBfBackOffLoadTable: BF SKU TABLE FILE /etc/Wireless/RT2860AP/7615_BF_SKU_24G.dat!!!
  1145. RtmpOSFileOpen(): Error 2 opening /etc/Wireless/RT2860AP/7615_BF_SKU_24G.dat
  1146. EEPROM Init Done!
  1147. mt_mac_init()-->
  1148. mt_mac_pse_init(2750): Don't Support this now!
  1149. mt7615_init_mac_cr()-->
  1150. mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
  1151. mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
  1152. MtAsicSetMacMaxLen(1300): Not finish Yet!
  1153. <--mt_mac_init()
  1154. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1155. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1156. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1157. MAC Init Done!
  1158. MT7615BBPInit():BBP Initialization.....
  1159.         Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2
  1160.         Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0
  1161. MT7615BBPInit() todo
  1162. PHY Init Done!
  1163. tx_pwr_comp_init():NotSupportYet!
  1164. MtCmdSetMacTxRx:(ret = 0)
  1165. CountryCode(2.4G/5G)=5/7, RFIC=25, PHY mode(2.4G/5G)=14/14, support 14 channels
  1166. WifiSysOpen(), wdev idx = 0
  1167. wdev_attr_update(): wdevId0 = xx:xx:xx:xx:xx:b0
  1168. MtCmdSetDbdcCtrl:(ret = 0)
  1169. ApAutoChannelAtBootUp----------------->
  1170. ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 1
  1171. MtCmdSetMacTxRx:(ret = 0)
  1172. mt7615_apply_dcoc() : reload Central CH [1] BW [0] from cetral freq [2417]  offset [2200]
  1173. MtCmdGetRXDCOCCalResult:(ret = 0)
  1174. mt7615_apply_dpd() : reload Central CH [1] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1175. MtCmdGetTXDPDCalResult:(ret = 0)
  1176. MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 1 DBDCIdx= 0, Band= 0
  1177. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1178. :MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
  1179. mt7615_apply_dcoc() : reload Central CH [2] BW [0] from cetral freq [2417]  offset [2200]
  1180. MtCmdGetRXDCOCCalResult:(ret = 0)
  1181. mt7615_apply_dpd() : reload Central CH [2] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1182. MtCmdGetTXDPDCalResult:(ret = 0)
  1183. MtCmdChannelSwitch: control_chl = 2,control_ch2=0, central_chl = 2 DBDCIdx= 0, Band= 0
  1184. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1185. mt7615_apply_dcoc() : reload Central CH [3] BW [0] from cetral freq [2417]  offset [2200]
  1186. MtCmdGetRXDCOCCalResult:(ret = 0)
  1187. mt7615_apply_dpd() : reload Central CH [3] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1188. MtCmdGetTXDPDCalResult:(ret = 0)
  1189. MtCmdChannelSwitch: control_chl = 3,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0
  1190. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1191. mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432]  offset [2300]
  1192. MtCmdGetRXDCOCCalResult:(ret = 0)
  1193. mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20]
  1194. MtCmdGetTXDPDCalResult:(ret = 0)
  1195. MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0
  1196. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1197. mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432]  offset [2300]
  1198. MtCmdGetRXDCOCCalResult:(ret = 0)
  1199. mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1200. MtCmdGetTXDPDCalResult:(ret = 0)
  1201. MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0
  1202. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1203. mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432]  offset [2300]
  1204. MtCmdGetRXDCOCCalResult:(ret = 0)
  1205. mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1206. MtCmdGetTXDPDCalResult:(ret = 0)
  1207. MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0
  1208. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1209. mt7615_apply_dcoc() : reload Central CH [7] BW [0] from cetral freq [2447]  offset [2400]
  1210. MtCmdGetRXDCOCCalResult:(ret = 0)
  1211. mt7615_apply_dpd() : reload Central CH [7] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1212. MtCmdGetTXDPDCalResult:(ret = 0)
  1213. MtCmdChannelSwitch: control_chl = 7,control_ch2=0, central_chl = 7 DBDCIdx= 0, Band= 0
  1214. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1215. mt7615_apply_dcoc() : reload Central CH [8] BW [0] from cetral freq [2447]  offset [2400]
  1216. MtCmdGetRXDCOCCalResult:(ret = 0)
  1217. mt7615_apply_dpd() : reload Central CH [8] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1218. MtCmdGetTXDPDCalResult:(ret = 0)
  1219. MtCmdChannelSwitch: control_chl = 8,control_ch2=0, central_chl = 8 DBDCIdx= 0, Band= 0
  1220. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1221. mt7615_apply_dcoc() : reload Central CH [9] BW [0] from cetral freq [2447]  offset [2400]
  1222. MtCmdGetRXDCOCCalResult:(ret = 0)
  1223. mt7615_apply_dpd() : reload Central CH [9] BW [0] from cetral freq [2442] i[45] offset [4bf8]
  1224. MtCmdGetTXDPDCalResult:(ret = 0)
  1225. MtCmdChannelSwitch: control_chl = 9,control_ch2=0, central_chl = 9 DBDCIdx= 0, Band= 0
  1226. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1227. mt7615_apply_dcoc() : reload Central CH [10] BW [0] from cetral freq [2467]  offset [2500]
  1228. MtCmdGetRXDCOCCalResult:(ret = 0)
  1229. mt7615_apply_dpd() : reload Central CH [10] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  1230. MtCmdGetTXDPDCalResult:(ret = 0)
  1231. MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0
  1232. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1233. mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467]  offset [2500]
  1234. MtCmdGetRXDCOCCalResult:(ret = 0)
  1235. mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  1236. MtCmdGetTXDPDCalResult:(ret = 0)
  1237. MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0
  1238. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1239. mt7615_apply_dcoc() : reload Central CH [12] BW [0] from cetral freq [2467]  offset [2500]
  1240. MtCmdGetRXDCOCCalResult:(ret = 0)
  1241. mt7615_apply_dpd() : reload Central CH [12] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  1242. MtCmdGetTXDPDCalResult:(ret = 0)
  1243. MtCmdChannelSwitch: control_chl = 12,control_ch2=0, central_chl = 12 DBDCIdx= 0, Band= 0
  1244. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1245. mt7615_apply_dcoc() : reload Central CH [13] BW [0] from cetral freq [2467]  offset [2500]
  1246. MtCmdGetRXDCOCCalResult:(ret = 0)
  1247. mt7615_apply_dpd() : reload Central CH [13] BW [0] from cetral freq [2462] i[46] offset [4cd0]
  1248. MtCmdGetTXDPDCalResult:(ret = 0)
  1249. MtCmdChannelSwitch: control_chl = 13,control_ch2=0, central_chl = 13 DBDCIdx= 0, Band= 0
  1250. BW = 0,TXStream = 4, RXStream = 4, scan(1)
  1251. ====================================================================
  1252. Channel   1 : Busy Time =  19270, Skip Channel = FALSE, BwCap = TRUE
  1253. Channel   2 : Busy Time =  11003, Skip Channel = FALSE, BwCap = TRUE
  1254. Channel   3 : Busy Time =   8322, Skip Channel = FALSE, BwCap = TRUE
  1255. Channel   4 : Busy Time =   2883, Skip Channel = FALSE, BwCap = TRUE
  1256. Channel   5 : Busy Time =   4088, Skip Channel = FALSE, BwCap = TRUE
  1257. Channel   6 : Busy Time =    462, Skip Channel = FALSE, BwCap = TRUE
  1258. Channel   7 : Busy Time =  17295, Skip Channel = FALSE, BwCap = TRUE
  1259. Channel   8 : Busy Time =  19206, Skip Channel = FALSE, BwCap = TRUE
  1260. Channel   9 : Busy Time =  45855, Skip Channel = FALSE, BwCap = TRUE
  1261. Channel  10 : Busy Time =  48607, Skip Channel = FALSE, BwCap = TRUE
  1262. Channel  11 : Busy Time =  25879, Skip Channel = FALSE, BwCap = TRUE
  1263. Channel  12 : Busy Time =   6151, Skip Channel = FALSE, BwCap = TRUE
  1264. Channel  13 : Busy Time =   3585, Skip Channel = FALSE, BwCap = TRUE
  1265. ====================================================================
  1266. Rule 3 Channel Busy time value : Select Primary Channel 6
  1267. Rule 3 Channel Busy time value : Min Channel Busy = 462
  1268. Rule 3 Channel Busy time value : BW = 20
  1269.  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 14,Channel = 6  
  1270. ApAutoChannelAtBootUp<-----------------
  1271. Current Channel is 1. DfsZeroWaitSupport=0
  1272. [PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
  1273. [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
  1274. HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:14,Channel=1
  1275. wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
  1276.  LinkToOmacIdx = 0, LinkToWdevType = 1
  1277. bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 0,                 CmdBssInfoBmcRate.u2McTransmit = 0
  1278.  [RadarStateCheck]Set into RD_NORMAL_MODE  
  1279. MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 0, BandIdx: 0
  1280. MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 0, BandIdx: 0
  1281. MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 0, BandIdx: 0
  1282. mt7615_bbp_adjust():rf_bw=1, ext_ch=1, PrimCh=1, HT-CentCh=3, VHT-CentCh=0
  1283. mt7615_apply_dcoc() : reload Central CH [3] BW [1] from cetral freq [2417]  offset [2200]
  1284. MtCmdGetRXDCOCCalResult:(ret = 0)
  1285. mt7615_apply_dpd() : reload Central CH [3] BW [1] from cetral freq [2422] i[44] offset [4b20]
  1286. MtCmdGetTXDPDCalResult:(ret = 0)
  1287. MtCmdChannelSwitch: control_chl = 1,control_ch2=0, central_chl = 3 DBDCIdx= 0, Band= 0
  1288. BW = 1,TXStream = 4, RXStream = 4, scan(0)
  1289. ap_phy_rrm_init_byRf(): AP Set CentralFreq at 3(Prim=1, HT-CentCh=3, VHT-CentCh=0, BBP_BW=1)
  1290. LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
  1291. MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
  1292. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  1293. MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
  1294. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=1, LED_CMD=2!
  1295. AndesLedEnhanceOP: Success!
  1296. ap_ftkd> Initialize FT KDP Module...
  1297. Main bssid = xx:xx:xx:xx:xx:b0
  1298. AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn
  1299. MtCmdSetMacTxRx:(ret = 0)
  1300. fdb_enable()
  1301. MCS Set = ff ff ff ff 01
  1302. <==== mt_wifi_init, Status=0
  1303. MtCmdEDCCACtrl: BandIdx: 0, EDCCACtrl: 1
  1304. MtCmdEDCCACtrl: BandIdx: 1, EDCCACtrl: 1
  1305. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  1306. red_is_enabled: set CR4/N9 RED Enable to 1.
  1307. cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
  1308. br0: port 2(ra0) entered blocking state
  1309. br0: port 2(ra0) entered disabled state
  1310. device ra0 entered promiscuous mode
  1311. br0: port 2(ra0) entered blocking state
  1312. br0: port 2(ra0) entered forwarding state
  1313. DriverOwn()::Return since already in Driver Own...
  1314. APWdsInitialize():WdsEntry[0]
  1315. APWdsInitialize():WdsEntry[1]
  1316. APWdsInitialize():WdsEntry[2]
  1317. APWdsInitialize():WdsEntry[3]
  1318. APWdsInitialize():WdsEntry[4]
  1319. APWdsInitialize():WdsEntry[5]
  1320. APWdsInitialize():WdsEntry[6]
  1321. APWdsInitialize():WdsEntry[7]
  1322. APWdsInitialize():WdsEntry[8]
  1323. APWdsInitialize():WdsEntry[9]
  1324. E2pAccessMode=2
  1325. SSID[0]=AGT1337-5.0G, EdcaIdx=0
  1326. cfg_mode=15
  1327. cfg_mode=15
  1328. wmode_band_equal(): Band Equal!
  1329. [TxPower] BAND0: 100
  1330. APEdca0
  1331. APEdca1
  1332. APEdca2
  1333. APEdca3
  1334. [RTMPSetProfileParameters]Disable DFS/Zero wait=0/0
  1335. rtmp_read_wds_from_file(): WDS Profile
  1336. APWdsInitialize():WdsEntry[0]
  1337. APWdsInitialize():WdsEntry[1]
  1338. APWdsInitialize():WdsEntry[2]
  1339. APWdsInitialize():WdsEntry[3]
  1340. APWdsInitialize():WdsEntry[4]
  1341. APWdsInitialize():WdsEntry[5]
  1342. APWdsInitialize():WdsEntry[6]
  1343. APWdsInitialize():WdsEntry[7]
  1344. APWdsInitialize():WdsEntry[8]
  1345. APWdsInitialize():WdsEntry[9]
  1346. WDS-Enable mode=0
  1347. HT: WDEV[0] Ext Channel = BELOW
  1348. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  1349. Top Init Done!
  1350. Use alloc_skb
  1351. RX[0] DESC a6da8000 size = 16384
  1352. RX[1] DESC a6dac000 size = 8192
  1353. Hif Init Done!
  1354. ctl->txq = c08ba7a4
  1355. ctl->rxq = c08ba7b0
  1356. ctl->ackq = c08ba7bc
  1357. ctl->kickq = c08ba7c8
  1358. ctl->tx_doneq = c08ba7d4
  1359. ctl->rx_doneq = c08ba7e0
  1360. mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
  1361. mt7615_fw_prepare(2687): MT7615_E3, USE E3 patch and ram code binary image
  1362. AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102)
  1363. AndesRestartCheck: Current TOP_MISC2(0x1)
  1364. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  1365. 2
  1366. 0
  1367. 1
  1368. 7
  1369. 0
  1370. 8
  1371. 0
  1372. 9
  1373. 1
  1374. 9
  1375. 2
  1376. 7
  1377. 1
  1378. 8
  1379. a
  1380.  
  1381.  
  1382. platform =
  1383. A
  1384. L
  1385. P
  1386. S
  1387.  
  1388. hw/sw version =
  1389. 8a
  1390. 10
  1391. 8a
  1392. 10
  1393.  
  1394. patch version =
  1395. 00
  1396. 00
  1397. 00
  1398. 10
  1399.  
  1400. Patch SEM Status=2
  1401. MtCmdPatchSemGet:(ret = 0)
  1402.  
  1403. Patch is not ready && get semaphore success, SemStatus(2)
  1404. EventGenericEventHandler: CMD Success
  1405. MtCmdAddressLenReq:(ret = 0)
  1406. MtCmdPatchFinishReq
  1407. EventGenericEventHandler: CMD Success
  1408. Send checksum req..
  1409. Patch SEM Status=3
  1410. MtCmdPatchSemGet:(ret = 0)
  1411.  
  1412. Release patch semaphore, SemStatus(3)
  1413. AndesMTEraseRomPatch
  1414. WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
  1415. AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248)
  1416. Build Date:
  1417. _
  1418. 2
  1419. 0
  1420. 1
  1421. 7
  1422. 0
  1423. 8
  1424. 1
  1425. 9
  1426. 0
  1427. 3
  1428. 4
  1429. 6
  1430.  
  1431. Build Date:
  1432. _
  1433. 2
  1434. 0
  1435. 1
  1436. 7
  1437. 0
  1438. 8
  1439. 1
  1440. 9
  1441. 0
  1442. 3
  1443. 4
  1444. 6
  1445.  
  1446. AndesRestartCheck: Current TOP_MISC2(0x1)
  1447. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  1448. EventGenericEventHandler: CMD Success
  1449. MtCmdAddressLenReq:(ret = 0)
  1450. EventGenericEventHandler: CMD Success
  1451. MtCmdAddressLenReq:(ret = 0)
  1452. MtCmdFwStartReq: override = 1, address = 540672
  1453. EventGenericEventHandler: CMD Success
  1454. Build Date:
  1455. _
  1456. 2
  1457. 0
  1458. 1
  1459. 7
  1460. 0
  1461. 9
  1462. 1
  1463. 2
  1464. 1
  1465. 7
  1466. 4
  1467. 0
  1468.  
  1469. EventGenericEventHandler: CMD Success
  1470. MtCmdAddressLenReq:(ret = 0)
  1471. MtCmdFwStartReq: override = 4, address = 0
  1472. EventGenericEventHandler: CMD Success
  1473. WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
  1474. MCU Init Done!
  1475. efuse_probe: efuse = 10000212
  1476. RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
  1477. RtmpEepromGetDefault::e2p_dafault=1
  1478. RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
  1479. NVM is FLASH mode. dev_idx [1] FLASH OFFSET [0x8000]
  1480. NICReadEEPROMParameters: EEPROM 0x52 b313
  1481. NICReadEEPROMParameters: EEPROM 0x52 b313
  1482. Country Region from e2p = 101
  1483. mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
  1484. mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
  1485. mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
  1486. rtmp_read_txpwr_from_eeprom(233): Don't Support this now!
  1487. RTMPReadTxPwrPerRate(1381): Don't Support this now!
  1488. RcRadioInit(): DbdcMode=0, ConcurrentBand=1
  1489. RcRadioInit(): pRadioCtrl=86c58454,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
  1490. MtCmdSetDbdcCtrl:(ret = 0)
  1491. Band Rf: 1, Phy Mode: 2
  1492. AntCfgInit(2766): Not support for HIF_MT yet!
  1493. MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
  1494. MtSingleSkuLoadParam: SINGLE SKU TABLE FILE /etc/Wireless/RT2860AP/7615_SingleSKU_5G.dat!!!
  1495. RtmpOSFileOpen(): Error 2 opening /etc/Wireless/RT2860AP/7615_SingleSKU_5G.dat
  1496. --> Error opening /etc/Wireless/RT2860AP/7615_SingleSKU_5G.dat
  1497. MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
  1498. MtBfBackOffLoadTable: BF SKU TABLE FILE /etc/Wireless/RT2860AP/7615_BF_SKU_5G.dat!!!
  1499. RtmpOSFileOpen(): Error 2 opening /etc/Wireless/RT2860AP/7615_BF_SKU_5G.dat
  1500. EEPROM Init Done!
  1501. mt_mac_init()-->
  1502. mt_mac_pse_init(2750): Don't Support this now!
  1503. mt7615_init_mac_cr()-->
  1504. mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
  1505. mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
  1506. MtAsicSetMacMaxLen(1300): Not finish Yet!
  1507. <--mt_mac_init()
  1508. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1509. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1510. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  1511. MAC Init Done!
  1512. MT7615BBPInit():BBP Initialization.....
  1513.         Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2
  1514.         Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0
  1515. MT7615BBPInit() todo
  1516. PHY Init Done!
  1517. tx_pwr_comp_init():NotSupportYet!
  1518. MtCmdSetMacTxRx:(ret = 0)
  1519. CountryCode(2.4G/5G)=5/7, RFIC=25, PHY mode(2.4G/5G)=48/48, support 24 channels
  1520. WifiSysOpen(), wdev idx = 0
  1521. wdev_attr_update(): wdevId0 = xx:xx:xx:xx:xx:b1
  1522. MtCmdSetDbdcCtrl:(ret = 0)
  1523. radio_operate_init : Error! Check! wdev->channel=0
  1524. ApAutoChannelAtBootUp----------------->
  1525. ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 1
  1526. MtCmdSetMacTxRx:(ret = 0)
  1527. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  1528. MtCmdGetRXDCOCCalResult:(ret = 0)
  1529. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  1530. MtCmdGetRXDCOCCalResult:(ret = 0)
  1531. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  1532. MtCmdGetTXDPDCalResult:(ret = 0)
  1533. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  1534. MtCmdGetTXDPDCalResult:(ret = 0)
  1535. MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  1536. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1537. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  1538. MtCmdGetRXDCOCCalResult:(ret = 0)
  1539. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  1540. MtCmdGetRXDCOCCalResult:(ret = 0)
  1541. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  1542. MtCmdGetTXDPDCalResult:(ret = 0)
  1543. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  1544. MtCmdGetTXDPDCalResult:(ret = 0)
  1545. MtCmdChannelSwitch: control_chl = 40,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  1546. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1547. :MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
  1548. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  1549. MtCmdGetRXDCOCCalResult:(ret = 0)
  1550. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  1551. MtCmdGetRXDCOCCalResult:(ret = 0)
  1552. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  1553. MtCmdGetTXDPDCalResult:(ret = 0)
  1554. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  1555. MtCmdGetTXDPDCalResult:(ret = 0)
  1556. MtCmdChannelSwitch: control_chl = 44,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  1557. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1558. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  1559. MtCmdGetRXDCOCCalResult:(ret = 0)
  1560. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  1561. MtCmdGetRXDCOCCalResult:(ret = 0)
  1562. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  1563. MtCmdGetTXDPDCalResult:(ret = 0)
  1564. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  1565. MtCmdGetTXDPDCalResult:(ret = 0)
  1566. MtCmdChannelSwitch: control_chl = 48,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  1567. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1568. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  1569. MtCmdGetRXDCOCCalResult:(ret = 0)
  1570. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  1571. MtCmdGetRXDCOCCalResult:(ret = 0)
  1572. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  1573. MtCmdGetTXDPDCalResult:(ret = 0)
  1574. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  1575. MtCmdGetTXDPDCalResult:(ret = 0)
  1576. MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  1577. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1578. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  1579. MtCmdGetRXDCOCCalResult:(ret = 0)
  1580. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  1581. MtCmdGetRXDCOCCalResult:(ret = 0)
  1582. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  1583. MtCmdGetTXDPDCalResult:(ret = 0)
  1584. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  1585. MtCmdGetTXDPDCalResult:(ret = 0)
  1586. MtCmdChannelSwitch: control_chl = 56,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  1587. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1588. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  1589. MtCmdGetRXDCOCCalResult:(ret = 0)
  1590. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  1591. MtCmdGetRXDCOCCalResult:(ret = 0)
  1592. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  1593. MtCmdGetTXDPDCalResult:(ret = 0)
  1594. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  1595. MtCmdGetTXDPDCalResult:(ret = 0)
  1596. MtCmdChannelSwitch: control_chl = 60,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  1597. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1598. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  1599. MtCmdGetRXDCOCCalResult:(ret = 0)
  1600. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  1601. MtCmdGetRXDCOCCalResult:(ret = 0)
  1602. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  1603. MtCmdGetTXDPDCalResult:(ret = 0)
  1604. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  1605. MtCmdGetTXDPDCalResult:(ret = 0)
  1606. MtCmdChannelSwitch: control_chl = 64,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  1607. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1608. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  1609. MtCmdGetRXDCOCCalResult:(ret = 0)
  1610. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  1611. MtCmdGetRXDCOCCalResult:(ret = 0)
  1612. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  1613. MtCmdGetTXDPDCalResult:(ret = 0)
  1614. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  1615. MtCmdGetTXDPDCalResult:(ret = 0)
  1616. MtCmdChannelSwitch: control_chl = 100,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  1617. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1618. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  1619. MtCmdGetRXDCOCCalResult:(ret = 0)
  1620. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  1621. MtCmdGetRXDCOCCalResult:(ret = 0)
  1622. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  1623. MtCmdGetTXDPDCalResult:(ret = 0)
  1624. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  1625. MtCmdGetTXDPDCalResult:(ret = 0)
  1626. MtCmdChannelSwitch: control_chl = 104,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  1627. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1628. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  1629. MtCmdGetRXDCOCCalResult:(ret = 0)
  1630. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  1631. MtCmdGetRXDCOCCalResult:(ret = 0)
  1632. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  1633. MtCmdGetTXDPDCalResult:(ret = 0)
  1634. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  1635. MtCmdGetTXDPDCalResult:(ret = 0)
  1636. MtCmdChannelSwitch: control_chl = 108,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  1637. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1638. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  1639. MtCmdGetRXDCOCCalResult:(ret = 0)
  1640. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  1641. MtCmdGetRXDCOCCalResult:(ret = 0)
  1642. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  1643. MtCmdGetTXDPDCalResult:(ret = 0)
  1644. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  1645. MtCmdGetTXDPDCalResult:(ret = 0)
  1646. MtCmdChannelSwitch: control_chl = 112,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  1647. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1648. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  1649. MtCmdGetRXDCOCCalResult:(ret = 0)
  1650. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  1651. MtCmdGetRXDCOCCalResult:(ret = 0)
  1652. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  1653. MtCmdGetTXDPDCalResult:(ret = 0)
  1654. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  1655. MtCmdGetTXDPDCalResult:(ret = 0)
  1656. MtCmdChannelSwitch: control_chl = 116,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  1657. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1658. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  1659. MtCmdGetRXDCOCCalResult:(ret = 0)
  1660. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  1661. MtCmdGetRXDCOCCalResult:(ret = 0)
  1662. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  1663. MtCmdGetTXDPDCalResult:(ret = 0)
  1664. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  1665. MtCmdGetTXDPDCalResult:(ret = 0)
  1666. MtCmdChannelSwitch: control_chl = 120,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  1667. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1668. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  1669. MtCmdGetRXDCOCCalResult:(ret = 0)
  1670. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  1671. MtCmdGetRXDCOCCalResult:(ret = 0)
  1672. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  1673. MtCmdGetTXDPDCalResult:(ret = 0)
  1674. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  1675. MtCmdGetTXDPDCalResult:(ret = 0)
  1676. MtCmdChannelSwitch: control_chl = 124,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  1677. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1678. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  1679. MtCmdGetRXDCOCCalResult:(ret = 0)
  1680. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  1681. MtCmdGetRXDCOCCalResult:(ret = 0)
  1682. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  1683. MtCmdGetTXDPDCalResult:(ret = 0)
  1684. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  1685. MtCmdGetTXDPDCalResult:(ret = 0)
  1686. MtCmdChannelSwitch: control_chl = 128,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  1687. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  1688. ====================================================================
  1689. Channel  36 : Busy Time =  21628, Skip Channel = FALSE, BwCap = TRUE
  1690. Channel  40 : Busy Time =  20002, Skip Channel = FALSE, BwCap = TRUE
  1691. Channel  44 : Busy Time =  28715, Skip Channel = FALSE, BwCap = TRUE
  1692. Channel  48 : Busy Time =  16308, Skip Channel = FALSE, BwCap = TRUE
  1693. Channel  52 : Busy Time =   6332, Skip Channel = FALSE, BwCap = TRUE
  1694. Channel  56 : Busy Time =   1540, Skip Channel = FALSE, BwCap = TRUE
  1695. Channel  60 : Busy Time =   1002, Skip Channel = FALSE, BwCap = TRUE
  1696. Channel  64 : Busy Time =   8019, Skip Channel = FALSE, BwCap = TRUE
  1697. Channel 100 : Busy Time =  12269, Skip Channel = FALSE, BwCap = TRUE
  1698. Channel 104 : Busy Time =  31238, Skip Channel = FALSE, BwCap = TRUE
  1699. Channel 108 : Busy Time =   5880, Skip Channel = FALSE, BwCap = TRUE
  1700. Channel 112 : Busy Time =    920, Skip Channel = FALSE, BwCap = TRUE
  1701. Channel 116 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  1702. Channel 120 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  1703. Channel 124 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  1704. Channel 128 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  1705. ====================================================================
  1706. Rule 3 Channel Busy time value : Select Primary Channel 60
  1707. Rule 3 Channel Busy time value : Min Channel Busy = 28715
  1708. Rule 3 Channel Busy time value : BW = 160
  1709.  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 48,Channel = 60  
  1710. ApAutoChannelAtBootUp<-----------------
  1711. Current Channel is 1. DfsZeroWaitSupport=0
  1712. MtAsicSetChBusyStat(840): Not support for HIF_MT yet!
  1713. [PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
  1714. [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
  1715. MtCmdSetDbdcCtrl:(ret = 0)
  1716. HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:48,Channel=36
  1717. Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
  1718. wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
  1719.  LinkToOmacIdx = 0, LinkToWdevType = 1
  1720. bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 8192,                 CmdBssInfoBmcRate.u2McTransmit = 8196
  1721.  [RadarStateCheck]Set into RD_NORMAL_MODE  
  1722. MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 0, BandIdx: 0
  1723. MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 0, BandIdx: 0
  1724. MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 0, BandIdx: 0
  1725. mt7615_bbp_adjust():rf_bw=3, ext_ch=1, PrimCh=36, HT-CentCh=38, VHT-CentCh=50
  1726. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  1727. MtCmdGetRXDCOCCalResult:(ret = 0)
  1728. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  1729. MtCmdGetRXDCOCCalResult:(ret = 0)
  1730. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  1731. MtCmdGetTXDPDCalResult:(ret = 0)
  1732. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  1733. MtCmdGetTXDPDCalResult:(ret = 0)
  1734. MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  1735. BW = 3,TXStream = 4, RXStream = 4, scan(0)
  1736. ap_phy_rrm_init_byRf(): AP Set CentralFreq at 50(Prim=36, HT-CentCh=38, VHT-CentCh=50, BBP_BW=3)
  1737. [WrapDfsRadarDetectStart]: Band0Ch is 36
  1738. [WrapDfsRadarDetectStart]: Band1Ch is 0
  1739. LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
  1740. MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
  1741. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  1742. MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
  1743. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=1, LED_CMD=2!
  1744. AndesLedEnhanceOP: Success!
  1745. ap_ftkd> Initialize FT KDP Module...
  1746. Main bssid = xx:xx:xx:xx:xx:b1
  1747. AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn
  1748. MtCmdSetMacTxRx:(ret = 0)
  1749. fdb_enable()
  1750. MCS Set = ff ff ff ff 01
  1751. <==== mt_wifi_init, Status=0
  1752. MtCmdEDCCACtrl: BandIdx: 0, EDCCACtrl: 1
  1753. MtCmdEDCCACtrl: BandIdx: 1, EDCCACtrl: 1
  1754. WDS_Init():
  1755. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1756.   MacTabMatchWCID = 0
  1757. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1758.   MacTabMatchWCID = 0
  1759. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1760.   MacTabMatchWCID = 0
  1761. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1762.   MacTabMatchWCID = 0
  1763. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1764.   MacTabMatchWCID = 0
  1765. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1766.   MacTabMatchWCID = 0
  1767. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1768.   MacTabMatchWCID = 0
  1769. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1770.   MacTabMatchWCID = 0
  1771. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1772.   MacTabMatchWCID = 0
  1773. The new WDS interface MAC = FF:FF:FF:FF:FF:FF
  1774.   MacTabMatchWCID = 0
  1775. Total allocated 10 WDS interfaces!
  1776. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  1777. red_is_enabled: set CR4/N9 RED Enable to 1.
  1778. cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
  1779. WifiSysClose(), wdev idx = 0
  1780. ExtEventBeaconLostHandler::FW LOG, Beacon lost (xx:xx:xx:xx:xx:b1), Reason 0x10
  1781.   Beacon lost - AP disabled!!!
  1782. WifiSysGetBssInfoState(): BssInfoIdx 0 not found!!!
  1783. WifiSysUpdateBssInfoState(): BssInfoIdx 0 not found!!!
  1784. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  1785. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=0, LED_CMD=0!
  1786. AndesLedEnhanceOP: Success!
  1787. WifiSysClose(), wdev idx = 0
  1788. ap_ftkd> Release FT KDP Module...
  1789. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  1790. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=0, LED_CMD=0!
  1791. AndesLedEnhanceOP: Success!
  1792. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=4, LED_CMD=1!
  1793. AndesLedEnhanceOP: Success!
  1794. AndesRestartCheck: Current TOP_MISC2(0x7)
  1795. CmdReStartDLRsp: Status Success!, Status(0)
  1796. AndesRestartCheck:  TOP_MISC2(1)
  1797. EventExtEventHandler: Unknown Ext Event(6f)
  1798. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=2, LED_CMD=1!
  1799. AndesLedEnhanceOP: Success!
  1800. RT28xxPciAsicRadioOff(): Not support for HIF_MT yet!
  1801. RTMPDrvClose call RT28xxPciAsicRadioOff fail !!
  1802. tx_kickout_fail_count = 0
  1803. tx_timeout_fail_count = 0
  1804. rx_receive_fail_count = 0
  1805. alloc_cmd_msg = 1401
  1806. free_cmd_msg = 1401
  1807. cut_through_token_list_destroy(): 87d46308,87d46308
  1808. cut_through_token_list_destroy(): 87d46318,87d46318
  1809. FwOwn()::Set Fw Own
  1810. RTMP_AllTimerListRelease: Size=0
  1811. FwOwn()::Return since already in Fw Own...
  1812. <---HwCtrlThread
  1813. DriverOwn()::Try to Clear FW Own...
  1814. DriverOwn()::Success to clear FW Own
  1815. APWdsInitialize():WdsEntry[0]
  1816. APWdsInitialize():WdsEntry[1]
  1817. APWdsInitialize():WdsEntry[2]
  1818. APWdsInitialize():WdsEntry[3]
  1819. APWdsInitialize():WdsEntry[4]
  1820. APWdsInitialize():WdsEntry[5]
  1821. APWdsInitialize():WdsEntry[6]
  1822. APWdsInitialize():WdsEntry[7]
  1823. APWdsInitialize():WdsEntry[8]
  1824. APWdsInitialize():WdsEntry[9]
  1825. E2pAccessMode=2
  1826. SSID[0]=AGT1337-5.0G, EdcaIdx=0
  1827. cfg_mode=15
  1828. cfg_mode=15
  1829. wmode_band_equal(): Band Equal!
  1830. [TxPower] BAND0: 100
  1831. APEdca0
  1832. APEdca1
  1833. APEdca2
  1834. APEdca3
  1835. [RTMPSetProfileParameters]Disable DFS/Zero wait=0/0
  1836. rtmp_read_wds_from_file(): WDS Profile
  1837. APWdsInitialize():WdsEntry[0]
  1838. APWdsInitialize():WdsEntry[1]
  1839. APWdsInitialize():WdsEntry[2]
  1840. APWdsInitialize():WdsEntry[3]
  1841. APWdsInitialize():WdsEntry[4]
  1842. APWdsInitialize():WdsEntry[5]
  1843. APWdsInitialize():WdsEntry[6]
  1844. APWdsInitialize():WdsEntry[7]
  1845. APWdsInitialize():WdsEntry[8]
  1846. APWdsInitialize():WdsEntry[9]
  1847. WDS-Enable mode=0
  1848. HT: WDEV[0] Ext Channel = BELOW
  1849. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  1850. Top Init Done!
  1851. Use alloc_skb
  1852. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  1853. cut_through_token_list_init(): 86339008,86339008
  1854. cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
  1855. cut_through_token_list_init(): 86339018,86339018
  1856. RX[0] DESC a6da8000 size = 16384
  1857. RX[1] DESC a6dac000 size = 8192
  1858. Hif Init Done!
  1859. ctl->txq = c08ba7a4
  1860. ctl->rxq = c08ba7b0
  1861. ctl->ackq = c08ba7bc
  1862. ctl->kickq = c08ba7c8
  1863. ctl->tx_doneq = c08ba7d4
  1864. ctl->rx_doneq = c08ba7e0
  1865. mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
  1866. mt7615_fw_prepare(2687): MT7615_E3, USE E3 patch and ram code binary image
  1867. AndesMTLoadRomMethodFwDlRing(1035), cap->rom_patch_len(11102)
  1868. AndesRestartCheck: Current TOP_MISC2(0x1)
  1869. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  1870. 2
  1871. 0
  1872. 1
  1873. 7
  1874. 0
  1875. 8
  1876. 0
  1877. 9
  1878. 1
  1879. 9
  1880. 2
  1881. 7
  1882. 1
  1883. 8
  1884. a
  1885.  
  1886.  
  1887. platform =
  1888. A
  1889. L
  1890. P
  1891. S
  1892.  
  1893. hw/sw version =
  1894. 8a
  1895. 10
  1896. 8a
  1897. 10
  1898.  
  1899. patch version =
  1900. 00
  1901. 00
  1902. 00
  1903. 10
  1904.  
  1905. Patch SEM Status=1
  1906. MtCmdPatchSemGet:(ret = 0)
  1907.  
  1908. Patch is ready, continue to ILM/DLM DL, SemStatus(1)
  1909. Patch SEM Status=3
  1910. MtCmdPatchSemGet:(ret = 0)
  1911.  
  1912. Release patch semaphore, SemStatus(3)
  1913. AndesMTEraseRomPatch
  1914. WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
  1915. AndesMTLoadFwMethodFwDlRing(809), cap->fw_len(462248)
  1916. Build Date:
  1917. _
  1918. 2
  1919. 0
  1920. 1
  1921. 7
  1922. 0
  1923. 8
  1924. 1
  1925. 9
  1926. 0
  1927. 3
  1928. 4
  1929. 6
  1930.  
  1931. Build Date:
  1932. _
  1933. 2
  1934. 0
  1935. 1
  1936. 7
  1937. 0
  1938. 8
  1939. 1
  1940. 9
  1941. 0
  1942. 3
  1943. 4
  1944. 6
  1945.  
  1946. AndesRestartCheck: Current TOP_MISC2(0x1)
  1947. AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
  1948. EventGenericEventHandler: CMD Success
  1949. MtCmdAddressLenReq:(ret = 0)
  1950. EventGenericEventHandler: CMD Success
  1951. MtCmdAddressLenReq:(ret = 0)
  1952. MtCmdFwStartReq: override = 1, address = 540672
  1953. EventGenericEventHandler: CMD Success
  1954. Build Date:
  1955. _
  1956. 2
  1957. 0
  1958. 1
  1959. 7
  1960. 0
  1961. 9
  1962. 1
  1963. 2
  1964. 1
  1965. 7
  1966. 4
  1967. 0
  1968.  
  1969. EventGenericEventHandler: CMD Success
  1970. MtCmdAddressLenReq:(ret = 0)
  1971. MtCmdFwStartReq: override = 4, address = 0
  1972. EventGenericEventHandler: CMD Success
  1973. WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
  1974. MCU Init Done!
  1975. efuse_probe: efuse = 10000212
  1976. RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
  1977. RtmpEepromGetDefault::e2p_dafault=1
  1978. RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
  1979. NVM is FLASH mode. dev_idx [1] FLASH OFFSET [0x8000]
  1980. NICReadEEPROMParameters: EEPROM 0x52 b313
  1981. NICReadEEPROMParameters: EEPROM 0x52 b313
  1982. entry wcid 1 QosMapSupport=0
  1983. Rcv Wcid(1) AddBAReq
  1984. Start Seq = 00000000
  1985. AP SETKEYS DONE - AKMMap=WPA2PSK, PairwiseCipher=AES, GroupCipher=AES, wcid=1 from 94:EB:CD:BA:73:29
  1986.  
  1987. Country Region from e2p = 101
  1988. mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
  1989. mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
  1990. mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
  1991. rtmp_read_txpwr_from_eeprom(233): Don't Support this now!
  1992. RTMPReadTxPwrPerRate(1381): Don't Support this now!
  1993. RcRadioInit(): DbdcMode=0, ConcurrentBand=1
  1994. RcRadioInit(): pRadioCtrl=86c58454,Band=0,rfcap=3,channel=1,PhyMode=2 extCha=0xf
  1995. MtCmdSetDbdcCtrl:(ret = 0)
  1996. Band Rf: 1, Phy Mode: 2
  1997. AntCfgInit(2766): Not support for HIF_MT yet!
  1998. MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
  1999. MtSingleSkuLoadParam: SINGLE SKU TABLE FILE /etc/Wireless/RT2860AP/7615_SingleSKU_5G.dat!!!
  2000. RtmpOSFileOpen(): Error 2 opening /etc/Wireless/RT2860AP/7615_SingleSKU_5G.dat
  2001. --> Error opening /etc/Wireless/RT2860AP/7615_SingleSKU_5G.dat
  2002. MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
  2003. MtBfBackOffLoadTable: BF SKU TABLE FILE /etc/Wireless/RT2860AP/7615_BF_SKU_5G.dat!!!
  2004. RtmpOSFileOpen(): Error 2 opening /etc/Wireless/RT2860AP/7615_BF_SKU_5G.dat
  2005. EEPROM Init Done!
  2006. mt_mac_init()-->
  2007. mt_mac_pse_init(2750): Don't Support this now!
  2008. mt7615_init_mac_cr()-->
  2009. mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
  2010. mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
  2011. MtAsicSetMacMaxLen(1300): Not finish Yet!
  2012. <--mt_mac_init()
  2013. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  2014. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  2015. CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
  2016. MAC Init Done!
  2017. MT7615BBPInit():BBP Initialization.....
  2018.         Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2
  2019.         Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0
  2020. MT7615BBPInit() todo
  2021. PHY Init Done!
  2022. tx_pwr_comp_init():NotSupportYet!
  2023. MtCmdSetMacTxRx:(ret = 0)
  2024. CountryCode(2.4G/5G)=5/7, RFIC=25, PHY mode(2.4G/5G)=48/48, support 24 channels
  2025. WifiSysOpen(), wdev idx = 0
  2026. wdev_attr_update(): wdevId0 = xx:xx:xx:xx:xx:b1
  2027. MtCmdSetDbdcCtrl:(ret = 0)
  2028. radio_operate_init : Error! Check! wdev->channel=0
  2029. ApAutoChannelAtBootUp----------------->
  2030. ApAutoChannelAtBootUp: AutoChannelBootup = 1, AutoChannelFlag = 1
  2031. MtCmdSetMacTxRx:(ret = 0)
  2032. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2033. MtCmdGetRXDCOCCalResult:(ret = 0)
  2034. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2035. MtCmdGetRXDCOCCalResult:(ret = 0)
  2036. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2037. MtCmdGetTXDPDCalResult:(ret = 0)
  2038. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2039. MtCmdGetTXDPDCalResult:(ret = 0)
  2040. MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2041. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2042. :MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
  2043. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2044. MtCmdGetRXDCOCCalResult:(ret = 0)
  2045. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2046. MtCmdGetRXDCOCCalResult:(ret = 0)
  2047. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2048. MtCmdGetTXDPDCalResult:(ret = 0)
  2049. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2050. MtCmdGetTXDPDCalResult:(ret = 0)
  2051. MtCmdChannelSwitch: control_chl = 40,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2052. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2053. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2054. MtCmdGetRXDCOCCalResult:(ret = 0)
  2055. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2056. MtCmdGetRXDCOCCalResult:(ret = 0)
  2057. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2058. MtCmdGetTXDPDCalResult:(ret = 0)
  2059. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2060. MtCmdGetTXDPDCalResult:(ret = 0)
  2061. MtCmdChannelSwitch: control_chl = 44,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2062. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2063. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2064. MtCmdGetRXDCOCCalResult:(ret = 0)
  2065. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2066. MtCmdGetRXDCOCCalResult:(ret = 0)
  2067. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2068. MtCmdGetTXDPDCalResult:(ret = 0)
  2069. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2070. MtCmdGetTXDPDCalResult:(ret = 0)
  2071. MtCmdChannelSwitch: control_chl = 48,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2072. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2073. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2074. MtCmdGetRXDCOCCalResult:(ret = 0)
  2075. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2076. MtCmdGetRXDCOCCalResult:(ret = 0)
  2077. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2078. MtCmdGetTXDPDCalResult:(ret = 0)
  2079. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2080. MtCmdGetTXDPDCalResult:(ret = 0)
  2081. MtCmdChannelSwitch: control_chl = 52,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2082. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2083. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2084. MtCmdGetRXDCOCCalResult:(ret = 0)
  2085. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2086. MtCmdGetRXDCOCCalResult:(ret = 0)
  2087. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2088. MtCmdGetTXDPDCalResult:(ret = 0)
  2089. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2090. MtCmdGetTXDPDCalResult:(ret = 0)
  2091. MtCmdChannelSwitch: control_chl = 56,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2092. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2093. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2094. MtCmdGetRXDCOCCalResult:(ret = 0)
  2095. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2096. MtCmdGetRXDCOCCalResult:(ret = 0)
  2097. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2098. MtCmdGetTXDPDCalResult:(ret = 0)
  2099. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2100. MtCmdGetTXDPDCalResult:(ret = 0)
  2101. MtCmdChannelSwitch: control_chl = 60,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2102. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2103. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2104. MtCmdGetRXDCOCCalResult:(ret = 0)
  2105. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2106. MtCmdGetRXDCOCCalResult:(ret = 0)
  2107. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2108. MtCmdGetTXDPDCalResult:(ret = 0)
  2109. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2110. MtCmdGetTXDPDCalResult:(ret = 0)
  2111. MtCmdChannelSwitch: control_chl = 64,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2112. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2113. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2114. MtCmdGetRXDCOCCalResult:(ret = 0)
  2115. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2116. MtCmdGetRXDCOCCalResult:(ret = 0)
  2117. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2118. MtCmdGetTXDPDCalResult:(ret = 0)
  2119. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2120. MtCmdGetTXDPDCalResult:(ret = 0)
  2121. MtCmdChannelSwitch: control_chl = 100,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2122. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2123. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2124. MtCmdGetRXDCOCCalResult:(ret = 0)
  2125. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2126. MtCmdGetRXDCOCCalResult:(ret = 0)
  2127. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2128. MtCmdGetTXDPDCalResult:(ret = 0)
  2129. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2130. MtCmdGetTXDPDCalResult:(ret = 0)
  2131. MtCmdChannelSwitch: control_chl = 104,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2132. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2133. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2134. MtCmdGetRXDCOCCalResult:(ret = 0)
  2135. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2136. MtCmdGetRXDCOCCalResult:(ret = 0)
  2137. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2138. MtCmdGetTXDPDCalResult:(ret = 0)
  2139. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2140. MtCmdGetTXDPDCalResult:(ret = 0)
  2141. MtCmdChannelSwitch: control_chl = 108,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2142. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2143. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2144. MtCmdGetRXDCOCCalResult:(ret = 0)
  2145. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2146. MtCmdGetRXDCOCCalResult:(ret = 0)
  2147. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2148. MtCmdGetTXDPDCalResult:(ret = 0)
  2149. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2150. MtCmdGetTXDPDCalResult:(ret = 0)
  2151. MtCmdChannelSwitch: control_chl = 112,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2152. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2153. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2154. MtCmdGetRXDCOCCalResult:(ret = 0)
  2155. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2156. MtCmdGetRXDCOCCalResult:(ret = 0)
  2157. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2158. MtCmdGetTXDPDCalResult:(ret = 0)
  2159. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2160. MtCmdGetTXDPDCalResult:(ret = 0)
  2161. MtCmdChannelSwitch: control_chl = 116,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2162. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2163. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2164. MtCmdGetRXDCOCCalResult:(ret = 0)
  2165. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2166. MtCmdGetRXDCOCCalResult:(ret = 0)
  2167. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2168. MtCmdGetTXDPDCalResult:(ret = 0)
  2169. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2170. MtCmdGetTXDPDCalResult:(ret = 0)
  2171. MtCmdChannelSwitch: control_chl = 120,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2172. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2173. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2174. MtCmdGetRXDCOCCalResult:(ret = 0)
  2175. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2176. MtCmdGetRXDCOCCalResult:(ret = 0)
  2177. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2178. MtCmdGetTXDPDCalResult:(ret = 0)
  2179. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2180. MtCmdGetTXDPDCalResult:(ret = 0)
  2181. MtCmdChannelSwitch: control_chl = 124,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2182. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2183. mt7615_apply_dcoc() : reload 160 Central CH [122] BW [3] from cetral freq [5610]  offset [1e00]
  2184. MtCmdGetRXDCOCCalResult:(ret = 0)
  2185. mt7615_apply_dcoc() : reload 160 Central CH [106] BW [3] from cetral freq [5530]  offset [1d00]
  2186. MtCmdGetRXDCOCCalResult:(ret = 0)
  2187. mt7615_apply_dpd() : reload 160 Central CH [122] BW [3] from cetral freq [5620] i[29] offset [3e78]
  2188. MtCmdGetTXDPDCalResult:(ret = 0)
  2189. mt7615_apply_dpd() : reload 160 Central CH [106] BW [3] from cetral freq [5540] i[25] offset [3b18]
  2190. MtCmdGetTXDPDCalResult:(ret = 0)
  2191. MtCmdChannelSwitch: control_chl = 128,control_ch2=0, central_chl = 114 DBDCIdx= 0, Band= 0
  2192. BW = 3,TXStream = 4, RXStream = 4, scan(1)
  2193. ====================================================================
  2194. Channel  36 : Busy Time =  14263, Skip Channel = FALSE, BwCap = TRUE
  2195. Channel  40 : Busy Time =  16326, Skip Channel = FALSE, BwCap = TRUE
  2196. Channel  44 : Busy Time =  20210, Skip Channel = FALSE, BwCap = TRUE
  2197. Channel  48 : Busy Time =  13171, Skip Channel = FALSE, BwCap = TRUE
  2198. Channel  52 : Busy Time =   3326, Skip Channel = FALSE, BwCap = TRUE
  2199. Channel  56 : Busy Time =    326, Skip Channel = FALSE, BwCap = TRUE
  2200. Channel  60 : Busy Time =    760, Skip Channel = FALSE, BwCap = TRUE
  2201. Channel  64 : Busy Time =   7012, Skip Channel = FALSE, BwCap = TRUE
  2202. Channel 100 : Busy Time =   9043, Skip Channel = FALSE, BwCap = TRUE
  2203. Channel 104 : Busy Time =   2203, Skip Channel = FALSE, BwCap = TRUE
  2204. Channel 108 : Busy Time =   3052, Skip Channel = FALSE, BwCap = TRUE
  2205. Channel 112 : Busy Time =    789, Skip Channel = FALSE, BwCap = TRUE
  2206. Channel 116 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  2207. Channel 120 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  2208. Channel 124 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  2209. Channel 128 : Busy Time =      0, Skip Channel = FALSE, BwCap = TRUE
  2210. ====================================================================
  2211. Rule 3 Channel Busy time value : Select Primary Channel 116
  2212. Rule 3 Channel Busy time value : Min Channel Busy = 9043
  2213. Rule 3 Channel Busy time value : BW = 160
  2214.  AutoChSelUpdateChannel(): Update channel for wdev0 for this band PhyMode = 48,Channel = 116  
  2215. ApAutoChannelAtBootUp<-----------------
  2216. Current Channel is 1. DfsZeroWaitSupport=0
  2217. [PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
  2218. [PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
  2219. MtCmdSetDbdcCtrl:(ret = 0)
  2220. HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:48,Channel=36
  2221. Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
  2222. wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
  2223.  LinkToOmacIdx = 0, LinkToWdevType = 1
  2224. bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO),                 CmdBssInfoBmcRate.u2BcTransmit= 8192,                 CmdBssInfoBmcRate.u2McTransmit = 8196
  2225.  [RadarStateCheck]Set into RD_NORMAL_MODE  
  2226. MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 0, BandIdx: 0
  2227. MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 0, BandIdx: 0
  2228. MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 0, BandIdx: 0
  2229. mt7615_bbp_adjust():rf_bw=3, ext_ch=1, PrimCh=36, HT-CentCh=38, VHT-CentCh=50
  2230. mt7615_apply_dcoc() : reload 160 Central CH [42] BW [3] from cetral freq [5210]  offset [1900]
  2231. MtCmdGetRXDCOCCalResult:(ret = 0)
  2232. mt7615_apply_dcoc() : reload 160 Central CH [58] BW [3] from cetral freq [5290]  offset [1a00]
  2233. MtCmdGetRXDCOCCalResult:(ret = 0)
  2234. mt7615_apply_dpd() : reload 160 Central CH [42] BW [3] from cetral freq [5220] i[9] offset [2d98]
  2235. MtCmdGetTXDPDCalResult:(ret = 0)
  2236. mt7615_apply_dpd() : reload 160 Central CH [58] BW [3] from cetral freq [5300] i[13] offset [30f8]
  2237. MtCmdGetTXDPDCalResult:(ret = 0)
  2238. MtCmdChannelSwitch: control_chl = 36,control_ch2=0, central_chl = 50 DBDCIdx= 0, Band= 0
  2239. BW = 3,TXStream = 4, RXStream = 4, scan(0)
  2240. ExtEventBeaconLostHandler::FW LOG, Beacon lost (xx:xx:xx:xx:xx:b1), Reason 0x10
  2241.   Beacon lost - AP disabled!!!
  2242. ap_phy_rrm_init_byRf(): AP Set CentralFreq at 50(Prim=36, HT-CentCh=38, VHT-CentCh=50, BBP_BW=3)
  2243. [WrapDfsRadarDetectStart]: Band0Ch is 36
  2244. [WrapDfsRadarDetectStart]: Band1Ch is 0
  2245. LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
  2246. MtAsicSetRalinkBurstMode(2605): Not support for HIF_MT yet!
  2247. MtAsicSetPiggyBack(777): Not support for HIF_MT yet!
  2248. MtAsicSetTxPreamble(2584): Not support for HIF_MT yet!
  2249. RTMPSetLEDStatus: before AndesLedEnhanceOP , status=1, LED_CMD=2!
  2250. AndesLedEnhanceOP: Success!
  2251. ap_ftkd> Initialize FT KDP Module...
  2252. Main bssid = xx:xx:xx:xx:xx:b1
  2253. AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn
  2254. MtCmdSetMacTxRx:(ret = 0)
  2255. fdb_enable()
  2256. MCS Set = ff ff ff ff 01
  2257. <==== mt_wifi_init, Status=0
  2258. MtCmdEDCCACtrl: BandIdx: 0, EDCCACtrl: 1
  2259. MtCmdEDCCACtrl: BandIdx: 1, EDCCACtrl: 1
  2260. WtcSetMaxStaNum: MaxStaNum:81, BssidNum:1, WdsNum:10, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:125
  2261. red_is_enabled: set CR4/N9 RED Enable to 1.
  2262. cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
  2263. br0: port 3(rai0) entered blocking state
  2264. br0: port 3(rai0) entered disabled state
  2265. device rai0 entered promiscuous mode
  2266. br0: port 3(rai0) entered blocking state
  2267. br0: port 3(rai0) entered forwarding state
  2268. wland: No such file or directory
  2269. syslogd: Already running.
  2270. klogd: Already running.
  2271. NET: Registered protocol family 10
  2272. Segment Routing with IPv6
  2273. device vlan2 entered promiscuous mode
  2274. cp: cannot stat '/tmp/mycron.d/*': No such file or directory
  2275. cp: cannot stat '/jffs/mycron.d/*': No such file or directory
  2276. cp: cannot stat '/mmc/mycron.d/*': No such file or directory
  2277. Key is a ssh-rsa key
  2278. Wrote key to '/tmp/root/.ssh/ssh_host_rsa_key'
  2279. fast-classifier: starting up
  2280. fast-classifier: registered
  2281. cat: /proc/net/ip_conntrack_flush: No such file or directory
  2282. 0
  2283. cannot open /proc/sys/net/ipv4/conf/br0/loop
  2284. iptables-restore v1.6.2: The -t option (seen in line 4) cannot be used in iptables-restore.
  2285.  
  2286. Error occurred at line: 4
  2287. Try `iptables-restore -h' or 'iptables-restore --help' for more information.
  2288. /etc/config/eop-tunnel.firewall: line 16: [: -eq: unary operator expected
  2289. iptables: No chain/target/match by that name.
  2290. iptables: No chain/target/match by that name.
  2291. iptables: No chain/target/match by that name.
  2292. device vlan2 left promiscuous mode
  2293. ==>Set_RadioOn_Proc (ON) equal to current state, ignore!!! (wdev_idx 0)
  2294. ==>Set_RadioOn_Proc (ON) equal to current state, ignore!!! (wdev_idx 0)
  2295. /opt/etc/init.d/rcS: No such file or directory
  2296. /jffs/etc/init.d/rcS: No such file or directory
  2297. /mmc/etc/init.d/rcS: No such file or directory
  2298. rmmod: ERROR: Module eoip is not currently loaded
  2299. /etc/config/eop-tunnel.startup: line 18: [: -eq: unary operator expected
  2300. proxywatchdog.sh: no process found
  2301. /mnt/smbshare
  2302. umount: /mnt/smbshare: no mount point specified.
  2303. rmmod: ERROR: Module cifs is not currently loaded
  2304. rmmod: ERROR: Module fscache is not currently loaded
  2305. schedulerb.sh: no process found
  2306. shatd: no process found
  2307. wdswatchdog.sh: no process found
  2308. The Milkfish Router Services
  2309. ERROR: Necessary service setting not found: milkfish_username - aborting.
  2310. The Milkfish Router Services
  2311. Restoring SIP ddsubscriber database from NVRAM...
  2312. Empty.
  2313. The Milkfish Router Services
  2314. Restoring SIP ddaliases database from NVRAM...
  2315. Empty.
  2316.  
  2317. DD-WRT login: root
  2318. Password:
  2319. Last login: Wed Dec 12 15:58:32 MST 2018 from 192.168.1.148 on pts/0
  2320. Last login: Wed Dec 31 17:01:48 on console
  2321. ==========================================================
  2322.  
  2323.     ___  ___     _      _____  ______        ___  __  ___
  2324.    / _ \/ _ \___| | /| / / _ \/_  __/__  __.`, /-` /.`, /
  2325.   / // / // /___/ |/ |/ / , _/ / /   \ \/ /_``_// //_``_/
  2326.  /____/____/    |__/|__/_/|_| /_/     \__/ /_/(_)_//_/
  2327.                                                    
  2328.                         DD-WRT v4.14
  2329.                      Wireless Liberty
  2330.                   http://www.dd-wrt.com
  2331. -----
  2332. This version has been brought to you by:
  2333. __   __  _____  _____   _   ____   ______  _____  _   __
  2334. |  \ /  ||  ___||  __ \ | | / __ \ |__  __||  ___|| | / /
  2335. |   ^   || |__  | |  \ \| || |  | |  | |   | |__  | |/ /
  2336. |  | |  ||  ___|| |  | || || '--' |  | |   |  ___||   \
  2337. |  | |  || |___ | |__/ /| || |--| |  | |   | |___ | |\ \
  2338. |__| |__||_____||_____/ |_||_|  |_|  |_|   |_____||_| \_\
  2339.  
  2340.                      Everyday Genius.
  2341. -----
  2342. "It takes Everyday Genius to attain Wireless Liberty"
  2343.                                                     ~Anon
  2344. ======*insert graffiti expressing 'Ralf r00lz!1!1!'*======
  2345. root@DD-WRT:~# cat /tmp/.ipt
  2346. *mangle
  2347. :PREROUTING ACCEPT [0:0]
  2348. :OUTPUT ACCEPT [0:0]
  2349. -A PREROUTING  -t mangle -i ! vlan2 -d xx.xx.xx.xx -j MARK --set-mark 0x80000000/0x80000000
  2350. -A PREROUTING  -t mangle -j CONNMARK --save-mark
  2351. -I FORWARD  -t mangle -p tcp --tcp-flags SYN,RST SYN -j TCPMSS --clamp-mss-to-pmtu
  2352. COMMIT
  2353.  
  2354. *nat
  2355. :PREROUTING ACCEPT [0:0]
  2356. :POSTROUTING ACCEPT [0:0]
  2357. :OUTPUT ACCEPT [0:0]
  2358. -A PREROUTING  -p icmp -d xx.xx.xx.xx -j DNAT --to-destination 192.168.1.1
  2359. -A PREROUTING  -d xx.xx.xx.xx -j TRIGGER --trigger-type dnat
  2360. -A POSTROUTING  -s 192.168.1.1/24 -o vlan2 -j SNAT --to-source xx.xx.xx.xx
  2361. -A POSTROUTING  -m mark --mark 0x80000000/0x80000000 -j MASQUERADE
  2362. COMMIT
  2363. *filter
  2364. :INPUT ACCEPT [0:0]
  2365. :FORWARD ACCEPT [0:0]
  2366. :OUTPUT ACCEPT [0:0]
  2367. :logaccept - [0:0]
  2368. :logdrop - [0:0]
  2369. :logreject - [0:0]
  2370. :trigger_out - [0:0]
  2371. :lan2wan - [0:0]
  2372. :grp_1 - [0:0]
  2373. :advgrp_1 - [0:0]
  2374. :grp_2 - [0:0]
  2375. :advgrp_2 - [0:0]
  2376. :grp_3 - [0:0]
  2377. :advgrp_3 - [0:0]
  2378. :grp_4 - [0:0]
  2379. :advgrp_4 - [0:0]
  2380. :grp_5 - [0:0]
  2381. :advgrp_5 - [0:0]
  2382. :grp_6 - [0:0]
  2383. :advgrp_6 - [0:0]
  2384. :grp_7 - [0:0]
  2385. :advgrp_7 - [0:0]
  2386. :grp_8 - [0:0]
  2387. :advgrp_8 - [0:0]
  2388. :grp_9 - [0:0]
  2389. :advgrp_9 - [0:0]
  2390. :grp_10 - [0:0]
  2391. :advgrp_10 - [0:0]
  2392. :grp_11 - [0:0]
  2393. :advgrp_11 - [0:0]
  2394. :grp_12 - [0:0]
  2395. :advgrp_12 - [0:0]
  2396. :grp_13 - [0:0]
  2397. :advgrp_13 - [0:0]
  2398. :grp_14 - [0:0]
  2399. :advgrp_14 - [0:0]
  2400. :grp_15 - [0:0]
  2401. :advgrp_15 - [0:0]
  2402. :grp_16 - [0:0]
  2403. :advgrp_16 - [0:0]
  2404. :grp_17 - [0:0]
  2405. :advgrp_17 - [0:0]
  2406. :grp_18 - [0:0]
  2407. :advgrp_18 - [0:0]
  2408. :grp_19 - [0:0]
  2409. :advgrp_19 - [0:0]
  2410. :grp_20 - [0:0]
  2411. :advgrp_20 - [0:0]
  2412. -A INPUT  -m state --state RELATED,ESTABLISHED -j ACCEPT
  2413. -A INPUT  -i vlan2 -p udp --sport 67 --dport 68 -j ACCEPT
  2414. -A INPUT  -p udp -i vlan2 --dport 520 -j DROP
  2415. -A INPUT  -p udp -i br0 --dport 520 -j DROP
  2416. -A INPUT  -p udp --dport 520 -j ACCEPT
  2417. -A INPUT  -i vlan2 -p icmp -j ACCEPT
  2418. -A INPUT  -p igmp -j ACCEPT
  2419. -A INPUT  -p tcp --dport 113 -j ACCEPT
  2420. -A INPUT  -i lo -m state --state NEW -j ACCEPT
  2421. -A INPUT  -i br0 -m state --state NEW -j ACCEPT
  2422. -A INPUT  -j DROP
  2423. -A FORWARD  -j lan2wan
  2424. -A FORWARD  -i br0 -o br0 -j ACCEPT
  2425. -I FORWARD  -o vlan2 -s 192.168.1.1/24 -p tcp --dport 1723 -j ACCEPT
  2426. -I FORWARD  -o vlan2 -s 192.168.1.1/24 -p gre -j ACCEPT
  2427. -A FORWARD  -i vlan2 -p udp --destination 224.0.0.0/4 -j ACCEPT
  2428. -A FORWARD  -i vlan2 -o br0 -j TRIGGER --trigger-type in
  2429. -A FORWARD  -i br0 -j trigger_out
  2430. -A FORWARD  -i vlan2 -o eth0 -j TRIGGER --trigger-type in
  2431. -A FORWARD  -i eth0 -j trigger_out
  2432. -A FORWARD  -i eth0 -m state --state NEW -j ACCEPT
  2433. -A FORWARD  -i vlan2 -o vlan1 -j TRIGGER --trigger-type in
  2434. -A FORWARD  -i vlan1 -j trigger_out
  2435. -A FORWARD  -i vlan1 -m state --state NEW -j ACCEPT
  2436. -A FORWARD  -i vlan2 -o ra0 -j TRIGGER --trigger-type in
  2437. -A FORWARD  -i ra0 -j trigger_out
  2438. -A FORWARD  -i ra0 -m state --state NEW -j ACCEPT
  2439. -A FORWARD  -i vlan2 -o rai0 -j TRIGGER --trigger-type in
  2440. -A FORWARD  -i rai0 -j trigger_out
  2441. -A FORWARD  -i rai0 -m state --state NEW -j ACCEPT
  2442. -A FORWARD  -i vlan2 -o apclii0 -j TRIGGER --trigger-type in
  2443. -A FORWARD  -i apclii0 -j trigger_out
  2444. -A FORWARD  -i apclii0 -m state --state NEW -j ACCEPT
  2445. -A FORWARD  -i vlan2 -o apcli0 -j TRIGGER --trigger-type in
  2446. -A FORWARD  -i apcli0 -j trigger_out
  2447. -A FORWARD  -i apcli0 -m state --state NEW -j ACCEPT
  2448. -A FORWARD  -i vlan2 -o wds4 -j TRIGGER --trigger-type in
  2449. -A FORWARD  -i wds4 -j trigger_out
  2450. -A FORWARD  -i wds4 -m state --state NEW -j ACCEPT
  2451. -A FORWARD  -i vlan2 -o wds1 -j TRIGGER --trigger-type in
  2452. -A FORWARD  -i wds1 -j trigger_out
  2453. -A FORWARD  -i wds1 -m state --state NEW -j ACCEPT
  2454. -A FORWARD  -i vlan2 -o wdsi9 -j TRIGGER --trigger-type in
  2455. -A FORWARD  -i wdsi9 -j trigger_out
  2456. -A FORWARD  -i wdsi9 -m state --state NEW -j ACCEPT
  2457. -A FORWARD  -i vlan2 -o wdsi6 -j TRIGGER --trigger-type in
  2458. -A FORWARD  -i wdsi6 -j trigger_out
  2459. -A FORWARD  -i wdsi6 -m state --state NEW -j ACCEPT
  2460. -A FORWARD  -i vlan2 -o wdsi3 -j TRIGGER --trigger-type in
  2461. -A FORWARD  -i wdsi3 -j trigger_out
  2462. -A FORWARD  -i wdsi3 -m state --state NEW -j ACCEPT
  2463. -A FORWARD  -i vlan2 -o wds8 -j TRIGGER --trigger-type in
  2464. -A FORWARD  -i wds8 -j trigger_out
  2465. -A FORWARD  -i wds8 -m state --state NEW -j ACCEPT
  2466. -A FORWARD  -i vlan2 -o wdsi0 -j TRIGGER --trigger-type in
  2467. -A FORWARD  -i wdsi0 -j trigger_out
  2468. -A FORWARD  -i wdsi0 -m state --state NEW -j ACCEPT
  2469. -A FORWARD  -i vlan2 -o wds5 -j TRIGGER --trigger-type in
  2470. -A FORWARD  -i wds5 -j trigger_out
  2471. -A FORWARD  -i wds5 -m state --state NEW -j ACCEPT
  2472. -A FORWARD  -i vlan2 -o wds2 -j TRIGGER --trigger-type in
  2473. -A FORWARD  -i wds2 -j trigger_out
  2474. -A FORWARD  -i wds2 -m state --state NEW -j ACCEPT
  2475. -A FORWARD  -i vlan2 -o wdsi7 -j TRIGGER --trigger-type in
  2476. -A FORWARD  -i wdsi7 -j trigger_out
  2477. -A FORWARD  -i wdsi7 -m state --state NEW -j ACCEPT
  2478. -A FORWARD  -i vlan2 -o wdsi4 -j TRIGGER --trigger-type in
  2479. -A FORWARD  -i wdsi4 -j trigger_out
  2480. -A FORWARD  -i wdsi4 -m state --state NEW -j ACCEPT
  2481. -A FORWARD  -i vlan2 -o wds9 -j TRIGGER --trigger-type in
  2482. -A FORWARD  -i wds9 -j trigger_out
  2483. -A FORWARD  -i wds9 -m state --state NEW -j ACCEPT
  2484. -A FORWARD  -i vlan2 -o wdsi1 -j TRIGGER --trigger-type in
  2485. -A FORWARD  -i wdsi1 -j trigger_out
  2486. -A FORWARD  -i wdsi1 -m state --state NEW -j ACCEPT
  2487. -A FORWARD  -i vlan2 -o wds6 -j TRIGGER --trigger-type in
  2488. -A FORWARD  -i wds6 -j trigger_out
  2489. -A FORWARD  -i wds6 -m state --state NEW -j ACCEPT
  2490. -A FORWARD  -i vlan2 -o wds3 -j TRIGGER --trigger-type in
  2491. -A FORWARD  -i wds3 -j trigger_out
  2492. -A FORWARD  -i wds3 -m state --state NEW -j ACCEPT
  2493. -A FORWARD  -i vlan2 -o wds0 -j TRIGGER --trigger-type in
  2494. -A FORWARD  -i wds0 -j trigger_out
  2495. -A FORWARD  -i wds0 -m state --state NEW -j ACCEPT
  2496. -A FORWARD  -i vlan2 -o wdsi8 -j TRIGGER --trigger-type in
  2497. -A FORWARD  -i wdsi8 -j trigger_out
  2498. -A FORWARD  -i wdsi8 -m state --state NEW -j ACCEPT
  2499. -A FORWARD  -i vlan2 -o wdsi5 -j TRIGGER --trigger-type in
  2500. -A FORWARD  -i wdsi5 -j trigger_out
  2501. -A FORWARD  -i wdsi5 -m state --state NEW -j ACCEPT
  2502. -A FORWARD  -i vlan2 -o wdsi2 -j TRIGGER --trigger-type in
  2503. -A FORWARD  -i wdsi2 -j trigger_out
  2504. -A FORWARD  -i wdsi2 -m state --state NEW -j ACCEPT
  2505. -A FORWARD  -i vlan2 -o wds7 -j TRIGGER --trigger-type in
  2506. -A FORWARD  -i wds7 -j trigger_out
  2507. -A FORWARD  -i wds7 -m state --state NEW -j ACCEPT
  2508. -A FORWARD  -i br0 -m state --state NEW -j ACCEPT
  2509. -A FORWARD  -j DROP
  2510. -I FORWARD  -m state --state RELATED,ESTABLISHED -j ACCEPT
  2511. -A  logaccept -j ACCEPT
  2512. -A  logdrop -m state --state INVALID -j LOG --log-prefix "DROP " --log-tcp-sequence --log-tcp-options --log-ip-options
  2513. -A  logdrop -j DROP
  2514. -A  logreject -p tcp -j REJECT --reject-with tcp-reset
  2515. COMMIT
  2516. root@DD-WRT:~# use buffer size 65536
  2517. Upgrading from web (http) now ...
  2518. Upgrading from web (http) now ...
  2519. Upgrading from web (http) now ...
  2520. upgrade_ver[v-86.1.0] upgrade_ver[-860100] intel_ver[14108] 4712_ver[15000]
  2521. umount: /jffs: not mounted.
  2522. freeram=[46059520] bufferram=[8646656]
  2523. The free memory is enough, writing image once.
  2524. uploading [16314458]
  2525. Upgrading from web (http) now ...
  2526. /dev/mtd4: CRC OK (0xAAFDE6F8)
  2527. Writing image to flash, waiting a moment...
  2528. write block [16314368] at [0x00000000]
  2529. Upgrading from web (http) now ...
  2530. write block [16314368] at [0x00010000]
  2531. Upgrading from web (http) now ...
  2532. write block [16314368] at [0x00020000]
  2533. write block [16314368] at [0x00030000]
  2534. write block [16314368] at [0x00040000]
  2535. Upgrading from web (http) now ...
  2536. write block [16314368] at [0x00050000]
  2537. write block [16314368] at [0x00060000]
  2538. Upgrading from web (http) now ...
  2539. write block [16314368] at [0x00070000]
  2540. write block [16314368] at [0x00080000]
  2541. write block [16314368] at [0x00090000]
  2542. Upgrading from web (http) now ...
  2543. write block [16314368] at [0x000A0000]
  2544. write block [16314368] at [0x000B0000]
  2545. Upgrading from web (http) now ...
  2546. write block [16314368] at [0x000C0000]
  2547. write block [16314368] at [0x000D0000]
  2548. write block [16314368] at [0x000E0000]
  2549. Upgrading from web (http) now ...
  2550. write block [16314368] at [0x000F0000]
  2551. write block [16314368] at [0x00100000]
  2552. Upgrading from web (http) now ...
  2553. write block [16314368] at [0x00110000]
  2554. write block [16314368] at [0x00120000]
  2555. write block [16314368] at [0x00130000]
  2556. Upgrading from web (http) now ...
  2557. write block [16314368] at [0x00140000]
  2558. write block [16314368] at [0x00150000]
  2559. Upgrading from web (http) now ...
  2560. write block [16314368] at [0x00160000]
  2561. write block [16314368] at [0x00170000]
  2562. Upgrading from web (http) now ...
  2563. write block [16314368] at [0x00180000]
  2564. write block [16314368] at [0x00190000]
  2565. write block [16314368] at [0x001A0000]
  2566. Upgrading from web (http) now ...
  2567. write block [16314368] at [0x001B0000]
  2568. write block [16314368] at [0x001C0000]
  2569. Upgrading from web (http) now ...
  2570. write block [16314368] at [0x001D0000]
  2571. write block [16314368] at [0x001E0000]
  2572. write block [16314368] at [0x001F0000]
  2573. Upgrading from web (http) now ...
  2574. write block [16314368] at [0x00200000]
  2575. write block [16314368] at [0x00210000]
  2576. Upgrading from web (http) now ...
  2577. write block [16314368] at [0x00220000]
  2578. write block [16314368] at [0x00230000]
  2579. write block [16314368] at [0x00240000]
  2580. Upgrading from web (http) now ...
  2581. write block [16314368] at [0x00250000]
  2582. write block [16314368] at [0x00260000]
  2583. Upgrading from web (http) now ...
  2584. write block [16314368] at [0x00270000]
  2585. write block [16314368] at [0x00280000]
  2586. write block [16314368] at [0x00290000]
  2587. Upgrading from web (http) now ...
  2588. write block [16314368] at [0x002A0000]
  2589. write block [16314368] at [0x002B0000]
  2590. Upgrading from web (http) now ...
  2591. write block [16314368] at [0x002C0000]
  2592. write block [16314368] at [0x002D0000]
  2593. write block [16314368] at [0x002E0000]
  2594. Upgrading from web (http) now ...
  2595. write block [16314368] at [0x002F0000]
  2596. write block [16314368] at [0x00300000]
  2597. Upgrading from web (http) now ...
  2598. write block [16314368] at [0x00310000]
  2599. write block [16314368] at [0x00320000]
  2600. Upgrading from web (http) now ...
  2601. write block [16314368] at [0x00330000]
  2602. write block [16314368] at [0x00340000]
  2603. write block [16314368] at [0x00350000]
  2604. Upgrading from web (http) now ...
  2605. write block [16314368] at [0x00360000]
  2606. write block [16314368] at [0x00370000]
  2607. Upgrading from web (http) now ...
  2608. write block [16314368] at [0x00380000]
  2609. write block [16314368] at [0x00390000]
  2610. write block [16314368] at [0x003A0000]
  2611. Upgrading from web (http) now ...
  2612. write block [16314368] at [0x003B0000]
  2613. write block [16314368] at [0x003C0000]
  2614. Upgrading from web (http) now ...
  2615. write block [16314368] at [0x003D0000]
  2616. write block [16314368] at [0x003E0000]
  2617. write block [16314368] at [0x003F0000]
  2618. Upgrading from web (http) now ...
  2619. write block [16314368] at [0x00400000]
  2620. write block [16314368] at [0x00410000]
  2621. Upgrading from web (http) now ...
  2622. write block [16314368] at [0x00420000]
  2623. write block [16314368] at [0x00430000]
  2624. write block [16314368] at [0x00440000]
  2625. Upgrading from web (http) now ...
  2626. write block [16314368] at [0x00450000]
  2627. write block [16314368] at [0x00460000]
  2628. Upgrading from web (http) now ...
  2629. write block [16314368] at [0x00470000]
  2630. write block [16314368] at [0x00480000]
  2631. write block [16314368] at [0x00490000]
  2632. Upgrading from web (http) now ...
  2633. write block [16314368] at [0x004A0000]
  2634. write block [16314368] at [0x004B0000]
  2635. Upgrading from web (http) now ...
  2636. write block [16314368] at [0x004C0000]
  2637. write block [16314368] at [0x004D0000]
  2638. Upgrading from web (http) now ...
  2639. write block [16314368] at [0x004E0000]
  2640. write block [16314368] at [0x004F0000]
  2641. write block [16314368] at [0x00500000]
  2642. Upgrading from web (http) now ...
  2643. write block [16314368] at [0x00510000]
  2644. write block [16314368] at [0x00520000]
  2645. Upgrading from web (http) now ...
  2646. write block [16314368] at [0x00530000]
  2647. write block [16314368] at [0x00540000]
  2648. write block [16314368] at [0x00550000]
  2649. Upgrading from web (http) now ...
  2650. write block [16314368] at [0x00560000]
  2651. write block [16314368] at [0x00570000]
  2652. Upgrading from web (http) now ...
  2653. write block [16314368] at [0x00580000]
  2654. write block [16314368] at [0x00590000]
  2655. write block [16314368] at [0x005A0000]
  2656. Upgrading from web (http) now ...
  2657. write block [16314368] at [0x005B0000]
  2658. write block [16314368] at [0x005C0000]
  2659. Upgrading from web (http) now ...
  2660. write block [16314368] at [0x005D0000]
  2661. write block [16314368] at [0x005E0000]
  2662. write block [16314368] at [0x005F0000]
  2663. Upgrading from web (http) now ...
  2664. write block [16314368] at [0x00600000]
  2665. write block [16314368] at [0x00610000]
  2666. Upgrading from web (http) now ...
  2667. write block [16314368] at [0x00620000]
  2668. write block [16314368] at [0x00630000]
  2669. Upgrading from web (http) now ...
  2670. write block [16314368] at [0x00640000]
  2671. write block [16314368] at [0x00650000]
  2672. write block [16314368] at [0x00660000]
  2673. Upgrading from web (http) now ...
  2674. write block [16314368] at [0x00670000]
  2675. write block [16314368] at [0x00680000]
  2676. Upgrading from web (http) now ...
  2677. write block [16314368] at [0x00690000]
  2678. write block [16314368] at [0x006A0000]
  2679. write block [16314368] at [0x006B0000]
  2680. Upgrading from web (http) now ...
  2681. write block [16314368] at [0x006C0000]
  2682. write block [16314368] at [0x006D0000]
  2683. Upgrading from web (http) now ...
  2684. write block [16314368] at [0x006E0000]
  2685. write block [16314368] at [0x006F0000]
  2686. write block [16314368] at [0x00700000]
  2687. Upgrading from web (http) now ...
  2688. write block [16314368] at [0x00710000]
  2689. write block [16314368] at [0x00720000]
  2690. Upgrading from web (http) now ...
  2691. write block [16314368] at [0x00730000]
  2692. write block [16314368] at [0x00740000]
  2693. write block [16314368] at [0x00750000]
  2694. Upgrading from web (http) now ...
  2695. write block [16314368] at [0x00760000]
  2696. write block [16314368] at [0x00770000]
  2697. Upgrading from web (http) now ...
  2698. write block [16314368] at [0x00780000]
  2699. write block [16314368] at [0x00790000]
  2700. Upgrading from web (http) now ...
  2701. write block [16314368] at [0x007A0000]
  2702. write block [16314368] at [0x007B0000]
  2703. write block [16314368] at [0x007C0000]
  2704. Upgrading from web (http) now ...
  2705. write block [16314368] at [0x007D0000]
  2706. write block [16314368] at [0x007E0000]
  2707. Upgrading from web (http) now ...
  2708. write block [16314368] at [0x007F0000]
  2709. write block [16314368] at [0x00800000]
  2710. write block [16314368] at [0x00810000]
  2711. Upgrading from web (http) now ...
  2712. write block [16314368] at [0x00820000]
  2713. write block [16314368] at [0x00830000]
  2714. Upgrading from web (http) now ...
  2715. write block [16314368] at [0x00840000]
  2716. write block [16314368] at [0x00850000]
  2717. write block [16314368] at [0x00860000]
  2718. Upgrading from web (http) now ...
  2719. write block [16314368] at [0x00870000]
  2720. write block [16314368] at [0x00880000]
  2721. Upgrading from web (http) now ...
  2722. write block [16314368] at [0x00890000]
  2723. write block [16314368] at [0x008A0000]
  2724. write block [16314368] at [0x008B0000]
  2725. Upgrading from web (http) now ...
  2726. write block [16314368] at [0x008C0000]
  2727. write block [16314368] at [0x008D0000]
  2728. Upgrading from web (http) now ...
  2729. write block [16314368] at [0x008E0000]
  2730. write block [16314368] at [0x008F0000]
  2731. write block [16314368] at [0x00900000]
  2732. Upgrading from web (http) now ...
  2733. write block [16314368] at [0x00910000]
  2734. write block [16314368] at [0x00920000]
  2735. Upgrading from web (http) now ...
  2736. write block [16314368] at [0x00930000]
  2737. write block [16314368] at [0x00940000]
  2738. write block [16314368] at [0x00950000]
  2739. Upgrading from web (http) now ...
  2740. write block [16314368] at [0x00960000]
  2741. write block [16314368] at [0x00970000]
  2742. Upgrading from web (http) now ...
  2743. write block [16314368] at [0x00980000]
  2744. write block [16314368] at [0x00990000]
  2745. write block [16314368] at [0x009A0000]
  2746. Upgrading from web (http) now ...
  2747. write block [16314368] at [0x009B0000]
  2748. write block [16314368] at [0x009C0000]
  2749. Upgrading from web (http) now ...
  2750. write block [16314368] at [0x009D0000]
  2751. write block [16314368] at [0x009E0000]
  2752. write block [16314368] at [0x009F0000]
  2753. Upgrading from web (http) now ...
  2754. write block [16314368] at [0x00A00000]
  2755. write block [16314368] at [0x00A10000]
  2756. Upgrading from web (http) now ...
  2757. write block [16314368] at [0x00A20000]
  2758. write block [16314368] at [0x00A30000]
  2759. Upgrading from web (http) now ...
  2760. write block [16314368] at [0x00A40000]
  2761. write block [16314368] at [0x00A50000]
  2762. write block [16314368] at [0x00A60000]
  2763. Upgrading from web (http) now ...
  2764. write block [16314368] at [0x00A70000]
  2765. write block [16314368] at [0x00A80000]
  2766. Upgrading from web (http) now ...
  2767. write block [16314368] at [0x00A90000]
  2768. write block [16314368] at [0x00AA0000]
  2769. write block [16314368] at [0x00AB0000]
  2770. Upgrading from web (http) now ...
  2771. write block [16314368] at [0x00AC0000]
  2772. write block [16314368] at [0x00AD0000]
  2773. Upgrading from web (http) now ...
  2774. write block [16314368] at [0x00AE0000]
  2775. write block [16314368] at [0x00AF0000]
  2776. write block [16314368] at [0x00B00000]
  2777. Upgrading from web (http) now ...
  2778. write block [16314368] at [0x00B10000]
  2779. write block [16314368] at [0x00B20000]
  2780. Upgrading from web (http) now ...
  2781. write block [16314368] at [0x00B30000]
  2782. write block [16314368] at [0x00B40000]
  2783. write block [16314368] at [0x00B50000]
  2784. Upgrading from web (http) now ...
  2785. write block [16314368] at [0x00B60000]
  2786. write block [16314368] at [0x00B70000]
  2787. Upgrading from web (http) now ...
  2788. write block [16314368] at [0x00B80000]
  2789. write block [16314368] at [0x00B90000]
  2790. write block [16314368] at [0x00BA0000]
  2791. Upgrading from web (http) now ...
  2792. write block [16314368] at [0x00BB0000]
  2793. write block [16314368] at [0x00BC0000]
  2794. Upgrading from web (http) now ...
  2795. write block [16314368] at [0x00BD0000]
  2796. write block [16314368] at [0x00BE0000]
  2797. write block [16314368] at [0x00BF0000]
  2798. Upgrading from web (http) now ...
  2799. write block [16314368] at [0x00C00000]
  2800. write block [16314368] at [0x00C10000]
  2801. Upgrading from web (http) now ...
  2802. write block [16314368] at [0x00C20000]
  2803. write block [16314368] at [0x00C30000]
  2804. write block [16314368] at [0x00C40000]
  2805. Upgrading from web (http) now ...
  2806. write block [16314368] at [0x00C50000]
  2807. write block [16314368] at [0x00C60000]
  2808. Upgrading from web (http) now ...
  2809. write block [16314368] at [0x00C70000]
  2810. write block [16314368] at [0x00C80000]
  2811. Upgrading from web (http) now ...
  2812. write block [16314368] at [0x00C90000]
  2813. write block [16314368] at [0x00CA0000]
  2814. write block [16314368] at [0x00CB0000]
  2815. Upgrading from web (http) now ...
  2816. write block [16314368] at [0x00CC0000]
  2817. write block [16314368] at [0x00CD0000]
  2818. Upgrading from web (http) now ...
  2819. write block [16314368] at [0x00CE0000]
  2820. write block [16314368] at [0x00CF0000]
  2821. write block [16314368] at [0x00D00000]
  2822. Upgrading from web (http) now ...
  2823. write block [16314368] at [0x00D10000]
  2824. write block [16314368] at [0x00D20000]
  2825. Upgrading from web (http) now ...
  2826. write block [16314368] at [0x00D30000]
  2827. write block [16314368] at [0x00D40000]
  2828. write block [16314368] at [0x00D50000]
  2829. Upgrading from web (http) now ...
  2830. write block [16314368] at [0x00D60000]
  2831. write block [16314368] at [0x00D70000]
  2832. Upgrading from web (http) now ...
  2833. write block [16314368] at [0x00D80000]
  2834. write block [16314368] at [0x00D90000]
  2835. write block [16314368] at [0x00DA0000]
  2836. Upgrading from web (http) now ...
  2837. write block [16314368] at [0x00DB0000]
  2838. write block [16314368] at [0x00DC0000]
  2839. Upgrading from web (http) now ...
  2840. write block [16314368] at [0x00DD0000]
  2841. write block [16314368] at [0x00DE0000]
  2842. write block [16314368] at [0x00DF0000]
  2843. Upgrading from web (http) now ...
  2844. write block [16314368] at [0x00E00000]
  2845. write block [16314368] at [0x00E10000]
  2846. Upgrading from web (http) now ...
  2847. write block [16314368] at [0x00E20000]
  2848. write block [16314368] at [0x00E30000]
  2849. write block [16314368] at [0x00E40000]
  2850. Upgrading from web (http) now ...
  2851. write block [16314368] at [0x00E50000]
  2852. write block [16314368] at [0x00E60000]
  2853. Upgrading from web (http) now ...
  2854. write block [16314368] at [0x00E70000]
  2855. write block [16314368] at [0x00E80000]
  2856. Upgrading from web (http) now ...
  2857. write block [16314368] at [0x00E90000]
  2858. write block [16314368] at [0x00EA0000]
  2859. write block [16314368] at [0x00EB0000]
  2860. Upgrading from web (http) now ...
  2861. write block [16314368] at [0x00EC0000]
  2862. write block [16314368] at [0x00ED0000]
  2863. Upgrading from web (http) now ...
  2864. write block [16314368] at [0x00EE0000]
  2865. write block [16314368] at [0x00EF0000]
  2866. write block [16314368] at [0x00F00000]
  2867. Upgrading from web (http) now ...
  2868. write block [16314368] at [0x00F10000]
  2869. write block [16314368] at [0x00F20000]
  2870. Upgrading from web (http) now ...
  2871. write block [16314368] at [0x00F30000]
  2872. write block [16314368] at [0x00F40000]
  2873. write block [16314368] at [0x00F50000]
  2874. Upgrading from web (http) now ...
  2875. write block [16314368] at [0x00F60000]
  2876. write block [16314368] at [0x00F70000]
  2877. Upgrading from web (http) now ...
  2878. write block [16314368] at [0x00F80000]
  2879.  
  2880. done [16318464]
  2881. [UPGRADE] ret: 0
  2882. send dhcp lease release signal
  2883. Sending SIGTERM to all processes
  2884. unmounting /
  2885. unmounting /dev
  2886. umount: Input/output error
  2887. Sending SIGKILL to all processes
RAW Paste Data
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