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include/linux/msm_mdp.h

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  1. /* include/linux/msm_mdp.h
  2.  *
  3.  * Copyright (C) 2007 Google Incorporated
  4.  * Copyright (c) 2012-2014 The Linux Foundation. All rights reserved.
  5.  *
  6.  * This software is licensed under the terms of the GNU General Public
  7.  * License version 2, as published by the Free Software Foundation, and
  8.  * may be copied, distributed, and modified under those terms.
  9.  *
  10.  * This program is distributed in the hope that it will be useful,
  11.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13.  * GNU General Public License for more details.
  14.  */
  15. #ifndef _MSM_MDP_H_
  16. #define _MSM_MDP_H_
  17.  
  18. #include <linux/types.h>
  19. #include <linux/fb.h>
  20.  
  21. #define MSMFB_IOCTL_MAGIC 'm'
  22. #define MSMFB_GRP_DISP          _IOW(MSMFB_IOCTL_MAGIC, 1, unsigned int)
  23. #define MSMFB_BLIT              _IOW(MSMFB_IOCTL_MAGIC, 2, unsigned int)
  24. #define MSMFB_SUSPEND_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 128, unsigned int)
  25. #define MSMFB_RESUME_SW_REFRESHER _IOW(MSMFB_IOCTL_MAGIC, 129, unsigned int)
  26. #define MSMFB_CURSOR _IOW(MSMFB_IOCTL_MAGIC, 130, struct fb_cursor)
  27. #define MSMFB_SET_LUT _IOW(MSMFB_IOCTL_MAGIC, 131, struct fb_cmap)
  28. #define MSMFB_HISTOGRAM _IOWR(MSMFB_IOCTL_MAGIC, 132, struct mdp_histogram_data)
  29. /* new ioctls's for set/get ccs matrix */
  30. #define MSMFB_GET_CCS_MATRIX  _IOWR(MSMFB_IOCTL_MAGIC, 133, struct mdp_ccs)
  31. #define MSMFB_SET_CCS_MATRIX  _IOW(MSMFB_IOCTL_MAGIC, 134, struct mdp_ccs)
  32. #define MSMFB_OVERLAY_SET       _IOWR(MSMFB_IOCTL_MAGIC, 135, \
  33.                         struct mdp_overlay)
  34. #define MSMFB_OVERLAY_UNSET     _IOW(MSMFB_IOCTL_MAGIC, 136, unsigned int)
  35.  
  36. #define MSMFB_OVERLAY_PLAY      _IOW(MSMFB_IOCTL_MAGIC, 137, \
  37.                         struct msmfb_overlay_data)
  38. #define MSMFB_OVERLAY_QUEUE MSMFB_OVERLAY_PLAY
  39.  
  40. #define MSMFB_GET_PAGE_PROTECTION _IOR(MSMFB_IOCTL_MAGIC, 138, \
  41.                     struct mdp_page_protection)
  42. #define MSMFB_SET_PAGE_PROTECTION _IOW(MSMFB_IOCTL_MAGIC, 139, \
  43.                     struct mdp_page_protection)
  44. #define MSMFB_OVERLAY_GET      _IOR(MSMFB_IOCTL_MAGIC, 140, \
  45.                         struct mdp_overlay)
  46. #define MSMFB_OVERLAY_PLAY_ENABLE     _IOW(MSMFB_IOCTL_MAGIC, 141, unsigned int)
  47. #define MSMFB_OVERLAY_BLT       _IOWR(MSMFB_IOCTL_MAGIC, 142, \
  48.                         struct msmfb_overlay_blt)
  49. #define MSMFB_OVERLAY_BLT_OFFSET     _IOW(MSMFB_IOCTL_MAGIC, 143, unsigned int)
  50. #define MSMFB_HISTOGRAM_START   _IOR(MSMFB_IOCTL_MAGIC, 144, \
  51.                         struct mdp_histogram_start_req)
  52. #define MSMFB_HISTOGRAM_STOP    _IOR(MSMFB_IOCTL_MAGIC, 145, unsigned int)
  53. #define MSMFB_NOTIFY_UPDATE _IOWR(MSMFB_IOCTL_MAGIC, 146, unsigned int)
  54.  
  55. #define MSMFB_OVERLAY_3D       _IOWR(MSMFB_IOCTL_MAGIC, 147, \
  56.                         struct msmfb_overlay_3d)
  57.  
  58. #define MSMFB_MIXER_INFO       _IOWR(MSMFB_IOCTL_MAGIC, 148, \
  59.                         struct msmfb_mixer_info_req)
  60. #define MSMFB_OVERLAY_PLAY_WAIT _IOWR(MSMFB_IOCTL_MAGIC, 149, \
  61.                         struct msmfb_overlay_data)
  62. #define MSMFB_WRITEBACK_INIT _IO(MSMFB_IOCTL_MAGIC, 150)
  63. #define MSMFB_WRITEBACK_START _IO(MSMFB_IOCTL_MAGIC, 151)
  64. #define MSMFB_WRITEBACK_STOP _IO(MSMFB_IOCTL_MAGIC, 152)
  65. #define MSMFB_WRITEBACK_QUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 153, \
  66.                         struct msmfb_data)
  67. #define MSMFB_WRITEBACK_DEQUEUE_BUFFER _IOW(MSMFB_IOCTL_MAGIC, 154, \
  68.                         struct msmfb_data)
  69. #define MSMFB_WRITEBACK_TERMINATE _IO(MSMFB_IOCTL_MAGIC, 155)
  70. #define MSMFB_MDP_PP _IOWR(MSMFB_IOCTL_MAGIC, 156, struct msmfb_mdp_pp)
  71. #define MSMFB_OVERLAY_VSYNC_CTRL _IOW(MSMFB_IOCTL_MAGIC, 160, unsigned int)
  72. #define MSMFB_VSYNC_CTRL  _IOW(MSMFB_IOCTL_MAGIC, 161, unsigned int)
  73. #define MSMFB_BUFFER_SYNC  _IOW(MSMFB_IOCTL_MAGIC, 162, struct mdp_buf_sync)
  74. #define MSMFB_OVERLAY_COMMIT      _IO(MSMFB_IOCTL_MAGIC, 163)
  75. #define MSMFB_DISPLAY_COMMIT      _IOW(MSMFB_IOCTL_MAGIC, 164, \
  76.                         struct mdp_display_commit)
  77. #define MSMFB_METADATA_SET  _IOW(MSMFB_IOCTL_MAGIC, 165, struct msmfb_metadata)
  78. #define MSMFB_METADATA_GET  _IOW(MSMFB_IOCTL_MAGIC, 166, struct msmfb_metadata)
  79. #define MSMFB_WRITEBACK_SET_MIRRORING_HINT _IOW(MSMFB_IOCTL_MAGIC, 167, \
  80.                         unsigned int)
  81. #define MSMFB_ASYNC_BLIT              _IOW(MSMFB_IOCTL_MAGIC, 168, unsigned int)
  82. #define MSMFB_REG_READ   _IOWR(MSMFB_IOCTL_MAGIC, 64, struct msmfb_reg_access)
  83. #define MSMFB_REG_WRITE  _IOW(MSMFB_IOCTL_MAGIC, 65, struct msmfb_reg_access)
  84.  
  85. #define FB_TYPE_3D_PANEL 0x10101010
  86. #define MDP_IMGTYPE2_START 0x10000
  87. #define MSMFB_DRIVER_VERSION    0xF9E8D701
  88.  
  89. enum {
  90.     NOTIFY_UPDATE_START,
  91.     NOTIFY_UPDATE_STOP,
  92.     NOTIFY_UPDATE_POWER_OFF,
  93. };
  94.  
  95. enum {
  96.     NOTIFY_TYPE_NO_UPDATE,
  97.     NOTIFY_TYPE_SUSPEND,
  98.     NOTIFY_TYPE_UPDATE,
  99. };
  100.  
  101. enum {
  102.     MDP_RGB_565,      /* RGB 565 planer */
  103.     MDP_XRGB_8888,    /* RGB 888 padded */
  104.     MDP_Y_CBCR_H2V2,  /* Y and CbCr, pseudo planer w/ Cb is in MSB */
  105.     MDP_Y_CBCR_H2V2_ADRENO,
  106.     MDP_ARGB_8888,    /* ARGB 888 */
  107.     MDP_RGB_888,      /* RGB 888 planer */
  108.     MDP_Y_CRCB_H2V2,  /* Y and CrCb, pseudo planer w/ Cr is in MSB */
  109.     MDP_YCRYCB_H2V1,  /* YCrYCb interleave */
  110.     MDP_CBYCRY_H2V1,  /* CbYCrY interleave */
  111.     MDP_Y_CRCB_H2V1,  /* Y and CrCb, pseduo planer w/ Cr is in MSB */
  112.     MDP_Y_CBCR_H2V1,   /* Y and CrCb, pseduo planer w/ Cr is in MSB */
  113.     MDP_Y_CRCB_H1V2,
  114.     MDP_Y_CBCR_H1V2,
  115.     MDP_RGBA_8888,    /* ARGB 888 */
  116.     MDP_BGRA_8888,    /* ABGR 888 */
  117.     MDP_RGBX_8888,    /* RGBX 888 */
  118.     MDP_Y_CRCB_H2V2_TILE,  /* Y and CrCb, pseudo planer tile */
  119.     MDP_Y_CBCR_H2V2_TILE,  /* Y and CbCr, pseudo planer tile */
  120.     MDP_Y_CR_CB_H2V2,  /* Y, Cr and Cb, planar */
  121.     MDP_Y_CR_CB_GH2V2,  /* Y, Cr and Cb, planar aligned to Android YV12 */
  122.     MDP_Y_CB_CR_H2V2,  /* Y, Cb and Cr, planar */
  123.     MDP_Y_CRCB_H1V1,  /* Y and CrCb, pseduo planer w/ Cr is in MSB */
  124.     MDP_Y_CBCR_H1V1,  /* Y and CbCr, pseduo planer w/ Cb is in MSB */
  125.     MDP_YCRCB_H1V1,   /* YCrCb interleave */
  126.     MDP_YCBCR_H1V1,   /* YCbCr interleave */
  127.     MDP_BGR_565,      /* BGR 565 planer */
  128.     MDP_BGR_888,      /* BGR 888 */
  129.     MDP_Y_CBCR_H2V2_VENUS,
  130.     MDP_BGRX_8888,   /* BGRX 8888 */
  131.     MDP_RGBA_8888_TILE, /* RGBA 8888 in tile format */
  132.     MDP_ARGB_8888_TILE, /* ARGB 8888 in tile format */
  133.     MDP_ABGR_8888_TILE, /* ABGR 8888 in tile format */
  134.     MDP_BGRA_8888_TILE, /* BGRA 8888 in tile format */
  135.     MDP_RGBX_8888_TILE, /* RGBX 8888 in tile format */
  136.     MDP_XRGB_8888_TILE, /* XRGB 8888 in tile format */
  137.     MDP_XBGR_8888_TILE, /* XBGR 8888 in tile format */
  138.     MDP_BGRX_8888_TILE, /* BGRX 8888 in tile format */
  139.     MDP_YCBYCR_H2V1,  /* YCbYCr interleave */
  140.     MDP_IMGTYPE_LIMIT,
  141.     MDP_RGB_BORDERFILL, /* border fill pipe */
  142.     MDP_FB_FORMAT = MDP_IMGTYPE2_START,    /* framebuffer format */
  143.     MDP_IMGTYPE_LIMIT2 /* Non valid image type after this enum */
  144. };
  145.  
  146. enum {
  147.     PMEM_IMG,
  148.     FB_IMG,
  149. };
  150.  
  151. enum {
  152.     HSIC_HUE = 0,
  153.     HSIC_SAT,
  154.     HSIC_INT,
  155.     HSIC_CON,
  156.     NUM_HSIC_PARAM,
  157. };
  158.  
  159. #define MDSS_MDP_ROT_ONLY       0x80
  160. #define MDSS_MDP_RIGHT_MIXER        0x100
  161. #define MDSS_MDP_DUAL_PIPE      0x200
  162.  
  163. /* mdp_blit_req flag values */
  164. #define MDP_ROT_NOP 0
  165. #define MDP_FLIP_LR 0x1
  166. #define MDP_FLIP_UD 0x2
  167. #define MDP_ROT_90 0x4
  168. #define MDP_ROT_180 (MDP_FLIP_UD|MDP_FLIP_LR)
  169. #define MDP_ROT_270 (MDP_ROT_90|MDP_FLIP_UD|MDP_FLIP_LR)
  170. #define MDP_DITHER 0x8
  171. #define MDP_BLUR 0x10
  172. #define MDP_BLEND_FG_PREMULT 0x20000
  173. #define MDP_IS_FG 0x40000
  174. #define MDP_SOLID_FILL 0x00000020
  175. #define MDP_DEINTERLACE 0x80000000
  176. #define MDP_SHARPENING  0x40000000
  177. #define MDP_NO_DMA_BARRIER_START    0x20000000
  178. #define MDP_NO_DMA_BARRIER_END      0x10000000
  179. #define MDP_NO_BLIT         0x08000000
  180. #define MDP_BLIT_WITH_DMA_BARRIERS  0x000
  181. #define MDP_BLIT_WITH_NO_DMA_BARRIERS    \
  182.     (MDP_NO_DMA_BARRIER_START | MDP_NO_DMA_BARRIER_END)
  183. #define MDP_BLIT_SRC_GEM                0x04000000
  184. #define MDP_BLIT_DST_GEM                0x02000000
  185. #define MDP_BLIT_NON_CACHED     0x01000000
  186. #define MDP_OV_PIPE_SHARE       0x00800000
  187. #define MDP_DEINTERLACE_ODD     0x00400000
  188. #define MDP_OV_PLAY_NOWAIT      0x00200000
  189. #define MDP_SOURCE_ROTATED_90       0x00100000
  190. #define MDP_OVERLAY_PP_CFG_EN       0x00080000
  191. #define MDP_BACKEND_COMPOSITION     0x00040000
  192. #define MDP_BORDERFILL_SUPPORTED    0x00010000
  193. #define MDP_SECURE_OVERLAY_SESSION      0x00008000
  194. #define MDP_SECURE_DISPLAY_OVERLAY_SESSION  0x00002000
  195. #define MDP_OV_PIPE_FORCE_DMA       0x00004000
  196. #define MDP_MEMORY_ID_TYPE_FB       0x00001000
  197. #define MDP_BWC_EN          0x00000400
  198. #define MDP_DECIMATION_EN       0x00000800
  199. #define MDP_TRANSP_NOP 0xffffffff
  200. #define MDP_ALPHA_NOP 0xff
  201.  
  202. #define MDP_FB_PAGE_PROTECTION_NONCACHED         (0)
  203. #define MDP_FB_PAGE_PROTECTION_WRITECOMBINE      (1)
  204. #define MDP_FB_PAGE_PROTECTION_WRITETHROUGHCACHE (2)
  205. #define MDP_FB_PAGE_PROTECTION_WRITEBACKCACHE    (3)
  206. #define MDP_FB_PAGE_PROTECTION_WRITEBACKWACACHE  (4)
  207. /* Sentinel: Don't use! */
  208. #define MDP_FB_PAGE_PROTECTION_INVALID           (5)
  209. /* Count of the number of MDP_FB_PAGE_PROTECTION_... values. */
  210. #define MDP_NUM_FB_PAGE_PROTECTION_VALUES        (5)
  211.  
  212. struct mdp_rect {
  213.     uint32_t x;
  214.     uint32_t y;
  215.     uint32_t w;
  216.     uint32_t h;
  217. };
  218.  
  219. struct mdp_img {
  220.     uint32_t width;
  221.     uint32_t height;
  222.     uint32_t format;
  223.     uint32_t offset;
  224.     int memory_id;      /* the file descriptor */
  225.     uint32_t priv;
  226. };
  227.  
  228. /*
  229.  * {3x3} + {3} ccs matrix
  230.  */
  231.  
  232. #define MDP_CCS_RGB2YUV     0
  233. #define MDP_CCS_YUV2RGB     1
  234.  
  235. #define MDP_CCS_SIZE    9
  236. #define MDP_BV_SIZE 3
  237.  
  238. struct mdp_ccs {
  239.     int direction;          /* MDP_CCS_RGB2YUV or YUV2RGB */
  240.     uint16_t ccs[MDP_CCS_SIZE]; /* 3x3 color coefficients */
  241.     uint16_t bv[MDP_BV_SIZE];   /* 1x3 bias vector */
  242. };
  243.  
  244. struct mdp_csc {
  245.     int id;
  246.     uint32_t csc_mv[9];
  247.     uint32_t csc_pre_bv[3];
  248.     uint32_t csc_post_bv[3];
  249.     uint32_t csc_pre_lv[6];
  250.     uint32_t csc_post_lv[6];
  251. };
  252.  
  253. /* The version of the mdp_blit_req structure so that
  254.  * user applications can selectively decide which functionality
  255.  * to include
  256.  */
  257.  
  258. #define MDP_BLIT_REQ_VERSION 2
  259.  
  260. struct color {
  261.     uint32_t r;
  262.     uint32_t g;
  263.     uint32_t b;
  264.     uint32_t alpha;
  265. };
  266.  
  267. struct mdp_blit_req {
  268.     struct mdp_img src;
  269.     struct mdp_img dst;
  270.     struct mdp_rect src_rect;
  271.     struct mdp_rect dst_rect;
  272.     struct color const_color;
  273.     uint32_t alpha;
  274.     uint32_t transp_mask;
  275.     uint32_t flags;
  276.     int sharpening_strength;  /* -127 <--> 127, default 64 */
  277. };
  278.  
  279. struct mdp_blit_req_list {
  280.     uint32_t count;
  281.     struct mdp_blit_req req[];
  282. };
  283.  
  284. #define MSMFB_DATA_VERSION 2
  285.  
  286. struct msmfb_data {
  287.     uint32_t offset;
  288.     int memory_id;
  289.     int id;
  290.     uint32_t flags;
  291.     uint32_t priv;
  292.     uint32_t iova;
  293. };
  294.  
  295. #define MSMFB_NEW_REQUEST -1
  296.  
  297. struct msmfb_overlay_data {
  298.     uint32_t id;
  299.     struct msmfb_data data;
  300.     uint32_t version_key;
  301.     struct msmfb_data plane1_data;
  302.     struct msmfb_data plane2_data;
  303.     struct msmfb_data dst_data;
  304. };
  305.  
  306. struct msmfb_img {
  307.     uint32_t width;
  308.     uint32_t height;
  309.     uint32_t format;
  310. };
  311.  
  312. #define MSMFB_WRITEBACK_DEQUEUE_BLOCKING 0x1
  313. struct msmfb_writeback_data {
  314.     struct msmfb_data buf_info;
  315.     struct msmfb_img img;
  316. };
  317.  
  318. #define MDP_PP_OPS_ENABLE 0x1
  319. #define MDP_PP_OPS_READ 0x2
  320. #define MDP_PP_OPS_WRITE 0x4
  321. #define MDP_PP_OPS_DISABLE 0x8
  322. #define MDP_PP_IGC_FLAG_ROM0    0x10
  323. #define MDP_PP_IGC_FLAG_ROM1    0x20
  324.  
  325. #define MDP_PP_PA_HUE_ENABLE        0x10
  326. #define MDP_PP_PA_SAT_ENABLE        0x20
  327. #define MDP_PP_PA_VAL_ENABLE        0x40
  328. #define MDP_PP_PA_CONT_ENABLE       0x80
  329. #define MDP_PP_PA_SIX_ZONE_ENABLE   0x100
  330. #define MDP_PP_PA_SKIN_ENABLE       0x200
  331. #define MDP_PP_PA_SKY_ENABLE        0x400
  332. #define MDP_PP_PA_FOL_ENABLE        0x800
  333. #define MDP_PP_PA_HUE_MASK      0x1000
  334. #define MDP_PP_PA_SAT_MASK      0x2000
  335. #define MDP_PP_PA_VAL_MASK      0x4000
  336. #define MDP_PP_PA_CONT_MASK     0x8000
  337. #define MDP_PP_PA_SIX_ZONE_HUE_MASK 0x10000
  338. #define MDP_PP_PA_SIX_ZONE_SAT_MASK 0x20000
  339. #define MDP_PP_PA_SIX_ZONE_VAL_MASK 0x40000
  340. #define MDP_PP_PA_MEM_COL_SKIN_MASK 0x80000
  341. #define MDP_PP_PA_MEM_COL_SKY_MASK  0x100000
  342. #define MDP_PP_PA_MEM_COL_FOL_MASK  0x200000
  343. #define MDP_PP_PA_MEM_PROTECT_EN    0x400000
  344. #define MDP_PP_PA_SAT_ZERO_EXP_EN   0x800000
  345.  
  346. #define MDSS_PP_DSPP_CFG    0x000
  347. #define MDSS_PP_SSPP_CFG    0x100
  348. #define MDSS_PP_LM_CFG  0x200
  349. #define MDSS_PP_WB_CFG  0x300
  350.  
  351. #define MDSS_PP_ARG_MASK    0x3C00
  352. #define MDSS_PP_ARG_NUM     4
  353. #define MDSS_PP_ARG_SHIFT   10
  354. #define MDSS_PP_LOCATION_MASK   0x0300
  355. #define MDSS_PP_LOGICAL_MASK    0x00FF
  356.  
  357. #define MDSS_PP_ADD_ARG(var, arg) ((var) | (0x1 << (MDSS_PP_ARG_SHIFT + (arg))))
  358. #define PP_ARG(x, var) ((var) & (0x1 << (MDSS_PP_ARG_SHIFT + (x))))
  359. #define PP_LOCAT(var) ((var) & MDSS_PP_LOCATION_MASK)
  360. #define PP_BLOCK(var) ((var) & MDSS_PP_LOGICAL_MASK)
  361.  
  362.  
  363. struct mdp_qseed_cfg {
  364.     uint32_t table_num;
  365.     uint32_t ops;
  366.     uint32_t len;
  367.     uint32_t *data;
  368. };
  369.  
  370. struct mdp_sharp_cfg {
  371.     uint32_t flags;
  372.     uint32_t strength;
  373.     uint32_t edge_thr;
  374.     uint32_t smooth_thr;
  375.     uint32_t noise_thr;
  376. };
  377.  
  378. struct mdp_qseed_cfg_data {
  379.     uint32_t block;
  380.     struct mdp_qseed_cfg qseed_data;
  381. };
  382.  
  383. #define MDP_OVERLAY_PP_CSC_CFG         0x1
  384. #define MDP_OVERLAY_PP_QSEED_CFG       0x2
  385. #define MDP_OVERLAY_PP_PA_CFG          0x4
  386. #define MDP_OVERLAY_PP_IGC_CFG         0x8
  387. #define MDP_OVERLAY_PP_SHARP_CFG       0x10
  388. #define MDP_OVERLAY_PP_HIST_CFG        0x20
  389. #define MDP_OVERLAY_PP_HIST_LUT_CFG    0x40
  390. #define MDP_OVERLAY_PP_PA_V2_CFG       0x80
  391.  
  392. #define MDP_CSC_FLAG_ENABLE 0x1
  393. #define MDP_CSC_FLAG_YUV_IN 0x2
  394. #define MDP_CSC_FLAG_YUV_OUT    0x4
  395.  
  396. struct mdp_csc_cfg {
  397.     /* flags for enable CSC, toggling RGB,YUV input/output */
  398.     uint32_t flags;
  399.     uint32_t csc_mv[9];
  400.     uint32_t csc_pre_bv[3];
  401.     uint32_t csc_post_bv[3];
  402.     uint32_t csc_pre_lv[6];
  403.     uint32_t csc_post_lv[6];
  404. };
  405.  
  406. struct mdp_csc_cfg_data {
  407.     uint32_t block;
  408.     struct mdp_csc_cfg csc_data;
  409. };
  410.  
  411. struct mdp_pa_cfg {
  412.     uint32_t flags;
  413.     uint32_t hue_adj;
  414.     uint32_t sat_adj;
  415.     uint32_t val_adj;
  416.     uint32_t cont_adj;
  417. };
  418.  
  419. struct mdp_pa_mem_col_cfg {
  420.     uint32_t color_adjust_p0;
  421.     uint32_t color_adjust_p1;
  422.     uint32_t hue_region;
  423.     uint32_t sat_region;
  424.     uint32_t val_region;
  425. };
  426.  
  427. #define MDP_SIX_ZONE_LUT_SIZE       384
  428.  
  429. struct mdp_pa_v2_data {
  430.     /* Mask bits for PA features */
  431.     uint32_t flags;
  432.     uint32_t global_hue_adj;
  433.     uint32_t global_sat_adj;
  434.     uint32_t global_val_adj;
  435.     uint32_t global_cont_adj;
  436.     struct mdp_pa_mem_col_cfg skin_cfg;
  437.     struct mdp_pa_mem_col_cfg sky_cfg;
  438.     struct mdp_pa_mem_col_cfg fol_cfg;
  439.     uint32_t six_zone_len;
  440.     uint32_t six_zone_thresh;
  441.     uint32_t *six_zone_curve_p0;
  442.     uint32_t *six_zone_curve_p1;
  443. };
  444.  
  445. struct mdp_igc_lut_data {
  446.     uint32_t block;
  447.     uint32_t len, ops;
  448.     uint32_t *c0_c1_data;
  449.     uint32_t *c2_data;
  450. };
  451.  
  452. struct mdp_histogram_cfg {
  453.     uint32_t ops;
  454.     uint32_t block;
  455.     uint8_t frame_cnt;
  456.     uint8_t bit_mask;
  457.     uint16_t num_bins;
  458. };
  459.  
  460. struct mdp_hist_lut_data {
  461.     uint32_t block;
  462.     uint32_t ops;
  463.     uint32_t len;
  464.     uint32_t *data;
  465. };
  466.  
  467. struct mdp_overlay_pp_params {
  468.     uint32_t config_ops;
  469.     struct mdp_csc_cfg csc_cfg;
  470.     struct mdp_qseed_cfg qseed_cfg[2];
  471.     struct mdp_pa_cfg pa_cfg;
  472.     struct mdp_pa_v2_data pa_v2_cfg;
  473.     struct mdp_igc_lut_data igc_cfg;
  474.     struct mdp_sharp_cfg sharp_cfg;
  475.     struct mdp_histogram_cfg hist_cfg;
  476.     struct mdp_hist_lut_data hist_lut_cfg;
  477. };
  478.  
  479. /**
  480.  * enum mdss_mdp_blend_op - Different blend operations set by userspace
  481.  *
  482.  * @BLEND_OP_NOT_DEFINED:    No blend operation defined for the layer.
  483.  * @BLEND_OP_OPAQUE:         Apply a constant blend operation. The layer
  484.  *                           would appear opaque in case fg plane alpha is
  485.  *                           0xff.
  486.  * @BLEND_OP_PREMULTIPLIED:  Apply source over blend rule. Layer already has
  487.  *                           alpha pre-multiplication done. If fg plane alpha
  488.  *                           is less than 0xff, apply modulation as well. This
  489.  *                           operation is intended on layers having alpha
  490.  *                           channel.
  491.  * @BLEND_OP_COVERAGE:       Apply source over blend rule. Layer is not alpha
  492.  *                           pre-multiplied. Apply pre-multiplication. If fg
  493.  *                           plane alpha is less than 0xff, apply modulation as
  494.  *                           well.
  495.  * @BLEND_OP_MAX:            Used to track maximum blend operation possible by
  496.  *                           mdp.
  497.  */
  498. enum mdss_mdp_blend_op {
  499.     BLEND_OP_NOT_DEFINED = 0,
  500.     BLEND_OP_OPAQUE,
  501.     BLEND_OP_PREMULTIPLIED,
  502.     BLEND_OP_COVERAGE,
  503.     BLEND_OP_MAX,
  504. };
  505.  
  506. #define MAX_PLANES  4
  507. struct mdp_scale_data {
  508.     uint8_t enable_pxl_ext;
  509.  
  510.     int init_phase_x[MAX_PLANES];
  511.     int phase_step_x[MAX_PLANES];
  512.     int init_phase_y[MAX_PLANES];
  513.     int phase_step_y[MAX_PLANES];
  514.  
  515.     int num_ext_pxls_left[MAX_PLANES];
  516.     int num_ext_pxls_right[MAX_PLANES];
  517.     int num_ext_pxls_top[MAX_PLANES];
  518.     int num_ext_pxls_btm[MAX_PLANES];
  519.  
  520.     int left_ftch[MAX_PLANES];
  521.     int left_rpt[MAX_PLANES];
  522.     int right_ftch[MAX_PLANES];
  523.     int right_rpt[MAX_PLANES];
  524.  
  525.     int top_rpt[MAX_PLANES];
  526.     int btm_rpt[MAX_PLANES];
  527.     int top_ftch[MAX_PLANES];
  528.     int btm_ftch[MAX_PLANES];
  529.  
  530.     uint32_t roi_w[MAX_PLANES];
  531. };
  532.  
  533. /**
  534.  * struct mdp_overlay - overlay surface structure
  535.  * @src:    Source image information (width, height, format).
  536.  * @src_rect:   Source crop rectangle, portion of image that will be fetched.
  537.  *      This should always be within boundaries of source image.
  538.  * @dst_rect:   Destination rectangle, the position and size of image on screen.
  539.  *      This should always be within panel boundaries.
  540.  * @z_order:    Blending stage to occupy in display, if multiple layers are
  541.  *      present, highest z_order usually means the top most visible
  542.  *      layer. The range acceptable is from 0-3 to support blending
  543.  *      up to 4 layers.
  544.  * @is_fg:  This flag is used to disable blending of any layers with z_order
  545.  *      less than this overlay. It means that any layers with z_order
  546.  *      less than this layer will not be blended and will be replaced
  547.  *      by the background border color.
  548.  * @alpha:  Used to set plane opacity. The range can be from 0-255, where
  549.  *      0 means completely transparent and 255 means fully opaque.
  550.  * @transp_mask: Color used as color key for transparency. Any pixel in fetched
  551.  *      image matching this color will be transparent when blending.
  552.  *      The color should be in same format as the source image format.
  553.  * @flags:  This is used to customize operation of overlay. See MDP flags
  554.  *      for more information.
  555.  * @user_data:  DEPRECATED* Used to store user application specific information.
  556.  * @bg_color:   Solid color used to fill the overlay surface when no source
  557.  *      buffer is provided.
  558.  * @horz_deci:  Horizontal decimation value, this indicates the amount of pixels
  559.  *      dropped for each pixel that is fetched from a line. The value
  560.  *      given should be power of two of decimation amount.
  561.  *      0: no decimation
  562.  *      1: decimate by 2 (drop 1 pixel for each pixel fetched)
  563.  *      2: decimate by 4 (drop 3 pixels for each pixel fetched)
  564.  *      3: decimate by 8 (drop 7 pixels for each pixel fetched)
  565.  *      4: decimate by 16 (drop 15 pixels for each pixel fetched)
  566.  * @vert_deci:  Vertical decimation value, this indicates the amount of lines
  567.  *      dropped for each line that is fetched from overlay. The value
  568.  *      given should be power of two of decimation amount.
  569.  *      0: no decimation
  570.  *      1: decimation by 2 (drop 1 line for each line fetched)
  571.  *      2: decimation by 4 (drop 3 lines for each line fetched)
  572.  *      3: decimation by 8 (drop 7 lines for each line fetched)
  573.  *      4: decimation by 16 (drop 15 lines for each line fetched)
  574.  * @overlay_pp_cfg: Overlay post processing configuration, for more information
  575.  *      see struct mdp_overlay_pp_params.
  576.  */
  577. struct mdp_overlay {
  578.     struct msmfb_img src;
  579.     struct mdp_rect src_rect;
  580.     struct mdp_rect dst_rect;
  581.     uint32_t z_order;   /* stage number */
  582.     uint32_t is_fg;     /* control alpha & transp */
  583.     uint32_t alpha;
  584.     uint32_t blend_op;
  585.     uint32_t transp_mask;
  586.     uint32_t flags;
  587.     uint32_t id;
  588.     uint32_t user_data[6];
  589.     uint32_t bg_color;
  590.     uint8_t horz_deci;
  591.     uint8_t vert_deci;
  592.     struct mdp_overlay_pp_params overlay_pp_cfg;
  593.     struct mdp_scale_data scale;
  594. };
  595.  
  596. struct msmfb_overlay_3d {
  597.     uint32_t is_3d;
  598.     uint32_t width;
  599.     uint32_t height;
  600. };
  601.  
  602.  
  603. struct msmfb_overlay_blt {
  604.     uint32_t enable;
  605.     uint32_t offset;
  606.     uint32_t width;
  607.     uint32_t height;
  608.     uint32_t bpp;
  609. };
  610.  
  611. struct mdp_histogram {
  612.     uint32_t frame_cnt;
  613.     uint32_t bin_cnt;
  614.     uint32_t *r;
  615.     uint32_t *g;
  616.     uint32_t *b;
  617. };
  618.  
  619. #define MISR_CRC_BATCH_SIZE 32
  620. enum {
  621.     DISPLAY_MISR_EDP = 0,
  622.     DISPLAY_MISR_DSI0,
  623.     DISPLAY_MISR_DSI1,
  624.     DISPLAY_MISR_HDMI,
  625.     DISPLAY_MISR_LCDC,
  626.     DISPLAY_MISR_MDP,
  627.     DISPLAY_MISR_ATV,
  628.     DISPLAY_MISR_DSI_CMD,
  629.     DISPLAY_MISR_MAX
  630. };
  631.  
  632. enum {
  633.     MISR_OP_NONE = 0,
  634.     MISR_OP_SFM,
  635.     MISR_OP_MFM,
  636.     MISR_OP_BM,
  637.     MISR_OP_MAX
  638. };
  639.  
  640. struct mdp_misr {
  641.     uint32_t block_id;
  642.     uint32_t frame_count;
  643.     uint32_t crc_op_mode;
  644.     uint32_t crc_value[MISR_CRC_BATCH_SIZE];
  645. };
  646.  
  647. /*
  648.  
  649.     mdp_block_type defines the identifiers for pipes in MDP 4.3 and up
  650.  
  651.     MDP_BLOCK_RESERVED is provided for backward compatibility and is
  652.     deprecated. It corresponds to DMA_P. So MDP_BLOCK_DMA_P should be used
  653.     instead.
  654.  
  655.     MDP_LOGICAL_BLOCK_DISP_0 identifies the display pipe which fb0 uses,
  656.     same for others.
  657.  
  658. */
  659.  
  660. enum {
  661.     MDP_BLOCK_RESERVED = 0,
  662.     MDP_BLOCK_OVERLAY_0,
  663.     MDP_BLOCK_OVERLAY_1,
  664.     MDP_BLOCK_VG_1,
  665.     MDP_BLOCK_VG_2,
  666.     MDP_BLOCK_RGB_1,
  667.     MDP_BLOCK_RGB_2,
  668.     MDP_BLOCK_DMA_P,
  669.     MDP_BLOCK_DMA_S,
  670.     MDP_BLOCK_DMA_E,
  671.     MDP_BLOCK_OVERLAY_2,
  672.     MDP_LOGICAL_BLOCK_DISP_0 = 0x10,
  673.     MDP_LOGICAL_BLOCK_DISP_1,
  674.     MDP_LOGICAL_BLOCK_DISP_2,
  675.     MDP_BLOCK_MAX,
  676. };
  677.  
  678. /*
  679.  * mdp_histogram_start_req is used to provide the parameters for
  680.  * histogram start request
  681.  */
  682.  
  683. struct mdp_histogram_start_req {
  684.     uint32_t block;
  685.     uint8_t frame_cnt;
  686.     uint8_t bit_mask;
  687.     uint16_t num_bins;
  688. };
  689.  
  690. /*
  691.  * mdp_histogram_data is used to return the histogram data, once
  692.  * the histogram is done/stopped/cance
  693.  */
  694.  
  695. struct mdp_histogram_data {
  696.     uint32_t block;
  697.     uint32_t bin_cnt;
  698.     uint32_t *c0;
  699.     uint32_t *c1;
  700.     uint32_t *c2;
  701.     uint32_t *extra_info;
  702. };
  703.  
  704. struct mdp_pcc_coeff {
  705.     uint32_t c, r, g, b, rr, gg, bb, rg, gb, rb, rgb_0, rgb_1;
  706. };
  707.  
  708. struct mdp_pcc_cfg_data {
  709.     uint32_t block;
  710.     uint32_t ops;
  711.     struct mdp_pcc_coeff r, g, b;
  712. };
  713.  
  714. #define MDP_GAMUT_TABLE_NUM     8
  715.  
  716. enum {
  717.     mdp_lut_igc,
  718.     mdp_lut_pgc,
  719.     mdp_lut_hist,
  720.     mdp_lut_max,
  721. };
  722.  
  723. struct mdp_ar_gc_lut_data {
  724.     uint32_t x_start;
  725.     uint32_t slope;
  726.     uint32_t offset;
  727. };
  728.  
  729. struct mdp_pgc_lut_data {
  730.     uint32_t block;
  731.     uint32_t flags;
  732.     uint8_t num_r_stages;
  733.     uint8_t num_g_stages;
  734.     uint8_t num_b_stages;
  735.     struct mdp_ar_gc_lut_data *r_data;
  736.     struct mdp_ar_gc_lut_data *g_data;
  737.     struct mdp_ar_gc_lut_data *b_data;
  738. };
  739.  
  740.  
  741. struct mdp_lut_cfg_data {
  742.     uint32_t lut_type;
  743.     union {
  744.         struct mdp_igc_lut_data igc_lut_data;
  745.         struct mdp_pgc_lut_data pgc_lut_data;
  746.         struct mdp_hist_lut_data hist_lut_data;
  747.     } data;
  748. };
  749.  
  750. struct mdp_bl_scale_data {
  751.     uint32_t min_lvl;
  752.     uint32_t scale;
  753. };
  754.  
  755. struct mdp_pa_cfg_data {
  756.     uint32_t block;
  757.     struct mdp_pa_cfg pa_data;
  758. };
  759.  
  760. struct mdp_pa_v2_cfg_data {
  761.     uint32_t block;
  762.     struct mdp_pa_v2_data pa_v2_data;
  763. };
  764.  
  765. struct mdp_dither_cfg_data {
  766.     uint32_t block;
  767.     uint32_t flags;
  768.     uint32_t g_y_depth;
  769.     uint32_t r_cr_depth;
  770.     uint32_t b_cb_depth;
  771. };
  772.  
  773. struct mdp_gamut_cfg_data {
  774.     uint32_t block;
  775.     uint32_t flags;
  776.     uint32_t gamut_first;
  777.     uint32_t tbl_size[MDP_GAMUT_TABLE_NUM];
  778.     uint16_t *r_tbl[MDP_GAMUT_TABLE_NUM];
  779.     uint16_t *g_tbl[MDP_GAMUT_TABLE_NUM];
  780.     uint16_t *b_tbl[MDP_GAMUT_TABLE_NUM];
  781. };
  782.  
  783. struct mdp_calib_config_data {
  784.     uint32_t ops;
  785.     uint32_t addr;
  786.     uint32_t data;
  787. };
  788.  
  789. struct mdp_calib_config_buffer {
  790.     uint32_t ops;
  791.     uint32_t size;
  792.     uint32_t *buffer;
  793. };
  794.  
  795. struct mdp_calib_dcm_state {
  796.     uint32_t ops;
  797.     uint32_t dcm_state;
  798. };
  799.  
  800. enum {
  801.     DCM_UNINIT,
  802.     DCM_UNBLANK,
  803.     DCM_ENTER,
  804.     DCM_EXIT,
  805.     DCM_BLANK,
  806.     DTM_ENTER,
  807.     DTM_EXIT,
  808. };
  809.  
  810. #define MDSS_PP_SPLIT_LEFT_ONLY     0x10000000
  811. #define MDSS_PP_SPLIT_RIGHT_ONLY    0x20000000
  812. #define MDSS_PP_SPLIT_MASK      0x30000000
  813.  
  814. #define MDSS_MAX_BL_BRIGHTNESS 255
  815. #define AD_BL_LIN_LEN 256
  816.  
  817. #define MDSS_AD_MODE_AUTO_BL    0x0
  818. #define MDSS_AD_MODE_AUTO_STR   0x1
  819. #define MDSS_AD_MODE_TARG_STR   0x3
  820. #define MDSS_AD_MODE_MAN_STR    0x7
  821. #define MDSS_AD_MODE_CALIB  0xF
  822.  
  823. #define MDP_PP_AD_INIT  0x10
  824. #define MDP_PP_AD_CFG   0x20
  825.  
  826. struct mdss_ad_init {
  827.     uint32_t asym_lut[33];
  828.     uint32_t color_corr_lut[33];
  829.     uint8_t i_control[2];
  830.     uint16_t black_lvl;
  831.     uint16_t white_lvl;
  832.     uint8_t var;
  833.     uint8_t limit_ampl;
  834.     uint8_t i_dither;
  835.     uint8_t slope_max;
  836.     uint8_t slope_min;
  837.     uint8_t dither_ctl;
  838.     uint8_t format;
  839.     uint8_t auto_size;
  840.     uint16_t frame_w;
  841.     uint16_t frame_h;
  842.     uint8_t logo_v;
  843.     uint8_t logo_h;
  844.     uint32_t bl_lin_len;
  845.     uint32_t *bl_lin;
  846.     uint32_t *bl_lin_inv;
  847. };
  848.  
  849. #define MDSS_AD_BL_CTRL_MODE_EN 1
  850. #define MDSS_AD_BL_CTRL_MODE_DIS 0
  851. struct mdss_ad_cfg {
  852.     uint32_t mode;
  853.     uint32_t al_calib_lut[33];
  854.     uint16_t backlight_min;
  855.     uint16_t backlight_max;
  856.     uint16_t backlight_scale;
  857.     uint16_t amb_light_min;
  858.     uint16_t filter[2];
  859.     uint16_t calib[4];
  860.     uint8_t strength_limit;
  861.     uint8_t t_filter_recursion;
  862.     uint16_t stab_itr;
  863.     uint32_t bl_ctrl_mode;
  864. };
  865.  
  866. /* ops uses standard MDP_PP_* flags */
  867. struct mdss_ad_init_cfg {
  868.     uint32_t ops;
  869.     union {
  870.         struct mdss_ad_init init;
  871.         struct mdss_ad_cfg cfg;
  872.     } params;
  873. };
  874.  
  875. /* mode uses MDSS_AD_MODE_* flags */
  876. struct mdss_ad_input {
  877.     uint32_t mode;
  878.     union {
  879.         uint32_t amb_light;
  880.         uint32_t strength;
  881.         uint32_t calib_bl;
  882.     } in;
  883.     uint32_t output;
  884. };
  885.  
  886. #define MDSS_CALIB_MODE_BL  0x1
  887. struct mdss_calib_cfg {
  888.     uint32_t ops;
  889.     uint32_t calib_mask;
  890. };
  891.  
  892. enum {
  893.     mdp_op_pcc_cfg,
  894.     mdp_op_csc_cfg,
  895.     mdp_op_lut_cfg,
  896.     mdp_op_qseed_cfg,
  897.     mdp_bl_scale_cfg,
  898.     mdp_op_pa_cfg,
  899.     mdp_op_pa_v2_cfg,
  900.     mdp_op_dither_cfg,
  901.     mdp_op_gamut_cfg,
  902.     mdp_op_calib_cfg,
  903.     mdp_op_ad_cfg,
  904.     mdp_op_ad_input,
  905.     mdp_op_calib_mode,
  906.     mdp_op_calib_buffer,
  907.     mdp_op_calib_dcm_state,
  908.     mdp_op_max,
  909. };
  910.  
  911. enum {
  912.     WB_FORMAT_NV12,
  913.     WB_FORMAT_RGB_565,
  914.     WB_FORMAT_RGB_888,
  915.     WB_FORMAT_xRGB_8888,
  916.     WB_FORMAT_ARGB_8888,
  917.     WB_FORMAT_BGRA_8888,
  918.     WB_FORMAT_BGRX_8888,
  919.     WB_FORMAT_ARGB_8888_INPUT_ALPHA /* Need to support */
  920. };
  921.  
  922. struct msmfb_mdp_pp {
  923.     uint32_t op;
  924.     union {
  925.         struct mdp_pcc_cfg_data pcc_cfg_data;
  926.         struct mdp_csc_cfg_data csc_cfg_data;
  927.         struct mdp_lut_cfg_data lut_cfg_data;
  928.         struct mdp_qseed_cfg_data qseed_cfg_data;
  929.         struct mdp_bl_scale_data bl_scale_data;
  930.         struct mdp_pa_cfg_data pa_cfg_data;
  931.         struct mdp_pa_v2_cfg_data pa_v2_cfg_data;
  932.         struct mdp_dither_cfg_data dither_cfg_data;
  933.         struct mdp_gamut_cfg_data gamut_cfg_data;
  934.         struct mdp_calib_config_data calib_cfg;
  935.         struct mdss_ad_init_cfg ad_init_cfg;
  936.         struct mdss_calib_cfg mdss_calib_cfg;
  937.         struct mdss_ad_input ad_input;
  938.         struct mdp_calib_config_buffer calib_buffer;
  939.         struct mdp_calib_dcm_state calib_dcm;
  940.     } data;
  941. };
  942.  
  943. #define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1
  944. enum {
  945.     metadata_op_none,
  946.     metadata_op_base_blend,
  947.     metadata_op_frame_rate,
  948.     metadata_op_vic,
  949.     metadata_op_wb_format,
  950.     metadata_op_wb_secure,
  951.     metadata_op_get_caps,
  952.     metadata_op_crc,
  953.     metadata_op_max
  954. };
  955.  
  956. struct mdp_blend_cfg {
  957.     uint32_t is_premultiplied;
  958. };
  959.  
  960. struct mdp_mixer_cfg {
  961.     uint32_t writeback_format;
  962.     uint32_t alpha;
  963. };
  964.  
  965. struct mdss_hw_caps {
  966.     uint32_t mdp_rev;
  967.     uint8_t rgb_pipes;
  968.     uint8_t vig_pipes;
  969.     uint8_t dma_pipes;
  970.     uint32_t features;
  971. };
  972.  
  973. struct msmfb_metadata {
  974.     uint32_t op;
  975.     uint32_t flags;
  976.     union {
  977.         struct mdp_misr misr_request;
  978.         struct mdp_blend_cfg blend_cfg;
  979.         struct mdp_mixer_cfg mixer_cfg;
  980.         uint32_t panel_frame_rate;
  981.         uint32_t video_info_code;
  982.         struct mdss_hw_caps caps;
  983.         uint8_t secure_en;
  984.     } data;
  985. };
  986.  
  987. #define MDP_MAX_FENCE_FD    32
  988. #define MDP_BUF_SYNC_FLAG_WAIT  1
  989. #define MDP_BUF_SYNC_FLAG_RETIRE_FENCE  0x10
  990.  
  991. struct mdp_buf_sync {
  992.     uint32_t flags;
  993.     uint32_t acq_fen_fd_cnt;
  994.     uint32_t session_id;
  995.     int *acq_fen_fd;
  996.     int *rel_fen_fd;
  997.     int *retire_fen_fd;
  998. };
  999.  
  1000. struct mdp_async_blit_req_list {
  1001.     struct mdp_buf_sync sync;
  1002.     uint32_t count;
  1003.     struct mdp_blit_req req[];
  1004. };
  1005.  
  1006. #define MDP_DISPLAY_COMMIT_OVERLAY  1
  1007.  
  1008. struct mdp_display_commit {
  1009.     uint32_t flags;
  1010.     uint32_t wait_for_finish;
  1011.     struct fb_var_screeninfo var;
  1012.     struct mdp_rect roi;
  1013. };
  1014.  
  1015. struct mdp_page_protection {
  1016.     uint32_t page_protection;
  1017. };
  1018.  
  1019.  
  1020. struct mdp_mixer_info {
  1021.     int pndx;
  1022.     int pnum;
  1023.     int ptype;
  1024.     int mixer_num;
  1025.     int z_order;
  1026. };
  1027.  
  1028. #define MAX_PIPE_PER_MIXER  4
  1029.  
  1030. struct msmfb_mixer_info_req {
  1031.     int mixer_num;
  1032.     int cnt;
  1033.     struct mdp_mixer_info info[MAX_PIPE_PER_MIXER];
  1034. };
  1035.  
  1036. struct msmfb_reg_access {
  1037.     uint8_t address;
  1038.     uint8_t use_hs_mode;
  1039.     size_t buffer_size;
  1040.     void __user *buffer;
  1041. };
  1042.  
  1043. enum {
  1044.     DISPLAY_SUBSYSTEM_ID,
  1045.     ROTATOR_SUBSYSTEM_ID,
  1046. };
  1047.  
  1048. enum {
  1049.     MDP_IOMMU_DOMAIN_CP,
  1050.     MDP_IOMMU_DOMAIN_NS,
  1051. };
  1052.  
  1053. enum {
  1054.     MDP_WRITEBACK_MIRROR_OFF,
  1055.     MDP_WRITEBACK_MIRROR_ON,
  1056.     MDP_WRITEBACK_MIRROR_PAUSE,
  1057.     MDP_WRITEBACK_MIRROR_RESUME,
  1058. };
  1059.  
  1060. #ifdef __KERNEL__
  1061. int msm_fb_get_iommu_domain(struct fb_info *info, int domain);
  1062. /* get the framebuffer physical address information */
  1063. int get_fb_phys_info(unsigned long *start, unsigned long *len, int fb_num,
  1064.     int subsys_id);
  1065. struct fb_info *msm_fb_get_writeback_fb(void);
  1066. int msm_fb_writeback_init(struct fb_info *info);
  1067. int msm_fb_writeback_start(struct fb_info *info);
  1068. int msm_fb_writeback_queue_buffer(struct fb_info *info,
  1069.         struct msmfb_data *data);
  1070. int msm_fb_writeback_dequeue_buffer(struct fb_info *info,
  1071.         struct msmfb_data *data);
  1072. int msm_fb_writeback_stop(struct fb_info *info);
  1073. int msm_fb_writeback_terminate(struct fb_info *info);
  1074. int msm_fb_writeback_set_secure(struct fb_info *info, int enable);
  1075. int msm_fb_writeback_iommu_ref(struct fb_info *info, int enable);
  1076. #endif
  1077.  
  1078. #endif /*_MSM_MDP_H_*/
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