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- module priority (W, Y ,Z);
- input [3:0] W;
- output reg [1:0]Y;
- output reg Z;
- integer k;
- always @ (W)
- begin
- Y = 2'bx;
- Z = 0;
- for (k = 0 ; k < 4 ; k = k+1)
- if(W[k])
- begin
- Y = k;
- Z = 1;
- end
- end
- endmodule
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