-- isqroot_seq
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity isqroot_seq is
	generic (
		NBITS : positive := 8
	);
	port (
		res_in : IN unsigned(NBITS - 1 downto 0);
		rup : IN std_logic;
		clk : IN std_logic;
		rst : IN std_logic;
		res_out : OUT unsigned(NBITS - 1 downto 0)
	);
end entity isqroot_seq;

architecture seq_arch of isqroot_seq is
	type states is (IDLE, INIT, COMPUTE, ROUNDUP);
	constant rst_state : states := IDLE;
	signal state_reg, state_next : states;
begin



	REG : process( clk,rst )
	begin
		if rst = '1' then
			state_reg  <= rst_state;
		elsif rising_edge(clk) then
			state_reg <= state_next;
		end if;
	end process ; -- REG



	Next_state : process( state_reg, res_in, start, delta )	-- clk ?
	begin
		state_next <= state_reg;
		case (state_reg) is
			when IDLE =>
							if start = '0' then
								state_next <= IDLE;
							elsif start= '1' then
								state_next <= INIT;
							end if;
			when INIT => state_next <= COMPUTE;
			when COMPUTE =>
							if delta >= '1' then
								state_next <= COMPUTE;
							else
								state_next <= ROUNDUP;
							end if;
			when ROUNDUP => state_next <= IDLE;
			when others => null;
		end case;
	end process ; -- Next_state



	MULTIPLIER : process( state_reg ) -- clk ?
		variable: delta_var, iroot_var, res_var: unsigned(NBITS-1 downto 0);
	begin
		delta_var := (others => '0');
		iroot_var := (others => '0');
		res_var := (others => '0');
		case (state_reg) is
			when IDLE => null;
			when INIT =>
				delta_var := shift_left( '1' , NBITS/2-1 );
				iroot_var := (others => '0');
				res_var := res_in;
			when COMPUTE =>
				if (iroot_var + delta_var) >= res_var then
				 	res_var := res_var - (iroot_var + delta_var);
				 	iroot_var := iroot_var + shift_left(delta_var,1);
				end if;
				iroot_var := shift_right(iroot_var,1);
				delta_var := shift_right(delta_var,2);
			when ROUNDUP =>
				if (rup AND res_var >= iroot_var) then
					iroot_var := iroot_var + 1;
				end if;
			when others => null;
		end case;
	end process ; -- MULTIPLIER

end architecture seq_arch;