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- &csi1 {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&csi1_pins>;
- port {
- /* Parallel bus endpoint */
- csi1_ep: endpoint {
- remote-endpoint = <&ov7670_0>;
- bus-width = <8>;
- If hsync-active/vsync-active are missing,
- embedded BT.656 sync is used */
- hsync-active = <0>; /* Active low */
- vsync-active = <0>; /* Active low */
- data-active = <1>; /* Active high */
- pclk-sample = <1>; /* Rising */
- };
- };
- };
- &i2c1 {
- pinctrl-0 = <&i2c1_pins>;
- pinctrl-names = "default";
- status = "okay";
- ov7670: camera@21 {
- compatible = "ovti,ov7670";
- reg = <0x21>;
- pinctrl-names = "default";
- pinctrl-0 = <&csi1_mclk>;
- clocks = <&ccu CLK_CSI1_MCLK>;
- clock-names = "xclk";
- assigned-clock-rates = <24000000>;
- port {
- ov7670_0: endpoint {
- remote-endpoint = <&csi1_ep>;
- /* If hsync-active/vsync-active are missing,
- embedded BT.656 sync is used */
- hsync-active = <0>; /* Active low */
- vsync-active = <0>; /* Active low */
- data-active = <1>; /* Active high */
- pclk-sample = <1>; /* Rising */
- };
- };
- };
- };
- &pio {
- csi1_pins: csi1-pins@0 {
- pins =
- "PE0","PE2","PE3","PE4","PE5","PE6","PE7","PE8","PE9","PE10","PE11";
- function = "csi";
- };
- csi1_mclk: csi1-mclk@0 {
- pins = "PE1";
- function = "csi";
- };
- i2c1_pins: i2c1 {
- pins = "PE21", "PE22";
- function = "i2c1";
- };
- };
- csi1: csi@1cb4000 {
- compatible = "allwinner,sun8i-v3s-csi";
- reg = <0x01cb4000 0x1000>;
- interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&ccu CLK_BUS_CSI>,
- <&ccu CLK_CSI1_SCLK>,
- <&ccu CLK_DRAM_CSI>;
- clock-names = "bus", "mod", "ram";
- resets = <&ccu RST_BUS_CSI>;
- status = "disabled";
- };
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