static int rec_mmap_psx_mem_local(const uptr vaddr, int psxM_memfd, int psxP_memfd, int psxH_memfd, int psxR_memfd)
{
    const size_t page_size = host_page_size;

    // Note that we create just a page-sized mirror of psxH (scratchpad/HW).
    //  If page size is just 4KB, this will allow dynarec to emit optimized
    //  load/store code that relies on a SIGSEGV signal handler to catch HW
    //  I/O port access. The HW ports start 4KB past beginning of scratchpad,
    //  and here they will be left unmapped, along with cache control port
    //  at 0xfffe_0130. 8MB ROM Expansion region is hopefully never written
    //  to, so its 8MB doesn't actually allocate any pages of host RAM.
    //  If it *is* written to, it'd probably be harmlessly soaking up
    //  out-of-bounds scratchpad stores at its end from buggy PS1 code.
    if (rec_mmap_shared_memfd(vaddr           ,  0x200000, true, psxM_memfd) == MAP_FAILED ||
        rec_mmap_shared_memfd(vaddr+0x00200000,  0x200000, true, psxM_memfd) == MAP_FAILED ||
        rec_mmap_shared_memfd(vaddr+0x00400000,  0x200000, true, psxM_memfd) == MAP_FAILED ||
        rec_mmap_shared_memfd(vaddr+0x00600000,  0x200000, true, psxM_memfd) == MAP_FAILED ||
        rec_mmap_shared_memfd(vaddr+0x01000000,  0x800000, true, psxP_memfd) == MAP_FAILED ||
        rec_mmap_shared_memfd(vaddr+0x01800000, page_size, true, psxH_memfd) == MAP_FAILED ||
        rec_mmap_shared_memfd(vaddr+0x01c00000,   0x80000, true, psxR_memfd) == MAP_FAILED)
        return -1;

    return 0;
}