#include CONFIG FOSC = HS ; High-Speed oscillator, HS used by USB CONFIG WDT = OFF ; Watchdog Timer disabled CONFIG DEBUG = OFF ; Debugger disabled CONFIG MCLRE = OFF ; Master Clear Reset enabled CONFIG CPUDIV = OSC1_PLL2 ; CPU system clock divisor CONFIG PBADEN = OFF ; PORTB A/D enable/disable (Disabled) counter_value equ H'04' ; Define constant for counter value RES_VECTOR CODE 0x0000 ; Reset vector at address 0x0000 GOTO init ; Jump to the initialization code org 0x0008 ; Interrupt vector at address 0x0008 goto irq_handle ; Go to the interrupt handling function TMR0_interrupt ; Clear the TMR0 interrupt flag bcf INTCON , TMR0IF ; Clear the flag ; Increment PORTC incf counter_value ; Increment counter value retfie ; Return from interrupt irq_handle ; Interrupt routine ; Check if it is TMR0 interrupt btfsc INTCON , TMR0IF goto TMR0_interrupt ; Yes, it is TMR0 interrupt, jump to TMR0_interrupt retfie ; No, return from interrupt init clrf TRISD ; Set PORTD as output clrf PORTD ; Clear PORTD clrf TRISC ; Set PORTC as output clrf PORTC ; Clear PORTC bsf T0CON , TMR0ON ; Turn ON TIMER 0 bcf T0CON , T08BIT ; Set TIMER 0 to 16 bits mode bcf T0CON , T0CS ; Use internal clock source bcf T0CON , PSA ; Assign prescaler to TIMER 0 ; Setup the prescaler bsf T0CON, T0PS2 ; Prescaler value 1:256 bcf T0CON, T0PS1 ; Prescaler value 1:256 bcf T0CON, T0PS0 ; Prescaler value 1:256 bsf INTCON , GIE ; Enable interrupts bsf INTCON , TMR0IE ; Enable TMR0 interrupt clrf TMR0 ; Clear the timer bsf T1CON , TMR1ON ; Enable TIMER 1 bcf T1CON , TMR1CS ; Use internal clock source clrf TMR1L ; Clear TIMER 1 low byte clrf TMR1H ; Clear TIMER 1 high byte GOTO main_loop ; Jump to the main loop main_loop call seg_set_0 ; Call segment set function for counter_value = 0 goto main_loop ; Loop indefinitely seg_set_0 movlw H'00' ; Load value 0 into WREG CPFSEQ counter_value ; Compare WREG with counter_value goto seg_set_1 ; If equal, jump to seg_set_1 movlw H'3F' ; Load value 0x3F into WREG (7-segment display pattern for 0) movwf PORTD ; Move WREG to PORTD bsf PORTC, RC0 ; Set RC0 high return ; Return from function seg_set_1 movlw H'01' ; Load value 1 into WREG CPFSEQ counter_value ; Compare WREG with counter_value goto seg_set_2 ; If equal, jump to seg_set_2 movlw H'06' ; Load value 0x06 into WREG (7-segment display pattern for 1) movwf PORTD ; Move WREG to PORTD bcf PORTC, RC0 ; Set RC0 low return ; Return from function ; (Similar segments set functions for 2 to 9, with different display patterns) seg_set_2 movlw H'02' CPFSEQ counter_value goto seg_set_3 movlw H'5B' movwf PORTD return seg_set_3 movlw H'03' CPFSEQ counter_value goto seg_set_4 movlw H'4F' movwf PORTD return seg_set_4 movlw H'04' CPFSEQ counter_value goto seg_set_5 movlw H'66' movwf PORTD return seg_set_5 movlw H'05' CPFSEQ counter_value goto seg_set_6 movlw H'6D' movwf PORTD return seg_set_6 movlw H'06' CPFSEQ counter_value goto seg_set_7 movlw H'7D' movwf PORTD return seg_set_7 movlw H'07' CPFSEQ counter_value goto seg_set_8 movlw H'07' movwf PORTD return seg_set_8 movlw H'08' CPFSEQ counter_value goto seg_set_9 movlw H'7F' movwf PORTD return seg_set_9 movlw H'09' CPFSEQ counter_value goto counter_reset movlw H'6F' movwf PORTD return counter_reset clrf counter_value ; Clear counter_value return ; Return from function END ; End of the code