;******************************************************************************* ; * ; Microchip licenses this software to you solely for use with Microchip * ; products. The software is owned by Microchip and/or its licensors, and is * ; protected under applicable copyright laws. All rights reserved. * ; * ; This software and any accompanying information is for suggestion only. * ; It shall not be deemed to modify Microchip?s standard warranty for its * ; products. It is your responsibility to ensure that this software meets * ; your requirements. * ; * ; SOFTWARE IS PROVIDED "AS IS". MICROCHIP AND ITS LICENSORS EXPRESSLY * ; DISCLAIM ANY WARRANTY OF ANY KIND, WHETHER EXPRESS OR IMPLIED, INCLUDING * ; BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS * ; FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL * ; MICROCHIP OR ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, * ; INDIRECT OR CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, HARM TO * ; YOUR EQUIPMENT, COST OF PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR * ; SERVICES, ANY CLAIMS BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY * ; DEFENSE THEREOF), ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER * ; SIMILAR COSTS. * ; * ; To the fullest extend allowed by law, Microchip and its licensors * ; liability shall not exceed the amount of fee, if any, that you have paid * ; directly to Microchip to use this software. * ; * ; MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE OF * ; THESE TERMS. * ; * ;******************************************************************************* ; * ; Filename: main.asm * ; Date: 13/01/2020 * ; File Version: 1.0.0 * ; Author: MIQUET Gautier * ; Company: PROJET ELEC ISEN - Equipe 1 * ; Description: Main source file of the electronic projet (week 2) * ; * ;******************************************************************************* ; * ; Notes: In the MPLAB X Help, refer to the MPASM Assembler documentation * ; for information on assembly instructions. * ; * ;******************************************************************************* ; * ; Known Issues: This template is designed for relocatable code. As such, * ; build errors such as "Directive only allowed when generating an object * ; file" will result when the 'Build in Absolute Mode' checkbox is selected * ; in the project properties. Designing code in absolute mode is * ; antiquated - use relocatable mode. * ; * ;******************************************************************************* ; * ; Revision History: * ; * ;******************************************************************************* ;******************************************************************************* ; Processor Inclusion ; ; TODO Step #1 Open the task list under Window > Tasks. Include your ; device .inc file - e.g. #include .inc. Available ; include files are in C:\Program Files\Microchip\MPLABX\mpasmx ; assuming the default installation path for MPLAB X. You may manually find ; the appropriate include file for your device here and include it, or ; simply copy the include generated by the configuration bits ; generator (see Step #2). ; ;******************************************************************************* #include "p18f25k40.inc" ;******************************************************************************* ; ; TODO Step #2 - Configuration Word Setup ; ; The 'CONFIG' directive is used to embed the configuration word within the ; .asm file. MPLAB X requires users to embed their configuration words ; into source code. See the device datasheet for additional information ; on configuration word settings. Device configuration bits descriptions ; are in C:\Program Files\Microchip\MPLABX\mpasmx\P.inc ; (may change depending on your MPLAB X installation directory). ; ; MPLAB X has a feature which generates configuration bits source code. Go to ; Window > PIC Memory Views > Configuration Bits. Configure each field as ; needed and select 'Generate Source Code to Output'. The resulting code which ; appears in the 'Output Window' > 'Config Bits Source' tab may be copied ; below. ; ;******************************************************************************* ; CONFIG1L CONFIG FEXTOSC = OFF ; External Oscillator mode Selection bits (Oscillator not enabled) CONFIG RSTOSC = HFINTOSC_64MHZ; Power-up default value for COSC bits (HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1) ; CONFIG1H CONFIG CLKOUTEN = OFF ; Clock Out Enable bit (CLKOUT function is disabled) CONFIG CSWEN = ON ; Clock Switch Enable bit (Writing to NOSC and NDIV is allowed) CONFIG FCMEN = ON ; Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor enabled) ; CONFIG2L CONFIG MCLRE = EXTMCLR ; Master Clear Enable bit (If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR ) CONFIG PWRTE = OFF ; Power-up Timer Enable bit (Power up timer disabled) CONFIG LPBOREN = OFF ; Low-power BOR enable bit (ULPBOR disabled) CONFIG BOREN = SBORDIS ; Brown-out Reset Enable bits (Brown-out Reset enabled , SBOREN bit is ignored) ; CONFIG2H CONFIG BORV = VBOR_2P45 ; Brown Out Reset Voltage selection bits (Brown-out Reset Voltage (VBOR) set to 2.45V) CONFIG ZCD = OFF ; ZCD Disable bit (ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON) CONFIG PPS1WAY = ON ; PPSLOCK bit One-Way Set Enable bit (PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle) CONFIG STVREN = ON ; Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset) CONFIG DEBUG = OFF ; Debugger Enable bit (Background debugger disabled) CONFIG XINST = OFF ; Extended Instruction Set Enable bit (Extended Instruction Set and Indexed Addressing Mode disabled) ; CONFIG3L CONFIG WDTCPS = WDTCPS_31 ; WDT Period Select bits (Divider ratio 1:65536; software control of WDTPS) CONFIG WDTE = OFF ; WDT operating mode (WDT Disabled) ; CONFIG3H CONFIG WDTCWS = WDTCWS_7 ; WDT Window Select bits (window always open (100%); software control; keyed access not required) CONFIG WDTCCS = SC ; WDT input clock selector (Software Control) ; CONFIG4L CONFIG WRT0 = OFF ; Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected) CONFIG WRT1 = OFF ; Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected) CONFIG WRT2 = OFF ; Write Protection Block 2 (Block 2 (004000-005FFFh) not write-protected) CONFIG WRT3 = OFF ; Write Protection Block 3 (Block 3 (006000-007FFFh) not write-protected) ; CONFIG4H CONFIG WRTC = OFF ; Configuration Register Write Protection bit (Configuration registers (300000-30000Bh) not write-protected) CONFIG WRTB = OFF ; Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected) CONFIG WRTD = OFF ; Data EEPROM Write Protection bit (Data EEPROM not write-protected) CONFIG SCANE = ON ; Scanner Enable bit (Scanner module is available for use, SCANMD bit can control the module) CONFIG LVP = OFF ; Low Voltage Programming Enable bit (HV on MCLR/VPP must be used for programming) ; CONFIG5L CONFIG CP = OFF ; UserNVM Program Memory Code Protection bit (UserNVM code protection disabled) CONFIG CPD = OFF ; DataNVM Memory Code Protection bit (DataNVM code protection disabled) ; CONFIG5H ; CONFIG6L CONFIG EBTR0 = OFF ; Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks) CONFIG EBTR1 = OFF ; Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks) CONFIG EBTR2 = OFF ; Table Read Protection Block 2 (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks) CONFIG EBTR3 = OFF ; Table Read Protection Block 3 (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks) ; CONFIG6H CONFIG EBTRB = OFF ; Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks) ;******************************************************************************* ; ; TODO Step #3 - Variable Definitions ; ; Refer to datasheet for available data memory (RAM) organization assuming ; relocatible code organization (which is an option in project ; properties > mpasm (Global Options)). Absolute mode generally should ; be used sparingly. ; ; Example of using GPR Uninitialized Data ; ; GPR_VAR UDATA ; MYVAR1 RES 1 ; User variable linker places ; MYVAR2 RES 1 ; User variable linker places ; MYVAR3 RES 1 ; User variable linker places ; ; ; Example of using Access Uninitialized Data Section (when available) ; ; The variables for the context saving in the device datasheet may need ; ; memory reserved here. ; INT_VAR UDATA_ACS ; W_TEMP RES 1 ; w register for context saving (ACCESS) ; STATUS_TEMP RES 1 ; status used for context saving ; BSR_TEMP RES 1 ; bank select used for ISR context saving ; ;******************************************************************************* INT_VAR UDATA_ACS ; TEMPO ITERATORS i RES 1 j RES 1 k RES 1 ; MATRIX SIZE MATRIX_WIDTH RES 1 MATRIX_HEIGHT RES 1 ; MATRIX ITERATOR MATRIX_ITR RES 1 ; VECOTR POINTER VEC_HIGH RES 1 VEC_LOW RES 1 ; VECTOR SIZE VEC_SIZE RES 1 ; TILE LED STREAM ITERATOR TILE_ITR RES 1 ; FILL VECTOR ITERATOR FILL_ITR RES 1 ; COLUMN LEVEL TO STREAM COL_LEVEL RES 1 ; FREQUENCIES VALUES [0, 8] FREQ_LOW RES 1 FREQ_MED_LOW RES 1 FREQ_MED_HIGH RES 1 FREC_HIGH RES 1 FREQ_LEVEL RES 1 TEMP RES 1 ;******************************************************************************* ; Reset Vector ;******************************************************************************* RES_VECT CODE 0x0000 ; processor reset vector GOTO RUN ; go to beginning of program ;******************************************************************************* ; TODO Step #4 - Interrupt Service Routines ; ; There are a few different ways to structure interrupt routines in the 8 ; bit device families. On PIC18's the high priority and low priority ; interrupts are located at 0x0008 and 0x0018, respectively. On PIC16's and ; lower the interrupt is at 0x0004. Between device families there is subtle ; variation in the both the hardware supporting the ISR (for restoring ; interrupt context) as well as the software used to restore the context ; (without corrupting the STATUS bits). ; ; General formats are shown below in relocatible format. ; ;------------------------------PIC16's and below-------------------------------- ; ; ISR CODE 0x0004 ; interrupt vector location ; ; ; ; RETFIE ; ;----------------------------------PIC18's-------------------------------------- ; ; ISRHV CODE 0x0008 ; GOTO HIGH_ISR ; ISRLV CODE 0x0018 ; GOTO LOW_ISR ; ; ISRH CODE ; let linker place high ISR routine ; HIGH_ISR ; ; RETFIE FAST ; ; ISRL CODE ; let linker place low ISR routine ; LOW_ISR ; ; RETFIE ; ;******************************************************************************* ; TODO INSERT ISR HERE ;******************************************************************************* ; MAIN PROGRAM ;******************************************************************************* MAIN_PROG CODE ; let linker place main program ;******************************************************************************* ; MAIN VALUES INIT ;******************************************************************************* INIT ; INPUTS/OUTPUTS MOVLW b'00011111' MOVWF TRISA ; Set A INPUT for ADC MOVLW 0x00 MOVWF TRISB ; Set B as OUTPUT MOVLW 0x00 MOVWF TRISC ; Set C as OUTPUT ; SET BSR BANK MOVLB 0x0F ; ADC MOVLW b'00000000' MOVWF ADCON1, 1 MOVLW b'00000000' MOVWF ADCON2, 1 MOVLW b'00000000' MOVWF ADCON3, 1 MOVLW b'10000000' MOVWF ADCON0 ; Enable ADC MOVLW b'00001000' ;MOVLW b'00111111' ; A TESTER MOVWF ADCLK, 1 ; Fosc MOVLW b'00000000' MOVWF ADREF, 1 ; Voltage reference (VREF-=AVss, VREF+=Vdd) MOVLW b'00000000' ; ANA0 MOVWF ADPCH, 1 ; ANA0 by default MOVLW b'11111111' MOVWF ADACQ, 1 ; Acquisition Time = Beaucoup MOVLW b'00011111' MOVWF ANSELA, 1 ; Analog inputs ; STATUS LED ON BSF LATB, 4 ; LED MATRIX OFF BCF LATB, 5 ; SIDE LEDs OFF MOVLW 0x00 MOVWF LATC ; MATRIX SIZE MOVLW 0x08 MOVWF MATRIX_WIDTH MOVLW 0x08 MOVWF MATRIX_HEIGHT ; VECTOR PTR MOVLW 0x02 MOVWF VEC_HIGH MOVLW 0x00 MOVWF VEC_LOW ; ITERATORS AND SIZES DEFAULT (=0) MOVLW 0x00 MOVWF VEC_SIZE MOVWF MATRIX_ITR MOVWF TILE_ITR MOVWF FILL_ITR ; RESET PTR0 CALL RESET_PTR0 ; SET ALL LED AND VECTOR TO 0 CALL COL_LVL_0 CALL COL_LVL_0 CALL COL_LVL_0 CALL COL_LVL_0 CALL COL_LVL_0 CALL COL_LVL_0 CALL COL_LVL_0 CALL COL_LVL_0 CALL FILL_MAT RETURN ;******************************************************************************* ; VECTOR BASIC FUNCTIONS ;******************************************************************************* ; RESET PTR0 RESET_PTR0 MOVF VEC_HIGH, 0 MOVWF FSR0H MOVF VEC_LOW, 0 MOVWF FSR0L RETURN ; PUSH VALUE IN VECTOR VEC_PUSH MOVWF POSTINC0 INCF VEC_SIZE RETURN ; RETURN NEXT VALUE OF VECTOR VEC_PULL MOVF POSTINC0, 0 RETURN ;******************************************************************************* ; WRITING MATRIX LED STREAM ;******************************************************************************* ; WRITE 0 INTO LED STREAM LEDW0 ; 3 10 OU 4 11 BSF LATB, 5 NOP NOP NOP NOP NOP BCF LATB, 5 NOP NOP NOP NOP NOP NOP NOP RETURN ; WRITE 1 INTO LED STREAM LEDW1 ; 11 2 OU 12 3 BSF LATB, 5 NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP NOP; NOP; BCF LATB, 5 RETURN ; WRITE LED STREAM FOR A GIVEN VALUE ([0; 255] in WREG) LED BTFSC WREG, 0 CALL LEDW1 BTFSS WREG, 0 CALL LEDW0 BTFSC WREG, 1 CALL LEDW1 BTFSS WREG, 1 CALL LEDW0 BTFSC WREG, 2 CALL LEDW1 BTFSS WREG, 2 CALL LEDW0 BTFSC WREG, 3 CALL LEDW1 BTFSS WREG, 3 CALL LEDW0 BTFSC WREG, 4 CALL LEDW1 BTFSS WREG, 4 CALL LEDW0 BTFSC WREG, 5 CALL LEDW1 BTFSS WREG, 5 CALL LEDW0 BTFSC WREG, 6 CALL LEDW1 BTFSS WREG, 6 CALL LEDW0 BTFSC WREG, 7 CALL LEDW1 BTFSS WREG, 7 CALL LEDW0 RETURN ;******************************************************************************* ; TEMPO ROUTINES ;******************************************************************************* ; TEMPO ROUTINE LVL 1 TEMPO_1 MOVLW 0xFF MOVWF i DEC_I DECF i MOVLW 0x00 CPFSEQ i GOTO DEC_I RETURN ; TEMPO ROUTINE LVL 2 TEMPO_2 MOVLW 0xFF MOVWF j DEC_J CALL TEMPO_1 DECF j MOVLW 0x00 CPFSEQ j GOTO DEC_J RETURN ; TEMPO ROUTINE LVL 3 TEMPO_3 MOVLW 0x05 MOVWF k DEC_K CALL TEMPO_2 DECF k MOVLW 0x00 CPFSEQ k GOTO DEC_K RETURN ;******************************************************************************* ; MATRIX STREAMING (FROM VECTOR) ;******************************************************************************* ; STREAM A MATRIX TILE TILE CALL VEC_PULL CALL LED CALL VEC_PULL CALL LED CALL VEC_PULL CALL LED CALL VEC_PULL CALL LED INCF TILE_ITR RETURN ; STREAM A MATRIX WIDTH WIDTH ; Reset TILE_ITR MOVLW 0x00 MOVWF TILE_ITR ; Do TILE while TILE_ITR < MATRIX_WIDTH WIDTH_DO_TILE CALL TILE MOVF MATRIX_WIDTH, 0 CPFSLT TILE_ITR RETURN GOTO WIDTH_DO_TILE RETURN ; STREAM ALL THE MATRIX FILL_MAT ; Reset MATRIX_ITR MOVLW 0x00 MOVWF MATRIX_ITR ; Do WIDTH while MATRIX_ITR < MATRIX_HEIGHT HEIGHT_DO_TILE CALL WIDTH INCF MATRIX_ITR MOVF MATRIX_HEIGHT, 0 CPFSLT MATRIX_ITR RETURN GOTO HEIGHT_DO_TILE RETURN ;******************************************************************************* ; TILE LEVELS WRITING (INTO VECTOR) ;******************************************************************************* ; TILE LEDS FOR NO LVL (NO COLORS) TILE_LVL_0 MOVLW 0x00 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH RETURN ; TILE LEDS FOR COLOR LVL 1 TILE_LVL_1 MOVLW 0x00 CALL VEC_PUSH MOVLW 0x60 CALL VEC_PUSH MOVLW 0x20 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH RETURN ; TILE LEDS FOR COLOR LVL 2 TILE_LVL_2 MOVLW 0x00 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH MOVLW 0xA0 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH RETURN ; TILE LEDS FOR COLOR LVL 3 TILE_LVL_3 MOVLW 0x90 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH MOVLW 0x10 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH RETURN ; TILE LEDS FOR COLOR LVL 4 TILE_LVL_4 MOVLW 0x70 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH MOVLW 0x40 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH RETURN ; TILE LEDS FOR COLOR LVL 5 TILE_LVL_5 MOVLW 0x30 CALL VEC_PUSH MOVLW 0x80 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH RETURN ; TILE LEDS FOR COLOR LVL 6 TILE_LVL_6 MOVLW 0x58 CALL VEC_PUSH MOVLW 0x28 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH RETURN ; TILE LEDS FOR COLOR LVL 7 TILE_LVL_7 MOVLW 0x20 CALL VEC_PUSH MOVLW 0x70 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH RETURN ; TILE LEDS FOR COLOR LVL 8 TILE_LVL_8 MOVLW 0x00 CALL VEC_PUSH MOVLW 0xB0 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH MOVLW 0x00 CALL VEC_PUSH RETURN ;******************************************************************************* ; COLUMN FILL LEVELS WRITING (INTO VECTOR) ;******************************************************************************* ; FILL COLUMN FOR LEVEL 0 COL_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 RETURN ; FILL COLUMN FOR LEVEL 1 COL_LVL_1 CALL TILE_LVL_1 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_1 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 RETURN ; FILL COLUMN FOR LEVEL 2 COL_LVL_2 CALL TILE_LVL_1 CALL TILE_LVL_2 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_1 CALL TILE_LVL_2 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 RETURN ; FILL COLUMN FOR LEVEL 3 COL_LVL_3 CALL TILE_LVL_1 CALL TILE_LVL_2 CALL TILE_LVL_3 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_1 CALL TILE_LVL_2 CALL TILE_LVL_3 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 RETURN ; FILL COLUMN FOR LEVEL 4 COL_LVL_4 CALL TILE_LVL_1 CALL TILE_LVL_2 CALL TILE_LVL_3 CALL TILE_LVL_4 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_1 CALL TILE_LVL_2 CALL TILE_LVL_3 CALL TILE_LVL_4 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 RETURN ; FILL COLUMN FOR LEVEL 5 COL_LVL_5 CALL TILE_LVL_1 CALL TILE_LVL_2 CALL TILE_LVL_3 CALL TILE_LVL_4 CALL TILE_LVL_5 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_1 CALL TILE_LVL_2 CALL TILE_LVL_3 CALL TILE_LVL_4 CALL TILE_LVL_5 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_0 RETURN ; FILL COLUMN FOR LEVEL 6 COL_LVL_6 CALL TILE_LVL_1 CALL TILE_LVL_2 CALL TILE_LVL_3 CALL TILE_LVL_4 CALL TILE_LVL_5 CALL TILE_LVL_6 CALL TILE_LVL_0 CALL TILE_LVL_0 CALL TILE_LVL_1 CALL TILE_LVL_2 CALL TILE_LVL_3 CALL TILE_LVL_4 CALL TILE_LVL_5 CALL TILE_LVL_6 CALL TILE_LVL_0 CALL TILE_LVL_0 RETURN ; FILL COLUMN FOR LEVEL 7 COL_LVL_7 CALL TILE_LVL_1 CALL TILE_LVL_2 CALL TILE_LVL_3 CALL TILE_LVL_4 CALL TILE_LVL_5 CALL TILE_LVL_6 CALL TILE_LVL_7 CALL TILE_LVL_0 CALL TILE_LVL_1 CALL TILE_LVL_2 CALL TILE_LVL_3 CALL TILE_LVL_4 CALL TILE_LVL_5 CALL TILE_LVL_6 CALL TILE_LVL_7 CALL TILE_LVL_0 RETURN ; FILL COLUMN FOR LEVEL 8 COL_LVL_8 CALL TILE_LVL_1 CALL TILE_LVL_2 CALL TILE_LVL_3 CALL TILE_LVL_4 CALL TILE_LVL_5 CALL TILE_LVL_6 CALL TILE_LVL_7 CALL TILE_LVL_8 CALL TILE_LVL_1 CALL TILE_LVL_2 CALL TILE_LVL_3 CALL TILE_LVL_4 CALL TILE_LVL_5 CALL TILE_LVL_6 CALL TILE_LVL_7 CALL TILE_LVL_8 RETURN ; WRITE A COLUMN WRITE_COL_VEC MOVWF COL_LEVEL ; COLUMN: TEST FOR LEVEL 1 WRITE_COL_VEC_1 MOVLW 0x01 CPFSEQ COL_LEVEL GOTO WRITE_COL_VEC_2 CALL COL_LVL_1 GOTO WRITE_COL_VEC_END ; COLUMN: TEST FOR LEVEL 2 WRITE_COL_VEC_2 MOVLW 0x02 CPFSEQ COL_LEVEL GOTO WRITE_COL_VEC_3 CALL COL_LVL_2 GOTO WRITE_COL_VEC_END ; COLUMN: TEST FOR LEVEL 3 WRITE_COL_VEC_3 MOVLW 0x03 CPFSEQ COL_LEVEL GOTO WRITE_COL_VEC_4 CALL COL_LVL_3 GOTO WRITE_COL_VEC_END ; COLUMN: TEST FOR LEVEL 4 WRITE_COL_VEC_4 MOVLW 0x04 CPFSEQ COL_LEVEL GOTO WRITE_COL_VEC_5 CALL COL_LVL_4 GOTO WRITE_COL_VEC_END ; COLUMN: TEST FOR LEVEL 5 WRITE_COL_VEC_5 MOVLW 0x05 CPFSEQ COL_LEVEL GOTO WRITE_COL_VEC_6 CALL COL_LVL_5 GOTO WRITE_COL_VEC_END ; COLUMN: TEST FOR LEVEL 6 WRITE_COL_VEC_6 MOVLW 0x06 CPFSEQ COL_LEVEL GOTO WRITE_COL_VEC_7 CALL COL_LVL_6 GOTO WRITE_COL_VEC_END ; COLUMN: TEST FOR LEVEL 7 WRITE_COL_VEC_7 MOVLW 0x07 CPFSEQ COL_LEVEL GOTO WRITE_COL_VEC_8 CALL COL_LVL_7 GOTO WRITE_COL_VEC_END ; COLUMN: TEST FOR LEVEL 8 WRITE_COL_VEC_8 MOVLW 0x08 CPFSEQ COL_LEVEL GOTO WRITE_COL_VEC_0 CALL COL_LVL_8 GOTO WRITE_COL_VEC_END ; COLUMN: DEFAULT LEVEL 0 WRITE_COL_VEC_0 CALL COL_LVL_0 ; COLUMN: END POINT WRITE_COL_VEC_END RETURN ;******************************************************************************* ; ADC AND FREQUENCY LEVELS UTILS ;******************************************************************************* ; WAIT FOR ADC TO COMPUTE POLL BTFSC ADCON0, 0 GOTO POLL RETURN ; SHOW CURRENT ADC LEVEL ON RIGHT SIDE LEDS LED_LEVEL ; INIT: TURN OFF LEDs MOVLW 0x00 MOVWF LATC MOVLW 0x80 ; > 0, turn on LED0 CPFSLT TEMP BSF LATC, 7 MOVLW 0x90 ; > 32, turn on LED3 CPFSLT TEMP BSF LATC, 6 MOVLW 0xA0 ; > 64, turn on LED2 CPFSLT TEMP BSF LATC, 5 MOVLW 0xB0 ; > 96, turn on LED2 CPFSLT TEMP BSF LATC, 4 MOVLW 0xC0 ; > 128, turn on LED2 CPFSLT TEMP BSF LATC, 3 MOVLW 0xD0 ; > 160, turn on LED2 CPFSLT TEMP BSF LATC, 2 MOVLW 0xE0 ; > 192, turn on LED2 CPFSLT TEMP BSF LATC, 1 MOVLW 0xF0 ; > 224, turn on LED2 CPFSLT TEMP BSF LATC, 0 RETURN ;******************************************************************************* ; FREQUENCY LEVELS ADJUSTERS ;******************************************************************************* ; FREQUENCY LEVEL SETTERS ; SET FREQUENCY LEVEL TO 1 AND GO TO FREQUENCY CALCULATION END POINT SET_FREQ_1 MOVLW 0x01 GOTO CALC_FREQ_END ; SET FREQUENCY LEVEL TO 2 AND GO TO FREQUENCY CALCULATION END POINT SET_FREQ_2 MOVLW 0x02 GOTO CALC_FREQ_END ; SET FREQUENCY LEVEL TO 3 AND GO TO FREQUENCY CALCULATION END POINT SET_FREQ_3 MOVLW 0x03 GOTO CALC_FREQ_END ; SET FREQUENCY LEVEL TO 4 AND GO TO FREQUENCY CALCULATION END POINT SET_FREQ_4 MOVLW 0x04 GOTO CALC_FREQ_END ; SET FREQUENCY LEVEL TO 5 AND GO TO FREQUENCY CALCULATION END POINT SET_FREQ_5 MOVLW 0x05 GOTO CALC_FREQ_END ; SET FREQUENCY LEVEL TO 6 AND GO TO FREQUENCY CALCULATION END POINT SET_FREQ_6 MOVLW 0x06 GOTO CALC_FREQ_END ; SET FREQUENCY LEVEL TO 7 AND GO TO FREQUENCY CALCULATION END POINT SET_FREQ_7 MOVLW 0x07 GOTO CALC_FREQ_END ; SET FREQUENCY LEVEL TO 8 AND GO TO FREQUENCY CALCULATION END POINT SET_FREQ_8 MOVLW 0x08 GOTO CALC_FREQ_END ; FREQUENCY CALCULATION END POINT CALC_FREQ_END RETURN ; RETURN A VALUE IN W [0, 8] DEPENDING ON THE (LOW ?) FREQUENCY VOLTAGE CALC_FREQ_LOW ; > 4.67V (238, 0xEE) MOVLW 0xDB CPFSLT TEMP GOTO SET_FREQ_8 ; > 4.34V (221, 0xDD) MOVLW 0xD1 CPFSLT TEMP GOTO SET_FREQ_7 ; > 4V (204, 0xCC) MOVLW 0xC8 CPFSLT TEMP GOTO SET_FREQ_6 ; > 3.67V (187, 0xBB) MOVLW 0xBE CPFSLT TEMP GOTO SET_FREQ_5 ; > 3.34V (170, 0xAA) MOVLW 0xB5 CPFSLT TEMP GOTO SET_FREQ_4 ; > 3V (153, 0x99) MOVLW 0xAB CPFSLT TEMP GOTO SET_FREQ_3 ; > 2.67V (136, 0x88) MOVLW 0xA2 CPFSLT TEMP GOTO SET_FREQ_2 ; > 2.36V (120, 0x77) MOVLW 0x99 CPFSLT TEMP GOTO SET_FREQ_1 ; DEFAULT VALUE = 0x00 MOVLW 0x00 RETURN ;******************************************************************************* ; ADC FREQUENCY COMPUTION ;******************************************************************************* ; GET LOW FREQUENCY VALUE FROM ADC GET_FREQ_LOW MOVLW b'00000000' ; ANA0 MOVLB 0x0F MOVWF ADPCH, 1 ; SELECT ANA0 BSF ADCON0, 0 ; START ADC CALL POLL ; WAIT FOR RESULT MOVFF ADRESH, TEMP CALL CALC_FREQ_LOW ; CALCUL FREQUENCY LEVEL RETURN ; GET MEDIUM LOW FREQUENCY VALUE FROM ADC GET_FREQ_MEDIUM_LOW MOVLW b'00000001' ; ANA1 MOVLB 0x0F MOVWF ADPCH, 1 ; SELECT ANA1 BSF ADCON0, 0 ; START ADC CALL POLL ; WAIT FOR RESULT MOVFF ADRESH, TEMP CALL CALC_FREQ_LOW ; CALCUL FREQUENCY LEVEL RETURN ; GET MEDIUM HIGH FREQUENCY VALUE FROM ADC GET_FREQ_MEDIUM_HIGH MOVLW b'00000010' ; ANA2 MOVLB 0x0F MOVWF ADPCH, 1 ; SELECT ANA2 BSF ADCON0, 0 ; START ADC CALL POLL ; WAIT FOR RESULT MOVFF ADRESH, TEMP CALL CALC_FREQ_LOW ; CALCUL FREQUENCY LEVEL RETURN ; GET HIGH FREQUENCY VALUE FROM ADC GET_FREQ_HIGH MOVLW b'00000011' ; ANA3 MOVLB 0x0F MOVWF ADPCH, 1 ; SELECT ANA3 BSF ADCON0, 0 ; START ADC CALL POLL ; WAIT FOR RESULT MOVFF ADRESH, TEMP CALL CALC_FREQ_LOW ; CALCUL FREQUENCY LEVEL RETURN ; UP LEDs DEPENDING ON THE VOLUME LED_VOLUME MOVLW b'00000100' ; ANA4 MOVLB 0x0F MOVWF ADPCH, 1 ; SELECT ANA3 BSF ADCON0, 0 ; START ADC CALL POLL ; WAIT FOR RESULT MOVFF ADRESH, TEMP CALL LED_LEVEL RETURN ;******************************************************************************* ; MAIN CODE - RUN ;******************************************************************************* RUN ; Init values CALL INIT ; --- MAIN LOOP LOOP CALL LED_VOLUME CALL RESET_PTR0 ; RESET VECTOR POSITION CALL GET_FREQ_LOW ; GET LOW FREQUENCY LEVEL CALL WRITE_COL_VEC ; WRITE COLUMN ;CALL TEMPO_2 CALL GET_FREQ_MEDIUM_LOW ; GET LOW FREQUENCY LEVEL CALL WRITE_COL_VEC ; WRITE COLUMN ;CALL TEMPO_2 CALL GET_FREQ_MEDIUM_HIGH ; GET LOW FREQUENCY LEVEL CALL WRITE_COL_VEC ; WRITE COLUMN ;CALL TEMPO_2 CALL GET_FREQ_HIGH ; GET LOW FREQUENCY LEVEL CALL WRITE_COL_VEC ; WRITE COLUMN ;CALL TEMPO_2 ; FILL MATRIX CALL RESET_PTR0 CALL FILL_MAT ;MOVLW 0x00 ;MOVWF ADRESH ; WAIT CALL TEMPO_2 GOTO LOOP GOTO $ END