[NOTE ] coreboot-24.12-1666-g309b40354124-dirty Tue Jun 24 22:39:54 UTC 2025 x86_32 bootblock starting (log level: 8)... [INFO ] Timestamp - end of bootblock: 25399734175 [INFO ] Timestamp - starting to load romstage: 25401810002 [INFO ] VB2:vb2_digest_init() 224 bytes, hash algo 3, HW acceleration unsupported [DEBUG] FMAP: Found "FLASH" version 1.1 at 0x10000. [DEBUG] FMAP: base = 0xffc00000 size = 0x400000 #areas = 4 [DEBUG] FMAP: area COREBOOT found @ 10200 (4128256 bytes) [INFO ] VB2:vb2_digest_init() 0 bytes, hash algo 3, HW acceleration unsupported [INFO ] CBFS: mcache @0x00034e00 built for 21 files, used 0x9dc of 0x4000 bytes [INFO ] CBFS: Found 'fallback/romstage' @0x80 size 0x51750 in mcache @0x00034e2c [INFO ] VB2:vb2_digest_init() 333648 bytes, hash algo 3, HW acceleration unsupported [INFO ] Timestamp - finished loading romstage: 26870392384 [DEBUG] BS: bootblock times (exec / console): total (unknown) / 4 ms [NOTE ] coreboot-24.12-1666-g309b40354124-dirty Tue Jun 24 22:39:54 UTC 2025 x86_32 romstage starting (log level: 8)... [DEBUG] APIC 00: CPU Family_Model = 00610f31 [DEBUG] APIC 00: ** Enter AmdInitReset [00020007] [INFO ] Timestamp - calling AmdInitReset: 26952594156 [DEBUG] Fch OEM config in INIT RESET [INFO ] Timestamp - back from AmdInitReset: 27001561425 [DEBUG] AmdInitReset() returned AGESA_SUCCESS [DEBUG] APIC 00: Heap in LocalCache (2) at 0x00400000 [DEBUG] APIC 00: ** Exit AmdInitReset [00020007] [DEBUG] APIC 00: ** Enter AmdInitEarly [00020002] [INFO ] Timestamp - calling AmdInitEarly: 27006867115 [INFO ] Timestamp - back from AmdInitEarly: 27574780342 [DEBUG] AmdInitEarly() returned AGESA_SUCCESS [DEBUG] APIC 00: Heap in LocalCache (2) at 0x00400000 [DEBUG] APIC 00: ** Exit AmdInitEarly [00020002] [INFO ] Timestamp - before RAM initialization: 27583143762 [DEBUG] APIC 00: ** Enter AmdInitPost [00020006] [INFO ] Timestamp - calling AmdInitPost: 27586593380 [SPEW ] -------------READING SPD----------- [SPEW ] iobase: 0x00000B00, SmbusSlave: 0x000000A0, count: 256 [SPEW ] -------------FINISHED READING SPD----------- [SPEW ] -------------READING SPD----------- [SPEW ] iobase: 0x00000B00, SmbusSlave: 0x000000A2, count: 256 [SPEW ] -------------FINISHED READING SPD----------- [INFO ] Timestamp - back from AmdInitPost: 32837530551 [DEBUG] AmdInitPost() returned AGESA_SUCCESS [DEBUG] APIC 00: Heap in TempMem (3) at 0x000b0000 [DEBUG] APIC 00: ** Exit AmdInitPost [00020006] [INFO ] Timestamp - after RAM initialization: 32852582438 [DEBUG] CBMEM: [DEBUG] IMD: root @ 0x5ffff000 254 entries. [DEBUG] IMD: root @ 0x5fffec00 62 entries. [DEBUG] FMAP: area COREBOOT found @ 10200 (4128256 bytes) [DEBUG] Normal boot [INFO ] CBFS: Found 'fallback/postcar' @0x9b3c0 size 0x98f8 in mcache @0x000352a4 [INFO ] VB2:vb2_digest_init() 39160 bytes, hash algo 3, HW acceleration unsupported [DEBUG] Loading module at 0x5feec000 with entry 0x5feec031. filesize: 0x9108 memsize: 0xf470 [DEBUG] Processing 492 relocs. Offset value of 0x5deec000 [INFO ] Timestamp - end of romstage: 32918109120 [DEBUG] BS: romstage times (exec / console): total (unknown) / 6 ms [NOTE ] coreboot-24.12-1666-g309b40354124-dirty Tue Jun 24 22:39:54 UTC 2025 x86_32 postcar starting (log level: 8)... [DEBUG] usbdebug: Failed hardware init [INFO ] Timestamp - start of postcar: 32922671182 [INFO ] Timestamp - end of postcar: 32922803995 [INFO ] Timestamp - starting to load ramstage: 32922982784 [DEBUG] FMAP: area COREBOOT found @ 10200 (4128256 bytes) [INFO ] CBFS: Found 'fallback/ramstage' @0x51880 size 0x2f37c in mcache @0x5fefd0cc [INFO ] VB2:vb2_digest_init() 193404 bytes, hash algo 3, HW acceleration unsupported [INFO ] Timestamp - starting LZMA decompress (ignore for x86): 33083734422 [INFO ] Timestamp - finished LZMA decompress (ignore for x86): 33272986252 [DEBUG] Loading module at 0x5fd95000 with entry 0x5fd95000. filesize: 0x6dfe0 memsize: 0x1554a8 [DEBUG] Processing 7272 relocs. Offset value of 0x5bd95000 [INFO ] Timestamp - finished loading ramstage: 33273476672 [DEBUG] BS: postcar times (exec / console): total (unknown) / 0 ms [NOTE ] coreboot-24.12-1666-g309b40354124-dirty Tue Jun 24 22:39:54 UTC 2025 x86_32 ramstage starting (log level: 8)... [INFO ] POST: 0x39 [DEBUG] usbdebug: Failed hardware init [INFO ] Timestamp - start of ramstage: 33274449274 [INFO ] POST: 0x6f [DEBUG] Normal boot [DEBUG] APIC 00: ** Enter AmdInitEnv [00020003] [INFO ] Timestamp - calling AmdInitEnv: 33274997532 [DEBUG] Wiped HEAP at [10000000 - 1002ffff] [DEBUG] Fch OEM config in INIT ENV [INFO ] Timestamp - back from AmdInitEnv: 33295264500 [DEBUG] AmdInitEnv() returned AGESA_SUCCESS [DEBUG] APIC 00: Heap in SystemMem (4) at 0x10000014 [DEBUG] APIC 00: ** Exit AmdInitEnv [00020003] [DEBUG] BS: BS_PRE_DEVICE entry times (exec / console): 4 / 0 ms [INFO ] POST: 0x70 [INFO ] POST: 0x71 [INFO ] Timestamp - device enumeration: 33296300422 [INFO ] POST: 0x72 [INFO ] Enumerating buses... [SPEW ] Show all devs... Before device enumeration. [SPEW ] Root Device: enabled 1 [SPEW ] CPU_CLUSTER: 0: enabled 1 [SPEW ] DOMAIN: 00000000: enabled 1 [SPEW ] APIC: 10: enabled 1 [SPEW ] PCI: 00:00:00.0: enabled 1 [SPEW ] PCI: 00:00:00.2: enabled 1 [SPEW ] PCI: 00:00:01.0: enabled 1 [SPEW ] PCI: 00:00:01.1: enabled 1 [SPEW ] PCI: 00:00:02.0: enabled 1 [SPEW ] PCI: 00:00:03.0: enabled 0 [SPEW ] PCI: 00:00:04.0: enabled 1 [SPEW ] PCI: 00:00:05.0: enabled 1 [SPEW ] PCI: 00:00:06.0: enabled 0 [SPEW ] PCI: 00:00:07.0: enabled 0 [SPEW ] PCI: 00:00:08.0: enabled 0 [SPEW ] PCI: 00:00:09.0: enabled 0 [SPEW ] PCI: 00:00:10.0: enabled 1 [SPEW ] PCI: 00:00:11.0: enabled 1 [SPEW ] PCI: 00:00:12.0: enabled 1 [SPEW ] PCI: 00:00:12.2: enabled 1 [SPEW ] PCI: 00:00:13.0: enabled 1 [SPEW ] PCI: 00:00:13.2: enabled 1 [SPEW ] PCI: 00:00:14.0: enabled 1 [SPEW ] PCI: 00:00:14.2: enabled 1 [SPEW ] PCI: 00:00:14.3: enabled 1 [SPEW ] PCI: 00:00:14.4: enabled 1 [SPEW ] PCI: 00:00:14.5: enabled 1 [SPEW ] PCI: 00:00:14.6: enabled 0 [SPEW ] PCI: 00:00:14.7: enabled 0 [SPEW ] PCI: 00:00:15.0: enabled 0 [SPEW ] PCI: 00:00:15.1: enabled 0 [SPEW ] PCI: 00:00:15.2: enabled 0 [SPEW ] PCI: 00:00:15.3: enabled 0 [SPEW ] PCI: 00:00:18.0: enabled 1 [SPEW ] PCI: 00:00:18.1: enabled 1 [SPEW ] PCI: 00:00:18.2: enabled 1 [SPEW ] PCI: 00:00:18.3: enabled 1 [SPEW ] PCI: 00:00:18.4: enabled 1 [SPEW ] PCI: 00:00:18.5: enabled 1 [SPEW ] PNP: 00ff.1: enabled 1 [SPEW ] Compare with tree... [SPEW ] Root Device: enabled 1 [SPEW ] CPU_CLUSTER: 0: enabled 1 [SPEW ] APIC: 10: enabled 1 [SPEW ] DOMAIN: 00000000: enabled 1 [SPEW ] PCI: 00:00:00.0: enabled 1 [SPEW ] PCI: 00:00:00.2: enabled 1 [SPEW ] PCI: 00:00:01.0: enabled 1 [SPEW ] PCI: 00:00:01.1: enabled 1 [SPEW ] PCI: 00:00:02.0: enabled 1 [SPEW ] PCI: 00:00:03.0: enabled 0 [SPEW ] PCI: 00:00:04.0: enabled 1 [SPEW ] PCI: 00:00:05.0: enabled 1 [SPEW ] PCI: 00:00:06.0: enabled 0 [SPEW ] PCI: 00:00:07.0: enabled 0 [SPEW ] PCI: 00:00:08.0: enabled 0 [SPEW ] PCI: 00:00:09.0: enabled 0 [SPEW ] PCI: 00:00:10.0: enabled 1 [SPEW ] PCI: 00:00:11.0: enabled 1 [SPEW ] PCI: 00:00:12.0: enabled 1 [SPEW ] PCI: 00:00:12.2: enabled 1 [SPEW ] PCI: 00:00:13.0: enabled 1 [SPEW ] PCI: 00:00:13.2: enabled 1 [SPEW ] PCI: 00:00:14.0: enabled 1 [SPEW ] PCI: 00:00:14.2: enabled 1 [SPEW ] PCI: 00:00:14.3: enabled 1 [SPEW ] PNP: 00ff.1: enabled 1 [SPEW ] PCI: 00:00:14.4: enabled 1 [SPEW ] PCI: 00:00:14.5: enabled 1 [SPEW ] PCI: 00:00:14.6: enabled 0 [SPEW ] PCI: 00:00:14.7: enabled 0 [SPEW ] PCI: 00:00:15.0: enabled 0 [SPEW ] PCI: 00:00:15.1: enabled 0 [SPEW ] PCI: 00:00:15.2: enabled 0 [SPEW ] PCI: 00:00:15.3: enabled 0 [SPEW ] PCI: 00:00:18.0: enabled 1 [SPEW ] PCI: 00:00:18.1: enabled 1 [SPEW ] PCI: 00:00:18.2: enabled 1 [SPEW ] PCI: 00:00:18.3: enabled 1 [SPEW ] PCI: 00:00:18.4: enabled 1 [SPEW ] PCI: 00:00:18.5: enabled 1 [DEBUG] Root Device scanning... [SPEW ] scan_static_bus for Root Device [DEBUG] CPU_CLUSTER: 0 enabled [DEBUG] DOMAIN: 00000000 enabled [DEBUG] CPU_CLUSTER: 0 scanning... [SPEW ] PCI: 00:00:18.5 family15h, core_max=0x10, core_nums=0xf, siblings=0x3 [SPEW ] lpaicid_start=0x10 node 0x0 core 0x0 apicid=0x10 [DEBUG] CPU: APIC: 10 enabled [SPEW ] lpaicid_start=0x10 node 0x0 core 0x1 apicid=0x11 [DEBUG] CPU: APIC: 11 enabled [SPEW ] lpaicid_start=0x10 node 0x0 core 0x2 apicid=0x12 [DEBUG] CPU: APIC: 12 enabled [SPEW ] lpaicid_start=0x10 node 0x0 core 0x3 apicid=0x13 [DEBUG] CPU: APIC: 13 enabled [DEBUG] scan_bus: bus CPU_CLUSTER: 0 finished in 0 msecs [DEBUG] DOMAIN: 00000000 scanning... [DEBUG] PCI: pci_scan_bus for segment group 00 bus 00 [INFO ] POST: 0x24 [DEBUG] PCI: 00:00:00.0 [1022/1410] enabled [SPEW ] PCI: 00:00:00.2 [1022/1419] ops [DEBUG] PCI: 00:00:00.2 [1022/1419] enabled [DEBUG] PCI: 00:00:01.0 [1002/990b] enabled [DEBUG] PCI: 00:00:01.1 [1002/9902] enabled [DEBUG] PCI: 00:00:02.0 subordinate bus PCI Express [DEBUG] PCI: 00:00:02.0 [1022/1412] enabled [DEBUG] PCI: 00:00:04.0 subordinate bus PCI Express [DEBUG] PCI: 00:00:04.0 [1022/1414] enabled [DEBUG] PCI: 00:00:05.0 subordinate bus PCI Express [DEBUG] PCI: 00:00:05.0 [1022/1415] enabled [DEBUG] hudson_enable() [INFO ] PCI: Static device PCI: 00:00:10.0 not found, disabling it. [DEBUG] hudson_enable() [SPEW ] PCI: 00:00:11.0 [1022/7801] ops [DEBUG] PCI: 00:00:11.0 [1022/7801] enabled [DEBUG] hudson_enable() [SPEW ] PCI: 00:00:12.0 [1022/7807] ops [DEBUG] PCI: 00:00:12.0 [1022/7807] enabled [DEBUG] hudson_enable() [SPEW ] PCI: 00:00:12.2 [1022/7808] ops [DEBUG] PCI: 00:00:12.2 [1022/7808] enabled [DEBUG] hudson_enable() [SPEW ] PCI: 00:00:13.0 [1022/7807] ops [DEBUG] PCI: 00:00:13.0 [1022/7807] enabled [DEBUG] hudson_enable() [SPEW ] PCI: 00:00:13.2 [1022/7808] ops [DEBUG] PCI: 00:00:13.2 [1022/7808] enabled [DEBUG] hudson_enable() [SPEW ] PCI: 00:00:14.0 [1022/780b] bus ops [DEBUG] PCI: 00:00:14.0 [1022/780b] enabled [DEBUG] hudson_enable() [SPEW ] PCI: 00:00:14.2 [1022/780d] ops [DEBUG] PCI: 00:00:14.2 [1022/780d] enabled [DEBUG] hudson_enable() [SPEW ] PCI: 00:00:14.3 [1022/780e] bus ops [DEBUG] PCI: 00:00:14.3 [1022/780e] enabled [DEBUG] hudson_enable() [SPEW ] PCI: 00:00:14.4 [1022/780f] bus ops [DEBUG] PCI: 00:00:14.4 [1022/780f] enabled [DEBUG] hudson_enable() [SPEW ] PCI: 00:00:14.5 [1022/7809] ops [DEBUG] PCI: 00:00:14.5 [1022/7809] enabled [DEBUG] hudson_enable() [DEBUG] hudson_enable() [DEBUG] hudson_enable() [DEBUG] hudson_enable() [DEBUG] hudson_enable() [DEBUG] hudson_enable() [SPEW ] PCI: 00:00:16.0 [1022/7807] ops [DEBUG] PCI: 00:00:16.0 [1022/7807] enabled [SPEW ] PCI: 00:00:16.2 [1022/7808] ops [DEBUG] PCI: 00:00:16.2 [1022/7808] enabled [SPEW ] PCI: 00:00:18.0 [1022/1400] ops [DEBUG] PCI: 00:00:18.0 [1022/1400] enabled [DEBUG] PCI: 00:00:18.1 [1022/1401] enabled [DEBUG] PCI: 00:00:18.2 [1022/1402] enabled [DEBUG] PCI: 00:00:18.3 [1022/1403] enabled [DEBUG] PCI: 00:00:18.4 [1022/1404] enabled [DEBUG] PCI: 00:00:18.5 [1022/1405] enabled [WARN ] PCI: Leftover static devices: [WARN ] PCI: 00:00:03.0 [WARN ] PCI: 00:00:06.0 [WARN ] PCI: 00:00:07.0 [WARN ] PCI: 00:00:08.0 [WARN ] PCI: 00:00:09.0 [WARN ] PCI: 00:00:10.0 [WARN ] PCI: 00:00:14.6 [WARN ] PCI: 00:00:14.7 [WARN ] PCI: 00:00:15.0 [WARN ] PCI: 00:00:15.1 [WARN ] PCI: 00:00:15.2 [WARN ] PCI: 00:00:15.3 [WARN ] PCI: Check your devicetree.cb. [DEBUG] PCI: 00:00:02.0 scanning... [SPEW ] do_pci_scan_bridge for PCI: 00:00:02.0 [DEBUG] PCI: pci_scan_bus for segment group 00 bus 01 [INFO ] POST: 0x24 [DEBUG] PCI: 00:01:00.0 [1002/6665] enabled [INFO ] POST: 0x25 [INFO ] Enabling Common Clock Configuration [INFO ] PCIE CLK PM is not supported by endpoint [INFO ] ASPM: Enabled L0s and L1 [INFO ] PCIe: Max_Payload_Size adjusted to 256 [DEBUG] PCI: 00:01:00.0: No LTR support [DEBUG] scan_bus: bus PCI: 00:00:02.0 finished in 0 msecs [DEBUG] PCI: 00:00:04.0 scanning... [SPEW ] do_pci_scan_bridge for PCI: 00:00:04.0 [DEBUG] PCI: pci_scan_bus for segment group 00 bus 02 [INFO ] POST: 0x24 [DEBUG] PCI: 00:02:00.0 [1969/10a0] enabled [INFO ] POST: 0x25 [INFO ] Enabling Common Clock Configuration [INFO ] ASPM: Enabled L0s and L1 [INFO ] PCIe: Max_Payload_Size adjusted to 256 [DEBUG] PCI: 00:02:00.0: No LTR support [DEBUG] scan_bus: bus PCI: 00:00:04.0 finished in 0 msecs [DEBUG] PCI: 00:00:05.0 scanning... [SPEW ] do_pci_scan_bridge for PCI: 00:00:05.0 [DEBUG] PCI: pci_scan_bus for segment group 00 bus 03 [INFO ] POST: 0x24 [DEBUG] PCI: 00:03:00.0 [168c/0034] enabled [INFO ] POST: 0x25 [INFO ] Enabling Common Clock Configuration [INFO ] PCIE CLK PM is not supported by endpoint [INFO ] ASPM: Enabled L0s and L1 [INFO ] PCIe: Max_Payload_Size adjusted to 128 [DEBUG] PCI: 00:03:00.0: No LTR support [DEBUG] scan_bus: bus PCI: 00:00:05.0 finished in 0 msecs [DEBUG] PCI: 00:00:14.0 scanning... [SPEW ] scan_generic_bus for PCI: 00:00:14.0 [SPEW ] scan_generic_bus for PCI: 00:00:14.0 done [DEBUG] scan_bus: bus PCI: 00:00:14.0 finished in 0 msecs [DEBUG] PCI: 00:00:14.3 scanning... [SPEW ] scan_static_bus for PCI: 00:00:14.3 [DEBUG] PNP: 00ff.1 enabled [DEBUG] PNP: 00ff.0 enabled [SPEW ] scan_static_bus for PCI: 00:00:14.3 done [DEBUG] scan_bus: bus PCI: 00:00:14.3 finished in 0 msecs [DEBUG] PCI: 00:00:14.4 scanning... [SPEW ] do_pci_scan_bridge for PCI: 00:00:14.4 [DEBUG] PCI: pci_scan_bus for segment group 00 bus 04 [INFO ] POST: 0x24 [INFO ] POST: 0x25 [DEBUG] scan_bus: bus PCI: 00:00:14.4 finished in 0 msecs [INFO ] POST: 0x25 [DEBUG] scan_bus: bus DOMAIN: 00000000 finished in 0 msecs [SPEW ] scan_static_bus for Root Device done [DEBUG] scan_bus: bus Root Device finished in 0 msecs [INFO ] done [DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 5 / 0 ms [INFO ] POST: 0x73 [INFO ] Timestamp - device configuration: 33323613399 [DEBUG] found VGA at PCI: 00:00:01.0 [DEBUG] Setting up VGA for PCI: 00:00:01.0 [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 00000000 [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device [INFO ] Allocating resources... [INFO ] Reading resources... [SPEW ] Root Device read_resources segment group 0 bus 0 link: 0 [SPEW ] CPU_CLUSTER: 0 read_resources segment group 0 bus 0 link: 0 [SPEW ] CPU_CLUSTER: 0 read_resources segment group 0 bus 0 link: 0 done [DEBUG] fx_devs=0x1 [SPEW ] DOMAIN: 00000000 read_resources segment group 0 bus 0 link: 0 [SPEW ] PCI: 00:00:02.0 read_resources segment group 0 bus 1 link: 0 [SPEW ] PCI: 00:00:02.0 read_resources segment group 0 bus 1 link: 0 done [SPEW ] PCI: 00:00:04.0 read_resources segment group 0 bus 2 link: 0 [SPEW ] PCI: 00:00:04.0 read_resources segment group 0 bus 2 link: 0 done [SPEW ] PCI: 00:00:05.0 read_resources segment group 0 bus 3 link: 0 [SPEW ] PCI: 00:00:05.0 read_resources segment group 0 bus 3 link: 0 done [DEBUG] More than one caller of pci_ehci_read_resources from PCI: 00:00:12.0 [DEBUG] PCI: 00:00:12.2 EHCI BAR hook registered [DEBUG] More than one caller of pci_ehci_read_resources from PCI: 00:00:13.0 [DEBUG] More than one caller of pci_ehci_read_resources from PCI: 00:00:13.2 [SPEW ] dev: PCI: 00:00:14.3, index: 0x2, base: 0xfec10000, size: 0x400 [SPEW ] PCI: 00:00:14.3 read_resources segment group 0 bus 0 link: 0 [ERROR] PNP: 00ff.1 missing read_resources [SPEW ] PCI: 00:00:14.3 read_resources segment group 0 bus 0 link: 0 done [SPEW ] PCI: 00:00:14.4 read_resources segment group 0 bus 4 link: 0 [SPEW ] PCI: 00:00:14.4 read_resources segment group 0 bus 4 link: 0 done [DEBUG] More than one caller of pci_ehci_read_resources from PCI: 00:00:14.5 [DEBUG] More than one caller of pci_ehci_read_resources from PCI: 00:00:16.0 [DEBUG] More than one caller of pci_ehci_read_resources from PCI: 00:00:16.2 [DEBUG] Adding PCIe enhanced config space BAR 0xf8000000-0xfc000000. [SPEW ] PCI: 00:00:18.0 read_resources segment group 0 bus 0 link: 0 [SPEW ] PCI: 00:00:18.0 read_resources segment group 0 bus 0 link: 0 done [SPEW ] PCI: 00:00:18.0 read_resources segment group 0 bus 0 link: 1 [SPEW ] PCI: 00:00:18.0 read_resources segment group 0 bus 0 link: 1 done [SPEW ] PCI: 00:00:18.0 read_resources segment group 0 bus 0 link: 2 [SPEW ] PCI: 00:00:18.0 read_resources segment group 0 bus 0 link: 2 done [SPEW ] PCI: 00:00:18.0 read_resources segment group 0 bus 0 link: 3 [SPEW ] PCI: 00:00:18.0 read_resources segment group 0 bus 0 link: 3 done [SPEW ] DOMAIN: 00000000 read_resources segment group 0 bus 0 link: 0 done [SPEW ] Root Device read_resources segment group 0 bus 0 link: 0 done [INFO ] Done reading resources. [SPEW ] Show resources in subtree (Root Device)...After reading. [DEBUG] Root Device child on link 0 CPU_CLUSTER: 0 [DEBUG] CPU_CLUSTER: 0 child on link 0 APIC: 10 [DEBUG] APIC: 10 [DEBUG] APIC: 11 [DEBUG] APIC: 12 [DEBUG] APIC: 13 [DEBUG] DOMAIN: 00000000 child on link 0 PCI: 00:00:00.0 [SPEW ] DOMAIN: 00000000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 [SPEW ] DOMAIN: 00000000 resource base 60000000 size 0 align 0 gran 0 limit fdffffff flags 40040200 index 10000100 [SPEW ] DOMAIN: 00000000 resource base 100000000 size 0 align 0 gran 0 limit ffffffffffff flags 40040200 index 10000200 [DEBUG] PCI: 00:00:00.0 [DEBUG] PCI: 00:00:00.2 [SPEW ] PCI: 00:00:00.2 resource base 0 size 80000 align 19 gran 19 limit ffffffff flags 200 index 44 [DEBUG] PCI: 00:00:01.0 [SPEW ] PCI: 00:00:01.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10 [SPEW ] PCI: 00:00:01.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 14 [SPEW ] PCI: 00:00:01.0 resource base 0 size 40000 align 18 gran 18 limit ffffffff flags 200 index 18 [DEBUG] PCI: 00:00:01.1 [SPEW ] PCI: 00:00:01.1 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10 [DEBUG] PCI: 00:00:02.0 child on link 0 PCI: 00:01:00.0 [SPEW ] PCI: 00:00:02.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c [SPEW ] PCI: 00:00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 [SPEW ] PCI: 00:00:02.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 [DEBUG] PCI: 00:01:00.0 [SPEW ] PCI: 00:01:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 10 [SPEW ] PCI: 00:01:00.0 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 18 [SPEW ] PCI: 00:01:00.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 20 [SPEW ] PCI: 00:01:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 2200 index 30 [DEBUG] PCI: 00:00:04.0 child on link 0 PCI: 00:02:00.0 [SPEW ] PCI: 00:00:04.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c [SPEW ] PCI: 00:00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 [SPEW ] PCI: 00:00:04.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 [DEBUG] PCI: 00:02:00.0 [SPEW ] PCI: 00:02:00.0 resource base 0 size 40000 align 18 gran 18 limit ffffffffffffffff flags 201 index 10 [SPEW ] PCI: 00:02:00.0 resource base 0 size 80 align 7 gran 7 limit ffff flags 100 index 18 [DEBUG] PCI: 00:00:05.0 child on link 0 PCI: 00:03:00.0 [SPEW ] PCI: 00:00:05.0 resource base 0 size 0 align 12 gran 12 limit ffffffff flags 80102 index 1c [SPEW ] PCI: 00:00:05.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 [SPEW ] PCI: 00:00:05.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 [DEBUG] PCI: 00:03:00.0 [SPEW ] PCI: 00:03:00.0 resource base 0 size 80000 align 19 gran 19 limit ffffffffffffffff flags 201 index 10 [SPEW ] PCI: 00:03:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 [DEBUG] PCI: 00:00:11.0 [SPEW ] PCI: 00:00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 [SPEW ] PCI: 00:00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 [SPEW ] PCI: 00:00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 [SPEW ] PCI: 00:00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c [SPEW ] PCI: 00:00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20 [SPEW ] PCI: 00:00:11.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 [DEBUG] PCI: 00:00:12.0 [SPEW ] PCI: 00:00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 [DEBUG] PCI: 00:00:12.2 [SPEW ] PCI: 00:00:12.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 [DEBUG] PCI: 00:00:13.0 [SPEW ] PCI: 00:00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 [DEBUG] PCI: 00:00:13.2 [SPEW ] PCI: 00:00:13.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 [DEBUG] PCI: 00:00:14.0 [DEBUG] PCI: 00:00:14.2 [SPEW ] PCI: 00:00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 [DEBUG] PCI: 00:00:14.3 child on link 0 PNP: 00ff.1 [SPEW ] PCI: 00:00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 [SPEW ] PCI: 00:00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 [SPEW ] PCI: 00:00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags f0000200 index 2 [SPEW ] PCI: 00:00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 [DEBUG] PNP: 00ff.1 [DEBUG] PNP: 00ff.0 [DEBUG] PCI: 00:00:14.4 [SPEW ] PCI: 00:00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c [SPEW ] PCI: 00:00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24 [SPEW ] PCI: 00:00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 [DEBUG] PCI: 00:00:14.5 [SPEW ] PCI: 00:00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 [DEBUG] PCI: 00:00:16.0 [SPEW ] PCI: 00:00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 [DEBUG] PCI: 00:00:16.2 [SPEW ] PCI: 00:00:16.2 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 [DEBUG] PCI: 00:00:18.0 [SPEW ] PCI: 00:00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 [DEBUG] PCI: 00:00:18.1 [DEBUG] PCI: 00:00:18.2 [DEBUG] PCI: 00:00:18.3 [DEBUG] PCI: 00:00:18.4 [DEBUG] PCI: 00:00:18.5 [SPEW ] DOMAIN: 00000000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff [SPEW ] PCI: 00:00:02.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff [SPEW ] PCI: 00:01:00.0 20 * [0x0 - 0xff] io [SPEW ] PCI: 00:00:02.0 io: base: 100 size: 1000 align: 12 gran: 12 limit: ffff done [SPEW ] PCI: 00:00:04.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff [SPEW ] PCI: 00:02:00.0 18 * [0x0 - 0x7f] io [SPEW ] PCI: 00:00:04.0 io: base: 80 size: 1000 align: 12 gran: 12 limit: ffff done [SPEW ] PCI: 00:00:05.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff [SPEW ] PCI: 00:00:05.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffffffff done [SPEW ] PCI: 00:00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff [SPEW ] PCI: 00:00:14.4 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done [SPEW ] PCI: 00:00:02.0 1c * [0x0 - 0xfff] io [SPEW ] PCI: 00:00:04.0 1c * [0x1000 - 0x1fff] io [SPEW ] PCI: 00:00:01.0 14 * [0x2000 - 0x20ff] io [SPEW ] PCI: 00:00:11.0 20 * [0x2400 - 0x240f] io [SPEW ] PCI: 00:00:11.0 10 * [0x2410 - 0x2417] io [SPEW ] PCI: 00:00:11.0 18 * [0x2418 - 0x241f] io [SPEW ] PCI: 00:00:11.0 14 * [0x2420 - 0x2423] io [SPEW ] PCI: 00:00:11.0 1c * [0x2424 - 0x2427] io [SPEW ] DOMAIN: 00000000 io: base: 2428 size: 2428 align: 12 gran: 0 limit: ffff done [SPEW ] DOMAIN: 00000000 mem: base: 60000000 size: 0 align: 0 gran: 0 limit: fdffffff [SPEW ] PCI: 00:00:02.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff [SPEW ] PCI: 00:01:00.0 10 * [0x0 - 0xfffffff] prefmem [SPEW ] PCI: 00:00:02.0 prefmem: base: 10000000 size: 10000000 align: 28 gran: 20 limit: ffffffffffffffff done [SPEW ] PCI: 00:00:02.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff [SPEW ] PCI: 00:01:00.0 18 * [0x0 - 0x3ffff] mem [SPEW ] PCI: 00:01:00.0 30 * [0x40000 - 0x5ffff] mem [SPEW ] PCI: 00:00:02.0 mem: base: 60000 size: 100000 align: 20 gran: 20 limit: ffffffff done [SPEW ] PCI: 00:00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff [SPEW ] PCI: 00:00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done [SPEW ] PCI: 00:00:04.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff [SPEW ] PCI: 00:02:00.0 10 * [0x0 - 0x3ffff] mem [SPEW ] PCI: 00:00:04.0 mem: base: 40000 size: 100000 align: 20 gran: 20 limit: ffffffff done [SPEW ] PCI: 00:00:05.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff [SPEW ] PCI: 00:00:05.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done [SPEW ] PCI: 00:00:05.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff [SPEW ] PCI: 00:03:00.0 10 * [0x0 - 0x7ffff] mem [SPEW ] PCI: 00:03:00.0 30 * [0x80000 - 0x8ffff] mem [SPEW ] PCI: 00:00:05.0 mem: base: 90000 size: 100000 align: 20 gran: 20 limit: ffffffff done [SPEW ] PCI: 00:00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff [SPEW ] PCI: 00:00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done [SPEW ] PCI: 00:00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff [SPEW ] PCI: 00:00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done [SPEW ] PCI: 00:00:01.0 10 * [0x60000000 - 0x6fffffff] prefmem [SPEW ] PCI: 00:00:02.0 24 * [0x70000000 - 0x7fffffff] prefmem [SPEW ] PCI: 00:00:02.0 20 * [0x80000000 - 0x800fffff] mem [SPEW ] PCI: 00:00:04.0 20 * [0x80100000 - 0x801fffff] mem [SPEW ] PCI: 00:00:05.0 20 * [0x80200000 - 0x802fffff] mem [SPEW ] PCI: 00:00:00.2 44 * [0x80300000 - 0x8037ffff] mem [SPEW ] PCI: 00:00:01.0 18 * [0x80380000 - 0x803bffff] mem [SPEW ] PCI: 00:00:01.1 10 * [0x803c0000 - 0x803c3fff] mem [SPEW ] PCI: 00:00:14.2 10 * [0x803c4000 - 0x803c7fff] mem [SPEW ] PCI: 00:00:12.0 10 * [0x803c8000 - 0x803c8fff] mem [SPEW ] PCI: 00:00:13.0 10 * [0x803c9000 - 0x803c9fff] mem [SPEW ] PCI: 00:00:14.5 10 * [0x803ca000 - 0x803cafff] mem [SPEW ] PCI: 00:00:16.0 10 * [0x803cb000 - 0x803cbfff] mem [SPEW ] PCI: 00:00:11.0 24 * [0x803cc000 - 0x803cc7ff] mem [SPEW ] PCI: 00:00:12.2 10 * [0x803cd000 - 0x803cd0ff] mem [SPEW ] PCI: 00:00:13.2 10 * [0x803ce000 - 0x803ce0ff] mem [SPEW ] PCI: 00:00:16.2 10 * [0x803cf000 - 0x803cf0ff] mem [SPEW ] DOMAIN: 00000000 mem: base: 803cf100 size: 203cf100 align: 28 gran: 0 limit: fdffffff done [SPEW ] DOMAIN: 00000000 mem: base: 100000000 size: 0 align: 0 gran: 0 limit: ffffffffffff [SPEW ] PCI: 00:00:02.0 prefmem: base: 70000000 size: 10000000 align: 28 gran: 20 limit: ffffffffffffffff [SPEW ] PCI: 00:01:00.0 10 * [0x70000000 - 0x7fffffff] prefmem [SPEW ] PCI: 00:00:02.0 prefmem: base: 80000000 size: 10000000 align: 28 gran: 20 limit: ffffffffffffffff done [SPEW ] PCI: 00:00:02.0 mem: base: 80000000 size: 100000 align: 20 gran: 20 limit: ffffffff [SPEW ] PCI: 00:01:00.0 18 * [0x80000000 - 0x8003ffff] mem [SPEW ] PCI: 00:01:00.0 30 * [0x80040000 - 0x8005ffff] mem [SPEW ] PCI: 00:00:02.0 mem: base: 80060000 size: 100000 align: 20 gran: 20 limit: ffffffff done [SPEW ] PCI: 00:00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff [SPEW ] PCI: 00:00:04.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done [SPEW ] PCI: 00:00:04.0 mem: base: 80100000 size: 100000 align: 20 gran: 20 limit: ffffffff [SPEW ] PCI: 00:02:00.0 10 * [0x80100000 - 0x8013ffff] mem [SPEW ] PCI: 00:00:04.0 mem: base: 80140000 size: 100000 align: 20 gran: 20 limit: ffffffff done [SPEW ] PCI: 00:00:05.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff [SPEW ] PCI: 00:00:05.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done [SPEW ] PCI: 00:00:05.0 mem: base: 80200000 size: 100000 align: 20 gran: 20 limit: ffffffff [SPEW ] PCI: 00:03:00.0 10 * [0x80200000 - 0x8027ffff] mem [SPEW ] PCI: 00:03:00.0 30 * [0x80280000 - 0x8028ffff] mem [SPEW ] PCI: 00:00:05.0 mem: base: 80290000 size: 100000 align: 20 gran: 20 limit: ffffffff done [SPEW ] PCI: 00:00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff [SPEW ] PCI: 00:00:14.4 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done [SPEW ] PCI: 00:00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff [SPEW ] PCI: 00:00:14.4 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done [SPEW ] PCI: 00:00:01.0 10 * [0x100000000 - 0x10fffffff] prefmem [SPEW ] PCI: 00:00:02.0 24 * [0x110000000 - 0x11fffffff] prefmem [SPEW ] PCI: 00:00:02.0 20 * [0x120000000 - 0x1200fffff] mem [SPEW ] PCI: 00:00:04.0 20 * [0x120100000 - 0x1201fffff] mem [SPEW ] PCI: 00:00:05.0 20 * [0x120200000 - 0x1202fffff] mem [SPEW ] PCI: 00:00:00.2 44 * [0x120300000 - 0x12037ffff] mem [SPEW ] PCI: 00:00:01.0 18 * [0x120380000 - 0x1203bffff] mem [SPEW ] PCI: 00:00:01.1 10 * [0x1203c0000 - 0x1203c3fff] mem [SPEW ] PCI: 00:00:14.2 10 * [0x1203c4000 - 0x1203c7fff] mem [SPEW ] PCI: 00:00:12.0 10 * [0x1203c8000 - 0x1203c8fff] mem [SPEW ] PCI: 00:00:13.0 10 * [0x1203c9000 - 0x1203c9fff] mem [SPEW ] PCI: 00:00:14.5 10 * [0x1203ca000 - 0x1203cafff] mem [SPEW ] PCI: 00:00:16.0 10 * [0x1203cb000 - 0x1203cbfff] mem [SPEW ] PCI: 00:00:11.0 24 * [0x1203cc000 - 0x1203cc7ff] mem [SPEW ] PCI: 00:00:12.2 10 * [0x1203cd000 - 0x1203cd0ff] mem [SPEW ] PCI: 00:00:13.2 10 * [0x1203ce000 - 0x1203ce0ff] mem [SPEW ] PCI: 00:00:16.2 10 * [0x1203cf000 - 0x1203cf0ff] mem [SPEW ] DOMAIN: 00000000 mem: base: 1203cf100 size: 203cf100 align: 28 gran: 0 limit: ffffffff done [SPEW ] avoid_fixed_resources: DOMAIN: 00000000 [SPEW ] avoid_fixed_resources:@DOMAIN: 00000000 10000000 limit 0000ffff [SPEW ] avoid_fixed_resources:@DOMAIN: 00000000 10000100 limit fdffffff [SPEW ] avoid_fixed_resources:@DOMAIN: 00000000 10000200 limit ffffffff [SPEW ] constrain_resources: PCI: 00:00:14.3 10000000 base 00000000 limit 00000fff io (fixed) [SPEW ] avoid_fixed_resources:@DOMAIN: 00000000 10000000 base 00001000 limit 0000ffff [SPEW ] avoid_fixed_resources:@DOMAIN: 00000000 10000100 base d0000000 limit fdffffff [SPEW ] avoid_fixed_resources:@DOMAIN: 00000000 10000200 base d0000000 limit fdffffff [INFO ] Setting resources... [SPEW ] DOMAIN: 00000000 io: base:1000 size:2428 align:12 gran:0 limit:ffff [SPEW ] PCI: 00:00:02.0 1c * [0x1000 - 0x1fff] io [SPEW ] PCI: 00:00:04.0 1c * [0x2000 - 0x2fff] io [SPEW ] PCI: 00:00:01.0 14 * [0x3000 - 0x30ff] io [SPEW ] PCI: 00:00:11.0 20 * [0x3400 - 0x340f] io [SPEW ] PCI: 00:00:11.0 10 * [0x3410 - 0x3417] io [SPEW ] PCI: 00:00:11.0 18 * [0x3418 - 0x341f] io [SPEW ] PCI: 00:00:11.0 14 * [0x3420 - 0x3423] io [SPEW ] PCI: 00:00:11.0 1c * [0x3424 - 0x3427] io [SPEW ] DOMAIN: 00000000 io: next_base: 3428 size: 2428 align: 12 gran: 0 done [SPEW ] PCI: 00:00:02.0 io: base:1000 size:1000 align:12 gran:12 limit:1fff [SPEW ] PCI: 00:01:00.0 20 * [0x1000 - 0x10ff] io [SPEW ] PCI: 00:00:02.0 io: next_base: 1100 size: 1000 align: 12 gran: 12 done [SPEW ] PCI: 00:00:04.0 io: base:2000 size:1000 align:12 gran:12 limit:2fff [SPEW ] PCI: 00:02:00.0 18 * [0x2000 - 0x207f] io [SPEW ] PCI: 00:00:04.0 io: next_base: 2080 size: 1000 align: 12 gran: 12 done [SPEW ] PCI: 00:00:05.0 io: base:0 size:0 align:12 gran:12 limit:ffff [SPEW ] PCI: 00:00:05.0 io: next_base: 0 size: 0 align: 12 gran: 12 done [SPEW ] PCI: 00:00:14.4 io: base:0 size:0 align:12 gran:12 limit:ffff [SPEW ] PCI: 00:00:14.4 io: next_base: 0 size: 0 align: 12 gran: 12 done [SPEW ] DOMAIN: 00000000 mem: base:d0000000 size:203cf100 align:28 gran:0 limit:fdffffff [SPEW ] PCI: 00:00:01.0 10 * [0xd0000000 - 0xdfffffff] prefmem [SPEW ] PCI: 00:00:02.0 24 * [0xe0000000 - 0xefffffff] prefmem [SPEW ] PCI: 00:00:02.0 20 * [0xf0000000 - 0xf00fffff] mem [SPEW ] PCI: 00:00:04.0 20 * [0xf0100000 - 0xf01fffff] mem [SPEW ] PCI: 00:00:05.0 20 * [0xf0200000 - 0xf02fffff] mem [SPEW ] PCI: 00:00:00.2 44 * [0xf0300000 - 0xf037ffff] mem [SPEW ] PCI: 00:00:01.0 18 * [0xf0380000 - 0xf03bffff] mem [SPEW ] PCI: 00:00:01.1 10 * [0xf03c0000 - 0xf03c3fff] mem [SPEW ] PCI: 00:00:14.2 10 * [0xf03c4000 - 0xf03c7fff] mem [SPEW ] PCI: 00:00:12.0 10 * [0xf03c8000 - 0xf03c8fff] mem [SPEW ] PCI: 00:00:13.0 10 * [0xf03c9000 - 0xf03c9fff] mem [SPEW ] PCI: 00:00:14.5 10 * [0xf03ca000 - 0xf03cafff] mem [SPEW ] PCI: 00:00:16.0 10 * [0xf03cb000 - 0xf03cbfff] mem [SPEW ] PCI: 00:00:11.0 24 * [0xf03cc000 - 0xf03cc7ff] mem [SPEW ] PCI: 00:00:12.2 10 * [0xf03cd000 - 0xf03cd0ff] mem [SPEW ] PCI: 00:00:13.2 10 * [0xf03ce000 - 0xf03ce0ff] mem [SPEW ] PCI: 00:00:16.2 10 * [0xf03cf000 - 0xf03cf0ff] mem [SPEW ] DOMAIN: 00000000 mem: next_base: f03cf100 size: 203cf100 align: 28 gran: 0 done [SPEW ] PCI: 00:00:02.0 prefmem: base:e0000000 size:10000000 align:28 gran:20 limit:efffffff [SPEW ] PCI: 00:01:00.0 10 * [0xe0000000 - 0xefffffff] prefmem [SPEW ] PCI: 00:00:02.0 prefmem: next_base: f0000000 size: 10000000 align: 28 gran: 20 done [SPEW ] PCI: 00:00:02.0 mem: base:f0000000 size:100000 align:20 gran:20 limit:f00fffff [SPEW ] PCI: 00:01:00.0 18 * [0xf0000000 - 0xf003ffff] mem [SPEW ] PCI: 00:01:00.0 30 * [0xf0040000 - 0xf005ffff] mem [SPEW ] PCI: 00:00:02.0 mem: next_base: f0060000 size: 100000 align: 20 gran: 20 done [SPEW ] PCI: 00:00:04.0 prefmem: base:0 size:0 align:20 gran:20 limit:fdffffff [SPEW ] PCI: 00:00:04.0 prefmem: next_base: 0 size: 0 align: 20 gran: 20 done [SPEW ] PCI: 00:00:04.0 mem: base:f0100000 size:100000 align:20 gran:20 limit:f01fffff [SPEW ] PCI: 00:02:00.0 10 * [0xf0100000 - 0xf013ffff] mem [SPEW ] PCI: 00:00:04.0 mem: next_base: f0140000 size: 100000 align: 20 gran: 20 done [SPEW ] PCI: 00:00:05.0 prefmem: base:0 size:0 align:20 gran:20 limit:fdffffff [SPEW ] PCI: 00:00:05.0 prefmem: next_base: 0 size: 0 align: 20 gran: 20 done [SPEW ] PCI: 00:00:05.0 mem: base:f0200000 size:100000 align:20 gran:20 limit:f02fffff [SPEW ] PCI: 00:03:00.0 10 * [0xf0200000 - 0xf027ffff] mem [SPEW ] PCI: 00:03:00.0 30 * [0xf0280000 - 0xf028ffff] mem [SPEW ] PCI: 00:00:05.0 mem: next_base: f0290000 size: 100000 align: 20 gran: 20 done [SPEW ] PCI: 00:00:14.4 prefmem: base:0 size:0 align:20 gran:20 limit:fdffffff [SPEW ] PCI: 00:00:14.4 prefmem: next_base: 0 size: 0 align: 20 gran: 20 done [SPEW ] PCI: 00:00:14.4 mem: base:0 size:0 align:20 gran:20 limit:fdffffff [SPEW ] PCI: 00:00:14.4 mem: next_base: 0 size: 0 align: 20 gran: 20 done [SPEW ] DOMAIN: 00000000 mem: base:d0000000 size:203cf100 align:28 gran:0 limit:fdffffff [SPEW ] PCI: 00:00:01.0 10 * [0xd0000000 - 0xdfffffff] prefmem [SPEW ] PCI: 00:00:02.0 24 * [0xe0000000 - 0xefffffff] prefmem [SPEW ] PCI: 00:00:02.0 20 * [0xf0000000 - 0xf00fffff] mem [SPEW ] PCI: 00:00:04.0 20 * [0xf0100000 - 0xf01fffff] mem [SPEW ] PCI: 00:00:05.0 20 * [0xf0200000 - 0xf02fffff] mem [SPEW ] PCI: 00:00:00.2 44 * [0xf0300000 - 0xf037ffff] mem [SPEW ] PCI: 00:00:01.0 18 * [0xf0380000 - 0xf03bffff] mem [SPEW ] PCI: 00:00:01.1 10 * [0xf03c0000 - 0xf03c3fff] mem [SPEW ] PCI: 00:00:14.2 10 * [0xf03c4000 - 0xf03c7fff] mem [SPEW ] PCI: 00:00:12.0 10 * [0xf03c8000 - 0xf03c8fff] mem [SPEW ] PCI: 00:00:13.0 10 * [0xf03c9000 - 0xf03c9fff] mem [SPEW ] PCI: 00:00:14.5 10 * [0xf03ca000 - 0xf03cafff] mem [SPEW ] PCI: 00:00:16.0 10 * [0xf03cb000 - 0xf03cbfff] mem [SPEW ] PCI: 00:00:11.0 24 * [0xf03cc000 - 0xf03cc7ff] mem [SPEW ] PCI: 00:00:12.2 10 * [0xf03cd000 - 0xf03cd0ff] mem [SPEW ] PCI: 00:00:13.2 10 * [0xf03ce000 - 0xf03ce0ff] mem [SPEW ] PCI: 00:00:16.2 10 * [0xf03cf000 - 0xf03cf0ff] mem [SPEW ] DOMAIN: 00000000 mem: next_base: f03cf100 size: 203cf100 align: 28 gran: 0 done [SPEW ] PCI: 00:00:02.0 prefmem: base:e0000000 size:10000000 align:28 gran:20 limit:efffffff [SPEW ] PCI: 00:01:00.0 10 * [0xe0000000 - 0xefffffff] prefmem [SPEW ] PCI: 00:00:02.0 prefmem: next_base: f0000000 size: 10000000 align: 28 gran: 20 done [SPEW ] PCI: 00:00:02.0 mem: base:f0000000 size:100000 align:20 gran:20 limit:f00fffff [SPEW ] PCI: 00:01:00.0 18 * [0xf0000000 - 0xf003ffff] mem [SPEW ] PCI: 00:01:00.0 30 * [0xf0040000 - 0xf005ffff] mem [SPEW ] PCI: 00:00:02.0 mem: next_base: f0060000 size: 100000 align: 20 gran: 20 done [SPEW ] PCI: 00:00:04.0 prefmem: base:0 size:0 align:20 gran:20 limit:fdffffff [SPEW ] PCI: 00:00:04.0 prefmem: next_base: 0 size: 0 align: 20 gran: 20 done [SPEW ] PCI: 00:00:04.0 mem: base:f0100000 size:100000 align:20 gran:20 limit:f01fffff [SPEW ] PCI: 00:02:00.0 10 * [0xf0100000 - 0xf013ffff] mem [SPEW ] PCI: 00:00:04.0 mem: next_base: f0140000 size: 100000 align: 20 gran: 20 done [SPEW ] PCI: 00:00:05.0 prefmem: base:0 size:0 align:20 gran:20 limit:fdffffff [SPEW ] PCI: 00:00:05.0 prefmem: next_base: 0 size: 0 align: 20 gran: 20 done [SPEW ] PCI: 00:00:05.0 mem: base:f0200000 size:100000 align:20 gran:20 limit:f02fffff [SPEW ] PCI: 00:03:00.0 10 * [0xf0200000 - 0xf027ffff] mem [SPEW ] PCI: 00:03:00.0 30 * [0xf0280000 - 0xf028ffff] mem [SPEW ] PCI: 00:00:05.0 mem: next_base: f0290000 size: 100000 align: 20 gran: 20 done [SPEW ] PCI: 00:00:14.4 prefmem: base:0 size:0 align:20 gran:20 limit:fdffffff [SPEW ] PCI: 00:00:14.4 prefmem: next_base: 0 size: 0 align: 20 gran: 20 done [SPEW ] PCI: 00:00:14.4 mem: base:0 size:0 align:20 gran:20 limit:fdffffff [SPEW ] PCI: 00:00:14.4 mem: next_base: 0 size: 0 align: 20 gran: 20 done [SPEW ] Root Device assign_resources, segment group 0 bus 0 link: 0 [SPEW ] dev: DOMAIN: 00000000, index: 0x10, base: 0x0, size: 0xa0000 [SPEW ] dev: DOMAIN: 00000000, index: 0x20, base: 0xc0000, size: 0x7ff40000 [SPEW ] dev: DOMAIN: 00000000, index: 0x30, base: 0x100000000, size: 0x37f000000 [DEBUG] node 0: mmio_basek=00200000, basek=00400000, limitk=011fc000 [INFO ] add_uma_resource_below_tolm: uma size 0x20000000, memory start 0x60000000 [SPEW ] dev: DOMAIN: 00000000, index: 0x7, base: 0x60000000, size: 0x20000000 [SPEW ] DOMAIN: 00000000 assign_resources, segment group 0 bus 0 link: 0 [DEBUG] PCI: 00:00:00.2 44 <- [0x00000000f0300000 - 0x00000000f037ffff] size 0x00080000 gran 0x13 mem [DEBUG] PCI: 00:00:01.0 10 <- [0x00000000d0000000 - 0x00000000dfffffff] size 0x10000000 gran 0x1c prefmem [DEBUG] PCI: 00:00:01.0 14 <- [0x0000000000003000 - 0x00000000000030ff] size 0x00000100 gran 0x08 io [DEBUG] PCI: 00:00:01.0 18 <- [0x00000000f0380000 - 0x00000000f03bffff] size 0x00040000 gran 0x12 mem [DEBUG] PCI: 00:00:01.1 10 <- [0x00000000f03c0000 - 0x00000000f03c3fff] size 0x00004000 gran 0x0e mem [DEBUG] PCI: 00:00:02.0 1c <- [0x0000000000001000 - 0x0000000000001fff] size 0x00001000 gran 0x0c seg 00 bus 01 io [DEBUG] PCI: 00:00:02.0 24 <- [0x00000000e0000000 - 0x00000000efffffff] size 0x10000000 gran 0x14 seg 00 bus 01 prefmem [DEBUG] PCI: 00:00:02.0 20 <- [0x00000000f0000000 - 0x00000000f00fffff] size 0x00100000 gran 0x14 seg 00 bus 01 mem [SPEW ] PCI: 00:00:02.0 assign_resources, segment group 0 bus 1 link: 0 [DEBUG] PCI: 00:01:00.0 10 <- [0x00000000e0000000 - 0x00000000efffffff] size 0x10000000 gran 0x1c prefmem64 [DEBUG] PCI: 00:01:00.0 18 <- [0x00000000f0000000 - 0x00000000f003ffff] size 0x00040000 gran 0x12 mem64 [DEBUG] PCI: 00:01:00.0 20 <- [0x0000000000001000 - 0x00000000000010ff] size 0x00000100 gran 0x08 io [DEBUG] PCI: 00:01:00.0 30 <- [0x00000000f0040000 - 0x00000000f005ffff] size 0x00020000 gran 0x11 romem [SPEW ] PCI: 00:00:02.0 assign_resources, segment group 0 bus 1 link: 0 done [DEBUG] PCI: 00:00:04.0 1c <- [0x0000000000002000 - 0x0000000000002fff] size 0x00001000 gran 0x0c seg 00 bus 02 io [DEBUG] PCI: 00:00:04.0 24 <- [0x00000000fdffffff - 0x00000000fdfffffe] size 0x00000000 gran 0x14 seg 00 bus 02 prefmem [DEBUG] PCI: 00:00:04.0 20 <- [0x00000000f0100000 - 0x00000000f01fffff] size 0x00100000 gran 0x14 seg 00 bus 02 mem [SPEW ] PCI: 00:00:04.0 assign_resources, segment group 0 bus 2 link: 0 [DEBUG] PCI: 00:02:00.0 10 <- [0x00000000f0100000 - 0x00000000f013ffff] size 0x00040000 gran 0x12 mem64 [DEBUG] PCI: 00:02:00.0 18 <- [0x0000000000002000 - 0x000000000000207f] size 0x00000080 gran 0x07 io [SPEW ] PCI: 00:00:04.0 assign_resources, segment group 0 bus 2 link: 0 done [DEBUG] PCI: 00:00:05.0 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 03 io [DEBUG] PCI: 00:00:05.0 24 <- [0x00000000fdffffff - 0x00000000fdfffffe] size 0x00000000 gran 0x14 seg 00 bus 03 prefmem [DEBUG] PCI: 00:00:05.0 20 <- [0x00000000f0200000 - 0x00000000f02fffff] size 0x00100000 gran 0x14 seg 00 bus 03 mem [SPEW ] PCI: 00:00:05.0 assign_resources, segment group 0 bus 3 link: 0 [DEBUG] PCI: 00:03:00.0 10 <- [0x00000000f0200000 - 0x00000000f027ffff] size 0x00080000 gran 0x13 mem64 [DEBUG] PCI: 00:03:00.0 30 <- [0x00000000f0280000 - 0x00000000f028ffff] size 0x00010000 gran 0x10 romem [SPEW ] PCI: 00:00:05.0 assign_resources, segment group 0 bus 3 link: 0 done [DEBUG] PCI: 00:00:11.0 10 <- [0x0000000000003410 - 0x0000000000003417] size 0x00000008 gran 0x03 io [DEBUG] PCI: 00:00:11.0 14 <- [0x0000000000003420 - 0x0000000000003423] size 0x00000004 gran 0x02 io [DEBUG] PCI: 00:00:11.0 18 <- [0x0000000000003418 - 0x000000000000341f] size 0x00000008 gran 0x03 io [DEBUG] PCI: 00:00:11.0 1c <- [0x0000000000003424 - 0x0000000000003427] size 0x00000004 gran 0x02 io [DEBUG] PCI: 00:00:11.0 20 <- [0x0000000000003400 - 0x000000000000340f] size 0x00000010 gran 0x04 io [DEBUG] PCI: 00:00:11.0 24 <- [0x00000000f03cc000 - 0x00000000f03cc7ff] size 0x00000800 gran 0x0b mem [DEBUG] PCI: 00:00:12.0 10 <- [0x00000000f03c8000 - 0x00000000f03c8fff] size 0x00001000 gran 0x0c mem [DEBUG] PCI: 00:00:12.2 EHCI Debug Port hook triggered [DEBUG] PCI: 00:00:12.2 10 <- [0x00000000f03cd000 - 0x00000000f03cd0ff] size 0x00000100 gran 0x08 mem [DEBUG] PCI: 00:00:12.2 10 <- [0x00000000f03cd000 - 0x00000000f03cd0ff] size 0x00000100 gran 0x08 mem [DEBUG] PCI: 00:00:12.2 EHCI Debug Port relocated [DEBUG] PCI: 00:00:13.0 10 <- [0x00000000f03c9000 - 0x00000000f03c9fff] size 0x00001000 gran 0x0c mem [DEBUG] PCI: 00:00:13.2 10 <- [0x00000000f03ce000 - 0x00000000f03ce0ff] size 0x00000100 gran 0x08 mem [DEBUG] PCI: 00:00:14.2 10 <- [0x00000000f03c4000 - 0x00000000f03c7fff] size 0x00004000 gran 0x0e mem64 [SPEW ] PCI: 00:00:14.3 assign_resources, segment group 0 bus 0 link: 0 [SPEW ] PCI: 00:00:14.3 assign_resources, segment group 0 bus 0 link: 0 done [DEBUG] PCI: 00:00:14.4 1c <- [0x000000000000ffff - 0x000000000000fffe] size 0x00000000 gran 0x0c seg 00 bus 04 io [DEBUG] PCI: 00:00:14.4 24 <- [0x00000000fdffffff - 0x00000000fdfffffe] size 0x00000000 gran 0x14 seg 00 bus 04 prefmem [DEBUG] PCI: 00:00:14.4 20 <- [0x00000000fdffffff - 0x00000000fdfffffe] size 0x00000000 gran 0x14 seg 00 bus 04 mem [DEBUG] PCI: 00:00:14.5 10 <- [0x00000000f03ca000 - 0x00000000f03cafff] size 0x00001000 gran 0x0c mem [DEBUG] PCI: 00:00:16.0 10 <- [0x00000000f03cb000 - 0x00000000f03cbfff] size 0x00001000 gran 0x0c mem [DEBUG] PCI: 00:00:16.2 10 <- [0x00000000f03cf000 - 0x00000000f03cf0ff] size 0x00000100 gran 0x08 mem [SPEW ] DOMAIN: 00000000 assign_resources, segment group 0 bus 0 link: 0 done [SPEW ] Root Device assign_resources, segment group 0 bus 0 link: 0 done [INFO ] Done setting resources. [SPEW ] Show resources in subtree (Root Device)...After assigning values. [DEBUG] Root Device child on link 0 CPU_CLUSTER: 0 [DEBUG] CPU_CLUSTER: 0 child on link 0 APIC: 10 [DEBUG] APIC: 10 [DEBUG] APIC: 11 [DEBUG] APIC: 12 [DEBUG] APIC: 13 [DEBUG] DOMAIN: 00000000 child on link 0 PCI: 00:00:00.0 [SPEW ] DOMAIN: 00000000 resource base 1000 size 2428 align 12 gran 0 limit ffff flags 40040100 index 10000000 [SPEW ] DOMAIN: 00000000 resource base d0000000 size 203cf100 align 28 gran 0 limit fdffffff flags 40040200 index 10000100 [SPEW ] DOMAIN: 00000000 resource base d0000000 size 203cf100 align 28 gran 0 limit fdffffff flags 40040200 index 10000200 [SPEW ] DOMAIN: 00000000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10 [SPEW ] DOMAIN: 00000000 resource base c0000 size 7ff40000 align 0 gran 0 limit 0 flags e0004200 index 20 [SPEW ] DOMAIN: 00000000 resource base 100000000 size 37f000000 align 0 gran 0 limit 0 flags e0004200 index 30 [SPEW ] DOMAIN: 00000000 resource base 60000000 size 20000000 align 0 gran 0 limit 0 flags f0000200 index 7 [DEBUG] PCI: 00:00:00.0 [DEBUG] PCI: 00:00:00.2 [SPEW ] PCI: 00:00:00.2 resource base f0300000 size 80000 align 19 gran 19 limit f037ffff flags 60000200 index 44 [DEBUG] PCI: 00:00:01.0 [SPEW ] PCI: 00:00:01.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001200 index 10 [SPEW ] PCI: 00:00:01.0 resource base 3000 size 100 align 8 gran 8 limit 30ff flags 60000100 index 14 [SPEW ] PCI: 00:00:01.0 resource base f0380000 size 40000 align 18 gran 18 limit f03bffff flags 60000200 index 18 [DEBUG] PCI: 00:00:01.1 [SPEW ] PCI: 00:00:01.1 resource base f03c0000 size 4000 align 14 gran 14 limit f03c3fff flags 60000200 index 10 [DEBUG] PCI: 00:00:02.0 child on link 0 PCI: 00:01:00.0 [SPEW ] PCI: 00:00:02.0 resource base 1000 size 1000 align 12 gran 12 limit 1fff flags 60080102 index 1c [SPEW ] PCI: 00:00:02.0 resource base e0000000 size 10000000 align 28 gran 20 limit efffffff flags 60081202 index 24 [SPEW ] PCI: 00:00:02.0 resource base f0000000 size 100000 align 20 gran 20 limit f00fffff flags 60080202 index 20 [DEBUG] PCI: 00:01:00.0 [SPEW ] PCI: 00:01:00.0 resource base e0000000 size 10000000 align 28 gran 28 limit efffffff flags 60001201 index 10 [SPEW ] PCI: 00:01:00.0 resource base f0000000 size 40000 align 18 gran 18 limit f003ffff flags 60000201 index 18 [SPEW ] PCI: 00:01:00.0 resource base 1000 size 100 align 8 gran 8 limit 10ff flags 60000100 index 20 [SPEW ] PCI: 00:01:00.0 resource base f0040000 size 20000 align 17 gran 17 limit f005ffff flags 60002200 index 30 [DEBUG] PCI: 00:00:04.0 child on link 0 PCI: 00:02:00.0 [SPEW ] PCI: 00:00:04.0 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c [SPEW ] PCI: 00:00:04.0 resource base fdffffff size 0 align 20 gran 20 limit fdffffff flags 60081202 index 24 [SPEW ] PCI: 00:00:04.0 resource base f0100000 size 100000 align 20 gran 20 limit f01fffff flags 60080202 index 20 [DEBUG] PCI: 00:02:00.0 [SPEW ] PCI: 00:02:00.0 resource base f0100000 size 40000 align 18 gran 18 limit f013ffff flags 60000201 index 10 [SPEW ] PCI: 00:02:00.0 resource base 2000 size 80 align 7 gran 7 limit 207f flags 60000100 index 18 [DEBUG] PCI: 00:00:05.0 child on link 0 PCI: 00:03:00.0 [SPEW ] PCI: 00:00:05.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c [SPEW ] PCI: 00:00:05.0 resource base fdffffff size 0 align 20 gran 20 limit fdffffff flags 60081202 index 24 [SPEW ] PCI: 00:00:05.0 resource base f0200000 size 100000 align 20 gran 20 limit f02fffff flags 60080202 index 20 [DEBUG] PCI: 00:03:00.0 [SPEW ] PCI: 00:03:00.0 resource base f0200000 size 80000 align 19 gran 19 limit f027ffff flags 60000201 index 10 [SPEW ] PCI: 00:03:00.0 resource base f0280000 size 10000 align 16 gran 16 limit f028ffff flags 60002200 index 30 [DEBUG] PCI: 00:00:11.0 [SPEW ] PCI: 00:00:11.0 resource base 3410 size 8 align 3 gran 3 limit 3417 flags 60000100 index 10 [SPEW ] PCI: 00:00:11.0 resource base 3420 size 4 align 2 gran 2 limit 3423 flags 60000100 index 14 [SPEW ] PCI: 00:00:11.0 resource base 3418 size 8 align 3 gran 3 limit 341f flags 60000100 index 18 [SPEW ] PCI: 00:00:11.0 resource base 3424 size 4 align 2 gran 2 limit 3427 flags 60000100 index 1c [SPEW ] PCI: 00:00:11.0 resource base 3400 size 10 align 4 gran 4 limit 340f flags 60000100 index 20 [SPEW ] PCI: 00:00:11.0 resource base f03cc000 size 800 align 12 gran 11 limit f03cc7ff flags 60000200 index 24 [DEBUG] PCI: 00:00:12.0 [SPEW ] PCI: 00:00:12.0 resource base f03c8000 size 1000 align 12 gran 12 limit f03c8fff flags 60000200 index 10 [DEBUG] PCI: 00:00:12.2 [SPEW ] PCI: 00:00:12.2 resource base f03cd000 size 100 align 12 gran 8 limit f03cd0ff flags 60000200 index 10 [DEBUG] PCI: 00:00:13.0 [SPEW ] PCI: 00:00:13.0 resource base f03c9000 size 1000 align 12 gran 12 limit f03c9fff flags 60000200 index 10 [DEBUG] PCI: 00:00:13.2 [SPEW ] PCI: 00:00:13.2 resource base f03ce000 size 100 align 12 gran 8 limit f03ce0ff flags 60000200 index 10 [DEBUG] PCI: 00:00:14.0 [DEBUG] PCI: 00:00:14.2 [SPEW ] PCI: 00:00:14.2 resource base f03c4000 size 4000 align 14 gran 14 limit f03c7fff flags 60000201 index 10 [DEBUG] PCI: 00:00:14.3 child on link 0 PNP: 00ff.1 [SPEW ] PCI: 00:00:14.3 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 [SPEW ] PCI: 00:00:14.3 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags c0040200 index 10000100 [SPEW ] PCI: 00:00:14.3 resource base fec10000 size 400 align 0 gran 0 limit 0 flags f0000200 index 2 [SPEW ] PCI: 00:00:14.3 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 [DEBUG] PNP: 00ff.1 [DEBUG] PNP: 00ff.0 [DEBUG] PCI: 00:00:14.4 [SPEW ] PCI: 00:00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c [SPEW ] PCI: 00:00:14.4 resource base fdffffff size 0 align 20 gran 20 limit fdffffff flags 60081202 index 24 [SPEW ] PCI: 00:00:14.4 resource base fdffffff size 0 align 20 gran 20 limit fdffffff flags 60080202 index 20 [DEBUG] PCI: 00:00:14.5 [SPEW ] PCI: 00:00:14.5 resource base f03ca000 size 1000 align 12 gran 12 limit f03cafff flags 60000200 index 10 [DEBUG] PCI: 00:00:16.0 [SPEW ] PCI: 00:00:16.0 resource base f03cb000 size 1000 align 12 gran 12 limit f03cbfff flags 60000200 index 10 [DEBUG] PCI: 00:00:16.2 [SPEW ] PCI: 00:00:16.2 resource base f03cf000 size 100 align 12 gran 8 limit f03cf0ff flags 60000200 index 10 [DEBUG] PCI: 00:00:18.0 [SPEW ] PCI: 00:00:18.0 resource base f8000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index c0010058 [DEBUG] PCI: 00:00:18.1 [DEBUG] PCI: 00:00:18.2 [DEBUG] PCI: 00:00:18.3 [DEBUG] PCI: 00:00:18.4 [DEBUG] PCI: 00:00:18.5 [INFO ] Done allocating resources. [DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 1 / 1 ms [DEBUG] APIC 00: ** Enter AmdInitMid [00020005] [INFO ] Timestamp - calling AmdInitMid: 33334009384 [INFO ] Timestamp - back from AmdInitMid: 33361221487 [DEBUG] AmdInitMid() returned AGESA_SUCCESS [DEBUG] APIC 00: Heap in SystemMem (4) at 0x10000014 [DEBUG] APIC 00: ** Exit AmdInitMid [00020005] [DEBUG] PCI_INTR tables: Writing registers C00/C01 for PIC mode PCI IRQ routing: [DEBUG] PCI_INTR_INDEX PCI_INTR_DATA [DEBUG] 0x00 INTA# : 0x03 [DEBUG] 0x01 INTB# : 0x04 [DEBUG] 0x02 INTC# : 0x05 [DEBUG] 0x03 INTD# : 0x07 [DEBUG] 0x04 INTE# : 0x1F [DEBUG] 0x05 INTF# : 0x1F [DEBUG] 0x06 INTG# : 0x1F [DEBUG] 0x07 INTH# : 0x1F [DEBUG] 0x08 Misc : 0xAA [DEBUG] 0x09 Misc0 : 0xF1 [DEBUG] 0x0A Misc1 : 0x00 [DEBUG] 0x0B Misc2 : 0x00 [DEBUG] 0x0C Ser IRQ INTA : 0x1F [DEBUG] 0x0D Ser IRQ INTB : 0x1F [DEBUG] 0x0E Ser IRQ INTC : 0x1F [DEBUG] 0x0F Ser IRQ INTD : 0x1F [DEBUG] 0x10 SCI : 0x09 [DEBUG] 0x11 SMBUS0 : 0x1F [DEBUG] 0x12 ASF : 0x1F [DEBUG] 0x13 HDA : 0x03 [DEBUG] 0x14 SD : 0x1F [DEBUG] 0x15 GEC : 0x1F [DEBUG] 0x16 PerMon : 0x1F [DEBUG] 0x20 IMC INT0 : 0x1F [DEBUG] 0x21 IMC INT1 : 0x1F [DEBUG] 0x22 IMC INT2 : 0x1F [DEBUG] 0x23 IMC INT3 : 0x1F [DEBUG] 0x24 IMC INT4 : 0x1F [DEBUG] 0x25 IMC INT5 : 0x1F [DEBUG] 0x30 Dev18.0 INTA : 0x05 [DEBUG] 0x31 Dev18.2 INTB : 0x04 [DEBUG] 0x32 Dev19.0 INTA : 0x05 [DEBUG] 0x33 Dev19.2 INTB : 0x04 [DEBUG] 0x34 Dev22.0 INTA : 0x05 [DEBUG] 0x35 Dev22.2 INTB : 0x04 [DEBUG] 0x36 Dev20.5 INTC : 0x05 [DEBUG] 0x40 IDE : 0x1F [DEBUG] 0x41 SATA : 0x07 [DEBUG] 0x50 GPPInt0 : 0x1F [DEBUG] 0x51 GPPInt1 : 0x1F [DEBUG] 0x52 GPPInt2 : 0x1F [DEBUG] 0x53 GPPInt3 : 0x1F [DEBUG] PCI_INTR tables: Writing registers C00/C01 for APIC mode PCI IRQ routing: [DEBUG] PCI_INTR_INDEX PCI_INTR_DATA [DEBUG] 0x00 INTA# : 0x10 [DEBUG] 0x01 INTB# : 0x11 [DEBUG] 0x02 INTC# : 0x12 [DEBUG] 0x03 INTD# : 0x13 [DEBUG] 0x04 INTE# : 0x1F [DEBUG] 0x05 INTF# : 0x1F [DEBUG] 0x06 INTG# : 0x1F [DEBUG] 0x07 INTH# : 0x1F [DEBUG] 0x08 Misc : 0x00 [DEBUG] 0x09 Misc0 : 0x00 [DEBUG] 0x0A Misc1 : 0x00 [DEBUG] 0x0B Misc2 : 0x00 [DEBUG] 0x0C Ser IRQ INTA : 0x1F [DEBUG] 0x0D Ser IRQ INTB : 0x1F [DEBUG] 0x0E Ser IRQ INTC : 0x1F [DEBUG] 0x0F Ser IRQ INTD : 0x1F [DEBUG] 0x10 SCI : 0x09 [DEBUG] 0x11 SMBUS0 : 0x1F [DEBUG] 0x12 ASF : 0x1F [DEBUG] 0x13 HDA : 0x10 [DEBUG] 0x14 SD : 0x1F [DEBUG] 0x15 GEC : 0x1F [DEBUG] 0x16 PerMon : 0x1F [DEBUG] 0x20 IMC INT0 : 0x1F [DEBUG] 0x21 IMC INT1 : 0x1F [DEBUG] 0x22 IMC INT2 : 0x1F [DEBUG] 0x23 IMC INT3 : 0x1F [DEBUG] 0x24 IMC INT4 : 0x1F [DEBUG] 0x25 IMC INT5 : 0x1F [DEBUG] 0x30 Dev18.0 INTA : 0x12 [DEBUG] 0x31 Dev18.2 INTB : 0x11 [DEBUG] 0x32 Dev19.0 INTA : 0x12 [DEBUG] 0x33 Dev19.2 INTB : 0x11 [DEBUG] 0x34 Dev22.0 INTA : 0x12 [DEBUG] 0x35 Dev22.2 INTB : 0x11 [DEBUG] 0x36 Dev20.5 INTC : 0x12 [DEBUG] 0x40 IDE : 0x1F [DEBUG] 0x41 SATA : 0x13 [DEBUG] 0x50 GPPInt0 : 0x1F [DEBUG] 0x51 GPPInt1 : 0x1F [DEBUG] 0x52 GPPInt2 : 0x1F [DEBUG] 0x53 GPPInt3 : 0x1F [DEBUG] PCI_CFG IRQ: Write PCI config space IRQ assignments [SPEW ] PCI IRQ: Found device 0:00.02 using PIN A [SPEW ] Found this device in pirq_data table entry 0 [SPEW ] Orig INT_PIN : 1 (PIN A) [SPEW ] PCI_INTR idx : 0x00 (INTA# ) [SPEW ] INT_LINE : 0x3 (IRQ 3) [SPEW ] PCI IRQ: Found device 0:01.00 using PIN A [SPEW ] Found this device in pirq_data table entry 1 [SPEW ] Orig INT_PIN : 1 (PIN A) [SPEW ] PCI_INTR idx : 0x00 (INTA# ) [SPEW ] INT_LINE : 0x3 (IRQ 3) [SPEW ] PCI IRQ: Found device 0:01.01 using PIN B [SPEW ] Found this device in pirq_data table entry 2 [SPEW ] Orig INT_PIN : 2 (PIN B) [SPEW ] PCI_INTR idx : 0x01 (INTB# ) [SPEW ] INT_LINE : 0x4 (IRQ 4) [SPEW ] PCI IRQ: Found device 0:02.00 using PIN A [SPEW ] Found this device in pirq_data table entry 3 [SPEW ] Orig INT_PIN : 1 (PIN A) [SPEW ] PCI_INTR idx : 0x00 (INTA# ) [SPEW ] INT_LINE : 0x3 (IRQ 3) [SPEW ] PCI IRQ: Found device 0:04.00 using PIN A [SPEW ] Found this device in pirq_data table entry 4 [SPEW ] Orig INT_PIN : 1 (PIN A) [SPEW ] PCI_INTR idx : 0x00 (INTA# ) [SPEW ] INT_LINE : 0x3 (IRQ 3) [SPEW ] PCI IRQ: Found device 0:05.00 using PIN A [SPEW ] Found this device in pirq_data table entry 5 [SPEW ] Orig INT_PIN : 1 (PIN A) [SPEW ] PCI_INTR idx : 0x01 (INTB# ) [SPEW ] INT_LINE : 0x4 (IRQ 4) [SPEW ] PCI IRQ: Found device 0:11.00 using PIN A [SPEW ] Found this device in pirq_data table entry 7 [SPEW ] Orig INT_PIN : 1 (PIN A) [SPEW ] PCI_INTR idx : 0x41 (SATA ) [SPEW ] INT_LINE : 0x7 (IRQ 7) [SPEW ] PCI IRQ: Found device 0:12.00 using PIN A [SPEW ] Found this device in pirq_data table entry 8 [SPEW ] Orig INT_PIN : 1 (PIN A) [SPEW ] PCI_INTR idx : 0x30 (Dev18.0 INTA) [SPEW ] INT_LINE : 0x5 (IRQ 5) [SPEW ] PCI IRQ: Found device 0:12.02 using PIN B [SPEW ] Found this device in pirq_data table entry 9 [SPEW ] Orig INT_PIN : 2 (PIN B) [SPEW ] PCI_INTR idx : 0x31 (Dev18.2 INTB) [SPEW ] INT_LINE : 0x4 (IRQ 4) [SPEW ] PCI IRQ: Found device 0:13.00 using PIN A [SPEW ] Found this device in pirq_data table entry 10 [SPEW ] Orig INT_PIN : 1 (PIN A) [SPEW ] PCI_INTR idx : 0x32 (Dev19.0 INTA) [SPEW ] INT_LINE : 0x5 (IRQ 5) [SPEW ] PCI IRQ: Found device 0:13.02 using PIN B [SPEW ] Found this device in pirq_data table entry 11 [SPEW ] Orig INT_PIN : 2 (PIN B) [SPEW ] PCI_INTR idx : 0x33 (Dev19.2 INTB) [SPEW ] INT_LINE : 0x4 (IRQ 4) [SPEW ] PCI IRQ: Found device 0:14.02 using PIN A [SPEW ] Found this device in pirq_data table entry 14 [SPEW ] Orig INT_PIN : 1 (PIN A) [SPEW ] PCI_INTR idx : 0x13 (HDA ) [SPEW ] INT_LINE : 0x3 (IRQ 3) [SPEW ] PCI IRQ: Found device 0:14.05 using PIN C [SPEW ] Found this device in pirq_data table entry 15 [SPEW ] Orig INT_PIN : 3 (PIN C) [SPEW ] PCI_INTR idx : 0x36 (Dev20.5 INTC) [SPEW ] INT_LINE : 0x5 (IRQ 5) [SPEW ] PCI IRQ: Found device 0:16.00 using PIN A [SPEW ] Found this device in pirq_data table entry 12 [SPEW ] Orig INT_PIN : 1 (PIN A) [SPEW ] PCI_INTR idx : 0x34 (Dev22.0 INTA) [SPEW ] INT_LINE : 0x5 (IRQ 5) [SPEW ] PCI IRQ: Found device 0:16.02 using PIN B [SPEW ] Found this device in pirq_data table entry 13 [SPEW ] Orig INT_PIN : 2 (PIN B) [SPEW ] PCI_INTR idx : 0x35 (Dev22.2 INTB) [SPEW ] INT_LINE : 0x4 (IRQ 4) [SPEW ] PCI IRQ: Found device 1:00.00 using PIN A [SPEW ] With INT_PIN swizzled to PIN A [SPEW ] Attached to bridge device 0:02h.00h [SPEW ] Found this device in pirq_data table entry 3 [SPEW ] Orig INT_PIN : 1 (PIN A) [SPEW ] PCI_INTR idx : 0x00 (INTA# ) [SPEW ] INT_LINE : 0x3 (IRQ 3) [SPEW ] PCI IRQ: Found device 2:00.00 using PIN A [SPEW ] With INT_PIN swizzled to PIN A [SPEW ] Attached to bridge device 0:04h.00h [SPEW ] Found this device in pirq_data table entry 4 [SPEW ] Orig INT_PIN : 1 (PIN A) [SPEW ] PCI_INTR idx : 0x00 (INTA# ) [SPEW ] INT_LINE : 0x3 (IRQ 3) [SPEW ] PCI IRQ: Found device 3:00.00 using PIN A [SPEW ] With INT_PIN swizzled to PIN A [SPEW ] Attached to bridge device 0:05h.00h [SPEW ] Found this device in pirq_data table entry 5 [SPEW ] Orig INT_PIN : 1 (PIN A) [SPEW ] PCI_INTR idx : 0x01 (INTB# ) [SPEW ] INT_LINE : 0x4 (IRQ 4) [DEBUG] PCI_CFG IRQ: Finished writing PCI config space IRQ assignments [DEBUG] BS: BS_DEV_ENABLE entry times (exec / console): 6 / 0 ms [INFO ] POST: 0x74 [INFO ] Timestamp - device enable: 33362801196 [INFO ] Enabling resources... [DEBUG] PCI: 00:00:00.0 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:00.0 cmd <- 06 [DEBUG] PCI: 00:00:00.2 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:00.2 cmd <- 06 [DEBUG] PCI: 00:00:01.0 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:01.0 cmd <- 07 [DEBUG] PCI: 00:00:01.1 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:01.1 cmd <- 02 [DEBUG] PCI: 00:00:02.0 bridge ctrl <- 0013 [DEBUG] PCI: 00:00:02.0 cmd <- 07 [DEBUG] PCI: 00:00:04.0 bridge ctrl <- 0013 [DEBUG] PCI: 00:00:04.0 cmd <- 07 [DEBUG] PCI: 00:00:05.0 bridge ctrl <- 0013 [DEBUG] PCI: 00:00:05.0 cmd <- 06 [DEBUG] PCI: 00:00:11.0 cmd <- 03 [DEBUG] PCI: 00:00:12.0 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:12.0 cmd <- 02 [DEBUG] PCI: 00:00:12.2 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:12.2 cmd <- 02 [DEBUG] PCI: 00:00:13.0 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:13.0 cmd <- 02 [DEBUG] PCI: 00:00:13.2 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:13.2 cmd <- 02 [DEBUG] PCI: 00:00:14.0 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:14.0 cmd <- 403 [DEBUG] PCI: 00:00:14.2 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:14.2 cmd <- 02 [DEBUG] PCI: 00:00:14.3 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:14.3 cmd <- 0f [DEBUG] PCI: 00:00:14.4 bridge ctrl <- 0013 [DEBUG] PCI: 00:00:14.4 cmd <- 00 [DEBUG] PCI: 00:00:14.5 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:14.5 cmd <- 02 [DEBUG] PCI: 00:00:16.0 cmd <- 02 [DEBUG] PCI: 00:00:16.2 cmd <- 02 [DEBUG] PCI: 00:00:18.0 cmd <- 00 [DEBUG] PCI: 00:00:18.1 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:18.1 cmd <- 00 [DEBUG] PCI: 00:00:18.2 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:18.2 cmd <- 00 [DEBUG] PCI: 00:00:18.3 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:18.3 cmd <- 00 [DEBUG] PCI: 00:00:18.4 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:18.4 cmd <- 00 [DEBUG] PCI: 00:00:18.5 subsystem <- 1022/1410 [DEBUG] PCI: 00:00:18.5 cmd <- 00 [DEBUG] PCI: 00:01:00.0 cmd <- 03 [DEBUG] PCI: 00:02:00.0 cmd <- 03 [DEBUG] PCI: 00:03:00.0 cmd <- 02 [INFO ] done. [INFO ] POST: 0x75 [INFO ] Timestamp - device initialization: 33363156764 [INFO ] Initializing devices... [INFO ] POST: 0x75 [DEBUG] CPU_CLUSTER: 0 init [INFO ] LAPIC 0x10 in XAPIC mode. [DEBUG] start_eip=0x00001000, code_size=0x00000031 [INFO ] Initializing CPU #0 [DEBUG] CPU: vendor AMD device 610f31 [DEBUG] CPU: family 15, model 13, stepping 01 [DEBUG] Model 15 Init. [DEBUG] MTRR check [DEBUG] Fixed MTRRs : Disabled [DEBUG] Variable MTRRs: Enabled [INFO ] POST: 0x93 [INFO ] Initializing SMM for CPU 0 [INFO ] CPU #0 initialized [SPEW ] CPU1: stack_base 0x5fe08000, stack_top 0x5fe09ff8 [SPEW ] Asserting INIT. [SPEW ] Waiting for send to finish... [SPEW ] +Deasserting INIT. [SPEW ] Waiting for send to finish... [SPEW ] +#startup loops: 2. [SPEW ] Sending STARTUP #1 to 17. [SPEW ] After apic_write. [SPEW ] Startup point 1. [SPEW ] Waiting for send to finish... [SPEW ] +Sending STARTUP #2 to 17. [SPEW ] After apic_write. [SPEW ] Startup point 1. [SPEW ] Waiting for send to finish... [SPEW ] +After Startup. [INFO ] LAPIC 0x11 in XAPIC mode. [INFO ] Initializing CPU #1 [DEBUG] CPU: vendor AMD device 610f31 [DEBUG] CPU: family 15, model 13, stepping 01 [DEBUG] Model 15 Init. [DEBUG] MTRR check [DEBUG] Fixed MTRRs : Disabled [DEBUG] Variable MTRRs: Enabled [INFO ] POST: 0x93 [INFO ] Initializing SMM for CPU 1 [INFO ] CPU #1 initialized [SPEW ] CPU2: stack_base 0x5fe06000, stack_top 0x5fe07ff8 [SPEW ] Asserting INIT. [SPEW ] Waiting for send to finish... [SPEW ] +Deasserting INIT. [SPEW ] Waiting for send to finish... [SPEW ] +#startup loops: 2. [SPEW ] Sending STARTUP #1 to 18. [SPEW ] After apic_write. [SPEW ] Startup point 1. [SPEW ] Waiting for send to finish... [SPEW ] +Sending STARTUP #2 to 18. [SPEW ] After apic_write. [SPEW ] Startup point 1. [SPEW ] Waiting for send to finish... [SPEW ] +After Startup. [INFO ] LAPIC 0x12 in XAPIC mode. [INFO ] Initializing CPU #2 [DEBUG] CPU: vendor AMD device 610f31 [DEBUG] CPU: family 15, model 13, stepping 01 [DEBUG] Model 15 Init. [DEBUG] MTRR check [DEBUG] Fixed MTRRs : Enabled [DEBUG] Variable MTRRs: Enabled [INFO ] POST: 0x93 [INFO ] Initializing SMM for CPU 2 [INFO ] CPU #2 initialized [SPEW ] CPU3: stack_base 0x5fe04000, stack_top 0x5fe05ff8 [SPEW ] Asserting INIT. [SPEW ] Waiting for send to finish... [SPEW ] +Deasserting INIT. [SPEW ] Waiting for send to finish... [SPEW ] +#startup loops: 2. [SPEW ] Sending STARTUP #1 to 19. [SPEW ] After apic_write. [SPEW ] Startup point 1. [SPEW ] Waiting for send to finish... [SPEW ] +Sending STARTUP #2 to 19. [SPEW ] After apic_write. [SPEW ] Startup point 1. [SPEW ] Waiting for send to finish... [SPEW ] +After Startup. [INFO ] LAPIC 0x13 in XAPIC mode. [INFO ] Waiting for 1 CPUS to stop [INFO ] Initializing CPU #3 [DEBUG] CPU: vendor AMD device 610f31 [DEBUG] CPU: family 15, model 13, stepping 01 [DEBUG] Model 15 Init. [DEBUG] MTRR check [DEBUG] Fixed MTRRs : Enabled [DEBUG] Variable MTRRs: Enabled [INFO ] POST: 0x93 [INFO ] Initializing SMM for CPU 3 [INFO ] CPU #3 initialized [DEBUG] All AP CPUs stopped (153 loops) [SPEW ] CPU0: stack: 0x5fe0b000 - 0x5fe0d000, lowest used address 0x5fe0b56c, stack used: 6804 bytes [SPEW ] CPU1: stack: 0x5fe08000 - 0x5fe0a000, lowest used address 0x5fe09d94, stack used: 620 bytes [SPEW ] CPU2: stack: 0x5fe06000 - 0x5fe08000, lowest used address 0x5fe07d94, stack used: 620 bytes [SPEW ] CPU3: stack: 0x5fe04000 - 0x5fe06000, lowest used address 0x5fe05d94, stack used: 620 bytes [DEBUG] CPU_CLUSTER: 0 init finished in 41 msecs [INFO ] POST: 0x75 [INFO ] POST: 0x75 [INFO ] POST: 0x75 [INFO ] POST: 0x75 [INFO ] POST: 0x75 [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:00.0 init [DEBUG] PCI: 00:00:00.0 init finished in 0 msecs [INFO ] POST: 0x75 [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:01.0 init [INFO ] Timestamp - Option ROM initialization: 33571080628 [DEBUG] FMAP: area COREBOOT found @ 10200 (4128256 bytes) [WARN ] CBFS: 'pci1002,9901.rom' not found. [INFO ] CBFS: Found 'pci1002,990b.rom' @0x840c0 size 0xf200 in mcache @0x5fefd3b4 [INFO ] VB2:vb2_digest_init() 61952 bytes, hash algo 3, HW acceleration unsupported [NOTE ] VGA_BIOS_ID should be the remapped PCI ID 1002,9901 in the VBIOS file [DEBUG] In CBFS, ROM address for PCI: 00:00:01.0 = 0xffc94338 [SPEW ] PCI expansion ROM, signature 0xaa55, INIT size 0xf200, data ptr 0x01b4 [SPEW ] PCI ROM image, vendor ID 1002, device ID 990b, [SPEW ] PCI ROM image, Class Code 030000, Code Type 00 [DEBUG] Copying VGA ROM Image from 0xffc94338 to 0xc0000, 0xf200 bytes [INFO ] Timestamp - Option ROM copy done: 33663532199 [ERROR] fb_add_framebuffer_info_ex: Invalid framebuffer data provided [DEBUG] PCI_CLASS_DISPLAY_VGA Option ROM was run [INFO ] Timestamp - Option ROM run done: 34551490924 [DEBUG] PCI: 00:00:01.0 init finished in 196 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:01.1 init [DEBUG] PCI: 00:00:01.1 init finished in 0 msecs [INFO ] POST: 0x75 [INFO ] POST: 0x75 [INFO ] POST: 0x75 [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:11.0 init [DEBUG] PCI: 00:00:11.0 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:12.0 init [DEBUG] PCI: 00:00:12.0 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:12.2 init [DEBUG] PCI: 00:00:12.2 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:13.0 init [DEBUG] PCI: 00:00:13.0 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:13.2 init [DEBUG] PCI: 00:00:13.2 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:14.0 init [DEBUG] IOAPIC: Initializing IOAPIC at 0xfec00000 [DEBUG] IOAPIC: ID = 0x04 [SPEW ] IOAPIC: Dumping registers [SPEW ] reg 0x0000: 0x04000000 [SPEW ] reg 0x0001: 0x00178021 [SPEW ] reg 0x0002: 0x04000000 [DEBUG] IOAPIC: 24 interrupts [DEBUG] IOAPIC: Clearing IOAPIC at 0xfec00000 [SPEW ] IOAPIC: vector 0x00 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x01 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x02 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x03 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x04 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x05 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x06 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x07 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x08 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x09 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x0a value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x0b value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x0c value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x0d value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x0e value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x0f value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x10 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x11 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x12 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x13 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x14 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x15 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x16 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x17 value 0x00000000 0x00010000 [DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x10 [SPEW ] IOAPIC: vector 0x00 value 0x10000000 0x00000700 [DEBUG] PCI: 00:00:14.0 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:14.2 init [DEBUG] PCI: 00:00:14.2 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:14.3 init [DEBUG] RTC Init [DEBUG] PCI: 00:00:14.3 init finished in 0 msecs [INFO ] POST: 0x75 [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:14.5 init [DEBUG] PCI: 00:00:14.5 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:16.0 init [DEBUG] PCI: 00:00:16.0 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:16.2 init [DEBUG] PCI: 00:00:16.2 init finished in 0 msecs [INFO ] POST: 0x75 [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:18.1 init [DEBUG] PCI: 00:00:18.1 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:18.2 init [DEBUG] PCI: 00:00:18.2 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:18.3 init [DEBUG] PCI: 00:00:18.3 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:18.4 init [DEBUG] PCI: 00:00:18.4 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:00:18.5 init [DEBUG] PCI: 00:00:18.5 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:01:00.0 init [INFO ] Timestamp - Option ROM initialization: 34552055101 [INFO ] CBFS: Found 'pci1002,6665.rom' @0x93340 size 0x8000 in mcache @0x5fefd42c [INFO ] VB2:vb2_digest_init() 32768 bytes, hash algo 3, HW acceleration unsupported [DEBUG] In CBFS, ROM address for PCI: 00:01:00.0 = 0xffca35b8 [SPEW ] PCI expansion ROM, signature 0xaa55, INIT size 0x8000, data ptr 0x0224 [SPEW ] PCI ROM image, vendor ID 1002, device ID 6665, [SPEW ] PCI ROM image, Class Code 038000, Code Type 00 [DEBUG] Copying non-VGA ROM image from 0xffca35b8 to 0x000d0000, 0x8000 bytes [INFO ] Timestamp - Option ROM copy done: 34601074050 [DEBUG] Not running non-PCI_CLASS_DISPLAY_VGA Option ROM [INFO ] Timestamp - Option ROM run done: 34601083233 [DEBUG] PCI: 00:01:00.0 init finished in 9 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:02:00.0 init [DEBUG] PCI: 00:02:00.0 init finished in 0 msecs [INFO ] POST: 0x75 [DEBUG] PCI: 00:03:00.0 init [DEBUG] PCI: 00:03:00.0 init finished in 0 msecs [INFO ] POST: 0x75 [INFO ] POST: 0x75 [DEBUG] PNP: 00ff.0 init [DEBUG] Compal ENE932: Initializing keyboard. [DEBUG] PNP: 00ff.0 init finished in 0 msecs [INFO ] Devices initialized [SPEW ] Show all devs... After init. [SPEW ] Root Device: enabled 1 [SPEW ] CPU_CLUSTER: 0: enabled 1 [SPEW ] DOMAIN: 00000000: enabled 1 [SPEW ] APIC: 10: enabled 1 [SPEW ] PCI: 00:00:00.0: enabled 1 [SPEW ] PCI: 00:00:00.2: enabled 1 [SPEW ] PCI: 00:00:01.0: enabled 1 [SPEW ] PCI: 00:00:01.1: enabled 1 [SPEW ] PCI: 00:00:02.0: enabled 1 [SPEW ] PCI: 00:00:03.0: enabled 0 [SPEW ] PCI: 00:00:04.0: enabled 1 [SPEW ] PCI: 00:00:05.0: enabled 1 [SPEW ] PCI: 00:00:06.0: enabled 0 [SPEW ] PCI: 00:00:07.0: enabled 0 [SPEW ] PCI: 00:00:08.0: enabled 0 [SPEW ] PCI: 00:00:09.0: enabled 0 [SPEW ] PCI: 00:00:10.0: enabled 0 [SPEW ] PCI: 00:00:11.0: enabled 1 [SPEW ] PCI: 00:00:12.0: enabled 1 [SPEW ] PCI: 00:00:12.2: enabled 1 [SPEW ] PCI: 00:00:13.0: enabled 1 [SPEW ] PCI: 00:00:13.2: enabled 1 [SPEW ] PCI: 00:00:14.0: enabled 1 [SPEW ] PCI: 00:00:14.2: enabled 1 [SPEW ] PCI: 00:00:14.3: enabled 1 [SPEW ] PCI: 00:00:14.4: enabled 1 [SPEW ] PCI: 00:00:14.5: enabled 1 [SPEW ] PCI: 00:00:14.6: enabled 0 [SPEW ] PCI: 00:00:14.7: enabled 0 [SPEW ] PCI: 00:00:15.0: enabled 0 [SPEW ] PCI: 00:00:15.1: enabled 0 [SPEW ] PCI: 00:00:15.2: enabled 0 [SPEW ] PCI: 00:00:15.3: enabled 0 [SPEW ] PCI: 00:00:18.0: enabled 1 [SPEW ] PCI: 00:00:18.1: enabled 1 [SPEW ] PCI: 00:00:18.2: enabled 1 [SPEW ] PCI: 00:00:18.3: enabled 1 [SPEW ] PCI: 00:00:18.4: enabled 1 [SPEW ] PCI: 00:00:18.5: enabled 1 [SPEW ] PNP: 00ff.1: enabled 1 [SPEW ] APIC: 11: enabled 1 [SPEW ] APIC: 12: enabled 1 [SPEW ] APIC: 13: enabled 1 [SPEW ] PCI: 00:00:16.0: enabled 1 [SPEW ] PCI: 00:00:16.2: enabled 1 [SPEW ] PCI: 00:01:00.0: enabled 1 [SPEW ] PCI: 00:02:00.0: enabled 1 [SPEW ] PCI: 00:03:00.0: enabled 1 [SPEW ] PNP: 00ff.0: enabled 1 [DEBUG] BS: BS_DEV_INIT run times (exec / console): 246 / 2 ms [INFO ] POST: 0x76 [INFO ] Finalize devices... [DEBUG] PCI: 00:00:14.3 final [INFO ] Devices finalized [INFO ] Timestamp - device setup done: 34601352398 [DEBUG] APIC 00: ** Enter AmdInitLate [00020004] [INFO ] Timestamp - calling AmdInitLate: 34601374028 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/Common/CommonReturns.c', line 187 [EMERG] ASSERTION ERROR: file 'src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuGeneralServices.c', line 776 [INFO ] Timestamp - back from AmdInitLate: 34602089339 [DEBUG] AmdInitLate() returned AGESA_SUCCESS [DEBUG] APIC 00: Heap in SystemMem (4) at 0x10000014 [DEBUG] APIC 00: ** Exit AmdInitLate [00020004] [DEBUG] APIC 00: ** Enter AmdS3Save [0002000b] [INFO ] Timestamp - calling AmdInitRtb/AmdS3Save: 34602120136 [DEBUG] FMAP: area RW_MRC_CACHE found @ 0 (65536 bytes) [DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'. [INFO ] Manufacturer: 1c [INFO ] SF: Detected 1c 7016 with sector size 0x1000, total 0x400000 [DEBUG] MRC: cache data 'RW_MRC_CACHE' needs update. [DEBUG] MRC: updated 'RW_MRC_CACHE'. [INFO ] Timestamp - back from AmdInitRtb/AmdS3Save: 34635912668 [DEBUG] AmdS3Save() returned AGESA_SUCCESS [EMERG] ASSERTION ERROR: file 'src/drivers/amd/agesa/state_machine.c', line 276 [DEBUG] APIC 00: Heap in SystemMem (4) at 0x10000014 [DEBUG] APIC 00: ** Exit AmdS3Save [0002000b] [DEBUG] BS: BS_POST_DEVICE exit times (exec / console): 7 / 0 ms [INFO ] POST: 0x77 [INFO ] Timestamp - cbmem post: 34636002206 [INFO ] POST: 0x79 [INFO ] Timestamp - write tables: 34636011636 [INFO ] POST: 0x9a [INFO ] Copying Interrupt Routing Table to 0x000f0000... done. [INFO ] Copying Interrupt Routing Table to 0x5fd5b000... done. [DEBUG] PIRQ table: 256 bytes. [INFO ] POST: 0x9b [SPEW ] PCI srcbusirq = 0x0 from dev = 0x0 and pirq = 0 [SPEW ] PCI srcbusirq = 0x1 from dev = 0x0 and pirq = 1 [SPEW ] PCI srcbusirq = 0x2 from dev = 0x0 and pirq = 2 [SPEW ] PCI srcbusirq = 0x3 from dev = 0x0 and pirq = 3 [SPEW ] PCI srcbusirq = 0x4 from dev = 0x1 and pirq = 0 [SPEW ] PCI srcbusirq = 0x5 from dev = 0x1 and pirq = 1 [SPEW ] PCI srcbusirq = 0x8 from dev = 0x2 and pirq = 0 [SPEW ] PCI srcbusirq = 0x9 from dev = 0x2 and pirq = 1 [SPEW ] PCI srcbusirq = 0xa from dev = 0x2 and pirq = 2 [SPEW ] PCI srcbusirq = 0xb from dev = 0x2 and pirq = 3 [SPEW ] PCI srcbusirq = 0x10 from dev = 0x4 and pirq = 0 [SPEW ] PCI srcbusirq = 0x11 from dev = 0x4 and pirq = 1 [SPEW ] PCI srcbusirq = 0x12 from dev = 0x4 and pirq = 2 [SPEW ] PCI srcbusirq = 0x13 from dev = 0x4 and pirq = 3 [SPEW ] PCI srcbusirq = 0x14 from dev = 0x5 and pirq = 0 [SPEW ] PCI srcbusirq = 0x15 from dev = 0x5 and pirq = 1 [SPEW ] PCI srcbusirq = 0x16 from dev = 0x5 and pirq = 2 [SPEW ] PCI srcbusirq = 0x17 from dev = 0x5 and pirq = 3 [SPEW ] PCI srcbusirq = 0x40 from dev = 0x10 and pirq = 0 [SPEW ] PCI srcbusirq = 0x44 from dev = 0x11 and pirq = 0 [SPEW ] PCI srcbusirq = 0x48 from dev = 0x12 and pirq = 0 [SPEW ] PCI srcbusirq = 0x4a from dev = 0x12 and pirq = 2 [SPEW ] PCI srcbusirq = 0x4c from dev = 0x13 and pirq = 0 [SPEW ] PCI srcbusirq = 0x4e from dev = 0x13 and pirq = 2 [SPEW ] PCI srcbusirq = 0x58 from dev = 0x16 and pirq = 0 [SPEW ] PCI srcbusirq = 0x5a from dev = 0x16 and pirq = 2 [SPEW ] PCI srcbusirq = 0x52 from dev = 0x14 and pirq = 2 [SPEW ] PCI srcbusirq = 0x55 from dev = 0x14 and pirq = 5 [SPEW ] PCI srcbusirq = 0x0 from dev = 0x0 and pirq = 0 [SPEW ] PCI srcbusirq = 0x1 from dev = 0x0 and pirq = 1 [SPEW ] PCI srcbusirq = 0x2 from dev = 0x0 and pirq = 2 [SPEW ] PCI srcbusirq = 0x3 from dev = 0x0 and pirq = 3 [SPEW ] PCI srcbusirq = 0x0 from dev = 0x0 and pirq = 0 [SPEW ] PCI srcbusirq = 0x1 from dev = 0x0 and pirq = 1 [SPEW ] PCI srcbusirq = 0x2 from dev = 0x0 and pirq = 2 [SPEW ] PCI srcbusirq = 0x3 from dev = 0x0 and pirq = 3 [SPEW ] PCI srcbusirq = 0x0 from dev = 0x0 and pirq = 0 [SPEW ] PCI srcbusirq = 0x1 from dev = 0x0 and pirq = 1 [SPEW ] PCI srcbusirq = 0x2 from dev = 0x0 and pirq = 2 [SPEW ] PCI srcbusirq = 0x3 from dev = 0x0 and pirq = 3 [DEBUG] Wrote the mp table end at: 0x000f0410 - 0x000f0674 [SPEW ] PCI srcbusirq = 0x0 from dev = 0x0 and pirq = 0 [SPEW ] PCI srcbusirq = 0x1 from dev = 0x0 and pirq = 1 [SPEW ] PCI srcbusirq = 0x2 from dev = 0x0 and pirq = 2 [SPEW ] PCI srcbusirq = 0x3 from dev = 0x0 and pirq = 3 [SPEW ] PCI srcbusirq = 0x4 from dev = 0x1 and pirq = 0 [SPEW ] PCI srcbusirq = 0x5 from dev = 0x1 and pirq = 1 [SPEW ] PCI srcbusirq = 0x8 from dev = 0x2 and pirq = 0 [SPEW ] PCI srcbusirq = 0x9 from dev = 0x2 and pirq = 1 [SPEW ] PCI srcbusirq = 0xa from dev = 0x2 and pirq = 2 [SPEW ] PCI srcbusirq = 0xb from dev = 0x2 and pirq = 3 [SPEW ] PCI srcbusirq = 0x10 from dev = 0x4 and pirq = 0 [SPEW ] PCI srcbusirq = 0x11 from dev = 0x4 and pirq = 1 [SPEW ] PCI srcbusirq = 0x12 from dev = 0x4 and pirq = 2 [SPEW ] PCI srcbusirq = 0x13 from dev = 0x4 and pirq = 3 [SPEW ] PCI srcbusirq = 0x14 from dev = 0x5 and pirq = 0 [SPEW ] PCI srcbusirq = 0x15 from dev = 0x5 and pirq = 1 [SPEW ] PCI srcbusirq = 0x16 from dev = 0x5 and pirq = 2 [SPEW ] PCI srcbusirq = 0x17 from dev = 0x5 and pirq = 3 [SPEW ] PCI srcbusirq = 0x40 from dev = 0x10 and pirq = 0 [SPEW ] PCI srcbusirq = 0x44 from dev = 0x11 and pirq = 0 [SPEW ] PCI srcbusirq = 0x48 from dev = 0x12 and pirq = 0 [SPEW ] PCI srcbusirq = 0x4a from dev = 0x12 and pirq = 2 [SPEW ] PCI srcbusirq = 0x4c from dev = 0x13 and pirq = 0 [SPEW ] PCI srcbusirq = 0x4e from dev = 0x13 and pirq = 2 [SPEW ] PCI srcbusirq = 0x58 from dev = 0x16 and pirq = 0 [SPEW ] PCI srcbusirq = 0x5a from dev = 0x16 and pirq = 2 [SPEW ] PCI srcbusirq = 0x52 from dev = 0x14 and pirq = 2 [SPEW ] PCI srcbusirq = 0x55 from dev = 0x14 and pirq = 5 [SPEW ] PCI srcbusirq = 0x0 from dev = 0x0 and pirq = 0 [SPEW ] PCI srcbusirq = 0x1 from dev = 0x0 and pirq = 1 [SPEW ] PCI srcbusirq = 0x2 from dev = 0x0 and pirq = 2 [SPEW ] PCI srcbusirq = 0x3 from dev = 0x0 and pirq = 3 [SPEW ] PCI srcbusirq = 0x0 from dev = 0x0 and pirq = 0 [SPEW ] PCI srcbusirq = 0x1 from dev = 0x0 and pirq = 1 [SPEW ] PCI srcbusirq = 0x2 from dev = 0x0 and pirq = 2 [SPEW ] PCI srcbusirq = 0x3 from dev = 0x0 and pirq = 3 [SPEW ] PCI srcbusirq = 0x0 from dev = 0x0 and pirq = 0 [SPEW ] PCI srcbusirq = 0x1 from dev = 0x0 and pirq = 1 [SPEW ] PCI srcbusirq = 0x2 from dev = 0x0 and pirq = 2 [SPEW ] PCI srcbusirq = 0x3 from dev = 0x0 and pirq = 3 [DEBUG] Wrote the mp table end at: 0x5fd5a010 - 0x5fd5a274 [DEBUG] MP table: 628 bytes. [INFO ] POST: 0x9c [INFO ] CBFS: Found 'fallback/dsdt.aml' @0x81d00 size 0x203a in mcache @0x5fefd2c8 [INFO ] VB2:vb2_digest_init() 8250 bytes, hash algo 3, HW acceleration unsupported [WARN ] CBFS: 'fallback/slic' not found. [INFO ] ACPI: Writing ACPI tables at 5fd36000. [DEBUG] ACPI: * FACS [DEBUG] ACPI: * DSDT [DEBUG] ACPI: * FADT [DEBUG] pm_base: 0x0800 [DEBUG] ACPI: added table 1/32, length now 44 [DEBUG] ACPI: * SSDT [WARN ] CBFS: 'pci1002,9901.rom' not found. [INFO ] CBFS: Found 'pci1002,990b.rom' @0x840c0 size 0xf200 in mcache @0x5fefd3b4 [INFO ] VB2:vb2_digest_init() 61952 bytes, hash algo 3, HW acceleration unsupported [NOTE ] VGA_BIOS_ID should be the remapped PCI ID 1002,9901 in the VBIOS file [DEBUG] In CBFS, ROM address for PCI: 00:00:01.0 = 0xffc94338 [SPEW ] PCI expansion ROM, signature 0xaa55, INIT size 0xf200, data ptr 0x01b4 [SPEW ] PCI ROM image, vendor ID 1002, device ID 990b, [SPEW ] PCI ROM image, Class Code 030000, Code Type 00 [ERROR] PCI: 00:00:01.0: Missing ACPI scope [INFO ] CBFS: Found 'pci1002,6665.rom' @0x93340 size 0x8000 in mcache @0x5fefd42c [INFO ] VB2:vb2_digest_init() 32768 bytes, hash algo 3, HW acceleration unsupported [DEBUG] In CBFS, ROM address for PCI: 00:01:00.0 = 0xffca35b8 [SPEW ] PCI expansion ROM, signature 0xaa55, INIT size 0x8000, data ptr 0x0224 [SPEW ] PCI ROM image, vendor ID 1002, device ID 6665, [SPEW ] PCI ROM image, Class Code 038000, Code Type 00 [ERROR] PCI: 00:01:00.0: Missing ACPI scope [DEBUG] ACPI: added table 2/32, length now 52 [DEBUG] ACPI: * MCFG [DEBUG] ACPI: added table 3/32, length now 60 [DEBUG] ACPI: * MADT [DEBUG] ACPI: added table 4/32, length now 68 [DEBUG] ACPI: * SPCR [DEBUG] current = 5fd38540 [DEBUG] ACPI: * HPET [DEBUG] ACPI: added table 5/32, length now 76 [DEBUG] ACPI: added table 6/32, length now 84 [DEBUG] ACPI: * IVRS at 5fd38750 [DEBUG] ACPI: added table 7/32, length now 92 [DEBUG] ACPI: * SRAT at 5fd387c0 [DEBUG] AGESA SRAT table NULL. Skipping. [DEBUG] ACPI: * SLIT at 5fd387c0 [DEBUG] AGESA SLIT table NULL. Skipping. [DEBUG] ACPI: * AGESA ALIB SSDT at 5fd387c0 [DEBUG] ACPI: added table 8/32, length now 100 [DEBUG] ACPI: * SSDT at 5fd3a6a0 [DEBUG] ACPI: added table 9/32, length now 108 [DEBUG] ACPI: * SSDT for PState at 5fd3b098 [DEBUG] Copying initialized VBIOS image from 0x000d0000 [DEBUG] ACPI: * VFCT at 5fd3b0a0 [DEBUG] ACPI: added table 10/32, length now 116 [INFO ] ACPI: done. [DEBUG] ACPI tables: 53520 bytes. [DEBUG] smbios_write_tables: 5fd2e000 [DEBUG] SMBIOS firmware version is set to coreboot_version: '24.12-1666-g309b40354124-dirty' [DEBUG] SMBIOS tables: 588 bytes. [DEBUG] Writing table forward entry at 0x00000500 [DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum e008 [DEBUG] Writing coreboot table at 0x5fd5c000 [DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES [DEBUG] 1. 0000000000001000-000000000009ffff: RAM [DEBUG] 2. 00000000000c0000-000000005fd2dfff: RAM [DEBUG] 3. 000000005fd2e000-000000005fd94fff: CONFIGURATION TABLES [DEBUG] 4. 000000005fd95000-000000005feeafff: RAMSTAGE [DEBUG] 5. 000000005feeb000-000000005fffffff: CONFIGURATION TABLES [DEBUG] 6. 0000000060000000-000000007fffffff: RESERVED [DEBUG] 7. 00000000f8000000-00000000fbffffff: RESERVED [DEBUG] 8. 00000000fec10000-00000000fec10fff: RESERVED [DEBUG] 9. 0000000100000000-000000047effffff: RAM [DEBUG] Wrote coreboot table at: 0x5fd5c000, 0x378 bytes, checksum 3a3f [DEBUG] coreboot table: 912 bytes. [DEBUG] IMD ROOT 0. 0x5ffff000 0x00001000 [DEBUG] IMD SMALL 1. 0x5fffe000 0x00001000 [DEBUG] CONSOLE 2. 0x5fefe000 0x00100000 [DEBUG] RO MCACHE 3. 0x5fefd000 0x000009dc [DEBUG] TIME STAMP 4. 0x5fefc000 0x00000910 [DEBUG] AFTER CAR 5. 0x5feeb000 0x00011000 [DEBUG] RAMSTAGE 6. 0x5fd94000 0x00157000 [DEBUG] ACPISCRATCH 7. 0x5fd64000 0x00030000 [DEBUG] COREBOOT 8. 0x5fd5c000 0x00008000 [DEBUG] IRQ TABLE 9. 0x5fd5b000 0x00001000 [DEBUG] SMP TABLE 10. 0x5fd5a000 0x00001000 [DEBUG] ACPI 11. 0x5fd36000 0x00024000 [DEBUG] SMBIOS 12. 0x5fd2e000 0x00008000 [DEBUG] IMD small region: [DEBUG] IMD ROOT 0. 0x5fffec00 0x00000400 [DEBUG] USBDEBUG 1. 0x5fffeba0 0x00000050 [DEBUG] FMAP 2. 0x5fffeac0 0x000000e0 [DEBUG] ROMSTAGE 3. 0x5fffeaa0 0x00000004 [DEBUG] ROMSTG STCK 4. 0x5fffea00 0x00000088 [DEBUG] AGESA MTRR 5. 0x5fffe900 0x000000f0 [INFO ] Timestamp - finalize chips: 34727104792 [DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 18 / 0 ms [INFO ] POST: 0x7a [INFO ] Timestamp - starting to load payload: 34727121606 [INFO ] CBFS: Found 'fallback/payload' @0xaf880 size 0x10295 in mcache @0x5fefd5a8 [INFO ] VB2:vb2_digest_init() 66197 bytes, hash algo 3, HW acceleration unsupported [DEBUG] Checking segment from ROM address 0xffcbfaf8 [DEBUG] Checking segment from ROM address 0xffcbfb14 [DEBUG] Loading segment from ROM address 0xffcbfaf8 [DEBUG] code (compression=1) [DEBUG] New segment dstaddr 0x000dfe40 memsize 0x201c0 srcaddr 0xffcbfb30 filesize 0x1025d [DEBUG] Loading Segment: addr: 0x000dfe40 memsz: 0x00000000000201c0 filesz: 0x000000000001025d [DEBUG] using LZMA [INFO ] Timestamp - starting LZMA decompress (ignore for x86): 34780995285 [INFO ] Timestamp - finished LZMA decompress (ignore for x86): 34843238875 [SPEW ] [ 0x000dfe40, 00100000, 0x00100000) <- ffcbfb30 [DEBUG] Loading segment from ROM address 0xffcbfb14 [DEBUG] Entry Point 0x000fcb84 [SPEW ] Loaded segments [DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 23 / 0 ms [INFO ] POST: 0x7b [DEBUG] Jumping to boot code at 0x000fcb84(0x5fd5c000) [INFO ] POST: 0xf8 [INFO ] Timestamp - selfboot jump: 34843337087 [SPEW ] CPU0: stack: 0x5fe0b000 - 0x5fe0d000, lowest used address 0x5fe0b56c, stack used: 6804 bytes SeaBIOS (version rel-1.17.0-0-gb52ca86e-dirty-20250625_103808-shit) BUILD: gcc: (coreboot toolchain v2025-06-25_309b403541) 8.3.0 binutils: (GNU Binutils) 2.37 Found coreboot cbmem console @ 5fefe000 Found mainboard LENOVO LENOVO G505S malloc preinit Relocating init from 0x000e15a0 to 0x5ed21b20 (size 50240) malloc init Found CBFS header at 0xffc1022c Add romfile: cbfs_master_header (size=32) Add romfile: fallback/romstage (size=333648) Add romfile: fallback/ramstage (size=193404) Add romfile: config (size=2868) Add romfile: revision (size=729) Add romfile: build_info (size=110) Add romfile: fallback/dsdt.aml (size=8250) Add romfile: cmos_layout.bin (size=616) Add romfile: pci1002,990b.rom (size=61952) Add romfile: pci1002,6665.rom (size=32768) Add romfile: fallback/postcar (size=39160) Add romfile: img/coreinfo (size=43635) Add romfile: fallback/payload (size=66197) Add romfile: payload_config (size=1672) Add romfile: payload_revision (size=263) Add romfile: img/tint (size=37776) Add romfile: pci1002,6663.rom (size=33792) Add romfile: floppyimg/flopbird (size=1474560) Add romfile: floppyimg/memtst64 (size=1474560) Add romfile: floppyimg/kolcrpt (size=1474560) Add romfile: (size=1829092) Add romfile: bootblock (size=32768) multiboot: eax=5fdfe178, ebx=5fdfe144 init ivt init bda init bios32 init PMM init PNPBIOS table init keyboard init mouse init pic math cp init PCI probe PCI device 00:00.0 (vd=1022:1410 c=0600) PCI device 00:00.2 (vd=1022:1419 c=0806) PCI device 00:01.0 (vd=1002:990b c=0300) PCI device 00:01.1 (vd=1002:9902 c=0403) PCI device 00:02.0 (vd=1022:1412 c=0604) PCI device 00:04.0 (vd=1022:1414 c=0604) PCI device 00:05.0 (vd=1022:1415 c=0604) PCI device 00:11.0 (vd=1022:7801 c=0106) PCI device 00:12.0 (vd=1022:7807 c=0c03) PCI device 00:12.2 (vd=1022:7808 c=0c03) PCI device 00:13.0 (vd=1022:7807 c=0c03) PCI device 00:13.2 (vd=1022:7808 c=0c03) PCI device 00:14.0 (vd=1022:780b c=0c05) PCI device 00:14.2 (vd=1022:780d c=0403) PCI device 00:14.3 (vd=1022:780e c=0601) PCI device 00:14.4 (vd=1022:780f c=0604) PCI device 00:14.5 (vd=1022:7809 c=0c03) PCI device 00:16.0 (vd=1022:7807 c=0c03) PCI device 00:16.2 (vd=1022:7808 c=0c03) PCI device 00:18.0 (vd=1022:1400 c=0600) PCI device 00:18.1 (vd=1022:1401 c=0600) PCI device 00:18.2 (vd=1022:1402 c=0600) PCI device 00:18.3 (vd=1022:1403 c=0600) PCI device 00:18.4 (vd=1022:1404 c=0600) PCI device 00:18.5 (vd=1022:1405 c=0600) PCI device 01:00.0 (vd=1002:6665 c=0380) PCI device 02:00.0 (vd=1969:10a0 c=0200) PCI device 03:00.0 (vd=168c:0034 c=0280) Found 28 PCI devices (max PCI bus is 04) Relocating coreboot bios tables Copying SMBIOS from 0x5fd2e000 to 0x000f4fe0 Copying SMBIOS 3.0 from 0x5fd2e020 to 0x000f4fc0 Copying ACPI RSDP from 0x5fd36000 to 0x000f4f90 Copying MPTABLE from 0x5fd5a000/5fd5a010 to 0x000f4d10 Copying PIR from 0x5fd5b000 to 0x000f4c10 rsdp=0x000f4f90 rsdt=0x5fd36030 xsdt=0x5fd360e0 table(50434146)=0x5fd382c0 (via xsdt) pm_tmr_blk=818 Using pmtimer, ioport 0x818 init timer Scan for VGA option rom Attempting to init PCI bdf 00:01.0 (vd 1002:990b) Copying data 61952@0xffc94338 to 61952@0x000c0000 Checking rom 0x000c0000 (sig aa55 size 121) Running option rom at c000:0003 Turning on vga text mode console SeaBIOS (version rel-1.17.0-0-gb52ca86e-dirty-20250625_103808-shit) init usb EHCI init on dev 00:12.2 (regs=0xf03cd020) /5ed1e000\ Start thread EHCI init on dev 00:13.2 (regs=0xf03ce020) /5ed1d000\ Start thread EHCI init on dev 00:16.2 (regs=0xf03cf020) /5ed1c000\ Start thread OHCI init on dev 00:12.0 (regs=0xf03c8000) /5ed1b000\ Start thread OHCI init on dev 00:13.0 (regs=0xf03c9000) /5ed1a000\ Start thread OHCI init on dev 00:14.5 (regs=0xf03ca000) /5ed19000\ Start thread OHCI init on dev 00:16.0 (regs=0xf03cb000) /5ed18000\ Start thread init ps2port /5ed17000\ Start thread |5ed17000| i8042_flush |5ed17000| i8042_command cmd=ad |5ed17000| i8042_wait_write |5ed17000| i8042_command cmd=a7 |5ed17000| i8042_wait_write |5ed17000| i8042_flush |5ed17000| i8042_command cmd=1aa |5ed17000| i8042_wait_write |5ed17000| i8042_wait_read |5ed17000| i8042 param=55 |5ed17000| i8042_command cmd=1ab |5ed17000| i8042_wait_write |5ed17000| i8042_wait_read |5ed17000| i8042 param=0 |5ed17000| ps2_command aux=0 cmd=1ff |5ed17000| i8042 ctr old=30 new=30 |5ed17000| i8042_command cmd=1060 |5ed17000| i8042_wait_write |5ed17000| i8042_wait_write init floppy drives init hard drives init ahci AHCI controller at 00:11.0, iobase 0xf03cc000, irq 7 AHCI: cap 0xf3309f05, ports_impl 0x3 /5ed16000\ Start thread |5ed16000| AHCI/0: probing |5ed17000| i8042_command cmd=1060 |5ed17000| i8042_wait_write |5ed17000| i8042_wait_write |5ed17000| ps2_sendbyte aux=0 cmd=ff |5ed17000| i8042_kbd_write c=255 |5ed17000| i8042_wait_write /5ed15000\ Start thread /5ed13000\ Start thread /5ed12000\ Start thread /5ed11000\ Start thread |5ed11000| AHCI/1: probing |5ed11000| AHCI/1: link up |5ed16000| AHCI/0: link up /5ed10000\ Start thread /5ed0f000\ Start thread /5ed0e000\ Start thread Found floppy file floppyimg/kolcrpt of size 1474560 Found floppy file floppyimg/memtst64 of size 1474560 Found floppy file floppyimg/flopbird of size 1474560 Allocate 1474560 bytes for a floppy Found floppy file floppyimg/kolcrpt of size 1474560 Mapping floppy floppyimg/kolcrpt to addr 0x5eba6000 Searching bootorder for: /rom@floppyimg/kolcrpt Registering bootable: Ramdisk [kolcrpt] (type:1 prio:101 data:f4bc0) Found floppy file floppyimg/memtst64 of size 1474560 Mapping floppy floppyimg/memtst64 to addr 0x5eba6000 Searching bootorder for: /rom@floppyimg/memtst64 Registering bootable: Ramdisk [memtst64] (type:1 prio:101 data:f4b90) Found floppy file floppyimg/flopbird of size 1474560 Mapping floppy floppyimg/flopbird to addr 0x5eba6000 Searching bootorder for: /rom@floppyimg/flopbird Registering bootable: Ramdisk [flopbird] (type:1 prio:101 data:f4b60) Searching bootorder for: HALT init lpt Found 0 lpt ports init serial Found 0 serial ports Searching bootorder for: /rom@img/tint Registering bootable: Payload [tint] (type:32 prio:9999 data:ffcd0640) Searching bootorder for: /rom@img/coreinfo Registering bootable: Payload [coreinfo] (type:32 prio:9999 data:ffcb4f80) /5eba5000\ Start thread /5eba4000\ Start thread /5eba2000\ Start thread /5eba1000\ Start thread /5eba0000\ Start thread /5eb9f000\ Start thread /5eb9e000\ Start thread /5eb9d000\ Start thread |5ed16000| AHCI/0: ... finished, status 0x51, ERROR 0x4 |5ed11000| Searching bootorder for: /pci@i0cf8/*@11/drive@1/disk@0 |5ed11000| Searching bios-geometry for: /pci@i0cf8/*@11/drive@1/disk@0 \5ed11000/ End thread |5ed16000| Searching bootorder for: /pci@i0cf8/*@11/drive@0/disk@0 |5ed16000| AHCI/0: supported modes: udma 5, multi-dma 2, pio 4 |5ed16000| AHCI/0: Set transfer mode to UDMA-5 |5ed17000| ps2 read 76 |5ed17000| Discarding ps2 data 76 (status=13) \5ed16000/ End thread |5ed17000| ps2 read fa |5ed17000| ps2 read aa |5ed17000| i8042_command cmd=1060 |5ed17000| i8042_wait_write |5ed17000| i8042_wait_write |5ed17000| ps2_command aux=0 cmd=f5 |5ed17000| i8042 ctr old=30 new=30 |5ed17000| i8042_command cmd=1060 |5ed17000| i8042_wait_write |5ed17000| i8042_wait_write |5ed17000| i8042_command cmd=1060 |5ed17000| i8042_wait_write |5ed17000| i8042_wait_write |5ed17000| ps2_sendbyte aux=0 cmd=f5 |5ed17000| i8042_kbd_write c=245 |5ed17000| i8042_wait_write /5ed16000\ Start thread /5ed11000\ Start thread /5eb9c000\ Start thread /5eb9b000\ Start thread /5eb9a000\ Start thread /5eb99000\ Start thread /5eb98000\ Start thread /5eb97000\ Start thread /5eb96000\ Start thread /5eb95000\ Start thread /5eb94000\ Start thread /5eb93000\ Start thread /5eb92000\ Start thread /5eb91000\ Start thread /5eb90000\ Start thread /5eb8f000\ Start thread |5ed17000| ps2 read fa |5ed17000| i8042_command cmd=1060 |5ed17000| i8042_wait_write |5ed17000| i8042_wait_write |5ed17000| ps2_command aux=0 cmd=10f0 |5ed17000| i8042 ctr old=30 new=30 |5ed17000| i8042_command cmd=1060 |5ed17000| i8042_wait_write |5ed17000| i8042_wait_write |5ed17000| i8042_command cmd=1060 |5ed17000| i8042_wait_write |5ed17000| i8042_wait_write |5ed17000| ps2_sendbyte aux=0 cmd=f0 |5ed17000| i8042_kbd_write c=240 |5ed17000| i8042_wait_write |5ed17000| ps2 read fa |5ed17000| ps2_sendbyte aux=0 cmd=2 |5ed17000| i8042_kbd_write c=2 |5ed17000| i8042_wait_write |5ed0f000| set_address 0x5ed1fdb0 \5eba2000/ End thread |5eb9f000| set_address 0x5ed1fed0 |5ed17000| ps2 read fa |5ed17000| i8042_command cmd=1060 |5ed17000| i8042_wait_write |5ed17000| i8042_wait_write |5ed17000| ps2_command aux=0 cmd=f4 |5ed17000| i8042 ctr old=61 new=70 |5ed17000| i8042_command cmd=1060 |5ed17000| i8042_wait_write |5ed17000| i8042_wait_write |5ed0f000| ehci_alloc_async_pipe 0x5ed1fdb0 0 |5ed0f000| ehci_send_pipe qh=0x5ed14a80 dir=0 data=0x00000000 size=0 |5ed17000| i8042_command cmd=1060 |5ed17000| i8042_wait_write |5ed17000| i8042_wait_write |5ed17000| ps2_sendbyte aux=0 cmd=f4 |5ed17000| i8042_kbd_write c=244 |5ed17000| i8042_wait_write |5eb9f000| ehci_alloc_async_pipe 0x5ed1fed0 0 |5eb9f000| ehci_send_pipe qh=0x5ed14a00 dir=0 data=0x00000000 size=0 |5ed0f000| ehci_alloc_async_pipe 0x5ed1fdb0 0 |5ed0f000| config_usb: 0x5ed14ad0 |5ed0f000| ehci_send_pipe qh=0x5ed14a80 dir=128 data=0x5ed0ff7e size=8 |5ed0f000| device rev=0200 cls=ff sub=ff proto=ff size=64 |5ed0f000| ehci_alloc_async_pipe 0x5ed1fdb0 0 |5ed0f000| ehci_send_pipe qh=0x5ed14a80 dir=128 data=0x5ed0ffa4 size=9 |5ed0f000| ehci_send_pipe qh=0x5ed14a80 dir=128 data=0x5ed149a0 size=39 \5ed0f000/ End thread |5eb9f000| ehci_alloc_async_pipe 0x5ed1fed0 0 |5eb9f000| config_usb: 0x5ed14a50 |5eb9f000| ehci_send_pipe qh=0x5ed14a00 dir=128 data=0x5eb9ff7e size=8 |5eb9f000| device rev=0200 cls=ef sub=02 proto=01 size=64 |5eb9f000| ehci_alloc_async_pipe 0x5ed1fed0 0 |5eb9f000| ehci_send_pipe qh=0x5ed14a00 dir=128 data=0x5eb9ffa4 size=9 |5eb9f000| ehci_send_pipe qh=0x5ed14a00 dir=128 data=0x5ed14770 size=603 |5ed17000| ps2 read fa |5ed17000| i8042_command cmd=1060 |5ed17000| i8042_wait_write |5ed17000| i8042_wait_write |5ed17000| PS2 keyboard initialized \5ed17000/ End thread \5eb9f000/ End thread |5eb9b000| set_address 0x5ed1fb80 \5eba1000/ End thread \5eba5000/ End thread \5ed10000/ End thread \5ed15000/ End thread \5eb9e000/ End thread \5eba0000/ End thread \5eba4000/ End thread \5ed13000/ End thread \5eb9d000/ End thread \5ed0e000/ End thread \5ed12000/ End thread |5ed1c000| ehci_free_pipes 0x5ed1fc90 |5ed1d000| ehci_free_pipes 0x5ed1fdb0 |5ed1e000| ehci_free_pipes 0x5ed1fed0 |5eb9b000| ohci_alloc_async_pipe 0x5ed1fb80 |5eb9b000| ohci_send_pipe 0x5ed1f800 |5eb9b000| ohci_alloc_async_pipe 0x5ed1fb80 |5eb9b000| config_usb: 0x5ed1f800 |5eb9b000| ohci_send_pipe 0x5ed1f800 |5eb9b000| device rev=0110 cls=e0 sub=01 proto=01 size=64 |5eb9b000| ohci_alloc_async_pipe 0x5ed1fb80 |5eb9b000| ohci_send_pipe 0x5ed1f800 |5eb9b000| ohci_send_pipe 0x5ed1f800 \5ed1e000/ End thread \5ed1d000/ End thread \5eb9b000/ End thread \5ed1c000/ End thread \5eb90000/ End thread \5eb92000/ End thread \5eb96000/ End thread \5eb9a000/ End thread \5eb95000/ End thread \5eb99000/ End thread \5eb8f000/ End thread |5ed18000| ohci_free_pipes 0x5ed1f8e0 |5ed19000| ohci_free_pipes 0x5ed1f9c0 \5eb91000/ End thread \5eb94000/ End thread \5eb98000/ End thread \5eb9c000/ End thread \5eb93000/ End thread \5eb97000/ End thread \5ed11000/ End thread \5ed16000/ End thread |5ed1a000| ohci_free_pipes 0x5ed1faa0 |5ed1b000| ohci_free_pipes 0x5ed1fb80 \5ed18000/ End thread \5ed19000/ End thread \5ed1a000/ End thread \5ed1b000/ End thread All threads complete. Scan for option roms Attempting to init PCI bdf 00:00.0 (vd 1022:1410) Attempting to map option rom on dev 00:00.0 Option rom sizing returned 0 0 Attempting to init PCI bdf 00:00.2 (vd 1022:1419) Attempting to map option rom on dev 00:00.2 Option rom sizing returned 0 0 Attempting to init PCI bdf 00:01.1 (vd 1002:9902) Attempting to map option rom on dev 00:01.1 Option rom sizing returned 0 0 Attempting to init PCI bdf 00:02.0 (vd 1022:1412) Attempting to map option rom on dev 00:02.0 Skipping non-normal pci device (type=1) Attempting to init PCI bdf 00:04.0 (vd 1022:1414) Attempting to map option rom on dev 00:04.0 Skipping non-normal pci device (type=1) Attempting to init PCI bdf 00:05.0 (vd 1022:1415) Attempting to map option rom on dev 00:05.0 Skipping non-normal pci device (type=1) Attempting to init PCI bdf 00:14.0 (vd 1022:780b) Attempting to map option rom on dev 00:14.0 Option rom sizing returned 0 0 Attempting to init PCI bdf 00:14.2 (vd 1022:780d) Attempting to map option rom on dev 00:14.2 Option rom sizing returned 0 0 Attempting to init PCI bdf 00:14.3 (vd 1022:780e) Attempting to map option rom on dev 00:14.3 Option rom sizing returned 0 0 Attempting to init PCI bdf 00:14.4 (vd 1022:780f) Attempting to map option rom on dev 00:14.4 Skipping non-normal pci device (type=81) Attempting to init PCI bdf 00:18.0 (vd 1022:1400) Attempting to map option rom on dev 00:18.0 Option rom sizing returned 0 0 Attempting to init PCI bdf 00:18.1 (vd 1022:1401) Attempting to map option rom on dev 00:18.1 Option rom sizing returned 0 0 Attempting to init PCI bdf 00:18.2 (vd 1022:1402) Attempting to map option rom on dev 00:18.2 Option rom sizing returned 0 0 Attempting to init PCI bdf 00:18.3 (vd 1022:1403) Attempting to map option rom on dev 00:18.3 Option rom sizing returned 0 0 Attempting to init PCI bdf 00:18.4 (vd 1022:1404) Attempting to map option rom on dev 00:18.4 Option rom sizing returned 0 0 Attempting to init PCI bdf 00:18.5 (vd 1022:1405) Attempting to map option rom on dev 00:18.5 Option rom sizing returned 0 0 Attempting to init PCI bdf 02:00.0 (vd 1969:10a0) Attempting to map option rom on dev 02:00.0 Option rom sizing returned 0 0 Attempting to init PCI bdf 03:00.0 (vd 168c:0034) Attempting to map option rom on dev 03:00.0 Option rom sizing returned f0280000 ffff0000 Inspecting possible rom at 0xf0280000 (vd=168c:0034 bdf=03:00.0) No option rom signature (got beef) Press ESC or \ / slash for boot menu, or wait for 10 seconds. Checking for bootsplash Select boot device: 1. Ramdisk [kolcrpt] 2. Ramdisk [memtst64] 3. Ramdisk [flopbird] 6. Payload [tint] 7. Payload [coreinfo] > 5 Searching bootorder for: HALT Mapping hd drive 0x000f4ac0 to 0 drive 0x000f4ac0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=1953525168 Mapping floppy drive 0x000f4bc0 Mapping floppy drive 0x000f4b90 Mapping floppy drive 0x000f4b60 Mapping cd drive 0x000f4b10 finalize PMM malloc finalize Space available for UMB: cf800-ec800, f4800-f4a90 Returned 16756736 bytes of ZoneHigh e820 map has 10 items: 0: 0000000000000000 - 000000000009fc00 = 1 RAM 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED 3: 0000000000100000 - 000000005eba6000 = 1 RAM 4: 000000005eba6000 - 000000005ed0e000 = 2 RESERVED 5: 000000005ed0e000 - 000000005fd29000 = 1 RAM 6: 000000005fd29000 - 0000000080000000 = 2 RESERVED 7: 00000000f8000000 - 00000000fc000000 = 2 RESERVED 8: 00000000fec10000 - 00000000fec11000 = 2 RESERVED 9: 0000000100000000 - 000000047f000000 = 1 RAM Jump to int19 enter handle_19: NULL Booting from Hard Disk... Booting from 0000:7c00