cdc = AsyncFIFO([("data", 256)], 32, buffered=True)
        cdc = ClockDomainsRenamer({"write": "radio", "read": "sys"})(cdc)
        self.submodules += cdc

        #self.comb += cdc.sink.connect(conv.source)

        # Large sync FIFO for buffering (should end up using URAM)
        fifo = SyncFIFO([("data", 256)], 2048, buffered=True)
        self.submodules += fifo

        self.comb += fifo.sink.connect(cdc.source)
        x = Signal(256)

        self.sync.radio += [
            x.eq(x+1),
        ]

        self.comb += [
            cdc.sink.valid.eq(x[0]),
            cdc.sink.data.eq(x),
        ]

        self.source = fifo.source