mesong12b.dtsi:

dwc3: dwc3@ff500000 {
        compatible = "synopsys, dwc3";
        status = "disabled";
        reg = <0x0 0xff500000 0x0 0x100000>;
        interrupts = <0 30 4>;
        usb-phy = <&usb2_phy_v2>, <&usb3_phy_v2>;
        cpu-type = "gxl";
        clock-src = "usb3.0";
        clocks = <&clkc CLKID_USB_GENERAL>;
        clock-names = "dwc_general";
};

usb3_phy_v2: usb3phy@ffe09080 {
        compatible = "amlogic, amlogic-new-usb3-v2";
        status = "disabled";
        reg = <0x0 0xffe09080 0x0 0x20>;
        phy-reg = <0xff646000>;
        phy-reg-size = <0x2000>;
        usb2-phy-reg = <0xffe09000>;
        usb2-phy-reg-size = <0x80>;
        interrupts = <0 16 4>;
        clocks = <&clkc CLKID_PCIE_PLL>;
        clock-names = "pcie_refpll";
};

pcie_A: pcieA@fc000000 {
        compatible = "amlogic, amlogic-pcie-v2", "snps,dw-pcie";
        reg = <0x0 0xfc000000 0x0 0x400000
                0x0 0xff648000 0x0 0x2000
                0x0 0xfc400000 0x0 0x200000
                0x0 0xff646000 0x0 0x2000
                0x0 0xffd01080 0x0 0x10>;
        reg-names = "elbi", "cfg", "config", "phy", "reset";
        interrupts = <0 221 0>;
        #interrupt-cells = <1>;
        bus-range = <0x0 0xff>;
        #address-cells = <3>;
        #size-cells = <2>;
        interrupt-map-mask = <0 0 0 0>;
        interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_EDGE_RISING>;
        device_type = "pci";
        ranges = <0x81000000 0 0 0 0xfc600000 0x0 0x100000
                /* downstream I/O */
                0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
                /* non-prefetchable memory */
        num-lanes = <1>;
        pcie-num = <1>;

        clocks = <&clkc CLKID_PCIE_PLL
                &clkc CLKID_PCIE_COMB
                &clkc CLKID_PCIE_PHY>;
        clock-names = "pcie_refpll",
                        "pcie",
                        "pcie_phy";
        /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/
        gpio-type = <2>;
        pcie-apb-rst-bit = <15>;
        pcie-phy-rst-bit = <14>;
        pcie-ctrl-a-rst-bit = <12>;
        status = "disabled";
};



g12b_a311d_w400_buildroot.dts:

&dwc3 {
        status = "okay";
};

&usb3_phy_v2 {
        status = "okay";
        portnum = <0>;
        otg = <1>;
        gpio-vbus-power = "GPIOH_6";
        gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
};

&ethmac {
        status = "okay";
        pinctrl-names = "internal_eth_pins";
        pinctrl-0 = <&internal_eth_pins>;
        mc_val = <0x4be04>;

        internal_phy=<1>;
};

&pcie_A {
        reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
        status = "okay";
};