module MainSystem(
    input rst,
    input clk,
    input switch_pause,
    input btn_start,
    output [6:0] hex0, hex1, hex2, hex3, hex4, hex5
);
 
    wire clk_2_5MHz;
    wire [31:0] ms_count;
    reg [1:0] opcode;
    
 
    FrequencyDivider freq_div (
        .clk_in(clk),
        .rst(rst),
        .clk_out(clk_2_5MHz)
    );
 
    TimeMeasurement timer (
        .clk(clk_2_5MHz),
        .rst(rst),
        .opcode(opcode),
        .ms_count(ms_count)
    );
 
    SevenSegmentController display (
        .ms_count(ms_count),
        .hex0(hex0),
        .hex1(hex1),
        .hex2(hex2),
        .hex3(hex3),
        .hex4(hex4),
        .hex5(hex5)
    );
 
    always @(*) begin
        opcode = 2'b00;
        if (btn_start) opcode = 2'b01;
        if (switch_pause) opcode = 2'b11;
    end
 
endmodule