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  1. module pl_hazard_unit (input branchd, mtorfsele, mtorfselm, rfwee, rfwem, rfwew, jumpd,
  2. input [4:0] rsd, rtd, rse, rte, rfae, rfam, rfaw,
  3. output stall,
  4. output reg flush,
  5. output reg forwardad, forwardbd,
  6. output reg [1:0] forwardae, forwardbe);
  7. reg lwstall, bstall;
  8. always @(*) begin
  9. forwardad <= 0;
  10. forwardbd <= 0;
  11. forwardae <= 0;
  12. forwardbe <= 0;
  13.  
  14. //execute operand 1
  15. if ((rse != 0) && (rse == rfam) && rfwem) forwardae <= 2'b10;
  16. else if ((rse != 0) && (rfwew) && (rse == rfaw)) forwardae <= 2'b01;
  17. else forwardae <= 2'b00;
  18.  
  19. //execute operand 2
  20. if ((rte != 0) && (rse == rfam) && rfwem) forwardbe <= 2'b10;
  21. else if ((rte != 0) && (rfwew) && (rse == rfaw)) forwardbe <= 2'b01;
  22. else forwardbe <= 2'b00;
  23.  
  24. //ID (branch) operand 1
  25. if ((rsd != 0) && (rsd == rfam) && (rfwem)) forwardad <= 1'b1;
  26. else forwardad <= 1'b0;
  27.  
  28. //ID (branch) operand 2
  29. if ((rtd!= 0) && (rtd == rfam) && (rfwem)) forwardbd <= 1'b1;
  30. else forwardbd <= 1'b0;
  31.  
  32. //lw stall (if LW is EX and dependent is in ID, stall 1 and flush the stage between)
  33. if ((mtorfsele && ((rte == rsd) || (rte == rtd)))) begin
  34. lwstall <= 1'b1;
  35. flush <= 1'b1;
  36. end
  37. else begin
  38. lwstall <= 1'b0;
  39. flush <= 1'b0;
  40. end
  41.  
  42. //branch stall (if branch instr (in ID) is dependent on instr in EX, or LW in MEM, stall 1)
  43. if (((rsd == rfae) || (rtd == rfae)) && (branchd) && (rfwee) || ((rsd == rfam) || (rtd == rfam)) && (branchd) && (mtorfselm))
  44. bstall <= 1'b1;
  45. else bstall <= 1'b0;
  46. end
  47. assign stall = lwstall | bstall;
  48.  
  49. endmodule
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