library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;


entity najslozeniji is
	port (
		iA : in std_logic_vector (7 downto 0);
		iB : in std_logic_vector (2 downto 0);
		iSEL : in std_logic_vector (1 downto 0);

		oY : out std_logic_vector(3 downto 0);
		oZERO : out std_logic

	);

end entity;

architecture Behavioral of najslozeniji is
	signal sPRIO_KODER_IZLAZ : std_logic_vector (2 downto 0);
	signal sPRIO_KODER_PLUS_IB : std_logic_vector (3 downto 0);
	signal sPRIO_KODER_PLUS_IB_SHIFT2 : std_logic_vector (3 downto 0);
	signal sDEKODER : std_logic_vector (7 downto 0);
	signal sOUT : std_logic_vector(3 downto 0);

begin

	process (iA) begin										-- PRIORITETNI KODER
		if (iA(7) = '1') then
			sPRIO_KODER_IZLAZ <= "111";
		elsif (iA(7 downto 6) = "01") then
			sPRIO_KODER_IZLAZ <= "110";
		elsif (iA(7 downto 5) = "001") then
			sPRIO_KODER_IZLAZ <= "101";
		elsif (iA(7 downto 4) = "0001") then
			sPRIO_KODER_IZLAZ <= "100";
		elsif (iA(7 downto 3) = "00001") then
			sPRIO_KODER_IZLAZ <= "011";
		elsif (iA(7 downto 2) = "000001") then
			sPRIO_KODER_IZLAZ <= "010";
		elsif (iA(7 downto 1) = "0000001") then
			sPRIO_KODER_IZLAZ <= "001";
		else
			sPRIO_KODER_IZLAZ <= "000";

		end if;

	end process;

	sPRIO_KODER_PLUS_IB <= ('0' & iB) + ('0' & sPRIO_KODER_IZLAZ);			--sabiranje dva signala

	sPRIO_KODER_PLUS_IB_SHIFT2 <= "00" & sPRIO_KODER_PLUS_IB(3 downto 2);	--shift 2 mesta u desno

	sDEKODER <= "00000001" when iB = "000" else
					"00000010" when iB = "001" else
					"00000100" when iB = "010" else
					"00001000" when iB = "011" else
					"00010000" when iB = "100" else
					"00100000" when iB = "101" else
					"01000000" when iB = "110" else
					"10000000" when iB = "111";


	process (iSEL) begin
		if(iSEL = "00") then
			sOUT <= sPRIO_KODER_PLUS_IB;
		elsif(iSEL = "01") then
			sOUT <= sPRIO_KODER_PLUS_IB_SHIFT2;
		elsif(iSEL = "10") then
			sOUT <= sDEKODER(7 downto 4);
		else
			sOUT <= sDEKODER(3 downto 0);
		end if;

	end process;

	oY <= sOUT;

	oZERO <= '1' when sOUT = "0000" else '0';


end architecture;