Guest User

Untitled

a guest
Apr 20th, 2018
74
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 0.66 KB | None | 0 0
  1. library IEEE;
  2. use IEEE.STD_LOGIC_1164.ALL;
  3.  
  4. -- warning: this file will not be saved if:
  5. -- * following entity block contains any syntactic errors (e.g. port list isn't separated with ; character)
  6. -- * following entity name and current file name differ (e.g. if file is named mux41 then entity must also be named mux41 and vice versa)
  7. ENTITY dmux IS PORT(
  8. x: IN STD_LOGIC_VECTOR(1 DOWNTO 0);
  9. y: IN STD_LOGIC_VECTOR(1 DOWNTO 0);
  10. s: IN STD_LOGIC;
  11. z: OUT STD_LOGIC_VECTOR(1 DOWNTO 0)
  12. );
  13. END dmux;
  14.  
  15. ARCHITECTURE arch OF dmux IS
  16.  
  17. BEGIN
  18. z(1) <= (not s and x(1)) or (s and y(1)) after 10 ns;
  19. z(0) <= (not s and x(0)) or (s and y(0)) after 10 ns;
  20. END arch;
Add Comment
Please, Sign In to add comment