library ieee;

use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use IEEE.STD_LOGIC_SIGNED.all;

entity zad2 is
port(
        iSW : in std_logic_vector(7 downto 0);
        iINV: in std_logic;
        oLED: out std_logic_vector(7 downto 0);
        oSIGN: out std_logic;
        oGREAT: out std_logic
        );
end entity;

architecture arch of zad2 is

    signal sA:std_logic_vector(2 downto 0);
    signal sB:std_logic_vector(2 downto 0);
    signal sREZ:std_logic_vector(3 downto 0);
    signal sKOD:std_logic_vector(2 downto 0);


begin

    sA <= iSW(6 downto 4) ;
    sB <= iSW(2 downto 0) ;


process (iSW,iINV,sREZ,sA,sB,sREZ,sKOD) begin

-- ako je INV 1
    if (iINV = '1') then
        oLED <= not iSW;


-- ako je INV 0
    else
        oLED(4) <= '1';

    -- sabirac
            if(sA(2) = '0' and sB(2) = '0') then

            sREZ <= ('0'&sA) + ('0'&sB);

        elsif(sA(2) = '1' and sB(2) = '0') then

            sREZ <=('1'&sA) + ('0'&sB);

        elsif(sA(2) = '0' and sB(2) = '1') then

            sREZ <= ('0'&sA) + ('1'&sB);

       else

            sREZ <= ('1'&sA) + ('1'&sB);

        end if;
        oLED(3 downto 0) <= sREZ;


    --paljenje crvene lampe
        if(sREZ(3) = '1' ) then
            oSIGN <= '1';
        else
            oSIGN <= '0';
        end if;

        --rad LED 7-5(prioritetni koder)
            if(iSW(0) = '1'  ) then
                sKOD <= "000";
        elsif(iSW(1) = '1'  ) then
                sKOD <= "001";
        elsif(iSW(2) = '1' ) then
                sKOD <= "010";
        elsif(iSW(3) = '1'  ) then
                sKOD <= "011";
        elsif(iSW(4) = '1'  ) then
                sKOD <= "100";
        elsif(iSW(5) = '1'  ) then
                sKOD <= "101";
        elsif(iSW(6) = '1'  ) then
                sKOD <= "110";
        else
                sKOD <= "111";
            end if;

            oLED(7 downto 5) <= sKOD;
        --zelena dioda

            if(sA > sB) then
                oGREAT <= '1';
            else
                oGREAT <= '0';

            end if;


    end if;
    end process;

end architecture;