========================================
BEGIN_TBF_COMMS
0x479F			ROM BANK 0x1C

Seems to start the whole process of
communicating with the Turbo File
========================================

0x479f :: LD HL, 0x4813
0x47a2 :: LD DE, 0xD001
0x47a5 :: LD B, 0x02
0x47a7 :: CALL COPY_TO_D001		//CALL 0x4DDC

0x47aa :: LD HL, 0xD001
0x47ad :: LD B, 0x02
0x47af :: CALL D001_CHECKSUM		//CALL 0x4CBB

0x47b2 :: LD (0xD003), A
0x47b5 :: LD B, 0x03
0x47b7 :: LD HL, 0xD001
0x47ba :: DI
0x47bb :: CALL TURBO_HANDSHAKE		//CALL 0x4BCA

0x47be :: OR A				//Check results of TURBO_HANDSHAKE. 0 for success, 1 for failure
0x47bf :: JR NZ, 0x4D

0x47c1 :: LD HL, 0xD001
0x47c4 :: LD B, 0x0A
0x47c6 :: CALL AUX_TURBO_HANSHAKE	//CALL 0x4C22

0x47c9 :: EI				//SIO IRQ enabled now?
0x47ca :: OR A				//Check results of AUX_TURBO_HANDSHAKE. 0 for success, 1 for failure
0x47cb :: JR NZ, 0x42

0x47cd :: LD B, 0x0A
0x47cf :: LD HL, 0xD001
0x47d2 :: LD DE, 0x4815
0x47d5 :: CALL CHECK_HEADER		//CALL 0x4B88

0x47d8 :: OR A
0x47d9 :: JR NZ, 0x34

0x47db :: LD A, (0xD005)
0x47de :: LD (0xD141), A
0x47e1 :: SRL A
0x47e3 :: SRL A
0x47e5 :: AND 0x01
0x47e7 :: LD (0xD13D), A
0x47ea :: XOR A
0x47eb :: LD (0xD13C), A
0x47ee :: LD A, (0xD005)
0x47f1 :: AND 0x03
0x47f3 :: JR Z, 0x15

0x47f5 :: CP 0x03
0x47f7 :: JR Z, 0x11

0x47f9 :: LD A, (0xD006)
0x47fc :: LD (0xD13F), A
0x47ff :: LD A, (0xD007)
0x4802 :: LD (0xD140), A
0x4805 :: XOR A
0x4806 :: LD (0xD096), A
0x4809 :: RET



========================================
CHECK_HEADER
0x4B88			ROM BANK 0x1C

Seems to check the header returned from
the Turbo file and do processing
========================================

0x4b88 :: PUSH DE
0x4b89 :: PUSH HL
0x4b8a :: DEC B
0x4b8b :: PUSH BC
0x4b8c :: CALL D001_CHECKSUM		//CALL 0x4CBB

0x4b8f :: POP BC
0x4b90 :: LD E, B
0x4b91 :: LD D, 0x00			//D = 0x00, E = B
0x4b93 :: POP HL
0x4b94 :: PUSH HL

0x4b95 :: ADD HL, DE			//HL should be 0xD001, DE should be 0x0009
0x4b96 :: LD B, (HL)
0x4b97 :: CP B				//Compares B to 0xD00A
0x4b98 :: JR NZ, HEADER_CHECK_FAILED	//JR NZ, 0x19

0x4b9a :: POP HL
0x4b9b :: POP DE
0x4b9c :: LD B, (HL)
0x4b9d :: LD A, (DE)
0x4b9e :: CP B				//Compares B to 0xD001
0x4b9f :: JR NZ, 0x17

0x4ba1 :: INC HL
0x4ba2 :: INC DE
0x4ba3 :: LD B, (HL)
0x4ba4 :: LD A, (DE)
0x4ba5 :: CP B				//Compares B to 0xD002
0x4ba6 :: JR NZ, 0x13

0x4ba8 :: INC HL
0x4ba9 :: LDI A, (HL)
0x4baa :: CP 0x00			//Compares 0xD003 to 0x00
0x4bac :: JR NZ, 0x10

0x4bae :: LD A, (HL)			//A = [0xD004]
0x4baf :: CALL FUNCTION_1		//CALL 0x4CC6
0x4bb2 :: RET

.HEADER_CHECK_FAILED
0x4bb3 :: POP HL
0x4bb4 :: POP DE
0x4bb5 :: LD A, 0x0E
0x4bb7 :: RET



========================================
TURBO_HANDSHAKE
0x4BCA			ROM BANK 0x1C

Primary handshake with Turbo File
========================================

0x4bca :: LD C, 0x02
0x4bcc :: LD DE, 0x00


.WAIT_FOR_C6
0x4bcf :: DEC DE
0x4bd0 :: LD A, D
0x4bd1 :: OR E
0x4bd2 :: JR Z, 0x48

.CHECK_SC_LOOP_AUX
0x4bd4 :: LDH A, (0xFF02)
0x4bd5 :: AND 0x80
0x4bd7 :: CHECK_SC_LOOP_AUX		//JR NZ, 0xF6

0x4bd9 :: LD A, 0x6C			//Setup SB and SC
0x4bdb :: LDH (0xFF01), A
0x4bdd :: XOR A
0x4bde :: LDH (0xFF02), A
0x4bdf :: LD A, 0x80
0x4be1 :: LDH (0xFF02), A
0x4be2 :: LD DE, 0x00

.CHECK_SC_LOOP_1
0x4be5 :: DEC DE			//Setup DE as timeout counter
0x4be6 :: LD A, D
0x4be7 :: OR E
0x4be8 :: JR Z, 0x35

0x4bea :: LDH A, (0xFF02)
0x4beb :: AND 0x80
0x4bed :: JR NZ, CHECK_SC_LOOP_1	//JR NZ, 0xF6

0x4bef :: LDH A, (0xFF01)		//Check SB if equal to 0xC6
0x4bf1 :: CP 0xC6
0x4bf3 :: JR NZ, WAIT_FOR_C6		//JR NZ, 0xDA
0x4bf5 :: LD DE, 0x00

.CHECK_SC_LOOP_2
0x4bf8 :: DEC DE
0x4bf9 :: LD A, D
0x4bfa :: OR E
0x4bfb :: JR Z, 0x1F

0x4bfd :: LDH A, (0xFF02)
0x4bfe :: AND 0x80
0x4c00 :: JR NZ, CHECK_SC_LOOP_2	//JR NZ, 0xF6

0x4c02 :: LDI A, (HL)			//Should load 0x5A into A
0x4c03 :: LDH (0xFF01), A		//Looks like zeroing out SC and SB
0x4c05 :: XOR A
0x4c06 :: LDH (0xFF02), A

0x4c07 :: LD A, 0x80
0x4c09 :: LDH (0xFF02), A
0x4c0a :: LD DE, 0x00

.CHECK_SC_LOOP_3
0x4c0d :: DEC DE
0x4c0e :: LD A, D
0x4c0f :: OR E
0x4c10 :: JR Z, 0x0A

0x4c12 :: LDH A, (0xFF02)
0x4c13 :: AND 0x80
0x4c15 :: CHECK_SC_LOOP_3		//JR NZ, 0xF6

0x4c17 :: DEC B				//B initially = 3. C initially = 2
0x4c18 :: JR NZ, CHECK_SC_LOOP_2	//JR NZ, 0xDE

0x4c1a :: XOR A
0x4c1b :: RET



========================================
AUX_TURBO_HANDSHAKE
0x4C22			ROM BANK 0x1C

Secondary handshake with Turbo File
Retrieves device header
========================================

0x4c22 :: PUSH BC
0x4c23 :: LD C, 0x02
0x4c25 :: LD B, 0x05
0x4c27 :: LD DE, 0x00

.CHECK_SC_LOOP_4
0x4c2a :: DEC DE
0x4c2b :: LD A, D
0x4c2c :: OR E
0x4c2d :: JR NZ, DE_NOT_ZERO_1		//JR NZ, 0x03

.DE_NOT_ZERO_1
0x4c32 :: LDH A, (0xFF02)
0x4c33 :: AND 0x80
0x4c35 :: JR NZ CHECK_SC_LOOP_4		//JR NZ, 0xF3

0x4c37 :: LD B, 0x08
0x4c39 :: LD DE, 0x00

.SEND_F1
0x4c3c :: LD A, 0xF1
0x4c3e :: LDH (0xFF01), A		//SB = 0xF1
0x4c40 :: XOR A
0x4c41 :: LDH (0xFF02), A
0x4c42 :: LD A, 0x80
0x4c44 :: LDH (0xFF02), A

.CHECK_SC_LOOP_5
0x4c45 :: DEC DE
0x4c46 :: LD A, D
0x4c47 :: OR E
0x4c48 :: JR NZ, DE_NOT_ZERO_2		//JR NZ, 0x03

.DE_NOT_ZERO_2
0x4c4d :: LDH A, (0xFF02)
0x4c4e :: AND 0x80
0x4c50 :: JR NZ, CHECK_SC_LOOP_5	//JR NZ, 0xF3

0x4c52 :: LDH A, (0xFF01)
0x4c54 :: CP 0xE7			//After sending 0xF1, Game Boy expects to receive 0xE7
0x4c56 :: JR NZ, SEND_F1		//JR NZ, 0xE4

0x4c58 :: POP BC
0x4c59 :: LD DE, 0x00

.SEND_7E
0x4c5c :: LD A, 0x7E
0x4c5e :: LDH (0xFF01), A
0x4c60 :: XOR A
0x4c61 :: LDH (0xFF02), A
0x4c62 :: LD A, 0x80
0x4c64 :: LDH (0xFF02), A

.CHECK_SC_LOOP_6
0x4c65 :: DEC DE
0x4c66 :: LD A, D
0x4c67 :: OR E
0x4c68 :: JR Z, 0x45

0x4c6a :: LDH A, (0xFF02)
0x4c6b :: AND 0x80
0x4c6d :: JR NZ CHECK_SC_LOOP_6		//JR NZ, 0xF6

0x4c6f :: LDH A, (0xFF01)
0x4c71 :: CP 0xA5			//After sending 0x7E, Game Boy expects to receive 0xA5
0x4c73 :: JR NZ, SEND_7E		//JR NZ, 0xE7

0x4c75 :: LDI (HL), A			//Should load 0xA5 into 0xD001
0x4c76 :: DEC B
0x4c77 :: LD DE, 0x00

.CHECK_SC_LOOP_7
0x4c7a :: DEC DE
0x4c7b :: LD A, D
0x4c7c :: OR E
0x4c7d :: JR Z, 0x33

0x4c7f :: LDH A, (0xFF02)
0x4c80 :: AND 0x80
0x4c82 :: CHECK_SC_LOOP_7		//JR NZ, 0xF6

.SEND_F2
0x4c84 :: LD A, 0xF2
0x4c86 :: LDH (0xFF01), A
0x4c88 :: XOR A
0x4c89 :: LDH (0xFF02), A
0x4c8a :: LD A, 0x80
0x4c8c :: LDH (0xFF02), A

.CHECK_SC_LOOP_8
0x4c8d :: DEC DE
0x4c8e :: LD A, D
0x4c8f :: OR E
0x4c90 :: JR Z, 0x23

0x4c92 :: LDH A, (0xFF02)
0x4c93 :: AND 0x80
0x4c95 :: CHECK_SC_LOOP_8		//JR NZ, 0xF6

0x4c97 :: LDH A, (0xFF01)		//Should load F2 response into 0xD002
0x4c99 :: LDI (HL), A			//Keep loading responses into 0xD000+ for device header
0x4c9a :: DEC B
0x4c9b :: JR Z, B_EQ_ZERO		//JR Z, 0x05
0x4c9d :: LD DE, 0x00
0x4ca0 :: JR CHECK_SC_LOOP_7		//JR 0xD8

.B_EQ_ZERO
0x4ca2 :: XOR A
0x4ca3 :: RET



========================================
D001_CHECKSUM
0x4CBB			ROM BANK 0x1C

8-bit sum of 0xD001 through 0xD009
Checksum = (0x100 - (SUM + 0x45))
========================================

0x4cbb :: LD C, 0x00

.REG_C_ADD_LOOP
0x4cbd :: LDI A, (HL)			//Seems to be an 8-bit checksum on 0xD001+ values from AUX_TURBO_HANDSHAKE
0x4cbe :: ADD A, C
0x4cbf :: LD C, A
0x4cc0 :: DEC B
0x4cc1 :: JR NZ, REG_C_ADD_LOOP		//JR NZ, 0xFA

0x4cc3 :: XOR A
0x4cc4 :: SUB A, C
0x4cc5 :: RET



========================================
FUNCTION_1
0x4CC6

Appears to check the status of 0xD004
Sets A as output
========================================

0x4cc6 :: LD (0xD13E), A
0x4cc9 :: LD B, A
0x4cca :: AND 0x03
0x4ccc :: CP 0x01			//Checks to see if (0xD004 & 0x3) > 1
0x4cce :: JR NC, A_GT_01		//JR NC, 0x04

.A_GT_01
0x4cd4 :: BIT 6, B
0x4cd6 :: JR Z, NO_BIT_SIX		//JR Z, 0x04

.NO_BIT_SIX
0x4cdc :: XOR A
0x4cdd :: RET



========================================
COPY_TO_D001
0x4DDC

Copies values into 0xD001+
========================================

0x4ddc :: LDI A, (HL)			//Loads value at address DE into address HL
0x4ddd :: LD (DE), A			//When starting the TBF it pulls 3 values from ROM into 0xD001 - 0xD003
0x4dde :: INC DE
0x4ddf :: DEC B
0x4de0 :: JR COPY_TO_D001		//JR NZ, 0xFA
0x4de2 :: RET