•••


---------- Forwarded message ---------
From: Ionescu Gabriel <igabriel1993@gmail.com>
Date: Thu, Dec 10, 2015, 11:23
Subject: cheat sheet
To: Adrian Tanasie <tanasieadrian93@gmail.com>, Diaconeasa Stefan <stefan.diaconeasa@gmail.com>, Radu Galbenu <radugalbenu@gmail.com>


----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date:    10:09:28 12/03/2015
-- Design Name:
-- Module Name:    ceas - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity ceas is
 Port
 (
 iCLK : IN std_logic;

 oaAN : OUT std_logic_vector(3 downto 0); --Anozi
 oaSEG : OUT std_logic_vector(6 downto 0) --Segmente
 );
end ceas;

architecture Behavioral of ceas is
signal saDat : std_logic_vector(15 downto 0);
signal saQ_Cnt : std_logic_vector(19 downto 1):=(others =>'0');
signal saDgt : std_logic_vector(3 downto 0);


 signal saQ_div : std_logic_vector(25 downto 0):=(others =>'0');
 signal sD_CES : std_logic;

 -- pentru secunde
 signal saQ_sec : std_logic_vector(3 downto 0):=(others =>'0');
 signal sTCS_CEZS : std_logic;

 -- pentru zeci de secunde
 signal saQ_zsec : std_logic_vector(2 downto 0):="000";

begin


--saDat <=iaK & iaK;

process (iCLK)
begin
	if(rising_edge(iCLK)) then
			saQ_Cnt <= saQ_Cnt + 1;

			if saQ_div = 8 then   --a modulo 6 counter
				saQ_div <= (others => '0');
         else
            saQ_div <= saQ_div+1;

         end if;

			if sD_CES = '1' then
				if saQ_sec = 9 then   --a modulo 10 counter
					saQ_sec   <= "0000";
				else
					saQ_sec   <= saQ_sec + 1;
				end if;
			 end if;


	    if (sTCS_CEZS ='1' ) then
         if (saQ_zsec = 5) then   --a modulo 6 counter
            saQ_zsec <= "000";
         else
            saQ_zsec   <= saQ_zsec + 1;
         end if;
		end if;


	end if;
end process;
sD_CES <= '1' when saQ_div = 1 else '0';
sTCS_CEZS <= '1' when sD_CES='1' and saQ_sec = 9 else '0';

saDat <= "000000000" & saQ_zsec & saQ_sec;

WITH saQ_Cnt(19 downto 18) select
oaAN <= "1110" WHEN "00",
			"1101" WHEN "01",
			"1011" WHEN "10",
			"0111" WHEN "11",
			"1111" WHEN others;

with saQ_Cnt(19 downto 18) select
			saDgt <= saDat(3 downto 0) when "00",
		   saDat(7 downto 4) when "01",
		   saDat(11 downto 8) when "10",
		   saDat(15 downto 12) when "11",
			"0000" when others;

with saDgt SELect
	oaSEG <=
			"1000000" when "0000",   --0
		   	"1111001" when x"1",     --1
  	       	"0100100" when x"2",     --2
         	"0110000" when "0011",   --3
         	"0011001" when "0100",   --4
         	"0010010" when "0101",   --5
         	"0000010" when "0110",   --6
         	"1111000" when "0111",   --7
         	"0000000" when "1000",   --8
         	"0010000" when "1001",   --9
         	"0001000" when "1010",   --A
         	"0000011" when "1011",   --b
         	"1000110" when "1100",   --C
         	"0100001" when "1101",   --d
         	"0000110" when "1110",   --E
         	"0001110" when others;   --F








end Behavioral;


--
Ionescu Gabriel