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Sep 22nd, 2017
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  1. Path Size %
  2. '='*110i
  3. : 2348 59.35%
  4. _interrupt_stack 2048 51.77%
  5. _kernel 284 7.18%
  6. _sys_clock_tick_count 8 0.20%
  7. _sys_idle_elapsed_ticks 4 0.10%
  8. sys_clock_hw_cycles_per_tick 4 0.10%
  9. arch 48 1.21%
  10. arm 48 1.21%
  11. soc 48 1.21%
  12. ti_lm3s6965 48 1.21%
  13. soc.c 24 0.61%
  14. __config_sys_init_ti_lm3s6965_init0 12 0.30%
  15. __device_sys_init_ti_lm3s6965_init0 12 0.30%
  16. soc_config.c 24 0.61%
  17. __config_sys_init_uart_stellaris_init0 12 0.30%
  18. __device_sys_init_uart_stellaris_init0 12 0.30%
  19. drivers 148 3.74%
  20. console 28 0.71%
  21. uart_console.c 28 0.71%
  22. __config_sys_init_uart_console_init0 12 0.30%
  23. __device_sys_init_uart_console_init0 12 0.30%
  24. uart_console_dev 4 0.10%
  25. serial 92 2.33%
  26. uart_stellaris.c 92 2.33%
  27. __config_uart_stellaris0 12 0.30%
  28. __config_uart_stellaris1 12 0.30%
  29. __config_uart_stellaris2 12 0.30%
  30. __device_uart_stellaris0 12 0.30%
  31. __device_uart_stellaris1 12 0.30%
  32. __device_uart_stellaris2 12 0.30%
  33. uart_stellaris_dev_cfg_1 8 0.20%
  34. uart_stellaris_dev_data_0 4 0.10%
  35. uart_stellaris_dev_data_1 4 0.10%
  36. uart_stellaris_dev_data_2 4 0.10%
  37. timer 28 0.71%
  38. cortex_m_systick.c 4 0.10%
  39. clock_accumulated_count 4 0.10%
  40. sys_clock_init.c 24 0.61%
  41. __config_sys_init__sys_clock_driver_init0 12 0.30%
  42. __device_sys_init__sys_clock_driver_init0 12 0.30%
  43. kernel 1488 37.61%
  44. init.c 1472 37.21%
  45. _idle_stack 256 6.47%
  46. _idle_thread_s 96 2.43%
  47. _main_stack 1024 25.88%
  48. _main_thread_s 96 2.43%
  49. sys_clock.c 16 0.40%
  50. _handling_timeouts 4 0.10%
  51. _time_slice_duration 4 0.10%
  52. _time_slice_elapsed 4 0.10%
  53. _time_slice_prio_ceiling 4 0.10%
  54. misc 4 0.10%
  55. printk.c 4 0.10%
  56. _char_out 4 0.10%
  57. root 0 0.00%
  58. ==============================================================================================================
  59. 3956
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