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  1.     jmp RESET ; Reset Handler
  2.     jmp EXT_INT0 ; IRQ0 Handler
  3.     jmp EXT_INT1 ; IRQ1 Handler
  4.     jmp TIM2_COMP ; Timer2 Compare Handler
  5.     jmp TIM2_OVF ; Timer2 Overflow Handler
  6.     jmp TIM1_CAPT ; Timer1 Capture Handler
  7.     jmp TIM1_COMPA ; Timer1 CompareA Handler
  8.     jmp TIM1_COMPB ; Timer1 CompareB Handler
  9.     jmp TIM1_OVF ; Timer1 Overflow Handler
  10.     jmp TIM0_OVF ; Timer0 Overflow Handler
  11.     jmp SPI_STC ; SPI Transfer Complete Handler
  12.     jmp USART_RXC ; USART RX Complete Handler
  13.     jmp USART_UDRE ; UDR Empty Handler
  14.     jmp USART_TXC ; USART TX Complete Handler
  15.     jmp ADC_H ; ADC Conversion Complete Handler
  16.     jmp EE_RDY ; EEPROM Ready Handler
  17.     jmp ANA_COMP ; Analog Comparator Handler
  18.     jmp TWSI ; Two-wire Serial Interface Handler
  19.     jmp EXT_INT2 ; IRQ2 Handler
  20.     jmp TIM0_COMP ; Timer0 Compare Handler
  21.     jmp SPM_RDY ; Store Program Memory Ready Handler
  22.  
  23.     #define RAMSTART 0x0060
  24.     #define PROC_SIZE 128
  25.     #define CONF_SIZE 9
  26.     #define TEMP r16
  27.     #define SOME_REG r17
  28.     #define NUMBER_CUR_PROC r18
  29.      #define JUST_TEMP r18
  30.  
  31.     #define PROC_NUM 0
  32.     #define PROC_1_SPH 1
  33.     #define PROC_1_SPL 2
  34.     #define PROC_2_SPH 3
  35.     #define PROC_2_SPL 4
  36.     #define PROC_3_SPH 5
  37.     #define PROC_3_SPL 6
  38.     #define PROC_4_SPH 7
  39.     #define PROC_4_SPL 8
  40.     #define COUNT_BTN_PRESSED 9
  41.     #define ADC_LEVEL 10
  42.    
  43.  
  44.     #define counter0 r23
  45.     #define counter1 r24
  46.       #define TEMPH r16
  47.     #define TEMPL r17
  48.  
  49. .macro push_registers
  50.     push r0 push r1 push r2 push r3 push r4 push r5 push r6 push r7 push r8 push r9
  51.     push r10 push r11 push r12 push r13 push r14 push r15 push r16 push r17 push r18 push r19
  52.     push r20 push r21 push r22 push r23 push r24 push r25 push r26 push r27 push r28 push r29
  53.     push r30 push r31
  54.     in xl, SREG
  55.     push xl
  56. .endmacro
  57.  
  58. .macro pop_registers
  59.     pop xl
  60.     out SREG, xl
  61.     pop r31 pop r30 pop r29 pop r28 pop r27 pop r26 pop r25 pop r24 pop r23 pop r22 pop r21 pop r20
  62.     pop r19 pop r18 pop r17 pop r16 pop r15 pop r14 pop r13 pop r12 pop r11 pop r10
  63.     pop r9 pop r8 pop r7 pop r6 pop r5 pop r4 pop r3 pop r2 pop r1 pop r0      
  64. .endmacro
  65.  
  66. ;in @1:@2 load (@1:@2)+proc_size
  67. .macro add_proc_size
  68.     ldi JUST_TEMP, PROC_SIZE
  69.     add @0, JUST_TEMP
  70.     ldi JUST_TEMP, 0
  71.     adc @1, JUST_TEMP
  72. .endmacro
  73.  
  74. ;@0 - smecshenie
  75. ;@1 - register with value
  76. ;write  to addr ramstart ramstart + 4*proc_size + @0
  77. .macro write_to_ram
  78.     ldi xl, low(RAMSTART)
  79.     ldi xh, high(RAMSTART)
  80.     add xl, @0
  81.     ldi @0, 0
  82.     adc xh, @0
  83.     add_proc_size @0, xl, xh
  84.     add_proc_size @0, xl, xh
  85.     add_proc_size @0, xl, xh
  86.     add_proc_size @0, xl, xh
  87.     st x, @1   
  88. .endmacro
  89.  
  90.  
  91. ;@0 - register with smeschenie
  92. ;@1 - register where will write data
  93. ;read data from ramstare+4*procsize+@0 to @1
  94. .macro read_from_ram
  95.     ldi xl, low(RAMSTART)
  96.     ldi xh, high(RAMSTART)
  97.     add xl, @0
  98.     ldi @0, 0
  99.     adc xh, @0
  100.     add_proc_size @0, xl, xh
  101.     add_proc_size @0, xl, xh
  102.     add_proc_size @0, xl, xh
  103.     add_proc_size @0, xl, xh
  104.     ld @1, x   
  105. .endmacro
  106.  
  107.  
  108.  
  109. ; load to yl and yh yl of process and yh of process
  110. .macro load_stack
  111.     clr TEMP
  112.     ldi SOME_REG, PROC_NUM
  113.     read_from_ram SOME_REG, TEMP  
  114.     dec TEMP
  115.     lsl TEMP
  116.     inc TEMP
  117.     clr yl
  118.     clr yh
  119.     read_from_ram TEMP, yh
  120.     out sph, yh
  121.     inc TEMP
  122.     read_from_ram TEMP, yl
  123.     out spl, yl
  124. .endmacro
  125.  
  126. ;save only yl and yh
  127. .macro save_stack
  128.     clr TEMP
  129.     ldi SOME_REG, 0
  130.     read_from_ram SOME_REG, TEMP   
  131.     dec TEMP
  132.     ldi SOME_REG, 2
  133.     mul TEMP, SOME_REG
  134.     mov TEMP, r0
  135.     inc TEMP
  136.     in yl, spl
  137.     in yh, sph
  138.     write_to_ram TEMP, yh  
  139.     inc TEMP
  140.     write_to_ram TEMP, yl  
  141. .endmacro
  142.  
  143.  
  144. send_com_from_r16:
  145.     out PORTA, r16
  146.     sbi PORTA, 6
  147.     nop nop nop nop
  148.     cbi PORTA, 6
  149.     nop nop nop nop
  150.     call delay_5ms
  151.     ret
  152. delay_5ms:
  153.     ldi  r18, 52
  154.     ldi  r19, 242
  155. L3: dec  r19
  156.     brne L3
  157.     dec  r18
  158.     brne L3
  159.     nop
  160. ret
  161.  
  162. inits:
  163.     ;button : button on A7
  164.     sbi PORTD, 0
  165.     ;diod on B3
  166.     sbi DDRB, 3
  167.     ;display
  168.     call init_display
  169.     call init_adc
  170.    
  171.     ret
  172.  
  173. init_adc:
  174.  
  175.    
  176.  
  177.     ldi r20, (1<<0) | (1<<1)| (1<<2)
  178.     out ADMUX, r20
  179.  
  180.     ;sbi ADMUX, ADLAR
  181.     ;set ADC1 to input
  182.     ;sbi ADMUX, MUX0
  183.     //enable adc, start first conversation, conv comp int, set auto trig conv, set div to 128
  184.     ldi r20, (1<<ADEN)|(1<<ADSC)|(1<<ADATE)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0)
  185.     ; ADEN = 1 - разрешаем АЦП
  186.     ; ADSC = 1 Запускаем преобразование (первое, дальше автоматом)
  187.     ; ADIE = 1 Разрешаем прерывания.
  188.     ; ADATE = 1 Непрерывные последовательные преобразования, одно за другим.
  189.     ; ADPS2..0  Делитель частоты на 128
  190.  
  191.  
  192.     out ADCSRA, r20
  193. ret
  194.  
  195.  
  196. init_display:
  197.     ldi xl, 127
  198.     out DDRA, xl
  199.  
  200.     call delay30
  201.     ;send 000011
  202.     ldi r16, 3
  203.     call send_com_from_r16
  204.    
  205.     ;send 000011
  206.     call send_com_from_r16
  207.  
  208.     ;send 000011
  209.     call send_com_from_r16
  210.    
  211.     ;send 000010
  212.     ldi r16, 2
  213.     call send_com_from_r16
  214.    
  215.     ;send 000010
  216.     call send_com_from_r16
  217.    
  218.     ;send 00NF00 = 001000
  219.     ldi r16, 8
  220.     call send_com_from_r16
  221.    
  222.     ;send 000000
  223.     ldi r16, 0
  224.     call send_com_from_r16
  225.    
  226.     ;send 001000
  227.     ldi r16, 8
  228.     call send_com_from_r16
  229.    
  230.     ;send 000000
  231.     ldi r16, 0
  232.     call send_com_from_r16
  233.    
  234.     ;send 000001
  235.     ldi r16, 1
  236.     call send_com_from_r16
  237.    
  238.     ;send 000000
  239.     ldi r16, 0
  240.     call send_com_from_r16
  241.    
  242.     ;send 0001I/DS
  243.     ldi r16, 6
  244.     call send_com_from_r16
  245.  
  246.  
  247.     ; set addr ddram 0
  248.     ldi xl, 2
  249.     ldi xh, 0
  250.     call sendpack
  251.     ; display on
  252.     ldi xl, 12
  253.     ldi xh, 0
  254.     call sendpack
  255.  
  256.     ret
  257.  
  258. RESET:
  259.     ldi xl, low(RAMEND)
  260.     ldi xh, high(RAMEND)
  261.     out SPL, xl
  262.     out SPH, xh
  263.     call inits
  264.  
  265.     ldi xl, low(RAMSTART)
  266.     ldi xh, high(RAMSTART)
  267.     ldi yl, low(RAMEND+1)
  268.     ldi yh, high(RAMEND+1)
  269.     clr TEMP
  270. ram_clear:
  271.     st x+, TEMP
  272.     cp xh, yh
  273.     brne ram_clear
  274.     cp xl, yl
  275.     brne ram_clear
  276.  
  277. conf_init:
  278.    
  279.     ldi TEMP, 1
  280.     ldi SOME_REG, PROC_NUM
  281.     write_to_ram SOME_REG, TEMP
  282.  
  283.     ldi yl, PROC_SIZE
  284.     sbiw y, 33
  285.     ldi xl, low(RAMSTART)
  286.     ldi xh, high(RAMSTART)
  287.     add yl, xl
  288.     adc yh, xh
  289.     ldi SOME_REG, PROC_1_SPH
  290.     write_to_ram SOME_REG, yh
  291.     ldi SOME_REG, PROC_1_SPL
  292.     write_to_ram SOME_REG, yl
  293.  
  294.     add_proc_size yl, yh
  295.     ldi SOME_REG, PROC_2_SPH
  296.     write_to_ram SOME_REG, yh
  297.     ldi SOME_REG, PROC_2_SPL
  298.     write_to_ram SOME_REG, yl
  299.  
  300.     add_proc_size yl, yh
  301.     ldi SOME_REG, PROC_3_SPH
  302.     write_to_ram SOME_REG, yh
  303.     ldi SOME_REG, PROC_3_SPL
  304.     write_to_ram SOME_REG, yl
  305.  
  306.     add_proc_size yl, yh
  307.     ldi SOME_REG, PROC_4_SPH
  308.     write_to_ram SOME_REG, yh
  309.     ldi SOME_REG, PROC_4_SPL
  310.     write_to_ram SOME_REG, yl
  311.  
  312.     ;ldi SOME_REG, COUNT_BTN_PRESSED
  313.     ;ldi yl, '0'
  314.     ;write_to_ram SOME_REG, yl
  315.  
  316.    
  317.     ;ldi SOME_REG, ADC_LEVEL
  318.     ;ldi yl, 0
  319.     ;write_to_ram SOME_REG, yl
  320.  
  321.  
  322. switch:
  323.     load_stack
  324.     pop_registers
  325.     jmp read_adc
  326. P1: push_registers
  327.     save_stack
  328.    
  329.     clr JUST_TEMP
  330.     ldi SOME_REG, PROC_NUM
  331.     read_from_ram SOME_REG, JUST_TEMP
  332.     inc JUST_TEMP
  333.     write_to_ram SOME_REG, JUST_TEMP
  334.    
  335.     load_stack
  336.     pop_registers
  337.     jmp listen_button
  338. P2: push_registers
  339.     save_stack
  340.    
  341.     clr JUST_TEMP
  342.     ldi SOME_REG, PROC_NUM
  343.     read_from_ram SOME_REG, JUST_TEMP
  344.     inc JUST_TEMP
  345.     write_to_ram SOME_REG, JUST_TEMP
  346.    
  347.     load_stack
  348.     pop_registers
  349.     jmp proc_test
  350. P3: push_registers
  351.     save_stack
  352.    
  353.    
  354.    
  355.     ldi SOME_REG, PROC_NUM
  356.     ldi TEMP, 1
  357.     write_to_ram SOME_REG, TEMP
  358.    
  359.     jmp switch
  360.  
  361.  
  362.  
  363. read_adc:
  364.  in TEMPH, ADMUX
  365.     bst TEMPH, ADLAR
  366.     brtc adc_init
  367. not_ain:in TEMPH, ADCSRA
  368.     bst TEMPH, ADIF
  369.     brts write_value
  370.     jmp P1
  371.  
  372. adc_init:
  373.     ldi TEMPH, (1<<ADLAR)|(0<<MUX4)|(0<<MUX3)|(1<<MUX2)|(1<<MUX1)|(1<<MUX0)
  374.     out ADMUX, TEMPH
  375.     clr TEMPH
  376.     ori TEMPH,(1<<ADEN)|(1<<ADSC)|(1<<ADATE)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0)
  377.     out ADCSRA, TEMPH
  378.     jmp not_ain
  379.    
  380. write_value:
  381.     ldi TEMPL, ADC_LEVEL
  382.     in TEMPH, ADCH
  383.     write_to_ram TEMPL, TEMPH
  384.     ldi TEMPL, (1<<ADEN)|(1<<ADSC)|(1<<ADATE)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0)|(1<<ADIF)
  385.     out ADCSRA, TEMPL
  386.     jmp P1
  387.  
  388. proc_test:
  389.    
  390.     sbi PORTB, 3
  391.     jmp string
  392.     jmp P3
  393.  
  394. sendpack:
  395.     ;xh<<5
  396.     lsl xh lsl xh lsl xh lsl xh lsl xh
  397.    
  398.     ldi yl, 0x0f
  399.     ;yh - 1111 0000
  400.     ldi yh, 0xf0
  401.     ;first four bits of xl then 0000
  402.     and yh, xl
  403.     ;yh >> 4
  404.     lsr yh lsr yh lsr yh lsr yh
  405.  
  406.     ;r16 = yh
  407.     mov r16, yh
  408.    
  409.    
  410.     add r16, xh
  411.     nop nop
  412.     call send_com_from_r16
  413.  
  414.     and yl, xl
  415.     mov r16, yl
  416.    
  417.    
  418.     add r16, xh
  419.     nop nop
  420.     call send_com_from_r16
  421.  
  422.     ret
  423.  
  424. string:
  425.  
  426.    
  427.     ldi xl, 129
  428.     ldi xh, 0
  429.     call sendpack
  430.     ldi xl, 'C'
  431.     ldi xh, 1
  432.     call sendpack
  433.     ldi xl, 'o'
  434.     ldi xh, 1
  435.     call sendpack
  436.     ldi xl, 'u'
  437.     ldi xh, 1
  438.     call sendpack
  439.     ldi xl, 'n'
  440.     ldi xh, 1
  441.     call sendpack
  442.     ldi xl, 't'
  443.     ldi xh, 1
  444.     call sendpack
  445.     ldi xl, ' '
  446.     ldi xh, 1
  447.     call sendpack
  448.     ldi xl, 'o'
  449.     ldi xh, 1
  450.     call sendpack
  451.     ldi xl, 'f'
  452.     ldi xh, 1
  453.     call sendpack
  454.     ldi xl, ' '
  455.     ldi xh, 1
  456.     call sendpack
  457.     ldi xl, 'c'
  458.     ldi xh, 1
  459.     call sendpack
  460.     ldi xl, 'l'
  461.     ldi xh, 1
  462.     call sendpack
  463.     ldi xl, 'i'
  464.     ldi xh, 1
  465.     call sendpack
  466.     ldi xl, 'c'
  467.     ldi xh, 1
  468.     call sendpack
  469.     ldi xl, 'k'
  470.     ldi xh, 1
  471.     call sendpack
  472.     ldi xl, 's'
  473.     ldi xh, 1
  474.     call sendpack
  475.  
  476.     ldi xl, 196
  477.     ldi xh, 0
  478.     call sendpack
  479.  
  480.  
  481.     ldi r24, ADC_LEVEL
  482.     ;ldi counter0, 0
  483.  
  484.     read_from_ram r24, xl
  485.     ldi xh, 48
  486.     add xl, xh
  487.     ;ldi xl, '1'
  488.     mov counter0, xl
  489.    
  490.     ;ascii 48 is '0', 57 is '9', 58 is ':'
  491.     ;cpi counter0, 58
  492.     ;brne end
  493.  
  494.     ;ldi counter0, '0'
  495.     ;ldi r24, COUNT_BTN_PRESSED
  496.     ;write_to_ram r24, counter0
  497.  
  498.  
  499. end:
  500.     mov xl, counter0
  501.     ldi xh, 1
  502.     call sendpack
  503.  
  504. jmp P3
  505.  
  506. listen_button:
  507.    
  508.  
  509.     ;ldi yl,0
  510. btn1loop:
  511.    
  512.     call delay_5ms
  513.  
  514.     ; Skip pressed if Pd0 is no set
  515.     sbis PIND, 0
  516.     jmp btn_pressed
  517.     ldi yl,0
  518. end_loop:
  519.     jmp P2
  520.  
  521.  
  522. btn_pressed:
  523.    
  524.     cpi yl, 0
  525.     brne end_loop
  526.    
  527.     ldi yl,1
  528.    
  529.     ldi r24, COUNT_BTN_PRESSED
  530.     read_from_ram r24, r22
  531.     inc r22
  532.    
  533.     ldi r24, COUNT_BTN_PRESSED
  534.  
  535.     write_to_ram r24, r22
  536.     jmp P2
  537.  
  538.  
  539.     jmp btn_pressed
  540.  
  541. delay30:
  542.     ldi  r22, 2
  543.     ldi  r23, 56
  544.     ldi  r24, 174
  545. L2: dec  r24
  546.     brne L2
  547.     dec  r23
  548.     brne L2
  549.     dec  r22
  550.     brne L2    
  551. ret
  552.  
  553. EXT_INT0:
  554. EXT_INT1:
  555. TIM2_COMP:
  556. TIM2_OVF:
  557. TIM1_CAPT:
  558. TIM1_COMPA:
  559. TIM1_COMPB:
  560. TIM1_OVF:
  561. TIM0_OVF:
  562. SPI_STC:
  563. USART_RXC:
  564. USART_UDRE:
  565. USART_TXC:
  566. EE_RDY:
  567. ANA_COMP:
  568. TWSI:
  569. EXT_INT2:
  570. TIM0_COMP:
  571. SPM_RDY:
  572. ADC_H:
  573.     reti
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