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- jmp RESET ; Reset Handler
- jmp EXT_INT0 ; IRQ0 Handler
- jmp EXT_INT1 ; IRQ1 Handler
- jmp TIM2_COMP ; Timer2 Compare Handler
- jmp TIM2_OVF ; Timer2 Overflow Handler
- jmp TIM1_CAPT ; Timer1 Capture Handler
- jmp TIM1_COMPA ; Timer1 CompareA Handler
- jmp TIM1_COMPB ; Timer1 CompareB Handler
- jmp TIM1_OVF ; Timer1 Overflow Handler
- jmp TIM0_OVF ; Timer0 Overflow Handler
- jmp SPI_STC ; SPI Transfer Complete Handler
- jmp USART_RXC ; USART RX Complete Handler
- jmp USART_UDRE ; UDR Empty Handler
- jmp USART_TXC ; USART TX Complete Handler
- jmp ADC_H ; ADC Conversion Complete Handler
- jmp EE_RDY ; EEPROM Ready Handler
- jmp ANA_COMP ; Analog Comparator Handler
- jmp TWSI ; Two-wire Serial Interface Handler
- jmp EXT_INT2 ; IRQ2 Handler
- jmp TIM0_COMP ; Timer0 Compare Handler
- jmp SPM_RDY ; Store Program Memory Ready Handler
- #define RAMSTART 0x0060
- #define PROC_SIZE 128
- #define CONF_SIZE 9
- #define TEMP r16
- #define SOME_REG r17
- #define NUMBER_CUR_PROC r18
- #define JUST_TEMP r18
- #define PROC_NUM 0
- #define PROC_1_SPH 1
- #define PROC_1_SPL 2
- #define PROC_2_SPH 3
- #define PROC_2_SPL 4
- #define PROC_3_SPH 5
- #define PROC_3_SPL 6
- #define PROC_4_SPH 7
- #define PROC_4_SPL 8
- #define COUNT_BTN_PRESSED 9
- #define ADC_LEVEL 10
- #define counter0 r23
- #define counter1 r24
- #define TEMPH r16
- #define TEMPL r17
- .macro push_registers
- push r0 push r1 push r2 push r3 push r4 push r5 push r6 push r7 push r8 push r9
- push r10 push r11 push r12 push r13 push r14 push r15 push r16 push r17 push r18 push r19
- push r20 push r21 push r22 push r23 push r24 push r25 push r26 push r27 push r28 push r29
- push r30 push r31
- in xl, SREG
- push xl
- .endmacro
- .macro pop_registers
- pop xl
- out SREG, xl
- pop r31 pop r30 pop r29 pop r28 pop r27 pop r26 pop r25 pop r24 pop r23 pop r22 pop r21 pop r20
- pop r19 pop r18 pop r17 pop r16 pop r15 pop r14 pop r13 pop r12 pop r11 pop r10
- pop r9 pop r8 pop r7 pop r6 pop r5 pop r4 pop r3 pop r2 pop r1 pop r0
- .endmacro
- ;in @1:@2 load (@1:@2)+proc_size
- .macro add_proc_size
- ldi JUST_TEMP, PROC_SIZE
- add @0, JUST_TEMP
- ldi JUST_TEMP, 0
- adc @1, JUST_TEMP
- .endmacro
- ;@0 - smecshenie
- ;@1 - register with value
- ;write to addr ramstart ramstart + 4*proc_size + @0
- .macro write_to_ram
- ldi xl, low(RAMSTART)
- ldi xh, high(RAMSTART)
- add xl, @0
- ldi @0, 0
- adc xh, @0
- add_proc_size @0, xl, xh
- add_proc_size @0, xl, xh
- add_proc_size @0, xl, xh
- add_proc_size @0, xl, xh
- st x, @1
- .endmacro
- ;@0 - register with smeschenie
- ;@1 - register where will write data
- ;read data from ramstare+4*procsize+@0 to @1
- .macro read_from_ram
- ldi xl, low(RAMSTART)
- ldi xh, high(RAMSTART)
- add xl, @0
- ldi @0, 0
- adc xh, @0
- add_proc_size @0, xl, xh
- add_proc_size @0, xl, xh
- add_proc_size @0, xl, xh
- add_proc_size @0, xl, xh
- ld @1, x
- .endmacro
- ; load to yl and yh yl of process and yh of process
- .macro load_stack
- clr TEMP
- ldi SOME_REG, PROC_NUM
- read_from_ram SOME_REG, TEMP
- dec TEMP
- lsl TEMP
- inc TEMP
- clr yl
- clr yh
- read_from_ram TEMP, yh
- out sph, yh
- inc TEMP
- read_from_ram TEMP, yl
- out spl, yl
- .endmacro
- ;save only yl and yh
- .macro save_stack
- clr TEMP
- ldi SOME_REG, 0
- read_from_ram SOME_REG, TEMP
- dec TEMP
- ldi SOME_REG, 2
- mul TEMP, SOME_REG
- mov TEMP, r0
- inc TEMP
- in yl, spl
- in yh, sph
- write_to_ram TEMP, yh
- inc TEMP
- write_to_ram TEMP, yl
- .endmacro
- send_com_from_r16:
- out PORTA, r16
- sbi PORTA, 6
- nop nop nop nop
- cbi PORTA, 6
- nop nop nop nop
- call delay_5ms
- ret
- delay_5ms:
- ldi r18, 52
- ldi r19, 242
- L3: dec r19
- brne L3
- dec r18
- brne L3
- nop
- ret
- inits:
- ;button : button on A7
- sbi PORTD, 0
- ;diod on B3
- sbi DDRB, 3
- ;display
- call init_display
- call init_adc
- ret
- init_adc:
- ldi r20, (1<<0) | (1<<1)| (1<<2)
- out ADMUX, r20
- ;sbi ADMUX, ADLAR
- ;set ADC1 to input
- ;sbi ADMUX, MUX0
- //enable adc, start first conversation, conv comp int, set auto trig conv, set div to 128
- ldi r20, (1<<ADEN)|(1<<ADSC)|(1<<ADATE)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0)
- ; ADEN = 1 - разрешаем АЦП
- ; ADSC = 1 Запускаем преобразование (первое, дальше автоматом)
- ; ADIE = 1 Разрешаем прерывания.
- ; ADATE = 1 Непрерывные последовательные преобразования, одно за другим.
- ; ADPS2..0 Делитель частоты на 128
- out ADCSRA, r20
- ret
- init_display:
- ldi xl, 127
- out DDRA, xl
- call delay30
- ;send 000011
- ldi r16, 3
- call send_com_from_r16
- ;send 000011
- call send_com_from_r16
- ;send 000011
- call send_com_from_r16
- ;send 000010
- ldi r16, 2
- call send_com_from_r16
- ;send 000010
- call send_com_from_r16
- ;send 00NF00 = 001000
- ldi r16, 8
- call send_com_from_r16
- ;send 000000
- ldi r16, 0
- call send_com_from_r16
- ;send 001000
- ldi r16, 8
- call send_com_from_r16
- ;send 000000
- ldi r16, 0
- call send_com_from_r16
- ;send 000001
- ldi r16, 1
- call send_com_from_r16
- ;send 000000
- ldi r16, 0
- call send_com_from_r16
- ;send 0001I/DS
- ldi r16, 6
- call send_com_from_r16
- ; set addr ddram 0
- ldi xl, 2
- ldi xh, 0
- call sendpack
- ; display on
- ldi xl, 12
- ldi xh, 0
- call sendpack
- ret
- RESET:
- ldi xl, low(RAMEND)
- ldi xh, high(RAMEND)
- out SPL, xl
- out SPH, xh
- call inits
- ldi xl, low(RAMSTART)
- ldi xh, high(RAMSTART)
- ldi yl, low(RAMEND+1)
- ldi yh, high(RAMEND+1)
- clr TEMP
- ram_clear:
- st x+, TEMP
- cp xh, yh
- brne ram_clear
- cp xl, yl
- brne ram_clear
- conf_init:
- ldi TEMP, 1
- ldi SOME_REG, PROC_NUM
- write_to_ram SOME_REG, TEMP
- ldi yl, PROC_SIZE
- sbiw y, 33
- ldi xl, low(RAMSTART)
- ldi xh, high(RAMSTART)
- add yl, xl
- adc yh, xh
- ldi SOME_REG, PROC_1_SPH
- write_to_ram SOME_REG, yh
- ldi SOME_REG, PROC_1_SPL
- write_to_ram SOME_REG, yl
- add_proc_size yl, yh
- ldi SOME_REG, PROC_2_SPH
- write_to_ram SOME_REG, yh
- ldi SOME_REG, PROC_2_SPL
- write_to_ram SOME_REG, yl
- add_proc_size yl, yh
- ldi SOME_REG, PROC_3_SPH
- write_to_ram SOME_REG, yh
- ldi SOME_REG, PROC_3_SPL
- write_to_ram SOME_REG, yl
- add_proc_size yl, yh
- ldi SOME_REG, PROC_4_SPH
- write_to_ram SOME_REG, yh
- ldi SOME_REG, PROC_4_SPL
- write_to_ram SOME_REG, yl
- ;ldi SOME_REG, COUNT_BTN_PRESSED
- ;ldi yl, '0'
- ;write_to_ram SOME_REG, yl
- ;ldi SOME_REG, ADC_LEVEL
- ;ldi yl, 0
- ;write_to_ram SOME_REG, yl
- switch:
- load_stack
- pop_registers
- jmp read_adc
- P1: push_registers
- save_stack
- clr JUST_TEMP
- ldi SOME_REG, PROC_NUM
- read_from_ram SOME_REG, JUST_TEMP
- inc JUST_TEMP
- write_to_ram SOME_REG, JUST_TEMP
- load_stack
- pop_registers
- jmp listen_button
- P2: push_registers
- save_stack
- clr JUST_TEMP
- ldi SOME_REG, PROC_NUM
- read_from_ram SOME_REG, JUST_TEMP
- inc JUST_TEMP
- write_to_ram SOME_REG, JUST_TEMP
- load_stack
- pop_registers
- jmp proc_test
- P3: push_registers
- save_stack
- ldi SOME_REG, PROC_NUM
- ldi TEMP, 1
- write_to_ram SOME_REG, TEMP
- jmp switch
- read_adc:
- in TEMPH, ADMUX
- bst TEMPH, ADLAR
- brtc adc_init
- not_ain:in TEMPH, ADCSRA
- bst TEMPH, ADIF
- brts write_value
- jmp P1
- adc_init:
- ldi TEMPH, (1<<ADLAR)|(0<<MUX4)|(0<<MUX3)|(1<<MUX2)|(1<<MUX1)|(1<<MUX0)
- out ADMUX, TEMPH
- clr TEMPH
- ori TEMPH,(1<<ADEN)|(1<<ADSC)|(1<<ADATE)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0)
- out ADCSRA, TEMPH
- jmp not_ain
- write_value:
- ldi TEMPL, ADC_LEVEL
- in TEMPH, ADCH
- write_to_ram TEMPL, TEMPH
- ldi TEMPL, (1<<ADEN)|(1<<ADSC)|(1<<ADATE)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0)|(1<<ADIF)
- out ADCSRA, TEMPL
- jmp P1
- proc_test:
- sbi PORTB, 3
- jmp string
- jmp P3
- sendpack:
- ;xh<<5
- lsl xh lsl xh lsl xh lsl xh lsl xh
- ldi yl, 0x0f
- ;yh - 1111 0000
- ldi yh, 0xf0
- ;first four bits of xl then 0000
- and yh, xl
- ;yh >> 4
- lsr yh lsr yh lsr yh lsr yh
- ;r16 = yh
- mov r16, yh
- add r16, xh
- nop nop
- call send_com_from_r16
- and yl, xl
- mov r16, yl
- add r16, xh
- nop nop
- call send_com_from_r16
- ret
- string:
- ldi xl, 129
- ldi xh, 0
- call sendpack
- ldi xl, 'C'
- ldi xh, 1
- call sendpack
- ldi xl, 'o'
- ldi xh, 1
- call sendpack
- ldi xl, 'u'
- ldi xh, 1
- call sendpack
- ldi xl, 'n'
- ldi xh, 1
- call sendpack
- ldi xl, 't'
- ldi xh, 1
- call sendpack
- ldi xl, ' '
- ldi xh, 1
- call sendpack
- ldi xl, 'o'
- ldi xh, 1
- call sendpack
- ldi xl, 'f'
- ldi xh, 1
- call sendpack
- ldi xl, ' '
- ldi xh, 1
- call sendpack
- ldi xl, 'c'
- ldi xh, 1
- call sendpack
- ldi xl, 'l'
- ldi xh, 1
- call sendpack
- ldi xl, 'i'
- ldi xh, 1
- call sendpack
- ldi xl, 'c'
- ldi xh, 1
- call sendpack
- ldi xl, 'k'
- ldi xh, 1
- call sendpack
- ldi xl, 's'
- ldi xh, 1
- call sendpack
- ldi xl, 196
- ldi xh, 0
- call sendpack
- ldi r24, ADC_LEVEL
- ;ldi counter0, 0
- read_from_ram r24, xl
- ldi xh, 48
- add xl, xh
- ;ldi xl, '1'
- mov counter0, xl
- ;ascii 48 is '0', 57 is '9', 58 is ':'
- ;cpi counter0, 58
- ;brne end
- ;ldi counter0, '0'
- ;ldi r24, COUNT_BTN_PRESSED
- ;write_to_ram r24, counter0
- end:
- mov xl, counter0
- ldi xh, 1
- call sendpack
- jmp P3
- listen_button:
- ;ldi yl,0
- btn1loop:
- call delay_5ms
- ; Skip pressed if Pd0 is no set
- sbis PIND, 0
- jmp btn_pressed
- ldi yl,0
- end_loop:
- jmp P2
- btn_pressed:
- cpi yl, 0
- brne end_loop
- ldi yl,1
- ldi r24, COUNT_BTN_PRESSED
- read_from_ram r24, r22
- inc r22
- ldi r24, COUNT_BTN_PRESSED
- write_to_ram r24, r22
- jmp P2
- jmp btn_pressed
- delay30:
- ldi r22, 2
- ldi r23, 56
- ldi r24, 174
- L2: dec r24
- brne L2
- dec r23
- brne L2
- dec r22
- brne L2
- ret
- EXT_INT0:
- EXT_INT1:
- TIM2_COMP:
- TIM2_OVF:
- TIM1_CAPT:
- TIM1_COMPA:
- TIM1_COMPB:
- TIM1_OVF:
- TIM0_OVF:
- SPI_STC:
- USART_RXC:
- USART_UDRE:
- USART_TXC:
- EE_RDY:
- ANA_COMP:
- TWSI:
- EXT_INT2:
- TIM0_COMP:
- SPM_RDY:
- ADC_H:
- reti
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