use std::marker::PhantomData;

trait Emu {
    fn render_frame(&mut self);
}

trait Mips64Desc {
    fn pc_mask(pc: u64) -> u64;
    fn addr_mask(addr: u64) -> u64;
}

struct R4300Desc{}
struct RspDesc{}

impl Mips64Desc for R4300Desc {
/*    type Cop0 = mips64::Cop0;
    type Cop1 = mips64::Fpu;
*/
    fn pc_mask(pc: u64) -> u64 {
        Self::addr_mask(pc)
    }
    fn addr_mask(addr: u64) -> u64 {
        addr & 0x1fff_ffff
    }
}

impl Mips64Desc for RspDesc {
/*    type Cop0 = SpCop0;
    type Cop2 = SpCop2;
*/
    fn pc_mask(pc: u64) -> u64 {
        (pc & 0xfff) | 0x1000
    }
    fn addr_mask(addr: u64) -> u64 {
        addr & 0xfff
    }
}

struct Bus<E: Emu> {
    func: Box<FnMut(&mut E, u64, u64)>,
}

impl<E: Emu> Bus<E> {
    fn read(&self, addr: u64) -> u32 {
        println!("bus->read {}", addr);
        4
    }
    fn write(&mut self, emu: &mut E, addr: u64, val: u32) {
        println!("bus->write: {}, {}", addr, val);
        (self.func)(emu, addr, val as u64);
    }
}

struct Mips64<E: Emu, D: Mips64Desc> {
    regs: [u64; 32],
    _phantom: PhantomData<(E,D)>,
}

impl<E: Emu, D:Mips64Desc> Mips64<E,D> {
    fn run(&self, _emu: &mut E, _cycles: u64) {

    }
}

struct Sp {
    cpu: Mips64<N64,RspDesc>,
    reg_status: u32,
    reg_control: u32,
    reg_imem: [u8; 4096],
    reg_dmem: [u8; 4096],
}

struct N64 {
    main_cpu: Mips64<N64,R4300Desc>,
    rcp_bus: Bus<N64>,
    sp: Sp,
}

impl Emu for N64 {
    fn render_frame(&mut self) {
        self.main_cpu.run(self, 1000);
    }
}